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APS: Open-Source Hardware-Software Co-Design Framework for Agile Processor Specialization Research

HTML 9 Updated Oct 27, 2025

NEX - Hardware Accelerator Full-Stack Simulation Framework

C++ 7 1 Updated Sep 10, 2025

Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"

Python 47 10 Updated Sep 1, 2025
OCaml 15 2 Updated Nov 2, 2025

🚀 Efficient implementations of state-of-the-art linear attention models

Python 3,846 302 Updated Nov 17, 2025

Open ABI and FFI for Machine Learning Systems

C++ 175 36 Updated Nov 17, 2025

Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving

C++ 19 2 Updated Nov 1, 2025

Top-level repository of ACT Ecosystem

Python 8 1 Updated Oct 19, 2025

Mirage Persistent Kernel: Compiling LLMs into a MegaKernel

C++ 1,950 152 Updated Nov 15, 2025

Public repository for Skills

Python 17,288 1,570 Updated Nov 12, 2025

A machine learning accelerator core designed for energy-efficient AI at the edge.

Emacs Lisp 1,808 191 Updated Nov 13, 2025

Asterinas is a secure, fast, and general-purpose OS kernel, written in Rust and providing Linux-compatible ABI.

Rust 3,826 244 Updated Nov 17, 2025

High level synthesis language for hardware design

C++ 65 3 Updated Nov 10, 2025

Domain-specific language designed to streamline the development of high-performance GPU/CPU/Accelerators kernels

C++ 3,937 317 Updated Nov 17, 2025

ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference

C++ 167 28 Updated Feb 10, 2025

DeepSeek-V3/R1 inference performance simulator

Jupyter Notebook 11 1 Updated Nov 17, 2025

MLIR Compiler for Arm Specification Lanuage

ASL 7 1 Updated Oct 6, 2025

The Herd toolsuite to deal with .cat memory models (version 7.xx)

OCaml 281 88 Updated Nov 16, 2025

VAST is an experimental compiler pipeline designed for program analysis of C and C++. It provides a tower of IRs as MLIR dialects to choose the best fit representations for a program analysis or fu…

C++ 426 31 Updated Oct 29, 2025

Safe interop between Rust and C++

Rust 6,533 390 Updated Nov 15, 2025

MLIR+EqSat

MLIR 21 3 Updated Aug 12, 2025

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

SystemVerilog 1,406 319 Updated Nov 13, 2025

A minimal GPU design in Verilog to learn how GPUs work from the ground up

SystemVerilog 8,894 698 Updated Aug 18, 2024

Home for "How To Scale Your Model", a short blog-style textbook about scaling LLMs on TPUs

HTML 688 101 Updated Nov 16, 2025

magic-trace collects and displays high-resolution traces of what a process is doing

OCaml 5,145 114 Updated Oct 25, 2025

RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores

SystemVerilog 93 37 Updated Nov 7, 2025

A GUI to quickly manage your WSL2 instances

Dart 2,676 150 Updated Aug 19, 2025

An open-source AI agent that brings the power of Gemini directly into your terminal.

TypeScript 82,753 9,299 Updated Nov 17, 2025
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