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Commits on Aug 7, 2025

• [AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)

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Commits on Aug 6, 2025

• [AArch64] Update test from #151180. (#152299)

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• [AArch64] Improve lowering of scalar abs(sub(a, b)). (#151180)

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• [AArch64] Drop poison flags when lowering absolute difference patterns. (#152130)

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Commits on Jul 30, 2025

• [AArch64] Use CNEG for absolute difference patterns. (#151177)

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• [AArch64] Refactor AND/ANDS bitmask splitting (NFC). (#150619)

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Commits on Jul 22, 2025

• [AArch64] Allow splitting bitmasks for ANDS. (#149095)

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Commits on Jul 10, 2025

• [AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)

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Commits on Jul 9, 2025

• [AArch64] Lower disjoint_or+not to eon. (#147279)

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Commits on Jul 8, 2025

• [AArch64] Enable using SVE2 bit-sel instructions with Neon types. (#146906)

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Commits on Jul 7, 2025

• [AArch64] Add support for -mcpu=gb10. (#146515)

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Commits on Jul 1, 2025

• [InstCombine] Combine interleaved recurrences. (#143878)

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Commits on Jun 30, 2025

• [AArch64] Improve scalar and Neon popcount with SVE CNT. (#143870)

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Commits on Jun 16, 2025

• [ValueTracking] Remove unused variable in matchSimpleRecurrence (NFC). (#144316)

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• [ValueTracking] Remove opcode whitelist from matchSimpleRecurrence. (#144031)

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Commits on Jun 9, 2025

• [AArch64][SVE] Mark AES instructions commutable. (#142919)

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• [AArch64][InstCombine] Combine AES instructions with zero operands. (#142781)

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Commits on May 15, 2025

• [AArch64] Use vecshiftL64 instead of vecshiftR64 to match scalar SLI imm. (#139904)

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Commits on May 12, 2025

• [AArch64][SVE] Add patterns for bit-select instructions. (#138689)

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• [AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

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Commits on May 6, 2025

• [AArch64][SVE] Combine UXT[BHW] intrinsics to AND. (#137956)

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Commits on Apr 30, 2025

• [InstCombine] Do not combine shuffle+bitcast if the bitcast is eliminable. (#135769)

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Commits on Apr 17, 2025

• [AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)

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Commits on Apr 14, 2025

• Reapply "[AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128." (#135177)

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Commits on Apr 9, 2025

• [AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128. (#134068)

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Commits on Mar 25, 2025

• [AArch64] Add initial support for -mcpu=olympus. (#132368)

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Commits on Mar 19, 2025

• Reapply "[AArch64][SVE] Improve fixed-length addressing modes. (#129732)" (#130625)

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Commits on Mar 7, 2025

• Revert "[AArch64][SVE] Improve fixed-length addressing modes." (#130263)

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Commits on Mar 6, 2025

• [AArch64][SVE] Improve fixed-length addressing modes. (#129732)

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Commits on Feb 26, 2025

• [AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)

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Commits on Feb 17, 2025

• [TableGen] Add support for per-write cycle tunables (#125870)

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Commits on Feb 10, 2025

• [AArch64] Add MATCH loops to LoopIdiomVectorizePass (#101976)

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Commits on Dec 11, 2024

• [AArch64] Add cost model for @experimental.vector.match (#118512)

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Commits on Nov 15, 2024

• [AArch64][SVE] Detect MOV (imm, pred, zeroing/merging) (#116032)

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Commits on Nov 14, 2024

• [AArch64] Add @llvm.experimental.vector.match (#101974)

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