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infiWang
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@infiWang infiWang commented Sep 8, 2024

This patchset adds full interpreter and backend support for RISC-V 64 G(IMAFD) with LP64D ABI on Linux, with compile-time/runtime extension support for RVC, Zba, Zbb, Zicond, XTheadBa, XTheadBb, XTheadCondMov and XTheadMac.

Thanks to Mike Pall, LuaJIT is well renowned for its accomplishments and performance in JIT compilers. As an undergraduate interested in RISC-V and compilers, I'm honored to have a chance to contribute to a production compiler. I also want to express my gratitude for the internship opportunity provided by PLCT Lab, ISCAS, which enabled me to this endeavor.

I would greatly value a review of my patch to catch my misses and for a better polish; Your feedback would be invaluable. Thank you for your time and consideration.

@fwsGonzo
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fwsGonzo commented Sep 8, 2024

Puqns67 added a commit to Puqns67/gentoo-riscv that referenced this pull request Nov 4, 2024
Copy ebuild from the main tree, update to last git commit,
then add a patch [1] to support RISC-V.

Link: LuaJIT/LuaJIT#1267 [1]
Signed-off-by: Puqns67 <me@puqns67.icu>
gentoo-bot pushed a commit to gentoo/riscv that referenced this pull request Nov 16, 2024
Copy ebuild from the main tree, update to last git commit,
then add a patch [1] to support RISC-V.

Link: LuaJIT/LuaJIT#1267 [1]
Signed-off-by: Puqns67 <me@puqns67.icu>
Closes: #20
Signed-off-by: Jakov Smolić <jsmolic@gentoo.org>
@Buristan
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Hi, I've found that the #762 (#1308) affects this PR too.

src/luajit -e 'print(pcall(pcall))'
Segmentation fault (core dumped)

Instead of

false   bad argument #1 to '?' (value expected)

The following patch fixes the issue for me:

diff --git a/src/vm_riscv64.dasc b/src/vm_riscv64.dasc
index 791ea510..408d97bb 100644
--- a/src/vm_riscv64.dasc
+++ b/src/vm_riscv64.dasc
@@ -1483,10 +1483,11 @@ static void build_subroutines(BuildCtx *ctx)
   |  ld TMP1, L->maxstack
   |  add TMP2, BASE, NARGS8:RC
   |  bxltu TMP1, TMP2, ->fff_fallback
-  |  addi NARGS8:RC, NARGS8:RC, -8
+  |  addi NARGS8:TMP0, NARGS8:RC, -8
   |   lbu TMP3, GL->hookmask
   |   mv TMP2, BASE
-  |  bxltz NARGS8:RC, ->fff_fallback
+  |  bxltz NARGS8:TMP0, ->fff_fallback
+  |  mv NARGS8:RC, NARGS8:TMP0
   |   addi BASE, BASE, 16
   |  // Remember active hook before pcall.
   |  srliw TMP3, TMP3, HOOK_ACTIVE_SHIFT

@infiWang
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infiWang commented Nov 23, 2024

Hi, I've found that the #762 (#1308) affects this PR too.

Oh wow, thought I ported most MIPS/AA64 patches. I'll do a refresh right away.

@infiWang infiWang force-pushed the v2.1-riscv64-pr branch 2 times, most recently from be597a6 to 73a9765 Compare November 23, 2024 10:59
@Buristan
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I've found one more inconsistency for RISCV VM and JIT:

LUA_PATH="src/?.lua;;"  src/luajit -jdump=bi -Ohotloop=1 -e '
local result = {}
local min = math.min
local max = math.max
local nan = 0 / 0
print(min(7.1, nan), "should be nan")
for i = 1, 4 do
  result[i] = min(7.1, 0/0)
end

jit.off()

for i = 1, 4 do print(result[i]) end
'
7.1	should be nan
---- TRACE 1 start (command line):7
0013  MOV      8   1
0014  KNUM    10   1      ; 7.1
0015  KSHORT  11   0
0016  DIVVN   11  11   0  ; 0
0017  CALL     8   2   3
0000  . FUNCC               ; math.min
0018  TSETV    8   0   7
LuaJIT ASSERT lj_record.c:172: rec_check_slots: slot 10 const mismatch: stack 401c666666666666 vs IR 7ff8000000000000
Aborted (core dumped)

This happens due to the usage of fmin.d/fmax.d instructions, which return NaN if either operand is NaN. That contradicts the min/max semantics in Lua (and LuaJIT).

I've work-arounded this with the following simple-minded patch for the VM and JIT:

diff --git a/src/lj_asm_riscv64.h b/src/lj_asm_riscv64.h
index 94de47c6..79aaba08 100644
--- a/src/lj_asm_riscv64.h
+++ b/src/lj_asm_riscv64.h
@@ -1548,9 +1548,22 @@ static void asm_min_max(ASMState *as, IRIns *ir, int ismax)
 {
   if (irt_isnum(ir->t)) {
     Reg dest = ra_dest(as, ir, RSET_FPR);
+    MCLabel l_ret_left, l_end;
     Reg right, left = ra_alloc2(as, ir, RSET_FPR);
     right = (left >> 8); left &= 255;
-    emit_ds1s2(as, ismax ? RISCVI_FMAX_D : RISCVI_FMIN_D, dest, left, right);
+    l_end = emit_label(as);
+
+    if (dest != left)
+      emit_ds1s2(as, RISCVI_FMV_D, dest, left, left);
+    l_ret_left = emit_label(as);
+
+    emit_jmp(as, l_end);
+    if (dest != right)
+      emit_ds1s2(as, RISCVI_FMV_D, dest, right, right);
+
+    emit_branch(as, RISCVI_BNE, RID_TMP, RID_ZERO, l_ret_left, 0);
+    emit_ds1s2(as, RISCVI_FLT_D, RID_TMP, ismax ? right : left,
+	       ismax ? left : right);
   } else {
     Reg dest = ra_dest(as, ir, RSET_GPR);
     Reg left = ra_hintalloc(as, ir->op1, dest, RSET_GPR);
diff --git a/src/vm_riscv64.dasc b/src/vm_riscv64.dasc
index 916d662f..4c154694 100644
--- a/src/vm_riscv64.dasc
+++ b/src/vm_riscv64.dasc
@@ -1837,7 +1837,14 @@ static void build_subroutines(BuildCtx *ctx)
   |   bxgeu RA, RB, ->fff_resn
   |  checknum CARG2, >7
   |6:
-  |  fpins FARG1, FARG1, FARG2
+  |.if ismax
+  |  flt.d TMP0, FARG2, FARG1
+  |.else // min
+  |  flt.d TMP0, FARG1, FARG2
+  |.endif
+  |  bnez TMP0, >8 // skip swap
+  |  fmv.d FARG1, FARG2
+  |8:
   |   addi RA, RA, 8
   |  j <5
   |7:  // Convert integer to number and continue above.

@infiWang
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Happy holidays!

This happens due to the usage of fmin.d/fmax.d instructions, which return NaN if either operand is NaN. That contradicts the min/max semantics in Lua (and LuaJIT).

I noticed the NaN issue about math.min and math.max in #957, #1082, and mailing list. I'd like to be sure about where the semantics were defined or what de facto standard LuaJIT opted for.

@corsix
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corsix commented Dec 26, 2024

Other backends, for both interpreter and JIT, have converged on op1 < op2 ? op1 : op2 (min) or op1 > op2 ? op1 : op2 (max) as the semantics. The optimiser has also converged on these semantics. This is conveniently minsd / maxsd on x86/x64, but you can look at e.g. arm64 as an example of where fmin / fmax instructions exist in the ISA, but LuaJIT instead opts for a multi-instruction sequence to get the desired semantics. It is unfortunate that RISC-V lacks a flags register, and thus lacks conditional moves, and also lacks bitwise operations on its floating-point registers, meaning that's there's no cheap branchless way of getting the desired semantics.

@TamNguyen1507
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Hello @infiWang ,I am currently attempting to compile LuaJIT for the RISCV64 architecture and have applied the recent pull request. However, I am encountering compilation failures during the assembly stage. Could you please provide any guidance or instructions to help resolve these issues? I would greatly appreciate your assistance. Attached below is the compile log for your reference:
PC-108:~/user/test/LuaJIT$ make CROSS=riscv64-poky-linux-
==== Building LuaJIT 2.1 ====
make -C src
make[1]: Entering directory '/home/user/test/LuaJIT/src'
HOSTCC host/minilua.o
HOSTLINK host/minilua
VERSION luajit.h
DYNASM host/buildvm_arch.h
HOSTCC host/buildvm.o
HOSTCC host/buildvm_asm.o
HOSTCC host/buildvm_peobj.o
HOSTCC host/buildvm_lib.o
HOSTCC host/buildvm_fold.o
HOSTLINK host/buildvm
BUILDVM lj_vm.S
ASM lj_vm.o
buildvm_riscv.dasc: Assembler messages:
buildvm_riscv.dasc:3: Warning: Unrecognized .option directive: arch,-c

buildvm_riscv.dasc:682: Error: bad expression
buildvm_riscv.dasc:682: Error: illegal operands auipc x5,%got_pcrel_hi(pow)' buildvm_riscv.dasc:2559: Error: bad expression buildvm_riscv.dasc:2559: Error: illegal operands auipc x5,%got_pcrel_hi(log)'
buildvm_riscv.dasc:2576: Error: bad expression
buildvm_riscv.dasc:2576: Error: illegal operands auipc x5,%got_pcrel_hi(log10)' buildvm_riscv.dasc:2593: Error: bad expression buildvm_riscv.dasc:2593: Error: illegal operands auipc x5,%got_pcrel_hi(exp)'
buildvm_riscv.dasc:2610: Error: bad expression
buildvm_riscv.dasc:2610: Error: illegal operands auipc x5,%got_pcrel_hi(sin)' buildvm_riscv.dasc:2627: Error: bad expression buildvm_riscv.dasc:2627: Error: illegal operands auipc x5,%got_pcrel_hi(cos)'
buildvm_riscv.dasc:2644: Error: bad expression
buildvm_riscv.dasc:2644: Error: illegal operands auipc x5,%got_pcrel_hi(tan)' buildvm_riscv.dasc:2661: Error: bad expression buildvm_riscv.dasc:2661: Error: illegal operands auipc x5,%got_pcrel_hi(asin)'
buildvm_riscv.dasc:2678: Error: bad expression
buildvm_riscv.dasc:2678: Error: illegal operands auipc x5,%got_pcrel_hi(acos)' buildvm_riscv.dasc:2695: Error: bad expression buildvm_riscv.dasc:2695: Error: illegal operands auipc x5,%got_pcrel_hi(atan)'
buildvm_riscv.dasc:2712: Error: bad expression
buildvm_riscv.dasc:2712: Error: illegal operands auipc x5,%got_pcrel_hi(sinh)' buildvm_riscv.dasc:2729: Error: bad expression buildvm_riscv.dasc:2729: Error: illegal operands auipc x5,%got_pcrel_hi(cosh)'
buildvm_riscv.dasc:2746: Error: bad expression
buildvm_riscv.dasc:2746: Error: illegal operands auipc x5,%got_pcrel_hi(tanh)' buildvm_riscv.dasc:2765: Error: bad expression buildvm_riscv.dasc:2765: Error: illegal operands auipc x5,%got_pcrel_hi(pow)'
buildvm_riscv.dasc:2784: Error: bad expression
buildvm_riscv.dasc:2784: Error: illegal operands auipc x5,%got_pcrel_hi(atan2)' buildvm_riscv.dasc:2803: Error: bad expression buildvm_riscv.dasc:2803: Error: illegal operands auipc x5,%got_pcrel_hi(fmod)'
buildvm_riscv.dasc:2822: Error: bad expression
buildvm_riscv.dasc:2822: Error: illegal operands auipc x5,%got_pcrel_hi(ldexp)' buildvm_riscv.dasc:2840: Error: bad expression buildvm_riscv.dasc:2840: Error: illegal operands auipc x5,%got_pcrel_hi(frexp)'
buildvm_riscv.dasc:2859: Error: bad expression
buildvm_riscv.dasc:2859: Error: illegal operands `auipc x5,%got_pcrel_hi(modf)'
make[1]: *** [Makefile:721: lj_vm.o] Error 1
make[1]: Leaving directory '/home/user/test/LuaJIT/src'
make: *** [Makefile:128: default] Error 2
Thank you very much for your help.

@infiWang
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infiWang commented Jan 2, 2025

@TamNguyen1507

buildvm_riscv.dasc: Assembler messages:
buildvm_riscv.dasc:3: Warning: Unrecognized .option directive: arch,-c

AFAICT, you're building with Yocto SDK, which I haven't tested yet. This message indicates something is off about your assembler.

I've just tested with Debian's GCC cross-toolchain, which works fine. My RISC-V board is down at the moment, but iirc, Clang should work too, though I'm not so sure about llvm-as.

What SDK version are you using? I think detailed info about the compiler and assembler would be helpful.

@infiWang
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infiWang commented Jan 2, 2025

buildvm_riscv.dasc:682: Error: bad expression buildvm_riscv.dasc:682: Error: illegal operands auipc x5,%got_pcrel_hi(pow)'

Also, where does the quotation mark at the end of the line come from? I don't see any complaints about %pcrel_hi; please check if you have accidentally changed something.

@TamNguyen1507
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@TamNguyen1507

buildvm_riscv.dasc: Assembler messages:
buildvm_riscv.dasc:3: Warning: Unrecognized .option directive: arch,-c

AFAICT, you're building with Yocto SDK, which I haven't tested yet. This message indicates something is off about your assembler.

I've just tested with Debian's GCC cross-toolchain, which works fine. My RISC-V board is down at the moment, but iirc, Clang should work too, though I'm not so sure about llvm-as.

What SDK version are you using? I think detailed info about the compiler and assembler would be helpful.

Hello @infiWang, thank you for your reply. I am currently using Yocto SDK 3.1.13. Below are my environment variables:
CC = riscv64-poky-linux-gcc -fstack-protector-strong -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security -Werror=format-security --sysroot=/opt/poky/sysroots/riscv64-poky-linux
CFLAGS = -O3 -funroll-loops -O2 -pipe -g -feliminate-unused-debug-types
LD = riscv64-poky-linux-ld --sysroot=/opt/poky/sysroots/riscv64-poky-linux
LDFLAGS = -Wl,-O1 -Wl,--hash-style=gnu -Wl,--as-needed -fstack-protector-strong -Wl,-z,relro,-z,now
AM_CFLAGS = -Wall -Wextra -Wpointer-arith -Wbad-function-cast -Wstrict-prototypes -Wnested-externs -Wno-format-zero-length -Wundef -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations -Wredundant-decls -Wcast-align -Wvla -pthread

buildvm_riscv.dasc:682: Error: bad expression buildvm_riscv.dasc:682: Error: illegal operands auipc x5,%got_pcrel_hi(pow)'

Also, where does the quotation mark at the end of the line come from? I don't see any complaints about %pcrel_hi; please check if you have accidentally changed something.

Oh, this was just a mistake when copying and pasting; here is the correct log:
PC-108:~/user/test/LuaJIT$ make CROSS=riscv64-poky-linux-
==== Building LuaJIT 2.1 ====
make -C src
make[1]: Entering directory '/home/user/test/LuaJIT/src'
HOSTCC host/minilua.o
HOSTLINK host/minilua
VERSION luajit.h
DYNASM host/buildvm_arch.h
HOSTCC host/buildvm.o
HOSTCC host/buildvm_asm.o
HOSTCC host/buildvm_peobj.o
HOSTCC host/buildvm_lib.o
HOSTCC host/buildvm_fold.o
HOSTLINK host/buildvm
BUILDVM lj_vm.S
ASM lj_vm.o
buildvm_riscv.dasc: Assembler messages:
buildvm_riscv.dasc:3: Warning: Unrecognized .option directive: arch,-c
buildvm_riscv.dasc:682: Error: bad expression
buildvm_riscv.dasc:682: Error: illegal operands auipc x5,%got_pcrel_hi(pow)' buildvm_riscv.dasc:2559: Error: bad expression buildvm_riscv.dasc:2559: Error: illegal operands auipc x5,%got_pcrel_hi(log)'
buildvm_riscv.dasc:2576: Error: bad expression
buildvm_riscv.dasc:2576: Error: illegal operands auipc x5,%got_pcrel_hi(log10)' buildvm_riscv.dasc:2593: Error: bad expression buildvm_riscv.dasc:2593: Error: illegal operands auipc x5,%got_pcrel_hi(exp)'
buildvm_riscv.dasc:2610: Error: bad expression
buildvm_riscv.dasc:2610: Error: illegal operands auipc x5,%got_pcrel_hi(sin)' buildvm_riscv.dasc:2627: Error: bad expression buildvm_riscv.dasc:2627: Error: illegal operands auipc x5,%got_pcrel_hi(cos)'
buildvm_riscv.dasc:2644: Error: bad expression
buildvm_riscv.dasc:2644: Error: illegal operands auipc x5,%got_pcrel_hi(tan)' buildvm_riscv.dasc:2661: Error: bad expression buildvm_riscv.dasc:2661: Error: illegal operands auipc x5,%got_pcrel_hi(asin)'
buildvm_riscv.dasc:2678: Error: bad expression
buildvm_riscv.dasc:2678: Error: illegal operands auipc x5,%got_pcrel_hi(acos)' buildvm_riscv.dasc:2695: Error: bad expression buildvm_riscv.dasc:2695: Error: illegal operands auipc x5,%got_pcrel_hi(atan)'
buildvm_riscv.dasc:2712: Error: bad expression
buildvm_riscv.dasc:2712: Error: illegal operands auipc x5,%got_pcrel_hi(sinh)' buildvm_riscv.dasc:2729: Error: bad expression buildvm_riscv.dasc:2729: Error: illegal operands auipc x5,%got_pcrel_hi(cosh)'
buildvm_riscv.dasc:2746: Error: bad expression
buildvm_riscv.dasc:2746: Error: illegal operands auipc x5,%got_pcrel_hi(tanh)' buildvm_riscv.dasc:2765: Error: bad expression buildvm_riscv.dasc:2765: Error: illegal operands auipc x5,%got_pcrel_hi(pow)'
buildvm_riscv.dasc:2784: Error: bad expression
buildvm_riscv.dasc:2784: Error: illegal operands auipc x5,%got_pcrel_hi(atan2)' buildvm_riscv.dasc:2803: Error: bad expression buildvm_riscv.dasc:2803: Error: illegal operands auipc x5,%got_pcrel_hi(fmod)'
buildvm_riscv.dasc:2822: Error: bad expression
buildvm_riscv.dasc:2822: Error: illegal operands auipc x5,%got_pcrel_hi(ldexp)' buildvm_riscv.dasc:2840: Error: bad expression buildvm_riscv.dasc:2840: Error: illegal operands auipc x5,%got_pcrel_hi(frexp)'
buildvm_riscv.dasc:2859: Error: bad expression
buildvm_riscv.dasc:2859: Error: illegal operands `auipc x5,%got_pcrel_hi(modf)'

Here is my process to compile luajit source:
PC-108:/user/test$ git clone https://github.com/LuaJIT/LuaJIT.git
Cloning into 'LuaJIT'...
remote: Enumerating objects: 20087, done.
remote: Total 20087 (delta 0), reused 0 (delta 0), pack-reused 20087 (from 1)
Receiving objects: 100% (20087/20087), 8.63 MiB | 13.21 MiB/s, done.
Resolving deltas: 100% (16474/16474), done.
PC-108:
/user/test$ cd LuaJIT/
PC-108:~/user/test/LuaJIT$ git fetch origin pull/1267/head:my_branch
remote: Enumerating objects: 103, done.
remote: Counting objects: 100% (63/63), done.
remote: Total 103 (delta 63), reused 63 (delta 63), pack-reused 40 (from 1)
Receiving objects: 100% (103/103), 100.04 KiB | 231.00 KiB/s, done.
Resolving deltas: 100% (73/73), completed with 26 local objects.
From https://github.com/LuaJIT/LuaJIT

  • [new ref] refs/pull/1267/head -> my_branch
    PC-108:/user/test/LuaJIT$ git checkout my_branch
    Switched to branch 'my_branch'
    PC-108:
    /user/test/LuaJIT$ source /opt/poky/environment-setup-riscv64-poky-linux
    PC-108:~/user/test/LuaJIT$ make CROSS=riscv64-poky-linux-
    ==== Building LuaJIT 2.1 ====
    make -C src
    make[1]: Entering directory '/home/user/test/LuaJIT/src'
    HOSTCC host/minilua.o
    HOSTLINK host/minilua
    VERSION luajit.h
    DYNASM host/buildvm_arch.h
    HOSTCC host/buildvm.o
    HOSTCC host/buildvm_asm.o
    HOSTCC host/buildvm_peobj.o
    HOSTCC host/buildvm_lib.o
    HOSTCC host/buildvm_fold.o
    HOSTLINK host/buildvm
    BUILDVM lj_vm.S
    ASM lj_vm.o
    buildvm_riscv.dasc: Assembler messages:
    buildvm_riscv.dasc:3: Warning: Unrecognized .option directive: arch,-c

buildvm_riscv.dasc:682: Error: bad expression
buildvm_riscv.dasc:682: Error: illegal operands `auipc x5,%got_pcrel_hi(pow)'
buildvm_riscv.dasc:2559: Error: bad expression

buildvm_riscv.dasc:2559: Error: illegal operands auipc x5,%got_pcrel_hi(log)' buildvm_riscv.dasc:2576: Error: bad expression buildvm_riscv.dasc:2576: Error: illegal operands auipc x5,%got_pcrel_hi(log10)'
buildvm_riscv.dasc:2593: Error: bad expression
buildvm_riscv.dasc:2593: Error: illegal operands auipc x5,%got_pcrel_hi(exp)' buildvm_riscv.dasc:2610: Error: bad expression buildvm_riscv.dasc:2610: Error: illegal operands auipc x5,%got_pcrel_hi(sin)'
buildvm_riscv.dasc:2627: Error: bad expression
buildvm_riscv.dasc:2627: Error: illegal operands auipc x5,%got_pcrel_hi(cos)' buildvm_riscv.dasc:2644: Error: bad expression buildvm_riscv.dasc:2644: Error: illegal operands auipc x5,%got_pcrel_hi(tan)'
buildvm_riscv.dasc:2661: Error: bad expression
buildvm_riscv.dasc:2661: Error: illegal operands auipc x5,%got_pcrel_hi(asin)' buildvm_riscv.dasc:2678: Error: bad expression buildvm_riscv.dasc:2678: Error: illegal operands auipc x5,%got_pcrel_hi(acos)'
buildvm_riscv.dasc:2695: Error: bad expression
buildvm_riscv.dasc:2695: Error: illegal operands auipc x5,%got_pcrel_hi(atan)' buildvm_riscv.dasc:2712: Error: bad expression buildvm_riscv.dasc:2712: Error: illegal operands auipc x5,%got_pcrel_hi(sinh)'
buildvm_riscv.dasc:2729: Error: bad expression
buildvm_riscv.dasc:2729: Error: illegal operands auipc x5,%got_pcrel_hi(cosh)' buildvm_riscv.dasc:2746: Error: bad expression buildvm_riscv.dasc:2746: Error: illegal operands auipc x5,%got_pcrel_hi(tanh)'
buildvm_riscv.dasc:2765: Error: bad expression
buildvm_riscv.dasc:2765: Error: illegal operands auipc x5,%got_pcrel_hi(pow)' buildvm_riscv.dasc:2784: Error: bad expression buildvm_riscv.dasc:2784: Error: illegal operands auipc x5,%got_pcrel_hi(atan2)'
buildvm_riscv.dasc:2803: Error: bad expression
buildvm_riscv.dasc:2803: Error: illegal operands auipc x5,%got_pcrel_hi(fmod)' buildvm_riscv.dasc:2822: Error: bad expression buildvm_riscv.dasc:2822: Error: illegal operands auipc x5,%got_pcrel_hi(ldexp)'
buildvm_riscv.dasc:2840: Error: bad expression
buildvm_riscv.dasc:2840: Error: illegal operands auipc x5,%got_pcrel_hi(frexp)' buildvm_riscv.dasc:2859: Error: bad expression buildvm_riscv.dasc:2859: Error: illegal operands auipc x5,%got_pcrel_hi(modf)'
make[1]: *** [Makefile:721: lj_vm.o] Error 1
make[1]: Leaving directory '/home/user/test/LuaJIT/src'
make: *** [Makefile:128: default] Error 2

I'm trying to compile the 'sysbench' project for my RISCV64 board, but I'm encountering failures when compiling the 'LuaJIT' project. Please help me; thank you very much.

@infiWang
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infiWang commented Jan 3, 2025

@TamNguyen1507

I am currently using Yocto SDK 3.1.13.

Please bump your Binutils to 2.37 or preferably higher. This version of Yocto uses Binutils 2.34 by default, while the %got_pcrel_hi modifier was added in Binutils 2.35, which is now close to 5 years old.

If you have further questions, please open an issue in our downstream repository.

@TamNguyen1507
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Binutils

Oh, I'm so sorry for my mistakes. I'm using Yocto SDK 3.1.31, not Yocto SDK 3.1.13, but I will try to upgrade binutils to a newer version. Thank you for your help.

@infiWang infiWang force-pushed the v2.1-riscv64-pr branch 2 times, most recently from 888970f to 908607f Compare January 18, 2025 06:58
@sabhiram
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@infiWang - thank you for this work!

We would like to leverage this directly from the official releases and as such we are very interested in what it will take to have this work merged upstream.

@Ruinland
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Ruinland commented May 2, 2025

Hi,

I am Ruinland from Andes Technology and is currently serving as the host of System Library WG in RISE project.
RISE stands for "RISC-V Software Ecosystem", in some degree, shares the similarity to Linaro-ARM relationship.

I am thinking that if I can help with the development here.

The working model is that ones (member of RISE) could file a RFP (Request for Proposal) on certain project, for instance, LuaJIT with RISC-V support.
Then after discussion of RFP, it will be transferred to RISE TSC (Technical Steering Committee) for approval and public bidding.
After a successful bidding, board of RISE will then sign a contract with the winning bidder.

TL;DR,
is anyone here interested in getting involved and get paid ?
I can help with the due process if needed.

Cordially yours,
Ruinland

@infiWang
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infiWang commented May 8, 2025

Thanks for your attention! Sorry for the late response.

We would like to leverage this directly from the official releases and as such we are very interested in what it will take to have this work merged upstream.

@sabhiram - Upstream integration would ultimately depend on Mike Pall, who maintains a careful review process to ensure stability. While I've developed this v2.1 RISC-V 64 port independently, merging it upstream would need Mike's approval and sponsorship to Mike for ongoing maintenance.

TL;DR, is anyone here interested in getting involved and get paid ? I can help with the due process if needed.

@Ruinland – RISE's involvement would be extremely welcome! Formal sponsorship and a maintenance commitment through RISE could help address Mike's concerns about long-term support.

I recognize Mike has also indicated RISC-V support as part of LuaJIT's future roadmap (v3.0). If upstream integration proves challenging under current circumstances, I'm happy to collaborate under RISE's umbrella to establish a downstream fork or upstream-aligned distribution to accelerate RISC-V availability. Would appreciate your guidance on next steps.

@benz0li
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benz0li commented May 9, 2025

@Ruinland – RISE's involvement would be extremely welcome! Formal sponsorship and a maintenance commitment through RISE could help address Mike's concerns about long-term support.

It would be great to see formal sponsorship to accelerate RISC-V (64-bit) availability for projects like LuaJIT.

I am personally interested in LuaJIT RISC-V (64-bit) because of Neovim. The latter is part of b-data's/my JupyterLab docker stacks which I intend to extend to linux/riscv64 at some point1.

I am already building Linux/RISC-V (64-bit) ports of

I am also maintaining a triple-arch manifest (linux/amd64, linux/arm64/v8, linux/riscv64) for GHC muslunofficial and untested binary distributions of GHC on Alpine Linux.

Footnotes

  1. Waiting for Debian 13 (trixie), which will officially support RISC-V (64-bit).

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9 participants