Ansuel · Ansuel · Jun 10, 2025 · Jun 5, 2025 · Jun 6, 2025 · Jun 6, 2025
diff --git a/package/kernel/mt76/patches/0154-disable-npu-for-non-7992.patch b/package/kernel/mt76/patches/0154-disable-npu-for-non-7992.patch
@@ -0,0 +1,25 @@
+--- a/npu.c
++++ b/npu.c
+@@ -497,6 +497,10 @@ int mt76_npu_init(struct mt76_dev *dev)
+ 	struct airoha_npu *npu;
+ 	int err = 0;
+
++	/* NPU offloading is only supported for MT7992 */
++	if (!is_mt7992(dev))
++		return -EINVAL;
++
+ 	mutex_lock(&dev->mutex);
+
+ 	npu = airoha_npu_get(dev->dev, NULL);
+--- a/mt7996/pci.c
++++ b/mt7996/pci.c
+@@ -257,6 +257,9 @@ static int mt7996_pci_probe(struct pci_d
+
+ 	//dev->has_rro = rro_enable;
+ 	mdev = &dev->mt76;
++	if (!is_mt7992(mdev))
++		rro_mode = MT76_HWRRO_DISABLE;
++
+ 	switch (rro_mode) {
+ 	case MT76_HWRRO_DISABLE:
+ 	case MT76_HWRRO_V3:
diff --git a/package/utils/jsonfilter/Makefile b/package/utils/jsonfilter/Makefile
@@ -5,9 +5,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/jsonpath.git
-PKG_SOURCE_DATE:=2024-01-23
-PKG_SOURCE_VERSION:=594cfa86469c005972ba750614f5b3f1af84d0f6
-PKG_MIRROR_HASH:=2f455f04fbfcdb4c81cccd23475b47395f847db44aa4bd9a1007b9aa0ab7fd19
+PKG_SOURCE_DATE:=2025-04-18
+PKG_SOURCE_VERSION:=8a86fb78235b5d7925b762b7b0934517890cc034
+PKG_MIRROR_HASH:=06b763387d00faae0e62af68626588ff2b8f12e0e6821950ae5422033df32757
 CMAKE_INSTALL:=1
 
 PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>

diff --git a/target/linux/airoha/dts/an7581.dtsi b/target/linux/airoha/dts/an7581.dtsi
@@ -30,32 +30,22 @@
 
 		qdma1_buf: qdma1-buf@89000000 {
 			no-map;
-			reg = <0x0 0x89000000 0x0 0x500000>;
+			reg = <0x0 0x89000000 0x0 0x400000>;
 		};
 
-		npu_pkt: npu-pkt@89500000 {
+		npu_pkt: npu-pkt@89400000 {
 			no-map;
-			reg = <0x0 0x89500000 0x0 0x2c00000>;
+			reg = <0x0 0x89400000 0x0 0x2c00000>;
 		};
 
-		npu_txpkt: npu-txpkt@8c100000 {
+		npu_txpkt: npu-txpkt@8c000000 {
 			no-map;
-			reg = <0x0 0x8c100000 0x0 0x4000000>;
+			reg = <0x0 0x8c000000 0x0 0x4000000>;
 		};
 
-		npu_ba: npu-ba@90100000 {
+		npu_txbufid: npu-txbufid@90000000 {
 			no-map;
-			reg = <0x0 0x90100000 0x0 0x200000>;
-		};
-
-		npu_txbufid: npu-txbufid@90300000 {
-			no-map;
-			reg = <0x0 0x90300000 0x0 0x6800>;
-		};
-
-		npu_dbg: npu-dbg@90306800 {
-			no-map;
-			reg = <0x0 0x90306800 0x0 0x5780>;
+			reg = <0x0 0x90000000 0x0 0x6800>;
 		};
 	};
 
@@ -813,9 +803,9 @@
 				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 			memory-region = <&npu_binary>, <&npu_pkt>, <&npu_txpkt>,
-					<&npu_ba>, <&npu_txbufid>, <&npu_dbg>;
-			memory-region-names = "binary", "pkt", "tx-pkt", "ba",
-					      "tx-bufid", "dbg";
+					<&npu_txbufid>;
+			memory-region-names = "binary", "pkt", "tx-pkt",
+					      "tx-bufid";
 			status = "disabled";
 		};
 

diff --git a/...inux/airoha/patches-6.6/999-60-net-airoha-Compute-number-of-descriptors-according-t.patch b/...inux/airoha/patches-6.6/999-60-net-airoha-Compute-number-of-descriptors-according-t.patch
@@ -0,0 +1,80 @@
+From 6fd84b9d5ff07ca622c8559829e23c00bf7dc493 Mon Sep 17 00:00:00 2001
+Message-ID: <6fd84b9d5ff07ca622c8559829e23c00bf7dc493.1749498104.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 6 Jun 2025 01:13:26 +0200
+Subject: [PATCH net-next 1/2] net: airoha: Compute number of descriptors
+ according to reserved memory size
+
+In order to not exceed the reserved memory size for hwfd buffers,
+compute the number of hwfd buffers/hwfd descriptors according to the
+reserved memory size and the size of each hwfd buffer (2KB).
+
+Fixes: 3a1ce9e3d01b ("net: airoha: Add the capability to allocate hwfd buffers via reserved-memory")
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 21 ++++++++++++---------
+ 1 file changed, 12 insertions(+), 9 deletions(-)
+
+diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
+index a7ec609d64de..1b7fd7ee0cbf 100644
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -1065,19 +1065,13 @@ static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)
+
+ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
+ {
++	int size, index, num_desc = HW_DSCP_NUM;
+ 	struct airoha_eth *eth = qdma->eth;
+ 	int id = qdma - &eth->qdma[0];
+ 	dma_addr_t dma_addr;
+ 	const char *name;
+-	int size, index;
+ 	u32 status;
+
+-	size = HW_DSCP_NUM * sizeof(struct airoha_qdma_fwd_desc);
+-	if (!dmam_alloc_coherent(eth->dev, size, &dma_addr, GFP_KERNEL))
+-		return -ENOMEM;
+-
+-	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);
+-
+ 	name = devm_kasprintf(eth->dev, GFP_KERNEL, "qdma%d-buf", id);
+ 	if (!name)
+ 		return -ENOMEM;
+@@ -1099,8 +1093,12 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
+ 		rmem = of_reserved_mem_lookup(np);
+ 		of_node_put(np);
+ 		dma_addr = rmem->base;
++		/* Compute the number of hw descriptors according to the
++		 * reserved memory size and the payload buffer size
++		 */
++		num_desc = rmem->size / AIROHA_MAX_PACKET_SIZE;
+ 	} else {
+-		size = AIROHA_MAX_PACKET_SIZE * HW_DSCP_NUM;
++		size = AIROHA_MAX_PACKET_SIZE * num_desc;
+ 		if (!dmam_alloc_coherent(eth->dev, size, &dma_addr,
+ 					 GFP_KERNEL))
+ 			return -ENOMEM;
+@@ -1108,6 +1106,11 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
+
+ 	airoha_qdma_wr(qdma, REG_FWD_BUF_BASE, dma_addr);
+
++	size = num_desc * sizeof(struct airoha_qdma_fwd_desc);
++	if (!dmam_alloc_coherent(eth->dev, size, &dma_addr, GFP_KERNEL))
++		return -ENOMEM;
++
++	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);
+ 	airoha_qdma_rmw(qdma, REG_HW_FWD_DSCP_CFG,
+ 			HW_FWD_DSCP_PAYLOAD_SIZE_MASK,
+ 			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, 0));
+@@ -1116,7 +1119,7 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
+ 	airoha_qdma_rmw(qdma, REG_LMGR_INIT_CFG,
+ 			LMGR_INIT_START | LMGR_SRAM_MODE_MASK |
+ 			HW_FWD_DESC_NUM_MASK,
+-			FIELD_PREP(HW_FWD_DESC_NUM_MASK, HW_DSCP_NUM) |
++			FIELD_PREP(HW_FWD_DESC_NUM_MASK, num_desc) |
+ 			LMGR_INIT_START | LMGR_SRAM_MODE_MASK);
+
+ 	return read_poll_timeout(airoha_qdma_rr, status,
+-- 
+2.49.0
+
diff --git a/...inux/airoha/patches-6.6/999-61-net-airoha-Differentiate-hwfd-buffer-size-for-QDMA0-.patch b/...inux/airoha/patches-6.6/999-61-net-airoha-Differentiate-hwfd-buffer-size-for-QDMA0-.patch
@@ -0,0 +1,62 @@
+From 9c61a64f998e4c858accf0d54d0a7e272727d67d Mon Sep 17 00:00:00 2001
+Message-ID: <9c61a64f998e4c858accf0d54d0a7e272727d67d.1749498104.git.lorenzo@kernel.org>
+In-Reply-To: <6fd84b9d5ff07ca622c8559829e23c00bf7dc493.1749498104.git.lorenzo@kernel.org>
+References: <6fd84b9d5ff07ca622c8559829e23c00bf7dc493.1749498104.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 9 Jun 2025 14:17:49 +0200
+Subject: [PATCH net-next 2/2] net: airoha: Differentiate hwfd buffer size for
+ QDMA0 and QDMA1
+
+In oreder to reduce the required hwfd buffers queue size, differentiate
+hwfd buffer size for QDMA0 and QDMA1 and use 2KB for QDMA0 and 256B for
+QDMA1.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 20 ++++++++++++++++----
+ 1 file changed, 16 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -1219,15 +1219,18 @@ static int airoha_qdma_init_hfwd_queues(
+ {
+ 	int size, index, num_desc = HW_DSCP_NUM;
+ 	struct airoha_eth *eth = qdma->eth;
++	u32 status, buf_size, buf_size_val;
+ 	int id = qdma - &eth->qdma[0];
+ 	dma_addr_t dma_addr;
+ 	const char *name;
+-	u32 status;
+
+ 	name = devm_kasprintf(eth->dev, GFP_KERNEL, "qdma%d-buf", id);
+ 	if (!name)
+ 		return -ENOMEM;
+
++	buf_size = id ? AIROHA_MAX_PACKET_SIZE / 8 : AIROHA_MAX_PACKET_SIZE;
++	buf_size_val = id ? 3 : 0; /* QDMA0: 2KB. QDMA1: 256B */
++
+ 	index = of_property_match_string(eth->dev->of_node,
+ 					 "memory-region-names", name);
+ 	if (index >= 0) {
+@@ -1245,9 +1248,9 @@ static int airoha_qdma_init_hfwd_queues(
+ 		/* Compute the number of hw descriptors according to the
+ 		 * reserved memory size and the payload buffer size
+ 		 */
+-		num_desc = rmem->size / AIROHA_MAX_PACKET_SIZE;
++		num_desc = rmem->size / buf_size;
+ 	} else {
+-		size = AIROHA_MAX_PACKET_SIZE * num_desc;
++		size = buf_size * num_desc;
+ 		if (!dmam_alloc_coherent(eth->dev, size, &dma_addr,
+ 					 GFP_KERNEL))
+ 			return -ENOMEM;
+@@ -1262,7 +1265,8 @@ static int airoha_qdma_init_hfwd_queues(
+ 	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);
+ 	airoha_qdma_rmw(qdma, REG_HW_FWD_DSCP_CFG,
+ 			HW_FWD_DSCP_PAYLOAD_SIZE_MASK,
+-			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, 0));
++			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK,
++				   buf_size_val));
+ 	airoha_qdma_rmw(qdma, REG_FWD_DSCP_LOW_THR, FWD_DSCP_LOW_THR_MASK,
+ 			FIELD_PREP(FWD_DSCP_LOW_THR_MASK, 128));
+
diff --git a/target/linux/airoha/patches-6.6/999-62-net-airoha-Enable-RX-queues-16-31.patch b/target/linux/airoha/patches-6.6/999-62-net-airoha-Enable-RX-queues-16-31.patch
@@ -0,0 +1,32 @@
+From 7b4f106476d77d6109a527c0816df8d8c3848359 Mon Sep 17 00:00:00 2001
+Message-ID: <7b4f106476d77d6109a527c0816df8d8c3848359.1749494257.git.lorenzo@kernel.org>
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 9 Jun 2025 16:07:40 +0200
+Subject: [PATCH net-next] net: airoha: Enable RX queues 16-31
+
+Fix RX_DONE_INT_MASK definitions in order to enable RX queues 16-31.
+
+Fixes: f252493e18353 ("net: airoha: Enable multiple IRQ lines support in airoha_eth driver.")
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_regs.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h
+index 04187eb40ec6..150c85995cc1 100644
+--- a/drivers/net/ethernet/airoha/airoha_regs.h
++++ b/drivers/net/ethernet/airoha/airoha_regs.h
+@@ -614,8 +614,9 @@
+ 	 RX19_DONE_INT_MASK | RX18_DONE_INT_MASK |	\
+ 	 RX17_DONE_INT_MASK | RX16_DONE_INT_MASK)
+
+-#define RX_DONE_INT_MASK	(RX_DONE_HIGH_INT_MASK | RX_DONE_LOW_INT_MASK)
+ #define RX_DONE_HIGH_OFFSET	fls(RX_DONE_HIGH_INT_MASK)
++#define RX_DONE_INT_MASK	\
++	((RX_DONE_HIGH_INT_MASK << RX_DONE_HIGH_OFFSET) | RX_DONE_LOW_INT_MASK)
+
+ #define INT_RX2_MASK(_n)				\
+ 	((RX_NO_CPU_DSCP_HIGH_INT_MASK & (_n)) |	\
+-- 
+2.49.0
+
diff --git a/tools/cpio/patches/cpio-c23.patch b/tools/cpio/patches/cpio-c23.patch
@@ -0,0 +1,23 @@
+--- a/src/extern.h
++++ b/src/extern.h
+@@ -97,7 +97,8 @@ extern char input_is_special;
+ extern char output_is_special;
+ extern char input_is_seekable;
+ extern char output_is_seekable;
+-extern int (*xstat) ();
++//void not good enough
++extern int (*xstat) (const char * restrict,  struct stat * restrict);
+ extern void (*copy_function) ();
+ extern char *change_directory_option;
+
+--- a/src/global.c
++++ b/src/global.c
+@@ -185,7 +185,7 @@ bool to_stdout_option = false;
+
+ /* A pointer to either lstat or stat, depending on whether
+    dereferencing of symlinks is done for input files.  */
+-int (*xstat) ();
++int (*xstat) (const char * restrict,  struct stat * restrict);
+
+ /* Which copy operation to perform. (-i, -o, -p) */
+ void (*copy_function) () = 0;
diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile
@@ -9,10 +9,10 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=e2fsprogs
 PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs
-PKG_VERSION:=1.47.0
-PKG_HASH:=0b4fe723d779b0927fb83c9ae709bc7b40f66d7df36433bef143e41c54257084
+PKG_VERSION:=1.47.2
+PKG_HASH:=08242e64ca0e8194d9c1caad49762b19209a06318199b63ce74ae4ef2d74e63c
 
-PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/
 
 HOST_BUILD_PARALLEL:=1

diff --git a/tools/elfutils/Makefile b/tools/elfutils/Makefile
@@ -69,7 +69,7 @@ ifeq ($(HOST_OS),Darwin)
   HOST_CFLAGS += -I/opt/homebrew/include
 endif
 
-HOST_CFLAGS += -Wno-error -fPIC
+HOST_CFLAGS += -Wno-error -fPIC -std=gnu17
 
 HOST_CONFIGURE_ARGS += \
 	--without-libintl-prefix \

diff --git a/tools/gmp/patches/001-acinclude-m4-fix-std23.patch b/tools/gmp/patches/001-acinclude-m4-fix-std23.patch
@@ -0,0 +1,19 @@
+# HG changeset patch
+# User Marc Glisse <marc.glisse@inria.fr>
+# Date 1738186682 -3600
+#      Wed Jan 29 22:38:02 2025 +0100
+# Node ID 8e7bb4ae7a18b1405ea7f9cbcda450b7d920a901
+# Parent  e84c5c785bbe8ed8c3620194e50b65adfc2f5d83
+Complete function prototype in acinclude.m4 for C23 compatibility
+
+--- a/acinclude.m4
++++ b/acinclude.m4
+@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long
+
+ #if defined (__GNUC__) && ! defined (__cplusplus)
+ typedef unsigned long long t1;typedef t1*t2;
+-void g(){}
++void g(int,t1 const*,t1,t2,t1 const*,int){}
+ void h(){}
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
diff --git a/tools/gmp/patches/002-acinclude-m4-add-parameter-names.patch b/tools/gmp/patches/002-acinclude-m4-add-parameter-names.patch
@@ -0,0 +1,22 @@
+# HG changeset patch
+# User Marc Glisse <marc.glisse@inria.fr>
+# Date 1743513946 -7200
+#      Tue Apr 01 15:25:46 2025 +0200
+# Node ID d66d66d82dbbe4f561920d28c1e1cbe6818452c7
+# Parent  1a2ad0e32507e842486c8ac9d5cdc772fd0c335e
+Add parameter names to function prototype
+
+ 2025-02-01  Marc Glisse <marc.glisse@inria.fr>
+
+ 	* longlong.h (loongarch64 umul_ppmm): __int128__ -> __int128.
+--- a/acinclude.m4
++++ b/acinclude.m4
+@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long
+
+ #if defined (__GNUC__) && ! defined (__cplusplus)
+ typedef unsigned long long t1;typedef t1*t2;
+-void g(int,t1 const*,t1,t2,t1 const*,int){}
++void g(int a,t1 const*b,t1 c,t2 d,t1 const*e,int f){}
+ void h(){}
+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
diff --git a/tools/llvm-bpf/patches/100-gcc15.patch b/tools/llvm-bpf/patches/100-gcc15.patch
@@ -0,0 +1,23 @@
+From 7e44305041d96b064c197216b931ae3917a34ac1 Mon Sep 17 00:00:00 2001
+From: Sam James <sam@gentoo.org>
+Date: Fri, 2 Aug 2024 23:07:21 +0100
+Subject: [PATCH] [ADT] Add `<cstdint>` to SmallVector (#101761)
+
+SmallVector uses `uint32_t`, `uint64_t` without including `<cstdint>`
+which fails to build w/ GCC 15 after a change in libstdc++ [0]
+
+[0] https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=3a817a4a5a6d94da9127af3be9f84a74e3076ee2
+---
+ llvm/include/llvm/ADT/SmallVector.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/llvm/include/llvm/ADT/SmallVector.h
++++ b/llvm/include/llvm/ADT/SmallVector.h
+@@ -19,6 +19,7 @@
+ #include <algorithm>
+ #include <cassert>
+ #include <cstddef>
++#include <cstdint>
+ #include <cstdlib>
+ #include <cstring>
+ #include <functional>
diff --git a/tools/m4/Makefile b/tools/m4/Makefile
@@ -18,6 +18,7 @@ HOST_BUILD_PARALLEL:=1
 
 include $(INCLUDE_DIR)/host-build.mk
 
+HOST_CFLAGS += -std=gnu17
 HOST_CONFIGURE_VARS += gl_cv_func_strstr_linear=no
 
 define Host/Uninstall