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BibTeX records: Jing Jin 0005
@article{DBLP:journals/mj/YangLJZ25,
author = {Zhaolin Yang and
Xiaoming Liu and
Jing Jin and
Jianjun Zhou},
title = {A reconfigurable passive {LNA} using an N-path switched-capacitor
transformer with 2{\texttimes}/3{\texttimes} voltage Gain},
journal = {Microelectron. J.},
volume = {156},
pages = {106541},
year = {2025},
url = {https://doi.org/10.1016/j.mejo.2024.106541},
doi = {10.1016/J.MEJO.2024.106541},
timestamp = {Sat, 25 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/YangLJZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/ZhongGJZ25,
author = {Tao Zhong and
Yuekang Guo and
Jing Jin and
Jianjun Zhou},
title = {A two-phase oscillation scheme with direct background correction for
VCO-based {ADC}},
journal = {Microelectron. J.},
volume = {159},
pages = {106644},
year = {2025},
url = {https://doi.org/10.1016/j.mejo.2025.106644},
doi = {10.1016/J.MEJO.2025.106644},
timestamp = {Fri, 09 May 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/ZhongGJZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/ZhangDWLGHXSJGC25,
author = {Hui Zhang and
Dawei Dong and
Haijun Wang and
Dan Li and
Yuan Gao and
Chaoyi Hu and
Hao Xu and
Xinlei Song and
Jing Jin and
Yuekang Guo and
Lin Cheng},
title = {A 14-bit 2.6GS/s {RF} sampling pipelined {ADC} in 28nm {CMOS}},
journal = {Microelectron. J.},
volume = {164},
pages = {106795},
year = {2025},
url = {https://doi.org/10.1016/j.mejo.2025.106795},
doi = {10.1016/J.MEJO.2025.106795},
timestamp = {Sat, 09 Aug 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/ZhangDWLGHXSJGC25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/ZhangLDHGJGQLC25,
author = {Hui Zhang and
Yong Li and
Dawei Dong and
Danben He and
Yuan Gao and
Jing Jin and
Yuekang Guo and
Lei Qiu and
Zhenrong Li and
Lin Cheng},
title = {A 78.1 dB {SNDR} 10 MHz-BW continuous-time noise-shaping {SAR} {ADC}
in 28 nm {CMOS}},
journal = {Microelectron. J.},
volume = {165},
pages = {106839},
year = {2025},
url = {https://doi.org/10.1016/j.mejo.2025.106839},
doi = {10.1016/J.MEJO.2025.106839},
timestamp = {Sun, 21 Sep 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/ZhangLDHGJGQLC25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/ZhongGZZJ25,
author = {Tao Zhong and
Yuekang Guo and
Jianjun Zhou and
Hui Zhang and
Jing Jin},
title = {A 25 MHz-BW 81 dB-DR TDC-Based {CTDSM} With Background Analog-Integration-Based
{ISI} Error Calibration Achieving {\textgreater}8 dB Even-Order Harmonic
Suppression},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {72},
number = {11},
pages = {6701--6712},
year = {2025},
url = {https://doi.org/10.1109/TCSI.2025.3572048},
doi = {10.1109/TCSI.2025.3572048},
timestamp = {Sun, 09 Nov 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/ZhongGZZJ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/WuGLCYJZ25,
author = {Ke Wu and
Yuekang Guo and
Xiaoming Liu and
Zhongyuan Chang and
Howard C. Yang and
Jing Jin and
Jianjun Zhou},
title = {A Fully Symmetric Oscillator-Based {CMOS} Ising Machine Architecture
With Successive Approximation Sampling and Power Efficient Solution
Refinement},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {72},
number = {11},
pages = {6713--6723},
year = {2025},
url = {https://doi.org/10.1109/TCSI.2025.3580422},
doi = {10.1109/TCSI.2025.3580422},
timestamp = {Sun, 09 Nov 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/WuGLCYJZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/JinXGLSZ25,
author = {Jing Jin and
Meng Xu and
Yuekang Guo and
Xiaoming Liu and
Nan Sun and
Jianjun Zhou},
title = {A 470 {\(\mu\)}W 20 kHz-BW 107.3 dB-SNDR Nested {CT} {DSM} Using Negative-R-Based
Cross-RC Integrator and Weighted Multi-Threshold MSB-Pass Quantizer},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {72},
number = {11},
pages = {6807--6819},
year = {2025},
url = {https://doi.org/10.1109/TCSI.2025.3561452},
doi = {10.1109/TCSI.2025.3561452},
timestamp = {Sun, 09 Nov 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/JinXGLSZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/YangJLZ25,
author = {Zhaolin Yang and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A 0.2-2.6 GHz Reconfigurable Receiver Using RF-Gain-Adapted Impedance
Matching and Gm-Separated IQ-Leakage Suppression Structure in 40-nm
{CMOS}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {33},
number = {1},
pages = {234--247},
year = {2025},
url = {https://doi.org/10.1109/TVLSI.2024.3477731},
doi = {10.1109/TVLSI.2024.3477731},
timestamp = {Sat, 25 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/YangJLZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/AiGLZJZ25,
author = {Yuzhi Ai and
Yuekang Guo and
Zhengyuan Lou and
Hui Zhang and
Jing Jin and
Jianjun Zhou},
title = {An {EF-CIFF} Noise-Shaping {SAR} {ADC} with {A} Joint Dynamic Amplifier,
Comparator and Lossless Passive Summer Structure},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2025,
London, United Kingdom, May 25-28, 2025},
pages = {1--5},
publisher = {{IEEE}},
year = {2025},
url = {https://doi.org/10.1109/ISCAS56072.2025.11044022},
doi = {10.1109/ISCAS56072.2025.11044022},
timestamp = {Sun, 02 Nov 2025 21:27:44 +0100},
biburl = {https://dblp.org/rec/conf/iscas/AiGLZJZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WuGXFJZ25,
author = {Jinwei Wu and
Yuekang Guo and
Meng Xu and
Lingyan Fan and
Jing Jin and
Jianjun Zhou},
title = {A1-GS/s 7-bit 3-then-1 bit/cycle {SAR} {ADC} with {A} Reconfigurable
Reference-Embedded Comparator},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2025,
London, United Kingdom, May 25-28, 2025},
pages = {1--5},
publisher = {{IEEE}},
year = {2025},
url = {https://doi.org/10.1109/ISCAS56072.2025.11043804},
doi = {10.1109/ISCAS56072.2025.11043804},
timestamp = {Wed, 09 Jul 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WuGXFJZ25.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/LiHZHJYS24,
author = {Jieyu Li and
Weifeng He and
Bo Zhang and
Guanghui He and
Jing Jin and
Jun Yang and
Mingoo Seok},
title = {{TICA:} Timing Slack Inference and Clock Frequency Adaption Technique
for a Deeply Pipelined Near-Threshold-Voltage Bitcoin Mining Core},
journal = {{IEEE} J. Solid State Circuits},
volume = {59},
number = {2},
pages = {605--615},
year = {2024},
url = {https://doi.org/10.1109/JSSC.2023.3303424},
doi = {10.1109/JSSC.2023.3303424},
timestamp = {Mon, 07 Jul 2025 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/LiHZHJYS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/WangJLWTYGMZ24,
author = {Xiaofei Wang and
Jing Jin and
Xiaoming Liu and
Hui Wang and
Huzhi Tang and
Chao Yang and
Yuekang Guo and
Tingting Mo and
Jianjun Zhou},
title = {A 0.83-pJ/b 20-Gb/s/Pin Single-Ended Transceiver With AC/DC-Coupled
Pre-Emphasis {FFE} and Edge-Dependent Phase-Modulation {DFE} for Low-Power
Memory Controllers},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {71},
number = {2},
pages = {560--572},
year = {2024},
url = {https://doi.org/10.1109/TCSI.2023.3333221},
doi = {10.1109/TCSI.2023.3333221},
timestamp = {Wed, 13 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/WangJLWTYGMZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/HuoZJZW24,
author = {Runtao Huo and
Dingguo Zhang and
Jing Jin and
Jianjun Zhou and
Hui Wang},
title = {A 16MHz {CMOS} {RC} Frequency Reference with {\(\pm\)}125ppm Inaccuracy
from -40{\textdegree}C to 85{\textdegree}C Enabled by a Capacitively
Modulated {RC} Time Constant {(CMT)} Generation and a Die-to-Die Error
Removal {(DDER)} Technique},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2024, Denver,
CO, USA, April 21-24, 2024},
pages = {1--2},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/CICC60959.2024.10529001},
doi = {10.1109/CICC60959.2024.10529001},
timestamp = {Thu, 25 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cicc/HuoZJZW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cicc/JinGXLSZ24,
author = {Jing Jin and
Yuekang Guo and
Meng Xu and
Xiaoming Liu and
Nan Sun and
Jianjun Zhou},
title = {A 470{\(\mu\)}W 20kHz-BW 107.3dB-SNDR Nested {CT} {DSM} Employing
Negative-R-Based Cross-RC Filter and Weighted Multi-Threshold MSB-Pass
Quantizer},
booktitle = {{IEEE} Custom Integrated Circuits Conference, {CICC} 2024, Denver,
CO, USA, April 21-24, 2024},
pages = {1--2},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/CICC60959.2024.10529103},
doi = {10.1109/CICC60959.2024.10529103},
timestamp = {Wed, 05 Nov 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/cicc/JinGXLSZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LouXG0Z24,
author = {Zhengyuan Lou and
Meng Xu and
Yuekang Guo and
Jing Jin and
Jianjun Zhou},
title = {A Self-Calibrated Sampling Noise Cancellation Technique for Noise-Shaping
{SAR} {ADC}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2024,
Singapore, May 19-22, 2024},
pages = {1--5},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISCAS58744.2024.10558700},
doi = {10.1109/ISCAS58744.2024.10558700},
timestamp = {Tue, 16 Jul 2024 11:51:22 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LouXG0Z24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhangZJMW24,
author = {Tong Zhang and
Dingguo Zhang and
Jing Jin and
Patrick P. Mercier and
Hui Wang},
title = {Design and Analysis of a Family of pW-Level Sub-1V {CMOS} VRGs by
Stacking a Current-Source Transistor and a Resistive-Load Transistor},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2024,
Singapore, May 19-22, 2024},
pages = {1--5},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/ISCAS58744.2024.10557912},
doi = {10.1109/ISCAS58744.2024.10557912},
timestamp = {Thu, 08 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/ZhangZJMW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/GuoJLZ23,
author = {Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A 60-MS/s 5-MHz {BW} Noise-Shaping {SAR} {ADC} With Integrated Input
Buffer Achieving 84.2-dB {SNDR} and 97.3-dB {SFDR} Using Dynamic Level-Shifting
and ISI-Error Correction},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {2},
pages = {474--485},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2022.3185501},
doi = {10.1109/JSSC.2022.3185501},
timestamp = {Fri, 10 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/GuoJLZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/GuoJLZ23a,
author = {Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A 372 {\(\mu\)}W 10 kHz-BW 109.2 dB-SNDR Nested Delta-Sigma Modulator
Using Hysteresis-Comparison MSB-Pass Quantization},
journal = {{IEEE} J. Solid State Circuits},
volume = {58},
number = {9},
pages = {2554--2563},
year = {2023},
url = {https://doi.org/10.1109/JSSC.2023.3262300},
doi = {10.1109/JSSC.2023.3262300},
timestamp = {Thu, 14 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jssc/GuoJLZ23a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/YangWLJZ23,
author = {Chao Yang and
Sheng Wang and
Xiaoming Liu and
Jing Jin and
Jianjun Zhou},
title = {A 4 GHz FLL-less fast-locking sampling {PLL} with gain-boosted sampling
phase-frequency detector in 28 nm {CMOS}},
journal = {Microelectron. J.},
volume = {139},
pages = {105890},
year = {2023},
url = {https://doi.org/10.1016/j.mejo.2023.105890},
doi = {10.1016/J.MEJO.2023.105890},
timestamp = {Sun, 24 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/YangWLJZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/LeeLYJW23,
author = {Minjing Lee and
Xiaoming Liu and
Zhaolin Yang and
Jing Jin and
Lin{-}Sheng Wu},
title = {A Compact 0.2-1.6 GHz 20 MHz-Bandwidth Passive-LNA Exploiting an N-Path
1:3 Transformer},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {70},
number = {5},
pages = {1699--1703},
year = {2023},
url = {https://doi.org/10.1109/TCSII.2023.3257880},
doi = {10.1109/TCSII.2023.3257880},
timestamp = {Fri, 02 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/LeeLYJW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/GaoJYZL23,
author = {Hanqi Gao and
Jing Jin and
Zhaolin Yang and
Jianjun Zhou and
Xiaoming Liu},
title = {A 30GHz Bidirectional {PA/LNA} with Transformer-Based Switchable {RC}
Matching Network},
booktitle = {15th {IEEE} International Conference on ASIC, {ASICON} 2023, Nanjing,
China, October 24-27, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASICON58565.2023.10396447},
doi = {10.1109/ASICON58565.2023.10396447},
timestamp = {Fri, 16 Feb 2024 14:02:58 +0100},
biburl = {https://dblp.org/rec/conf/asicon/GaoJYZL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/YangJCZL23,
author = {Zhaolin Yang and
Jing Jin and
Yuyang Chen and
Jianjun Zhou and
Xiaoming Liu},
title = {A Wideband Inductorless {LNA} Employing Dual-Loop Feedback for Low-Power
Applications},
booktitle = {15th {IEEE} International Conference on ASIC, {ASICON} 2023, Nanjing,
China, October 24-27, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASICON58565.2023.10396084},
doi = {10.1109/ASICON58565.2023.10396084},
timestamp = {Fri, 16 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/YangJCZL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ZhouJLWWM23,
author = {Jiaxu Zhou and
Jing Jin and
Yichao Lin and
Shan Wang and
Bo Wang and
Tingting Mo},
title = {A 24/48 Gb/s {NRZ/PAM-4} Dual-Mode Transmitter with 3-tap {FFE} in
28 nm {CMOS}},
booktitle = {15th {IEEE} International Conference on ASIC, {ASICON} 2023, Nanjing,
China, October 24-27, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASICON58565.2023.10396228},
doi = {10.1109/ASICON58565.2023.10396228},
timestamp = {Fri, 16 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/ZhouJLWWM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ZhouXYLWJ23,
author = {Shengyuan Zhou and
Ziyao Xia and
Chao Yang and
Xiaoming Liu and
Sheng Wang and
Jing Jin},
title = {Fast locking Sampling {PLL} Using Phase Error Eliminator},
booktitle = {15th {IEEE} International Conference on ASIC, {ASICON} 2023, Nanjing,
China, October 24-27, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASICON58565.2023.10395954},
doi = {10.1109/ASICON58565.2023.10395954},
timestamp = {Fri, 16 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/ZhouXYLWJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Guo00YZ23,
author = {Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Zhaolin Yang and
Jianjun Zhou},
title = {A LUT-based Background Linearization Technique for VCO-based {ADC}
Employing {\textdollar}K{\_}\{{\textbackslash}text\{VCO\}\}-{\textbackslash}text\{Locked\}-{\textbackslash}text\{Loop\}{\textdollar}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2023,
Monterey, CA, USA, May 21-25, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISCAS46773.2023.10181646},
doi = {10.1109/ISCAS46773.2023.10181646},
timestamp = {Mon, 31 Jul 2023 09:04:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Guo00YZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Tang0Y023,
author = {Huzhi Tang and
Xiaoming Liu and
Chao Yang and
Jing Jin},
title = {An {ADPLL} with Two-Point Modulation Gain Calibration for 2.4GHz ISM-Band
in 40nm {CMOS}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2023,
Monterey, CA, USA, May 21-25, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISCAS46773.2023.10181799},
doi = {10.1109/ISCAS46773.2023.10181799},
timestamp = {Mon, 31 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Tang0Y023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Wang0LYWZ23,
author = {Xiaofei Wang and
Jing Jin and
Xiaoming Liu and
Zhaolin Yang and
Shan Wang and
Jianjun Zhou},
title = {A 16/32-Gb/s/pin Dual-Mode Single-Ended Transmitter with Pre-Emphasis
{FFE} and RLM-Enhanced {ZQ} Calibration for Memory Interfaces},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2023,
Monterey, CA, USA, May 21-25, 2023},
pages = {1--4},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ISCAS46773.2023.10181851},
doi = {10.1109/ISCAS46773.2023.10181851},
timestamp = {Tue, 01 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/Wang0LYWZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/ChenLYJCZ23,
author = {Jiayi Chen and
Xiaoming Liu and
Chao Yang and
Jing Jin and
Zhongyuan Chang and
Jianjun Zhou},
title = {Predictive LSB-First Successive Approximation for {SAR} Analog-to-Digital
Converters},
booktitle = {66th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2023, Tempe, AZ, USA, August 6-9, 2023},
pages = {118--122},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MWSCAS57524.2023.10406063},
doi = {10.1109/MWSCAS57524.2023.10406063},
timestamp = {Sat, 24 Feb 2024 20:42:53 +0100},
biburl = {https://dblp.org/rec/conf/mwscas/ChenLYJCZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/WangGPLWJ23,
author = {Shunyan Wang and
Yuekang Guo and
Qiang Pan and
Xiaoming Liu and
Shan Wang and
Jing Jin},
title = {A Fully Synthesizable Dynamic Voltage Comparator with Time-Domain
Offset Calibration},
booktitle = {66th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2023, Tempe, AZ, USA, August 6-9, 2023},
pages = {482--485},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MWSCAS57524.2023.10406039},
doi = {10.1109/MWSCAS57524.2023.10406039},
timestamp = {Sat, 24 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mwscas/WangGPLWJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/WuGLJYZ23,
author = {Ke Wu and
Yuekang Guo and
Xiaoming Liu and
Jing Jin and
Howard C. Yang and
Jianjun Zhou},
title = {A Non-Linearity Digital Background Calibration Algorithm with Piece-Wise
Linear Functions},
booktitle = {66th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2023, Tempe, AZ, USA, August 6-9, 2023},
pages = {609--613},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/MWSCAS57524.2023.10406100},
doi = {10.1109/MWSCAS57524.2023.10406100},
timestamp = {Sat, 24 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/mwscas/WuGLJYZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/BuJYGZ22,
author = {Ran Bu and
Jing Jin and
Zhaolin Yang and
Yuekang Guo and
Jianjun Zhou},
title = {A Harmonic Rejecting N-Path Filter with Harmonic Gain Calibration
Technique},
journal = {Circuits Syst. Signal Process.},
volume = {41},
number = {12},
pages = {6672--6693},
year = {2022},
url = {https://doi.org/10.1007/s00034-022-02118-z},
doi = {10.1007/S00034-022-02118-Z},
timestamp = {Sun, 13 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/cssp/BuJYGZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/ieiceta/DingJZ22,
author = {Li Ding and
Jing Jin and
Jianjun Zhou},
title = {A 16/32Gbps Dual-Mode SerDes Transmitter with Linearity Enhanced {SST}
Driver},
journal = {{IEICE} Trans. Fundam. Electron. Commun. Comput. Sci.},
volume = {105-A},
number = {11},
pages = {1443--1449},
year = {2022},
url = {https://doi.org/10.1587/transfun.2021kep0006},
doi = {10.1587/TRANSFUN.2021KEP0006},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/ieiceta/DingJZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/YangLJZ22,
author = {Chao Yang and
Xiaoming Liu and
Jing Jin and
Jianjun Zhou},
title = {A 0.023-12 GHz ultra-wideband frequency synthesizer with FOM\({}_{\mbox{\emph{T}}}\)
of -251.8 dB},
journal = {Microelectron. J.},
volume = {120},
pages = {105357},
year = {2022},
url = {https://doi.org/10.1016/j.mejo.2022.105357},
doi = {10.1016/J.MEJO.2022.105357},
timestamp = {Wed, 23 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/YangLJZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/GuoJLZ22,
author = {Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {An 18.1 mW 50 MHz-BW 76.4 dB-SNDR {CTSDM} With PVT-Robust {VCO} Quantizer
and Latency-Free Background-Calibrated {DAC}},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {69},
number = {12},
pages = {4787--4798},
year = {2022},
url = {https://doi.org/10.1109/TCSI.2022.3192465},
doi = {10.1109/TCSI.2022.3192465},
timestamp = {Sun, 15 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/GuoJLZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasII/YangLJGZ22,
author = {Chao Yang and
Xiaoming Liu and
Jing Jin and
Yuekang Guo and
Jianjun Zhou},
title = {A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination
{PFDCP}},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {69},
number = {10},
pages = {3998--4002},
year = {2022},
url = {https://doi.org/10.1109/TCSII.2022.3177763},
doi = {10.1109/TCSII.2022.3177763},
timestamp = {Tue, 18 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcasII/YangLJGZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/Guo00Z22,
author = {Yuekang Guo and
Xiaoming Liu and
Jing Jin and
Jianjun Zhou},
title = {A 3bit/cycle 1GS/s 8-bit {SAR} {ADC} Employing Asynchronous Ping-Pong
Quantization Scheme},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2022,
Austin, TX, USA, May 27 - June 1, 2022},
pages = {2650--2654},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ISCAS48785.2022.9937630},
doi = {10.1109/ISCAS48785.2022.9937630},
timestamp = {Thu, 17 Nov 2022 15:59:17 +0100},
biburl = {https://dblp.org/rec/conf/iscas/Guo00Z22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/WuGJLZ22,
author = {Ke Wu and
Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A Power-Efficient {CMOS} Image Sensor with In-Sensor Processing and
In-Pixel Gain Calibration},
booktitle = {65th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2022, Fukuoka, Japan, August 7-10, 2022},
pages = {1--4},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/MWSCAS54063.2022.9859418},
doi = {10.1109/MWSCAS54063.2022.9859418},
timestamp = {Mon, 29 Aug 2022 17:33:26 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/WuGJLZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cssp/HuJGLZ21,
author = {Mengying Hu and
Jing Jin and
Yuekang Guo and
Xiaoming Liu and
Jianjun Zhou},
title = {A Power-Efficient {SAR} {ADC} with Optimized Timing-Redistribution
Asynchronous {SAR} Logic in 40-nm {CMOS}},
journal = {Circuits Syst. Signal Process.},
volume = {40},
number = {7},
pages = {3125--3142},
year = {2021},
url = {https://doi.org/10.1007/s00034-020-01643-z},
doi = {10.1007/S00034-020-01643-Z},
timestamp = {Tue, 13 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/cssp/HuJGLZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/Kang00WHZ21,
author = {Haopeng Kang and
Jing Jin and
Xiaoming Liu and
Xiaofei Wang and
Pengli Hong and
Jianjun Zhou},
title = {A fully integrated multiphase switched-capacitor {DC-DC} converter
with {PFM} control and charge sharing loss reduction},
journal = {Microelectron. J.},
volume = {108},
pages = {104991},
year = {2021},
url = {https://doi.org/10.1016/j.mejo.2021.104991},
doi = {10.1016/J.MEJO.2021.104991},
timestamp = {Tue, 06 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/Kang00WHZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/LiuJWZ21,
author = {Xiaoming Liu and
Jing Jin and
Xiaofei Wang and
Jianjun Zhou},
title = {A 2.4 GHz receiver with a current-reused inductor-less noise-canceling
balun {LNA} in 40 nm {CMOS}},
journal = {Microelectron. J.},
volume = {113},
pages = {105065},
year = {2021},
url = {https://doi.org/10.1016/j.mejo.2021.105065},
doi = {10.1016/J.MEJO.2021.105065},
timestamp = {Wed, 06 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/LiuJWZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/DingWJZ21,
author = {Li Ding and
Ke Wu and
Jing Jin and
Jianjun Zhou},
title = {An 8 GHz real-time temperature-compensated {PLL} with 20.8 ppm/{\textdegree}C
temperature coefficient for SerDes applications},
journal = {Microelectron. J.},
volume = {117},
pages = {105279},
year = {2021},
url = {https://doi.org/10.1016/j.mejo.2021.105279},
doi = {10.1016/J.MEJO.2021.105279},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/mj/DingWJZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ShiZJ21,
author = {Chenyue Shi and
Shengyuan Zhou and
Jing Jin},
editor = {Fan Ye and
Ting{-}Ao Tang},
title = {An Enhanced {SSCP} for Frequency Drift Suppressing in {SSPLL}},
booktitle = {14th {IEEE} International Conference on ASIC, {ASICON} 2021, Kunming,
China, October 26-29, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASICON52560.2021.9620261},
doi = {10.1109/ASICON52560.2021.9620261},
timestamp = {Sun, 26 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/ShiZJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/ZhongGJ21,
author = {Tao Zhong and
Yuekang Guo and
Jing Jin},
editor = {Fan Ye and
Ting{-}Ao Tang},
title = {Analysis of {SAR} {ADC} Quantization Error and Nonlinearity in {PMCW}
Automotive Radar},
booktitle = {14th {IEEE} International Conference on ASIC, {ASICON} 2021, Kunming,
China, October 26-29, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASICON52560.2021.9620368},
doi = {10.1109/ASICON52560.2021.9620368},
timestamp = {Wed, 05 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asicon/ZhongGJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/GuoJ0Z21,
author = {Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A Phase Domain Excess Loop Delay Compensation Technique with Latency
Optimized Phase Selector for VCO-Based Continuous-Time {\(\Delta\)}{\(\Sigma\)}
{ADC}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401304},
doi = {10.1109/ISCAS51556.2021.9401304},
timestamp = {Wed, 22 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/GuoJ0Z21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/XuWLL0Z21,
author = {Zhengqi Xu and
Ke Wu and
Xiaoming Liu and
Chengyuan Liu and
Jing Jin and
Jianjun Zhou},
title = {A Ka-Band Quadrature-Hybrid {LNA-PS} with Gm- Boosting Technique in
40-nm {CMOS}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401264},
doi = {10.1109/ISCAS51556.2021.9401264},
timestamp = {Mon, 05 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/XuWLL0Z21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/GuoJZ21,
author = {Yuekang Guo and
Jing Jin and
Jianjun Zhou},
title = {A Low Power {PVT} Stabilization Technique for Dynamic Amplifier in
Pipelined {SAR} {ADC}},
booktitle = {64th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2021, Lansing, MI, USA, August 9-11, 2021},
pages = {18--21},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MWSCAS47672.2021.9531829},
doi = {10.1109/MWSCAS47672.2021.9531829},
timestamp = {Wed, 22 Sep 2021 16:10:31 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/GuoJZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/GuoPLJ21,
author = {Yuekang Guo and
Qiang Pan and
Xiaoming Liu and
Jing Jin},
title = {A Center Frequency Calibration Technique for Ring {VCO} Exploiting
Delay\({}^{\mbox{-1}}\) Detection},
booktitle = {64th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2021, Lansing, MI, USA, August 9-11, 2021},
pages = {708--711},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MWSCAS47672.2021.9531788},
doi = {10.1109/MWSCAS47672.2021.9531788},
timestamp = {Wed, 22 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/GuoPLJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/PanGJZ21,
author = {Qiang Pan and
Yuekang Guo and
Jing Jin and
Jianjun Zhou},
title = {A Linearization Technique for Ring {VCO} Exploiting Bulk-Modulation},
booktitle = {64th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2021, Lansing, MI, USA, August 9-11, 2021},
pages = {737--740},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MWSCAS47672.2021.9531742},
doi = {10.1109/MWSCAS47672.2021.9531742},
timestamp = {Wed, 22 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/PanGJZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/HeGJZ21,
author = {Yanlin He and
Yuekang Guo and
Jing Jin and
Jianjun Zhou},
title = {A Latency-Optimized Lookup Table for Nonlinearity Calibration in VCO-Based
Sigma-Delta ADCs},
booktitle = {64th {IEEE} International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2021, Lansing, MI, USA, August 9-11, 2021},
pages = {941--944},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/MWSCAS47672.2021.9531839},
doi = {10.1109/MWSCAS47672.2021.9531839},
timestamp = {Wed, 22 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/HeGJZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/GuoJLZ20,
author = {Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {An Inverter-Based Continuous Time Sigma Delta {ADC} With Latency-Free
{DAC} Calibration},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-I},
number = {11},
pages = {3630--3642},
year = {2020},
url = {https://doi.org/10.1109/TCSI.2020.3009652},
doi = {10.1109/TCSI.2020.3009652},
timestamp = {Thu, 17 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/GuoJLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LiuJLZ20,
author = {Litong Liu and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A Multi-Modulus Fractional Divider With {TDC} Free Calibration Scheme
for Mitigation of {TX-VCO} Pulling},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-II},
number = {12},
pages = {2848--2852},
year = {2020},
url = {https://doi.org/10.1109/TCSII.2020.2983785},
doi = {10.1109/TCSII.2020.2983785},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/LiuJLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/WangJLZ20,
author = {Xiaofei Wang and
Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {An {ISM} Band High-Linear Current-Reuse Up-Conversion Mixer With Built-in-Self-Calibration
for {LOFT} and {I/Q} Imbalance},
journal = {{IEEE} Trans. Circuits Syst.},
volume = {67-II},
number = {12},
pages = {2898--2902},
year = {2020},
url = {https://doi.org/10.1109/TCSII.2020.2981940},
doi = {10.1109/TCSII.2020.2981940},
timestamp = {Tue, 02 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/WangJLZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/HongGYWJJHJ20,
author = {Tu Hong and
Ning Guan and
Chen Yin and
Qin Wang and
Jianfei Jiang and
Jing Jin and
Guanghui He and
Naifeng Jing},
title = {Decoupling the Multi-Rate Dataflow Execution in Coarse-Grained Reconfigurable
Array},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9181275},
doi = {10.1109/ISCAS45731.2020.9181275},
timestamp = {Sun, 26 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/HongGYWJJHJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangGJLJZ20,
author = {Ran Wang and
Yuekang Guo and
Jing Jin and
Xiaoming Liu and
Naifeng Jing and
Jianjun Zhou},
title = {A Low Power Temperature-Compensated Common-Mode Voltage Detector for
Dynamic Amplifiers},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
Sevilla, Spain, October 10-21, 2020},
pages = {1--4},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ISCAS45731.2020.9180689},
doi = {10.1109/ISCAS45731.2020.9180689},
timestamp = {Fri, 18 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangGJLJZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JinLZ19,
author = {Jing Jin and
Xiaoming Liu and
Jianjun Zhou},
title = {A 0.25-dB-Step, 68-dB-Dynamic Range Analog Baseband With Digitally
Assisted {DCOC} and {AGC} for Multi-Standard {TV} Applications},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {66-II},
number = {10},
pages = {1623--1627},
year = {2019},
url = {https://doi.org/10.1109/TCSII.2019.2925066},
doi = {10.1109/TCSII.2019.2925066},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/JinLZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JinLYZ19,
author = {Jing Jin and
Xiaoming Liu and
Taotao Yan and
Jianjun Zhou},
title = {Fully Configurable Capacitor-Less Oversampling {DC} Offset Cancellation
for Direct Conversion Receivers},
journal = {{IEEE} Trans. Circuits Syst. {II} Express Briefs},
volume = {66-II},
number = {10},
pages = {1683--1687},
year = {2019},
url = {https://doi.org/10.1109/TCSII.2019.2921895},
doi = {10.1109/TCSII.2019.2921895},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcas/JinLYZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/LiWZJHJMJ19,
author = {Taozhong Li and
Qin Wang and
Yongxin Zhu and
Jianfei Jiang and
Guanghui He and
Jing Jin and
Zhigang Mao and
Naifeng Jing},
title = {A Novel Resistive Memory-based Process-in-memory Architecture for
Efficient Logic and Add Operations},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {24},
number = {2},
pages = {25:1--25:22},
year = {2019},
url = {https://doi.org/10.1145/3306495},
doi = {10.1145/3306495},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/todaes/LiWZJHJMJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/GuoDJ19,
author = {Songhao Guo and
Li Ding and
Jing Jin},
title = {A 16/32Gb/s {NRZ/PAM4} Receiver with Dual-Loop {CDR} and Threshold
Voltage Calibration},
booktitle = {13th {IEEE} International Conference on ASIC, {ASICON} 2019, Chongqing,
China, October 29 - November 1, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASICON47005.2019.8983675},
doi = {10.1109/ASICON47005.2019.8983675},
timestamp = {Wed, 10 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/GuoDJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/JiDJ19,
author = {Yu Ji and
Li Ding and
Jing Jin},
title = {A High-Linear Digital-to-Phase Converter in 40nm {CMOS}},
booktitle = {13th {IEEE} International Conference on ASIC, {ASICON} 2019, Chongqing,
China, October 29 - November 1, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASICON47005.2019.8983556},
doi = {10.1109/ASICON47005.2019.8983556},
timestamp = {Wed, 10 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/JiDJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/LiWJ19,
author = {Zhigang Li and
Xiaofei Wang and
Jing Jin},
title = {A 0.0558-mm\({}^{\mbox{2}}\) 0.05-0.9GHz Low-Power Multi-phase Non-overlap
Clock Generator in 40 nm {CMOS}},
booktitle = {13th {IEEE} International Conference on ASIC, {ASICON} 2019, Chongqing,
China, October 29 - November 1, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASICON47005.2019.8983602},
doi = {10.1109/ASICON47005.2019.8983602},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asicon/LiWJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/LiangLJ19,
author = {Yingying Liang and
Xiaoming Liu and
Jing Jin},
title = {An Optimized Modeling Method for Transformer Design},
booktitle = {13th {IEEE} International Conference on ASIC, {ASICON} 2019, Chongqing,
China, October 29 - November 1, 2019},
pages = {1--4},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASICON47005.2019.8983686},
doi = {10.1109/ASICON47005.2019.8983686},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asicon/LiangLJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/ZhengYHWSJJJ19,
author = {Sijie Zheng and
Hongjun You and
Guanghui He and
Qin Wang and
Tao Si and
Jianfei Jiang and
Jing Jin and
Naifeng Jing},
title = {A Rapid Scrubbing Technique for {SEU} Mitigation on SRAM-Based FPGAs},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
Sapporo, Japan, May 26-29, 2019},
pages = {1--5},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ISCAS.2019.8702706},
doi = {10.1109/ISCAS.2019.8702706},
timestamp = {Sun, 26 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iscas/ZhengYHWSJJJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cds/GuanXYJZ18,
author = {Rui Guan and
Jianfeng Xue and
Chao Yang and
Jing Jin and
Jianjun Zhou},
title = {16-bit 1-MS/s {SAR} {ADC} with foreground digital-domain calibration},
journal = {{IET} Circuits Devices Syst.},
volume = {12},
number = {4},
pages = {505--513},
year = {2018},
url = {https://doi.org/10.1049/iet-cds.2017.0412},
doi = {10.1049/IET-CDS.2017.0412},
timestamp = {Sun, 19 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/iet-cds/GuanXYJZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/mj/GuanJZ18,
author = {Rui Guan and
Jing Jin and
Jianjun Zhou},
title = {A low-cost digital-domain foreground calibration for high resolution
{SAR} ADCs},
journal = {Microelectron. J.},
volume = {73},
pages = {86--93},
year = {2018},
url = {https://doi.org/10.1016/j.mejo.2018.01.003},
doi = {10.1016/J.MEJO.2018.01.003},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/mj/GuanJZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuDJZ18,
author = {Heng Liu and
Li Ding and
Jing Jin and
Jianjun Zhou},
title = {A Reconfigurable 28/56 Gb/s {PAM4/NRZ} Dual-mode SerDes with Hardware-reuse},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--5},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351612},
doi = {10.1109/ISCAS.2018.8351612},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiuDJZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/TangDJZ18,
author = {Hanchun Tang and
Li Ding and
Jing Jin and
Jianjun Zhou},
title = {A 28 Gb/s 2-Tap {FFE} Source-Series-Terminated Transmitter in 22 nm
{CMOS} {FDSOI}},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
27-30 May 2018, Florence, Italy},
pages = {1--4},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISCAS.2018.8351724},
doi = {10.1109/ISCAS.2018.8351724},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/TangDJZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/XuGJ17,
author = {Licheng Xu and
Xinchi Gao and
Jing Jin},
editor = {Yajie Qin and
Zhiliang Hong and
Ting{-}Ao Tang},
title = {A high-speed low-power charge pump with dynamic current matching},
booktitle = {12th {IEEE} International Conference on ASIC, {ASICON} 2017, Guiyang,
China, October 25-28, 2017},
pages = {800--803},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASICON.2017.8252597},
doi = {10.1109/ASICON.2017.8252597},
timestamp = {Tue, 20 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asicon/XuGJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/YaoLJ17,
author = {Shaoqin Yao and
Litong Liu and
Jing Jin},
editor = {Yajie Qin and
Zhiliang Hong and
Ting{-}Ao Tang},
title = {A passive mixer-first receiver with negative feedback for impedance
matching},
booktitle = {12th {IEEE} International Conference on ASIC, {ASICON} 2017, Guiyang,
China, October 25-28, 2017},
pages = {804--806},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ASICON.2017.8252598},
doi = {10.1109/ASICON.2017.8252598},
timestamp = {Wed, 02 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asicon/YaoLJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/mwscas/GaoXJJZ17,
author = {Xinchi Gao and
Licheng Xu and
Jing Jin and
Naifeng Jing and
Jianjun Zhou},
title = {A wideband simplified transformer-based {VCO} with digital amplitude
calibration},
booktitle = {{IEEE} 60th International Midwest Symposium on Circuits and Systems,
{MWSCAS} 2017, Boston, MA, USA, August 6-9, 2017},
pages = {787--790},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/MWSCAS.2017.8053041},
doi = {10.1109/MWSCAS.2017.8053041},
timestamp = {Mon, 09 Aug 2021 14:54:01 +0200},
biburl = {https://dblp.org/rec/conf/mwscas/GaoXJJZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/iet-cds/GuanJPCZ16,
author = {Rui Guan and
Jing Jin and
Wenjie Pan and
Dongpo Chen and
Jianjun Zhou},
title = {Wideband dual-mode complementary metal-oxide-semiconductor receiver},
journal = {{IET} Circuits Devices Syst.},
volume = {10},
number = {2},
pages = {87--93},
year = {2016},
url = {https://doi.org/10.1049/iet-cds.2015.0022},
doi = {10.1049/IET-CDS.2015.0022},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/iet-cds/GuanJPCZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/LuJMZ16,
author = {Zhijian Lu and
Jing Jin and
Tingting Mo and
Jianjun Zhou},
title = {Analysis of Input {LCR} Matched N-Path Filter},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {63-I},
number = {6},
pages = {795--805},
year = {2016},
url = {https://doi.org/10.1109/TCSI.2016.2538098},
doi = {10.1109/TCSI.2016.2538098},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/LuJMZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asicon/PanJZ15,
author = {Bukun Pan and
Jing Jin and
Jianjun Zhou},
title = {A GHz-level ring-counter-based multi-modulus fractional {LO} divider
with on-the-fly tunability},
booktitle = {2015 {IEEE} 11th International Conference on ASIC, {ASICON} 2015,
Chengdu, China, November 3-6, 2015},
pages = {1--4},
publisher = {{IEEE}},
year = {2015},
url = {https://doi.org/10.1109/ASICON.2015.7517060},
doi = {10.1109/ASICON.2015.7517060},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asicon/PanJZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JinPLZ14,
author = {Jing Jin and
Bukun Pan and
Xiaoming Liu and
Jianjun Zhou},
title = {Injection-Locking Frequency Divider based dual-modulus prescalers
with extended locking range},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {502--505},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865182},
doi = {10.1109/ISCAS.2014.6865182},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JinPLZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/JinPLZ14a,
author = {Jing Jin and
Bukun Pan and
Xiaoming Liu and
Jianjun Zhou},
title = {Digital spur calibration of multi-modulus fractional frequency {LO}
divider utilizing most correlated comparison algorithm},
booktitle = {{IEEE} International Symposium on Circuits and Systemss, {ISCAS} 2014,
Melbourne, Victoria, Australia, June 1-5, 2014},
pages = {742--745},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISCAS.2014.6865242},
doi = {10.1109/ISCAS.2014.6865242},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/JinPLZ14a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcas/JinLMZ12,
author = {Jing Jin and
Xiaoming Liu and
Tingting Mo and
Jianjun Zhou},
title = {Quantization Noise Suppression in Fractional-N PLLs Utilizing Glitch-Free
Phase Switching Multi-Modulus Frequency Divider},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {59-I},
number = {5},
pages = {926--937},
year = {2012},
url = {https://doi.org/10.1109/TCSI.2012.2189042},
doi = {10.1109/TCSI.2012.2189042},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcas/JinLMZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/WangWJCZ12,
author = {Hui Wang and
Wufeng Wang and
Jing Jin and
Dongpo Chen and
Jianjun Zhou},
title = {Anti-interference pseudo-differential wideband {LNA} for {DVB-S.2}
{RF} tuners},
booktitle = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
2012, Seoul, Korea (South), May 20-23, 2012},
pages = {2151--2154},
publisher = {{IEEE}},
year = {2012},
url = {https://doi.org/10.1109/ISCAS.2012.6271713},
doi = {10.1109/ISCAS.2012.6271713},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/WangWJCZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuJLZ11,
author = {Xiaoming Liu and
Jing Jin and
Xi Li and
Jianjun Zhou},
title = {Glitch-Free Multi-Modulus Frequency Divider for Quantization Noise
suppression in fractional-N PLLs},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {478--481},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937606},
doi = {10.1109/ISCAS.2011.5937606},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiuJLZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/LiuJMZ11,
author = {Xiaoming Liu and
Jing Jin and
Cui Mao and
Jianjun Zhou},
title = {Linear range extensible Phase Frequency Detector and Charge Pump for
fast frequency acquisition},
booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
15-19 2011, Rio de Janeiro, Brazil},
pages = {985--988},
publisher = {{IEEE}},
year = {2011},
url = {https://doi.org/10.1109/ISCAS.2011.5937733},
doi = {10.1109/ISCAS.2011.5937733},
timestamp = {Mon, 19 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iscas/LiuJMZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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