WO2017010705A1 - Light emitting diode, method for manufacturing same, and light emitting device module having same - Google Patents

Abstract

The present invention relates to a light emitting diode having improved light efficiency and has a feature of enhancing the reflectivity of a device by forming an insulating reflective part on a reflective electrode formed on the upper surface of a mesa. According to the present invention, there is an effect of providing a light emitting diode having improved light efficiency by forming a mesa exposing part on the outer periphery and/or in the interior region of the reflective electrode to expose a predetermined area of the upper surface of the mesa such that reflection at the mesa exposing part is performed by the insulating reflective part.

Description

Light emitting diode, method of manufacturing the same, and light emitting device module having the same

The present invention relates to a light emitting diode, a method of manufacturing the same, and a light emitting device module having the same, and more particularly, to a light emitting diode having improved reflectance, a method of manufacturing the same, and a light emitting device module having the same.

Since the development of gallium nitride (GaN) -based light emitting diodes, GaN-based LEDs have been used in various applications such as color LED display devices, LED traffic signals, and white LEDs.

A light emitting diode is a device that emits light when electrons and holes recombine in an active layer. Both sides of the active layer are provided with a p-type semiconductor layer and an n-type semiconductor layer, and when a voltage is applied between the p-type semiconductor layer and the n-type semiconductor layer, electrons and holes are injected into the active layer to emit light while recombining.

A flip-chip LED is a device in which light generated in an active layer is emitted through a transparent substrate. Generally, a light is transparent by using an electrode formed on a p-type semiconductor layer or an n-type semiconductor layer as a reflective electrode. To be reflected to the side. In particular, various electrode structures have been proposed to assist current dispersion and to improve light output in light emitting diodes having a large area flip chip structure.

In this case, since it is limited to increase the reflectance of the reflective electrode material itself, a method of increasing the area of the reflective electrode may be considered to improve the light efficiency of the device. For example, when the electrode formed on the p-type semiconductor layer is used as the reflective electrode, it is advantageous to improve the light efficiency so that the reflective electrode covers the upper surface of the p-type semiconductor layer, that is, the upper surface of the mesa structure.

However, as the distance between the reflecting electrode and the upper edge of the mesa structure increases, the possibility of leakage current increases, and there is a limit in improving the light efficiency with this method.

Meanwhile, in order to improve light output in the flip chip structure, a technique for reducing light loss may be considered by distributing a distributed Bragg reflector on the side where the electrode is formed. Distributed Bragg reflectors (DBRs) typically provide high reflectivity over a wide range of wavelength spectra by alternately stacking layers of different refractive indices. DBRs generally comprising 20 pairs of layers are used to provide high reflectivity over a broad wavelength range of 400-700 nm. However, since the DBR has a thickness of about 4 μm, patterning is difficult, and due to the large lateral inclination angle of the DBR, it is difficult to form an electrode thereon.

On the other hand, a light emitting diode is modularized into a light emitting element module when used in the final product. In general, a light emitting diode has been manufactured in a package form through a packaging process and then mounted on a printed circuit board. Recently, however, a technology of fabricating a light emitting device module by omitting a packaging process and mounting a light emitting diode directly on a printed circuit board has been used.

The problem to be solved by the present invention is to provide a light emitting diode having a good current dispersion performance.

Another object of the present invention is to provide a light emitting diode having an increased reflectance and a method of manufacturing the same. Specifically, it is a problem to increase the reflectance under the reduced area of the reflective electrode rather than increasing the area of the reflective electrode.

Another object of the present invention is to provide a light emitting diode having an insulating reflective layer that is easy to pattern while maintaining high light reflecting performance.

In addition, another problem to be solved by the present invention is to prevent the current distribution characteristics deterioration due to the reduction of the reflecting electrode area.

In addition, another problem to be solved by the present invention is to prevent degradation of the light emitting diode during the manufacturing process, and to improve the light efficiency of the light emitting diode package.

Another object of the present invention is to provide a light emitting diode that can improve the reliability by preventing the breakage of the electrode.

Another object of the present invention is to provide a light emitting device module that can be manufactured without a packaging process.

Other features and advantages of the invention will be apparent from the following description.

At least one light emitting diode according to an embodiment of the present invention may be formed by stacking a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, and etching the semiconductor substrate to expose at least a portion of the first conductive semiconductor layer. Mesa structure; A first electrode electrically connected to the exposed first conductive semiconductor layer; And a second electrode formed on the upper surface of the mesa and electrically connected to the second conductive semiconductor layer, wherein the second conductive semiconductor layer is not covered by the second electrode in at least a portion of the edge of the mesa upper surface. The exposed mesa exposed portion is formed, wherein the mesa exposed portion includes a first mesa exposed portion and a second mesa exposed portion, wherein the separation distance between the second electrode and the upper edge of the mesa is a first separation distance and a second separation distance. The second separation distance may be greater than the first separation distance, and at least an upper portion of the second mesa exposed portion may include an insulating reflection portion.

A third mesa exposed portion surrounded by the second electrode may be further formed on the upper surface of the mesa.

The insulation reflector may include a stack of a first insulation reflector for reflecting light in a relatively long wavelength range and a second insulation reflector for reflecting light in a relatively short wavelength range, and below the insulation reflector. The lower insulating layer may be formed.

In this case, a first opening and a second opening may be formed in the lower insulating layer, and the first electrode and the second electrode may be formed in the first opening and the second opening, respectively. Here, the first opening and the second opening may be formed in different process steps.

In addition, the mesa exposed portion may be formed in at least a portion of the edge portion of the light emitting diode, the first separation distance may be a separation distance between the reflecting electrode extension in which the second electrode is extended and the mesa upper edge, The reflective electrode extension may be formed at a light emitting diode vertex portion, and the second separation distance may be 20 μm or more.

In addition, electrically connecting the first electrode and the second electrode to an external power source, respectively.

And a first pad and a second pad, wherein the first pad and the second pad are electrically connected to the first electrode and the second electrode through a first contact portion and a second contact portion, respectively. The second contact portion may be larger than the first contact portion.

The display device may further include a second electrode connection pad electrically connected to the second electrode, and the first electrode and the second electrode connection pad may be electrically insulated by an upper insulating layer. In this case, the first electrode and the second electrode connection pad may be formed by the same process.

The light emitting diode package according to another embodiment of the present invention may be a light emitting diode package including the light emitting diode as described above, and further include a wavelength conversion layer for converting the wavelength of light emitted through the substrate. In this case, the light emitting diode may be a blue light emitting diode, and the wavelength conversion layer may include one or more phosphors of yellow, green, and red.

A light emitting diode package according to another embodiment of the present invention is a light emitting diode package including a light emitting diode and a wavelength conversion layer, wherein the light emitting diode reflects light generated in an active layer toward a transparent substrate and the reflective electrode An insulating reflecting portion formed on an upper portion of the mesa that is not covered by the insulating film, wherein the insulating reflecting portion includes a first insulating reflecting portion for reflecting light converted in the wavelength conversion layer and a second reflecting light generated in the active layer. Including an insulation reflector, the wavelength converted from the wavelength conversion layer is characterized in that the light of a longer wavelength than the light generated in the active layer.

In this case, the first insulation reflecting portion may be formed closer to the transparent substrate than the second insulation reflecting portion.

A light emitting diode according to another embodiment of the present invention, the lower semiconductor layer; An upper semiconductor layer disposed on the lower semiconductor layer; An active layer disposed between the lower semiconductor layer and the upper semiconductor layer; A first opening exposing the lower semiconductor layer through the upper semiconductor layer and the active layer; A reflective insulating layer covering the upper semiconductor layer and the lower semiconductor layer, the reflective insulating layer having a second opening defining a first contact region of the lower semiconductor layer in the first opening; And a first electrode layer disposed on the reflective insulating layer and connected to the first contact region of the lower semiconductor layer, wherein the reflective insulating layer is formed of a first material layer having a first refractive index and a second refractive index; A layered structure in which two material layers are alternately stacked, wherein the first contact region is located in the bottom surface of the first opening, and the reflective insulation is formed at a side angle of the sidewall of the second opening with respect to the lower semiconductor layer. When the thickness of the layer h and the length of the bottom surface of the first opening from the first contact region to the sidewall of the first opening are a, the following Equation 1 is satisfied.

(Equation 1)

tan-1 (2h / a) ≤Θ ≤ 55 °.

When Θ is less than or equal to 55 °, cracking of the first electrode layer formed on the reflective insulating layer can be prevented. In addition, when Θ is greater than or equal to tan-1 (2h / a), light directed toward the side surface of the reflective insulating layer can be reduced, thereby ensuring the reflective performance of the reflective insulating layer.

The length a of the bottom surface of the first opening from the first contact region to the sidewall of the first opening may be in a range of 1.5 to 10 μm, and the thickness h of the reflective insulating layer may be in a range of 1 to 2.5 μm. By setting the thickness h of the reflective insulating layer to 1 µm or more, the reflectance of the reflective insulating layer can be ensured. In addition, by setting the thickness h of the reflective insulating layer to 2.5 µm or less, the patterning of the reflective insulating layer can be easily performed, and the lateral inclination of the reflective insulating layer can be easily controlled. Specifically, a may be in the range of 2 to 6 μm, h may be in the range of 1.5 to 2.5 μm, more specifically, in the range of 1.5 to 2 μm.

In addition, the reflective insulating layer may include 8 to 11 pairs of the first material layer and the second material layer.

In one embodiment, the first material layer may be a SiO ₂ layer and the second material layer may be a TiO ₂ layer. The SiO ₂ layer has a refractive index of about 1.47, for example, and the TiO ₂ layer has a refractive index in the range of 2.4 to 2.7.

The first material layer has a higher refractive index than the second material layer, and the first material layer may be disposed on the lowermost layer and the uppermost layer of the reflective insulating layer. Specifically, the first layer and the last layer of the reflective insulating layer may be a SiO ₂ layer. In addition, the first or last layer may be relatively thicker than other first material layers.

The second opening may have an elongated shape. Further, one end portion of the second opening portion may have a round shape having a wider width. By forming the one end end of the second opening in a round shape that is relatively wider than the other part, it is possible to prevent the formation of severe inclination on the sidewalls of the second opening while photographing and etching the reflective insulating layer.

In some embodiments, the light emitting diode includes a mesa including the upper semiconductor layer and the active layer, wherein a second contact region is disposed around the mesa along an edge of the first conductivity-type semiconductor layer. The first electrode layer may extend around the mesa to connect to the second contact region. Accordingly, the second contact region surrounds the mesas to help distribute current.

In some embodiments, the first contact region may extend from the second contact region. Furthermore, a plurality of first contact regions may extend from the second contact region. The plurality of first contact regions may be disposed parallel to each other.

On the other hand, the light emitting diode further includes a second electrode layer disposed on the reflective insulating layer. The reflective insulating layer may further include at least one third opening positioned on the upper semiconductor layer, and the second electrode layer may be electrically connected to the upper semiconductor layer through the third opening.

In some embodiments, the light emitting diode further comprises a conductive layer disposed between the upper semiconductor layer and the reflective insulating layer to contact the upper semiconductor layer, wherein the conductive layer is exposed through the third opening; The second electrode layer may be connected to the conductive layer through the third opening.

Further, the light emitting diode may further include an upper insulating layer disposed on the first electrode layer and the second electrode layer, and the upper insulating layer exposes the first electrode layer and the second electrode layer, respectively, to form a first electrode. It may have openings defining an electrode pad region and a second electrode pad region. Therefore, the first electrode layer and the second electrode layer may function as electrode pads, and there is no need to form additional electrode pads, thereby simplifying a manufacturing process of the light emitting diode.

The first electrode layer and the second electrode layer may each include a Ti layer in contact with the upper insulating layer. By arranging the Ti layer on the uppermost layer of the first electrode layer and the second electrode layer, the adhesion of the upper insulating layer can be improved.

Further, the second electrode layer may be formed of the same material as the first electrode layer. Furthermore, the first electrode layer and the second electrode layer can be formed together by the same process. In addition, the second electrode layer may be surrounded by the first electrode layer.

Meanwhile, the first electrode layer and the second electrode layer may include an ohmic contact layer, a metal reflective layer, a diffusion barrier layer, and an antioxidant layer. Accordingly, the first electrode layer and the second electrode layer may be directly bonded to the printed circuit board through the solder paste.

The light emitting diode may further include a substrate positioned below the lower semiconductor layer. The substrate may be a growth substrate used to grow the lower semiconductor layer, the active layer and the upper semiconductor layer. Light generated in the active layer may be emitted to the outside through the substrate.

A light emitting diode according to another embodiment of the present invention, the lower semiconductor layer; A mesa disposed on the lower semiconductor layer and including the upper semiconductor layer and the active layer; A reflective insulating layer covering the mesa and the lower semiconductor layer around the mesa and exposing an edge of the lower semiconductor layer; And a first electrode layer disposed on the reflective insulating layer, the first electrode layer contacting an edge of the lower semiconductor layer around the mesa, wherein the reflective insulating layer has a first material layer having a first refractive index and a second refractive index. The second material layer has a laminated structure in which alternating layers are laminated, an angle formed by side surfaces of the reflective insulating layer with respect to the lower semiconductor layer, a thickness of the reflective insulating layer h, and the first electrode layer is the lower semiconductor layer. When the distance from the contact area contacting the edge of the mesa sidewall to a is a, the following equation (1) is satisfied.

(Equation 1)

tan-1 (2h / a) ≤Θ ≤ 55 °.

By setting the angle θ of the side surface of the reflective insulating layer with respect to the lower semiconductor layer in the above range, the first electrode layer can be prevented from being broken, and the reflective performance of the reflective insulating layer can be ensured.

Further, the distance a from the contact region where the first electrode layer contacts the edge of the lower semiconductor layer to the mesa sidewall is in the range of 1.5 to 10 μm, and the thickness h of the reflective insulating layer may be in the range of 1 to 2.5 μm. have. By setting the thickness h of the reflective insulating layer to 1 µm or more, the reflectance of the reflective insulating layer can be ensured. In addition, by setting the thickness h of the reflective insulating layer to 2.5 µm or less, the patterning of the reflective insulating layer can be easily performed, and the lateral inclination of the reflective insulating layer can be easily controlled. Specifically, a may be in the range of 2 to 6 μm, h may be in the range of 1.5 to 2.5 μm, more specifically, in the range of 1.5 to 2 μm.

Furthermore, the reflective insulating layer may include 8 to 11 pairs of the first material layer and the second material layer. Accordingly, the reflective insulating layer can have a good reflectance, and can easily pattern the reflective insulating layer.

The light emitting device module according to another embodiment of the present invention, a printed circuit board; The light emitting diodes described above; And a solder paste for bonding the light emitting diode to the printed circuit board, wherein the solder paste is connected to the first electrode layer. Since a light emitting diode is directly mounted on a printed circuit board through solder paste, a packaging process can be omitted, thereby providing a light emitting device module having a simple manufacturing process.

According to embodiments of the present invention, a reduced reflection is achieved by forming a second mesa exposed portion having a relatively large separation distance between the reflective electrode and the mesa top edge in at least a portion of the mesa edge portion and forming an insulating reflecting portion thereon. It is possible to provide a light emitting diode capable of increasing the reflectance under the electrode area.

In addition, the reflective electrode extension may be formed in at least a portion of the edge of the light emitting diode, for example, a light emitting diode vertex, to provide a light emitting diode capable of preventing current deterioration characteristics due to the reduction of the reflective electrode area.

In addition, by forming an insulating reflecting portion on the lower insulating layer, it is possible to provide a light emitting diode capable of preventing damage caused by ion damage in the insulating reflecting portion forming step.

Further, according to some embodiments of the present invention, light emission is formed by forming a first insulation reflector for reflecting light in a relatively long wavelength range and a second insulation reflector for reflecting light in a relatively short wavelength range in this order. The light efficiency of the diode package can be improved.

Further, while adopting the reflective insulating layer, it is possible to prevent cracking of the first electrode layer formed thereon by controlling the inclination of the side surface of the reflective insulating layer with respect to the lower semiconductor layer to 55 degrees or less. In addition, it is possible to prevent the light reflection performance of the reflective insulating layer from being deteriorated by making the side slope equal to or larger than tan-1 (2h / a).

1 is a (a) plan view and (b) AA ′ line cross-sectional view of a light emitting diode according to an embodiment of the present invention.

2 is a conceptual diagram of a light emitting diode package including a light emitting diode and a wavelength conversion layer according to embodiments of the present invention.

3 to 9 show a method of manufacturing a light emitting diode according to the embodiment of FIG.

10 is a (a) plan view and (b) B-B 'line cross-sectional view of a light emitting diode according to another embodiment of the present invention.

11 is a modification of the FIG. 10 embodiment.

12 is a (a) plan view, (b) D-D 'line sectional view, and (c) E-E' line sectional view of a light emitting diode according to another embodiment of the present invention.

13 to 18 illustrate a method of manufacturing a light emitting diode according to the embodiment of FIG. 12, (a) is a plan view, (b) is a sectional view taken along the line D-D ', and (c) is a sectional view taken along the line F-F'.

19 is a plan view of a light emitting diode according to another embodiment of the present invention.

20 is a plan view of a light emitting diode according to another embodiment of the present invention.

FIG. 21 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention. FIG.

FIG. 22 is a schematic cross sectional view taken along the line G-G 'of FIG.

FIG. 23 is a partially enlarged cross-sectional view of FIG. 22.

24 is a schematic cross-sectional view illustrating a reflective insulating layer according to an embodiment of the present invention.

25 is a graph showing reflectance according to the wavelength of the reflective insulating layer composed of 21 layers and 41 layers, respectively.

FIG. 26 is graphs illustrating reflectance according to a wavelength of a reflective insulating layer including five, ten, and fifteen layers.

27 is a schematic cross-sectional view for describing an electrode layer according to an exemplary embodiment of the present invention.

FIG. 28 is a schematic diagram illustrating an opening of a reflective insulating layer in a light emitting diode according to an exemplary embodiment of the present invention.

29 is photographs showing electrode layers formed in the openings of FIG. 28.

30 is a schematic cross-sectional view for describing a light emitting device module according to another embodiment of the present invention.

31 is an exploded perspective view illustrating a lighting apparatus to which a light emitting device is applied according to still another embodiment of the present invention.

32 is a cross-sectional view for describing a display device to which a light emitting device is applied, according to another exemplary embodiment.

33 is a cross-sectional view for describing a display device to which a light emitting device is applied, according to another exemplary embodiment.

34 is a cross-sectional view illustrating an example in which a light emitting device according to still another embodiment of the present invention is applied to a head lamp.

(Explanation of the sign)

10, 121: substrate

11 (123): first conductive semiconductor layer (lower semiconductor layer)

13, 125: active layer

15 (127): second conductivity type semiconductor layer (upper semiconductor layer)

21: lower insulating layer, 21a, b: opening

22: upper insulating layer, 22a, b: via

30: first electrode

31: second electrode connection pad

32: break

40: second electrode

41: reflective conductive layer

43: barrier layer

50: insulation reflecting portion, 51: first insulation reflecting portion, 52: second insulation reflecting portion

60: first pad

70: second pad

90: reflective electrode extension

100: wavelength conversion layer

110: phosphor particles

123a first contact area

123b second contact area

133 reflective insulation layers

135 first electrode layer

137 Second electrode layer

139 Top Insulation Layer

143a first electrode pad region

143b second electrode pad region

C1: first contact portion, C2: second contact portion

E1: first mesa exposed portion, E2: second mesa exposed portion, E3: third mesa exposed portion

M, 130: Mesa

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, but the present invention is not limited or restricted by the embodiments. In the drawings, widths, lengths, thicknesses, and relative sizes of the components may be exaggerated for convenience of description. In addition, where one component is described as "on" or "on" another component, unless otherwise stated, one component is "on top" or "on" of another component. In addition to cases, there is also a case where there is another component between each component and another component. Like numbers refer to like elements throughout.

Figure 1 (a) is a plan view of a light emitting diode according to an embodiment of the present invention, Figure 1 (b) is a cross-sectional view taken along the line AA '. Referring to FIG. 1, a light emitting diode according to an exemplary embodiment of the present invention is sequentially stacked on a substrate 10 and an upper surface of the substrate 10 and mesa-etched to form a plurality of mesa structures M. FIG. The first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 15 are included.

The material of the substrate 10 is not particularly limited, but light generated in the active layer 13 must be emitted through the substrate 10, and thus, the substrate 10 must be a transparent substrate. The substrate 10 is selected from sapphire (Al 2 O 3), silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium oxide (Ga 2 O 3), and the like. It may be.

The first conductive semiconductor layer 11 may be a nitride based semiconductor layer doped with n-type impurities. For example, an n-type aliquot may be AlxInyGazN (0 ≦ x, y, z ≦ 1, x + y + z = 1), wherein the n-type impurity is selected from Si, Ge, Sn, Se, and Te. At least one selected. The second conductivity-type semiconductor layer 15 may be a nitride-based semiconductor layer doped with p-type impurities. For example, it may be Al x In y Ga z N doped with p-type impurity (0 ≦ x, y, z ≦ 1, x + y + z = 1), wherein the p-type impurity is selected from among Mg, Zn, Ca, Sr, Be, and Ba. At least one selected. The active layer 13 may include a group III-V compound material as a layer for generating light by recombination of electrons and holes injected from the first conductive semiconductor layer 11 and the second conductive semiconductor layer 15, respectively. For example, it may include AlxInyGazN (0 ≦ x, y, z ≦ 1, x + y + z = 1). In addition, the active layer 13 may have a single quantum well (SQW) or a multi quantum well (MQW) structure. For example, the active layer 13 may have a single quantum well structure having an InGaN layer or an AlGaN layer, or a multi-quantum well structure having a multilayer structure of InGaN / GaN, AlGaN / (In) GaN, InAlGaN / (In) GaN. .

The stacked structure of the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 15 may be mesa-etched to expose the first conductive semiconductor layer 11 in a portion of the light emitting diode. The lower insulating layer 21 is formed on the upper surface. The lower insulating layer 21 may be a silicon oxide film SiO 2, and may be formed to a thickness of about 100 nm. The lower insulating layer 21 is removed in a region where the first electrode 30 and the second electrode 40 are formed as shown in FIG. 1B, so that the first conductive semiconductor layer 11 and the second conductive semiconductor layer 11 are removed. (15) is exposed.

The first electrode 30 is formed on the first conductive semiconductor layer 11 exposed by removing the lower insulating layer 21. As shown in FIG. 1A, a plurality of first electrodes 30 may be formed in a circle and a linear shape, and may be uniformly distributed in the area of the light emitting diode for uniform current distribution characteristics. Although FIG. 1A illustrates that six circular and linear first electrodes 30 are arranged, the shape, number, and arrangement structure thereof are not limited thereto. The first electrode 30 may be formed of aluminum (Al), and may be an adhesive layer such as titanium (Ti), chromium (Cr), or nickel (Ni), or nickel (Ni), chromium (Cr), or gold (Au). It can be formed in a multi-layer structure including a protective layer, such as a lower or upper. The first electrode 30 electrically connects the first conductivity-type semiconductor layer 11 to an external power source through the first pad 60 to be described later.

The second electrode 40 is formed on the upper surface of the mesa structure from which the lower insulating layer 21 is removed, that is, the upper surface of the second conductive semiconductor layer 15. The second electrode 40 is a reflective electrode that reflects light generated from the active layer 13 toward the substrate 10. For this purpose, the second electrode 40 is a reflective conductive layer 41 formed of silver (Ag) or an alloy thereof. ) May be included. In addition, the reflective conductive layer 41 may further include a barrier layer 43 for preventing the diffusion of the material, the barrier layer 43 is W, TiW, Mo, Cr, Ni, Pt, Rh, Pd, Ti or It may be formed of an alloy or a composite layer, and may be formed in a shape surrounding the top and side surfaces of the reflective conductive layer 41 as shown in FIG. The second electrode 40 has a bonding layer of Ni, NiZn, ITO, ZnO, or the like on the surface contacting the second conductivity-type semiconductor layer 15 for ohmic contact with the second conductivity-type semiconductor layer 15. It may further include. The second electrode 40 not only reflects light but also electrically connects the second conductivity-type semiconductor layer 15 to an external power source through the second pad 70 to be described later.

As shown in FIGS. 1A and 1B, the second electrode 40 is formed only on the upper surface of the mesa structure, and is spaced apart from the edge of the mesa upper surface by a predetermined distance to prevent leakage current. Mesa exposed portions E1 and E2 are formed in the regions where the upper surface of the mesa structure is not covered by the second electrode 40.

On the other hand, the light emitting diode according to the present invention is not a constant distance between the second electrode 40 and the mesa top edge, the first mesa exposed portion (E1) and a relatively large distance spaced by a relatively small distance (d1). It may include a second mesa exposed portion (E2) spaced apart by (d2). The distance d1 from the first mesa exposed portion E1 may be a minimum distance between the second electrode 40 and the mesa top edge of the light emitting diode, and may be 3 μm or more to prevent leakage current. On the other hand, the distance d2 from the second mesa exposed portion E2 may be 20 μm or more.

As shown in FIG. 1A, the second mesa exposed portion E2 may be formed in at least a partial region between the second electrode 40 and an edge of the light emitting diode, for example, four sides of the light emitting diode. Meanwhile, when the separation distance between the second electrode 40 and the mesa top edge is large, the current distribution characteristic of the second conductive semiconductor layer 15 may be deteriorated. Therefore, in some regions, the second electrode 40 and the mesa top surface are deteriorated. The separation distance of the edge may be formed smaller than d2. For example, the reflective electrode extension 90 in which the second electrode is extended may be formed near four vertices of the light emitting diode, so that the distance between the reflective electrode extension 90 and the mesa structure edge is d1. Meanwhile, although only the first mesa exposed portion and the second mesa exposed portion are illustrated in FIG. 1B, the third mesa exposed portion having a distance d3 between the second electrode 40 and the mesa upper edge may be further included. At this time, d3 may be the same as or different from d1 or d2.

An insulating reflection part 50 is formed on the lower insulating layer 21 and the first and second electrodes 30 and 40. The insulation reflecting unit 50 may be a distributed Bragg reflector (DBR), and may have a multilayer film having a structure in which layers having different refractive indices are alternately stacked, for example, a multilayer film structure such as SiO 2 / TiO 2 or SiO 2 / Nb 2 O 5. have. The insulation reflector 50 may adjust the reflected wavelength by adjusting the optical thickness of the insulation layers stacked. For example, when the light emitting diode of the present invention is a blue light emitting diode, it is possible to adjust the optical thickness of the insulating layers are laminated so as to have excellent reflection characteristics for the wavelength in the blue range.

Meanwhile, the insulation reflector 50 may include a first insulation reflector and a second insulation reflector having different reflection wavelength ranges, and the first insulation reflector reflects light having a longer wavelength range than the second insulation reflector. Can be. For example, the first insulation reflector may be an insulation reflector for reflecting yellow light, and the second insulation reflector may be an insulation reflector for reflecting blue light. In this case, the insulation reflection unit 50 may be configured to have a structure in which a first insulation reflection unit is first deposited on the lower insulation layer 21 and a second insulation reflection unit is deposited thereon. In addition, the insulation reflector 50 may further include another insulation reflector having a different reflection wavelength range from that of the first and second insulation reflectors.

The first contact part C1 and the second contact part C2 are formed in the insulating reflection part 50, and the first pad 60 and the second pad 70 are respectively formed on the insulating reflection part 50. The first pad 60 and the second pad 70 are electrically connected to the first electrode 30 and the second electrode 40 through the first contact portion C1 and the second contact portion C2, respectively. . The first pad 60 and the second pad 70 may be connected to bumps or used as pads for Surface Mounting Technology (SMT) for mounting the light emitting diodes to a submount, package, or printed circuit board.

The light emitting diode according to the embodiment of the present invention described above, the light generated in the active layer 13 is reflected by the second electrode 40 is emitted through the substrate 10. In addition, in the mesa exposed portions E1 and E2 of the side surface of the mesa structure or the mesa top surface not covered by the second electrode 40, the light is reflected by the insulating reflector 50 and is emitted through the substrate 10. While the second electrode formed by the reflective conductive layer 41 such as silver (Ag) is usually difficult to obtain a reflectance of 90 to 94% or more, the insulation reflector 50 such as a distributed Bragg reflector has a reflectance of 99%. Since it can have, the light emitting diode structure according to the present invention can exhibit improved light efficiency characteristics.

Particularly, in the present invention, the second mesa exposed portion E2 having a larger distance between the second electrode 40 and the mesa upper edge than the first mesa exposed portion E1 may be, for example, the second electrode 40 and the light emitting diode. By forming in at least a portion of the area between the four sides of the, it is possible to increase the ratio reflected by the insulating reflection unit 50 and improve the light efficiency. In addition, when the second mesa exposed portion E2 is formed on all four sides of the light emitting diode, the current distribution characteristic of the second conductive semiconductor layer 15 may not be good at the corner portion of the light emitting diode. For example, deterioration of the current distribution characteristic due to the formation of the second mesa exposed portion E2 may be prevented by forming the reflective electrode extension 90 in which the second electrode 40 is extended at four vertices of the light emitting diode.

In addition, the present invention uses a laminated structure of the first insulating reflecting portion reflecting light of a relatively long wavelength range to the insulating reflecting portion 50 and the second insulating reflecting portion reflecting relatively short wavelength light, thereby emitting light according to the present invention. The light efficiency of the LED package including the diode and the wavelength conversion layer may be further improved. This will be described with reference to FIG. 2.

FIG. 2 is a conceptual diagram of a light emitting diode package including a light emitting diode and a wavelength conversion layer 100 according to the present invention, and illustrates only mesa exposed portions E1 and E2 in order to explain reflection by the insulating reflector 50. It is. In this case, the light emitting diode may be a blue light emitting diode, and the wavelength conversion layer 100 may be a wavelength conversion layer including yellow phosphor particles 110. As shown in FIG. 2, of blue light generated in the active layer 13, Ra passes through the substrate 10 and the wavelength conversion layer 100 as it is and is emitted to the outside, and Rb is yellow while passing through the wavelength conversion layer 100. The phosphor particles 110 are excited to emit yellow light Rc to the outside. Accordingly, the light emitting diode package emits white light in which blue light and yellow light are mixed.

Meanwhile, among the yellow light emitted from the yellow phosphor particles 110 excited by blue light, light Rd emitted in the direction of the light emitting diode is also present, and the light is emitted from the substrate 10 and the first and second conductivity-type semiconductor layers ( 11 and 15 penetrate and enter the insulation reflecting unit 50. However, since the insulating reflector 50 has a structure in which the first insulating reflector 51 reflecting the relatively long wavelength is first deposited on the lower insulating layer 21, the yellow light Rd incident thereon is first insulating. It is effectively reflected by the reflecting portion 51 is emitted to the outside again.

On the other hand, if it is deposited from the second insulation reflecting portion 52 reflecting the relatively short wavelength on the lower insulation layer 21, the yellow light Rd passes through the second insulation reflecting portion 52 and then the first insulation. Reflected by the reflecting portion 51, it must pass through the second insulating reflecting portion 52 to be emitted to the outside. However, since the attenuation of light occurs in the course of passing the second insulation reflecting portion 52 reflecting the short wavelength, the yellow light having a long wavelength, the light efficiency can be reduced compared to the structure of the present invention. As a result, the light emitting diode of the present invention is formed by stacking the insulation reflector 50 in the order of the first insulation reflector 51 reflecting the relatively long wavelength and the second insulation reflector 52 reflecting the relatively short wavelength. When combined with the wavelength conversion layer 100 to form a light emitting diode package there is an effect that can obtain a better light efficiency.

In FIG. 2, the wavelength conversion layer 100 includes the yellow phosphor particles 110, but the phosphor particles included in the wavelength conversion layer 100 absorb light generated in the light emitting layer 13 to provide light having a longer wavelength. It may be another phosphor particle that emits light. For example, when the light generated in the emission layer 13 is blue light, the phosphor particles 110 may be one or more phosphor particles of yellow, green, and red.

In addition, when the wavelength conversion layer 100 includes two or more phosphor particles 110, for example, green and red phosphor particles, the insulation reflection portion 50 may also be formed by stacking insulation reflection portions corresponding to each wavelength range. Can be. In this case, the insulating reflector for reflecting light having a relatively long wavelength range may be stacked.

Hereinafter, a method of manufacturing a light emitting diode according to an exemplary embodiment of the present invention shown in FIG. 1 will be described with reference to FIGS. 3 to 9. In Figures 3 to 9 (a) is a plan view, (b) is a cross-sectional view taken along the line A-A '. However, the present invention is not limited to the light emitting diode manufactured by a specific manufacturing method, and the manufacturing method described below should be understood as an example to help understanding the light emitting diode structure of the present invention.

3 is a step of forming a mesa structure. First, the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 15 are sequentially deposited on the substrate 10. Each layer can be deposited using MOCVD (Metal Organic Chemical Vapor Deposition) or MBE (Molecular Beam Epitaxy). Next, a photoresist pattern (not shown) is formed on the second conductive semiconductor layer 15, and the second conductive semiconductor layer 15 is exposed so that the first conductive semiconductor layer 11 is exposed as a mask. ) And the active layer 13 are formed to form a mesa structure. The side of the mesa structure may be formed to be inclined at a predetermined angle to improve light extraction efficiency, and for this, a technique such as photoresist reflow may be used.

4 is a step of forming openings for forming the lower insulating layer 21 and forming the second electrode 40. The lower insulating layer 21 may be a silicon oxide layer (SiO 2) having a thickness of about 100 nm deposited by plasma-enhanced chemical vapor deposition (PECVD). After deposition of the lower insulating layer 21, the second opening 21b may be formed in a portion where the second electrode 40 is to be formed, and may be formed by wet etching after forming a photoresist pattern (not shown).

FIG. 5 illustrates a second electrode forming step, in which a second electrode 40 is formed in the second opening 21b by using a patterning method such as lift-off. The second electrode 40 may be formed by depositing an excellent reflecting layer 41 having a high reflectance such as silver (Ag), and the barrier layer 43 may be formed on the upper and / or side surfaces thereof. In addition, an ohmic contact layer (not shown) for ohmic bonding with the second conductivity-type semiconductor layer 15 may be further formed under the reflective conductive layer 41.

The second electrode 40 is formed to be spaced apart from the edge of the mesa upper surface by a predetermined distance, and the first mesa exposed portion E1 having a relatively small separation distance and the second mesa exposed portion E2 having a relatively large separation distance are formed. Can be. The second mesa exposed portion E2 may be formed on at least a part of the edge of the second electrode 40 and the light emitting diode, for example, four sides, and may be a vertex of the light emitting diode to prevent deterioration of the current distribution characteristic. A reflective electrode extension 90 may be formed nearby. In the region where the reflective electrode extension 90 is formed, the first mesa exposed portion E1 having a relatively short distance between the second electrode 40 and the mesa top edge may be formed.

FIG. 6 is an opening forming step for forming the first electrode 30, and as shown in FIG. 6A, the first opening 21a may be formed in a circular and linear manner. The first opening 21a may be formed by wet etching after the formation of the photoresist pattern (not shown).

Meanwhile, the first opening 21a and the second opening 21b formed on the lower insulating layer 21 may be simultaneously formed in one process step, but as described above with reference to FIGS. 4 and 6, different process steps may be used. It can be formed through. This may be to protect the lower insulating layer 21 deposited on the mesa structure side. That is, when a photoresist film (not shown) is formed on the lower insulating layer 21 so that portions of the first opening 21a and the second opening 21b are opened and wet etching is performed, the photoresist on the side of the mesa structure Insufficient protection of the film may partially remove the lower insulating layer 21 deposited on the side of the mesa structure by the etching solution. As a result, the active layer 13 on the side of the mesa structure may be exposed to cause damage due to ion damage in an ion etch step before deposition of the subsequent insulating reflector 50, which may degrade device characteristics. It can be cause. Therefore, forming the first openings 21a and the second openings 21b on the lower insulating layer 21 in different processes has an effect of preventing deterioration of device characteristics.

7 is a step of forming the first electrode 30 in the first opening (21a), it may be formed in a circular and linear pattern as shown in Fig. 7 (a). The first electrode 30 may be formed by patterning a conductive metal such as aluminum (Al) by a lift-off method or the like, and may form titanium (Ti) for ohmic bonding or good adhesion property with the first conductive semiconductor layer 11. ), Or an adhesive layer such as chromium (Cr) or nickel (Ni), or a multi-layer structure including a protective layer such as nickel (Ni), chromium (Cr), gold (Au), or the like.

8 is a step of depositing the insulating reflector 50 and forming the first and second contact portions. As shown in FIGS. 8A and 8B, the insulation reflecting unit 50 may be formed in the entire area of the light emitting diode except for the first contact portion C1 and the second contact portion C2. The insulation reflection unit 50 may be formed by alternately depositing an insulating layer having different refractive indices, and may be formed by alternately depositing SiO 2 and TiO 2 thin films. In this case, a thin film (for example, SiO 2 thin film) first deposited on the lower insulating layer 21 may be deposited to a thickness of about 200 nm or more in order to improve the problem that the reflectance decreases according to the incident angle.

The optical thickness of the thin films deposited alternately may be determined in consideration of the reflection wavelength, and the first insulation reflecting portion 51 for first reflecting the light having a relatively long wavelength range is first formed and then relatively formed thereon. The second insulation reflecting portion 52 for reflecting light having a short wavelength may be formed.

The first contact portion C1 is formed on the first electrode 30 and the second contact portion C2 is formed on the second electrode 40, and the size of the second contact portion C2 is the first contact. It may be larger than the portion C1. At this time, when the first contact portion C1 and the second contact portion C2 are formed through the etching process after the insulating reflective portion 50 is deposited, the first electrode 30 or the second portion below the contact portions C1 and C2 is formed. Since the electrode 40 may be damaged, the first contact portion C1 and the second contact portion C2 may be formed by a lift-off method.

FIG. 9 illustrates a pad forming process in which a first pad 60 is formed to be connected to the first electrode 30 through a first contact portion C1, and a second electrode 40 is formed through the second contact portion C2. ) To form a second pad 70. The first pad 60 and the second pad 70 may be formed together in the same process. For example, the first pad 60 and the second pad 70 may be formed using an exposure and etching method or a lift off method. The first pad 60 and the second pad 70 may be formed by stacking an adhesive layer such as Ti, Cr, or Ni, and a highly conductive metal layer such as Al, Cu, Ag, or Au.

According to the above manufacturing method, it is possible to efficiently manufacture the light emitting diode according to an embodiment of the present invention. In particular, according to the manufacturing method of the present invention, the lower insulating layer 21 for forming the first opening 21a and the second opening 21b in which the first electrode 30 and the second electrode 40 are disposed, respectively. Since the lower insulating layer 21 can effectively protect the mesa side, ion damage in an ion etch step or a deposition step for depositing the subsequent insulating reflector 50, etc. It is possible to prevent deterioration of the device characteristics by this. In addition, in order to deposit the high quality insulating reflector 50, it is important to make the deposition surface as flat as possible, so that it is common to first deposit a silicon oxide film having a predetermined thickness and then deposit it. Since it is formed in advance, there is no need to form a separate oxide film during deposition of the insulating reflector 50, thereby simplifying the manufacturing process.

FIG. 10 is a view showing a light emitting diode structure according to another embodiment of the present invention. FIG. 10 (a) is a plan view and FIG. 10 (b) is a sectional view taken along line BB '. The light emitting diode of FIG. 10 is different from the light emitting diode of FIG. 1 in that the third mesa exposed portion E3 is formed in the second electrode 40 on the upper surface of the mesa. That is, the second mesa exposed portion E2 is formed between the edge of the second electrode 40 and the light emitting diode, for example, four sides, so that the second mesa exposed portion E2 is not surrounded by the second electrode 40 pattern. E3) is formed inside the second electrode 40 and is surrounded by the second electrode 40. Similarly to the second mesa exposed portion E2, the third mesa exposed portion E3 is reflected by the insulating reflector 50, and accordingly, according to the light emitting diode structure of FIG. 10, the light efficiency may be further improved.

The third mesa exposed portion E3 may be formed in a plurality of circular patterns as shown in FIG. 10, but is not limited thereto. For example, it may be formed in one or more square patterns as shown in FIG. 11, and as the area thereof increases, the amount reflected by the insulating reflector 50 increases, so that light efficiency may be improved.

12 is a view showing a light emitting diode according to another embodiment of the present invention. FIG. 12 (a) is a plan view, FIG. 12 (b) is a sectional view taken along the line D-D ', and FIG. 12 (c) is an E-E'. Line cross section. In FIG. 12, detailed descriptions of the same parts as the above-described embodiments will be omitted.

As shown in FIG. 12, a light emitting diode according to another embodiment of the present invention includes a first conductive semiconductor layer 11, an active layer 13, and a second conductive semiconductor layer 15 stacked on a substrate 10. Mesa etched mesa structure (M). In addition, the lower insulating layer 21 is deposited on the entire surface of the light emitting diode, and the second electrode 40 is formed at a portion where the lower insulating layer 21 is opened on the upper surface of the mesa. In this case, the second mesa exposure having a relatively large distance d2 between the second electrode 40 and the mesa top edge is at least partially disposed between the edge of the second electrode 40 and the light emitting diode, for example, four sides. A portion E2 is formed, and a reflective electrode extension 90 is formed at a vertex portion of the light emitting diode. The second mesa exposed portion E2 is configured to improve the light efficiency of the light emitting diode, and the reflective electrode extension 90 is configured to prevent deterioration of the current distribution characteristic, which is the same as described in the above-described embodiments. Do. In addition, as an optional configuration, the third mesa exposed portion E3 may be formed inside the second electrode 40, and the third mesa exposed portion E3 may be formed of a second mesa exposed portion E2 unlike the second mesa exposed portion E2. It is surrounded by an electrode 40.

An insulating reflecting unit 50 is deposited on the second electrode 40, and the insulating reflecting unit 50 has side surfaces of the mesa structure in which the second electrode 40 is not formed and the mesa exposing portions E1, E2, and E3. ) Reflect light on the upper surface. When the second electrode 40 is formed of silver (Ag) or the like, the reflectance does not usually exceed 90 to 94%, while the insulating reflector 50 such as a distributed Bragg reflector may measure the optical thickness of the insulating layers stacked. By adjusting, a reflectance of about 99% can be obtained in the desired wavelength range. The insulation reflector 50 is formed on the lower insulation layer 21 by first depositing a first insulation reflector 51 for reflecting light having a relatively long wavelength range, and reflecting light having a relatively short wavelength range thereon. The second insulating reflector 52 may be formed in a structure in which it is deposited. Due to this configuration, for example, when used in a light emitting diode package coupled with a wavelength conversion layer (not shown) which is excited by light generated in the active layer 13 and emits a longer wavelength light, the light efficiency can be further improved. have. In addition, the insulation reflection unit 50 may further include a third insulation reflection unit having a different reflection wavelength range from the first and second insulation reflection units 51 and 52.

The insulating reflector 50 has a first contact portion C1 exposing at least a portion of the first conductivity type semiconductor layer 11 and a second contact portion C2 exposing at least a portion of the second electrode 40. Is formed. As shown in FIG. 12A, the first contact part C1 may be formed in a linear shape, and the second contact part C2 may be formed in a contact hole type. In addition, as shown in FIG. 12, the first contact portion C1 may also be formed at the edge of the light emitting diode, which may improve current distribution characteristics of the first conductivity type semiconductor layer 11.

The first electrode 30 and the second electrode connection pad 31 are formed on the insulating reflector 50. The first electrode 30 is electrically connected to the first conductive semiconductor layer 11 through the first contact portion C1 and is formed over the entire area of the light emitting diode except for the region in which the second electrode connection pad 31 is formed. Can be. The second electrode connection pad 31 is isolated from the first electrode 30 by the cutoff portion 32 and is electrically connected to the second electrode 40 through the second contact portion C2. The first electrode 30 and the second electrode connection pad 31 may be formed of aluminum (Al), an adhesive layer such as titanium (Ti), chromium (Cr), nickel (Ni), or nickel (Ni), A protective layer such as chromium (Cr) or gold (Au) may be formed in a multilayer structure including a lower or upper portion thereof. The first electrode 30 and the second electrode connection pad 31 may be formed in one process.

An upper insulating layer 22 may be formed on the first electrode 30 and the second electrode connection pad 31. The upper insulating layer 22 is configured to fill and insulate the cutoff portion 32 between the first electrode 30 and the second electrode connection pad 31 and to passivate the entire surface of the light emitting diode except for the pads 60 and 70. It may be formed of a silicon nitride film (SiNx).

Vias for pad connection are formed on the upper insulating layer 22, and then first and second pads 60 and 70 are formed thereon. The first pad 60 is electrically connected to the first conductive semiconductor layer 11 through the first electrode 30, and the second pad 70 is connected to the second electrode connection pad 31 and the second electrode ( 40 is electrically connected to the second conductivity-type semiconductor layer 15 through 40. The first pad 60 and the second pad 70 may be connected to bumps or used as pads for surface mounting technology (SMT) for mounting the light emitting diodes to a submount, package, or printed circuit board.

The light emitting diode according to the present embodiment is reflected by the insulating reflector 50 in the second mesa exposed portion E2 and optionally in the third mesa exposed portion E3, so that the second electrode 40 It can exhibit an improved light efficiency characteristics compared to the light emitting diode depending on the reflection.

In addition, the present invention prevents deterioration of the current distribution characteristics due to the formation of the second mesa exposed portion E2 by, for example, forming the reflective electrode extension portion 90 in which the second electrode 40 is extended at the vertex portion of the light emitting diode. You can prevent it.

In addition, unlike the above-described embodiments, the present embodiment extends the first electrode 30 to the edge of the light emitting diode, thereby improving the current distribution characteristic of the first conductive semiconductor layer 11. In addition, since the second electrode connection pad 31 for electrical connection with the second electrode 40 may be simultaneously formed when the first electrode 30 is formed, the process may be simplified.

Hereinafter, a method of manufacturing the light emitting diode according to the present embodiment will be described with reference to FIGS. 13 to 18. 13 to 18, (a) is a plan view, (b) is a sectional view taken along the line D-D ', and (c) is a sectional view taken along the line F-F'. However, the present invention is not limited to the light emitting diode manufactured by a specific manufacturing method, and the manufacturing method described below should be understood as an example to help understanding the light emitting diode structure of the present invention. 13 to 18, detailed description of the same parts as the above-described embodiments will be omitted.

FIG. 13 is a mesa structure forming step, in which a first conductive semiconductor layer 11, an active layer 13, and a second conductive semiconductor layer 15 are sequentially deposited on a substrate 10, and then exposed and etched. The mesa structure M is formed. As shown in the drawing, the exposed region 11a of the first conductivity-type semiconductor layer 11 may be formed at the edge of the light emitting diode, and the linear exposed region 11b of the first conductivity-type semiconductor layer 11 is formed in addition to the edge. can do.

14 illustrates forming the lower insulating layer 21 and forming the second electrode 40. After the lower insulating layer 21 is deposited, the lower insulating layer 21 of the portion where the second electrode 40 is to be formed is removed by a wet etching method after forming a photoresist pattern (not shown), and lift-off the removed portion. The second electrode 40 pattern can be formed using a method or the like. As shown in FIG. 14, a second mesa exposed portion E2 having a relatively large separation distance between the second electrode 40 and the mesa upper edge is formed at an edge of the light emitting diode, for example, at least some of the four sides. In addition, a third mesa exposed part E3 surrounded by the second electrode 40 may be formed in the second electrode 40. In order to prevent deterioration of current distribution characteristics caused by the second mesa exposed portion E2, a part of a corner of the light emitting diode, for example, a vertex portion of the light emitting diode, is disposed on the second electrode compared to the second mesa exposed portion E2. The reflective electrode extension 90 may be formed such that the first mesa exposed portion E1 having a relatively small separation distance between the upper surface 40 and the mesa upper edge is formed.

FIG. 15 is a step of depositing an insulation reflector 50 and forming first and second contact portions. The insulation reflector 50 may be formed on the entire area of the light emitting diode except for the first contact portion C1 and the second contact portion C2. The insulation reflector 50 may be formed by alternately depositing an insulating layer having different refractive indices, and an optical thickness of the thin film that is alternately deposited may be determined in consideration of a reflection wavelength. In order to improve light efficiency in a packaged state, a first insulation reflector 51 is first formed to reflect light having a relatively long wavelength range, and then a second insulation reflector for reflecting light having a relatively short wavelength thereon ( 52).

The first contact portion C1 is an opening for electrically connecting the first electrode 30 and the first conductive semiconductor layer 11, which will be described later, to expose the first conductive semiconductor layer exposed region 11a at the edge of the LED. And the linear first conductivity type semiconductor layer exposed region 11b.

FIG. 16 is a step of forming the first electrode 30 and the second electrode connection pad 31. After forming a conductive metal layer such as aluminum (Al), the first electrode 30 and the second electrode connection pad 31 are disconnected. A method of patterning to be spaced apart by the part 32 can be used. As the patterning method, an exposure and etching method or a lift-off method can be used.

FIG. 17 illustrates the formation of vias 22a and 22b in the upper insulating layer 22 to form the first pad 60 and the second pad 70. FIG. 18 illustrates the formation of the vias 22a and 22b on the formed vias 22a and 22b. The first pad 60 and the second pad 70 are formed. The first pad 60 is electrically connected to the first electrode 30 through the via 22a, and the second pad 70 is connected to the second electrode connection pad 31 through the via 22b, resulting in a result. The second electrode 40 and the second conductive semiconductor layer 15 are electrically connected to each other. The first pad 60 and the second pad 70 may be formed together in the same process. For example, the first pad 60 and the second pad 70 may be formed using an exposure and etching method or a lift off method.

19 is a schematic plan view for describing a light emitting diode according to still another embodiment of the present invention.

Referring to FIG. 19, the light emitting diode according to the present embodiment is generally the same as the light emitting diode described with reference to FIG. 1, but there is a difference in that the position where the first electrode 30 is formed is added. That is, in the embodiment of FIG. 1, the first electrode 30 is limited to being located inside the mesa (M) region. However, in the present embodiment, the first electrode 30 may be further outside the mesa (M) region. Is placed. The first electrode 30 is exposed by the third contact portion C3 formed on the insulation reflecting portion 50 and is electrically connected to the first pad 60.

The additional first electrode 30 may be formed on three sides adjacent to each other, for example. The first electrode 30 positioned outside the mesa M region may be circularly and linearly disposed similarly to the first electrode 30 positioned inside the mesa M region. As shown, the linear first electrodes 30 may be disposed at both sides facing each other in parallel with the linear first electrode 30 inside the mesa M region. The spacing between the linearly arranged first electrodes 30 may be substantially the same. In addition, a circular first electrode 30 may be disposed on one side between the two sides facing each other.

Meanwhile, the first pad 60 covers and electrically connects the first electrode 30 positioned outside the mesa M region. The second pad 70 is spaced apart from the first electrode 30 by the insulating reflector 50.

Concave grooves are provided at three sides of the mesa M, and the first electrode 30 is added to the grooves. At this time, the groove formed in the mesa (M) to form a circular first electrode 30 may have a shape larger than a semi-circle, one side is open circular.

20 is a plan view illustrating a light emitting diode according to still another embodiment of the present invention.

Referring to FIG. 20, the light emitting diode according to the present exemplary embodiment is generally similar to the light emitting diode described with reference to FIG. 19, but there is a difference in the shape of the grooves formed on three sides of the mesa M. There is a difference that the linear first electrode 30 ′ disposed outside has a narrower width than the linear first electrode disposed inside the mesa M.

That is, in the embodiment of Figure 19, the grooves formed on the three sides of the mesa (M) is a circular shape of one side is open, in this embodiment, these grooves are formed in a substantially semi-circular shape. In addition, the linear first electrode 30 ′ disposed outside the mesa M region may be 1/2 of the width of the linear first electrode 30 inside the mesa region.

FIG. 21 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention. FIG. FIG. 22 is a schematic cross sectional view taken along the line G-G 'of FIG.

21 and 22, the light emitting diode according to the present embodiment includes a lower semiconductor layer 123, an active layer 125, an upper semiconductor layer 127, a reflective insulating layer 133, and a first electrode layer 135. Include. The light emitting diode has a structure including a mesa 130 disposed on the lower semiconductor layer 123, and the mesa 130 includes an upper semiconductor layer 127 and an active layer 125. Furthermore, the light emitting diode may include a substrate 121, a conductive layer 131, a second electrode layer 137, and an upper insulating layer 139, and the openings 139a, The first electrode pad region 143a and the second electrode pad region 143b exposing the first electrode layer 135 and the second electrode layer 137 through 139b may be included.

The substrate 121 is a substrate capable of growing a gallium nitride-based semiconductor layer, and may be, for example, a sapphire substrate, a silicon carbide substrate, a gallium nitride (GaN) substrate, a spinel substrate, or the like. In particular, the substrate 121 may be a patterned substrate, such as a patterned sapphire substrate. Although the substrate 121 is illustrated and described in the drawings, the light emitting diode of this embodiment does not necessarily include the substrate 121, and the substrate 121 may be formed by using a technique such as laser lift-off or chemical lift-off. It may be separated from the semiconductor layers.

The lower semiconductor layer 123, the active layer 125, and the upper semiconductor layer 127 may be formed of a III-V series compound semiconductor, for example, nitride-based semiconductors such as (Al, Ga, In) N, respectively. It may comprise a layer. The lower semiconductor layer 123 may include n-type impurities (eg, Si), and the upper semiconductor layer 127 may include p-type impurities (eg, Mg). It may also be the reverse. The active layer 125 may include a single quantum well structure or a multi-quantum well structure (MQW). When forward bias is applied to the light emitting diode, electrons and holes are combined in the active layer 125 to emit light. The lower semiconductor layer 123, the active layer 125, and the upper semiconductor layer 127 may be grown on the substrate 121 using techniques such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). have.

The mesa 130 is formed by patterning the upper semiconductor layer 127 and the active layer 125 grown on the substrate 121. Therefore, the mesa 130 may be disposed on the lower semiconductor layer 123 and may include a portion of the lower semiconductor layer 123 by overetching. An edge of the lower semiconductor layer 123 is exposed around the mesa 130 along the mesa 130. Mesa 130 has an inclined sidewall.

21 and 22, the opening 130a exposes the lower semiconductor layer 123 through the upper semiconductor layer 127 and the active layer 125. The opening 130a may extend into the mesa 130 from an area around the mesa 130. However, the present invention is not limited thereto, and the opening 130a may be spaced apart from the area around the mesa. In addition, a plurality of openings 130a may be formed, and two openings 130a are shown in this embodiment.

The conductive layer 131 is disposed on the upper semiconductor layer 127 and contacts the upper semiconductor layer 127. The conductive layer 131 is formed on the upper semiconductor layer 127 or the mesa 130 to be connected to almost the entire area of the upper semiconductor layer 127. Accordingly, the current is distributed over a wide area of the upper semiconductor layer 127.

The conductive layer 131 may be formed of, for example, a metal layer, but is not limited thereto. The conductive layer 131 may be formed of a transparent conductive layer. For example, the conductive layer 131 may be formed of multiple metal layers including a reflective metal layer and a barrier metal layer. Although not shown, the barrier metal layer may cover the top and side surfaces of the reflective metal layer to protect the reflective metal layer. For example, by forming the reflective metal layer first and then forming the barrier metal layer thereon, the barrier metal layer can be formed to cover the top and side surfaces of the reflective metal layer. For example, the reflective metal layer may be formed by depositing and patterning an Ag, Ag alloy, Ni / Ag, NiZn / Ag, TiO / Ag layer. Meanwhile, the barrier metal layer may be formed of Ni, Cr, Ti, Pt, or a composite layer thereof, and prevents the metal material of the reflective metal layer from being diffused or contaminated. In addition, the conductive layer 131 may be formed of a transparent conductive layer such as indium tin oxide (ITO) or ZnO. ITO is made of a metal oxide having a high light transmittance, thereby suppressing absorption of light by the conductive layer 131 and improving luminous efficiency.

The reflective insulating layer 133 covers the mesa 130 and the exposed lower semiconductor layer 123. In addition, the reflective insulating layer 133 may cover the conductive layer 131. The reflective insulating layer 133 has a stacked structure in which first and second material layers having different refractive indices are alternately stacked, and reflects light emitted from the active layer 125 toward the substrate 121. A detailed layer structure of the reflective insulating layer 133 will be described in detail later with reference to FIGS. 24 to 26.

The reflective insulating layer 133 covers a portion of the lower semiconductor layer 123 exposed in the opening 130a. In addition, the reflective insulating layer 133 has an opening 133a exposing the lower semiconductor layer 123 exposed at the bottom of the opening 130a. The first contact region 123a of the lower semiconductor layer 123 is defined by the opening 133a.

Meanwhile, the reflective insulating layer 133 also has at least one opening 133b disposed on the upper semiconductor layer 127. The upper semiconductor layer 127 or the conductive layer 131 is exposed through the opening 133b. As illustrated, a plurality of openings 133b may be arranged in an island shape. However, the present invention is not limited thereto, and openings having different shapes may be formed, and one large opening 133b may be formed.

Meanwhile, the reflective insulating layer 133 extends from the upper region of the mesa 130, that is, from the upper region of the upper semiconductor layer 127 to the edge region of the lower semiconductor layer 123, so that the lower semiconductor layer (around the mesa 130) 123). However, a portion of the edge of the lower semiconductor layer 123 around the mesa 130 may be exposed to the outside without being covered with the reflective insulating layer 133.

The reflective insulating layer 133 may be deposited using a deposition technique such as electron beam evaporation, and then patterned using photo and etching techniques. The thickness of the reflective insulating layer 133 is controlled for reflective performance and patterning process.

Meanwhile, side surfaces of the reflective insulating layer 133 formed by the patterning process, for example, sidewalls of the openings 133a and 133b and side surfaces of the reflective insulating layer 133 on the edge region of the lower semiconductor layer 123 may be formed. An inclined surface is formed on the lower semiconductor layer 123. This will be described later in detail with reference to FIG. 23.

Meanwhile, the first electrode layer 135 and the second electrode layer 137 are disposed on the reflective insulating layer 133. The first electrode layer 135 and the second electrode layer 137 may be formed of the same material, and may be formed together by the same process. For example, the first electrode layer 135 and the second electrode layer 137 may be formed in the same process using a lift off process. However, the present invention is not limited thereto, and the first electrode layer 135 and the second electrode layer 137 may be formed of the same material or different materials using separate processes. The layer structure and material of the first electrode layer 135 and the second electrode layer 137 will be described later in detail with reference to FIG. 27.

In addition, the first electrode layer 135 is formed in most regions except for the second electrode layer 137, and the first contact region of the lower semiconductor layer 123 exposed through the opening 133a of the reflective insulating layer 133. 123a is contacted. The first contact region 123a extends inside the mesa 130 to disperse current in the lower semiconductor layer 123.

The first electrode layer 135 also contacts the lower semiconductor layer 123 at the edge region of the lower semiconductor layer 123 around the mesa 130. The region where the first electrode layer 135 contacts the edge of the lower semiconductor layer 123 is the second contact region 123b. The second contact region 123b may surround the mesa 130 around the mesa. Since the second contact region 123b surrounds the mesa 130 along the edge of the lower semiconductor layer 123, the current may be dispersed in the lower semiconductor layer 123 over a wide range. In addition, as illustrated in FIG. 21, the first contact region 123a and the second contact region 123b may be connected to each other, but are not limited thereto and may be spaced apart from each other. The first electrode layer 135 is electrically insulated from the upper semiconductor layer 127, the active layer 125, and the conductive layer 131 by the reflective insulating layer 133.

Meanwhile, the second electrode layer 137 is disposed on the upper semiconductor layer 127 or the conductive layer 131. The second electrode layer 137 may be limitedly disposed on the mesa 130, but is not necessarily limited thereto. In addition, as illustrated, the second electrode layer 137 may be surrounded by the first electrode layer 135, but is not limited thereto.

In addition, the second electrode layer 137 is electrically connected to the upper semiconductor layer 127 through the openings 133b. For example, the second electrode layer 137 may be electrically connected to the upper semiconductor layer 127 by connecting to the conductive layer 131 through the openings 133b. For this purpose, the second electrode layer 137 covers the opening 133b.

The upper insulating layer 139 may be disposed on the first electrode layer 135 and the second electrode layer 137 and may cover the second contact region 123b. The upper insulating layer 139 has an opening 139a exposing the first electrode layer 135 and an opening 139b exposing the second electrode layer 137. The first electrode pad region 143a and the second electrode pad region 143b are defined by the openings 139a and 139b.

The first electrode pad region 143a and the second electrode pad region 143b may be bonded to a printed circuit board using a conductive adhesive such as solder paste. The first electrode pad region 143a and the second electrode pad region 143b may be separated from each other by a sufficient distance, such as about 300 μm, to prevent shorting of the conductive adhesive such as solder paste.

The upper insulating layer 139 may be formed of an oxide insulating layer, a nitride insulating layer, or a polymer such as polyimide, teflon, parylene, or the like. In order to improve adhesion of the upper insulating layer 139 on the first electrode layer 135 and the second electrode layer 137, the uppermost layer of the first electrode layer 135 and the second electrode layer 137 may be a Ti layer.

FIG. 23 is an enlarged cross-sectional view illustrating an enlarged portion of the first contact region 123a and the opening sidewall 130a in the opening 130a of FIGS. 21 and 22.

Referring to FIG. 23, the reflective insulating layer 133 covers a part of the lower semiconductor layer 123 inside the opening 130a when the mesa 130 is covered. Accordingly, the first contact region 123a is spaced apart from the sidewall of the opening 130a, that is, the mesa 130. Here, a is better to be closer to the mesa 130 to secure the first contact region 123a, but if it is too close, it may damage the mesa 130 by a defective process, so it needs to be dropped more than a predetermined distance for process stability. There is. Therefore, a may be 1.5 μm or more in consideration of process margin, and may be 10 μm or less to secure the first contact region 123a.

On the other hand, the opening 133a of the reflective insulating layer 133 defining the first contact region 123a is formed using a photo and etching technique, and thus, the sidewall of the opening 133a is formed using a photo and etching technique. It may be formed to be inclined. The surface of the lower semiconductor layer 123 exposed during the etching of the reflective insulating layer 133 may be damaged. Accordingly, the surface of the damaged lower semiconductor layer 123 may be removed using a dry etching technique. As shown in FIG. 23, the first contact region 123a may be formed under the reflective insulating layer 133. It may be slightly lower than the surface of the lower semiconductor layer 123.

An angle formed by the sidewall of the opening 133a with respect to the lower semiconductor layer 123 is Θ, and a thickness of the reflective insulating layer 133 is h, and the angle Θ satisfies Equation 1 below.

(Equation 1)

tan-1 (2h / a) ≤Θ ≤ 55 °.

If Θ is greater than 55 °, cracking is likely to occur in the first electrode layer 135 (see FIG. 29). In FIG. 23, b indicates a distance when the sidewall of the opening 133a is projected onto the lower semiconductor layer 123. tan-1 (2h / a) represents Θ when b is 1/2 of a. That is, when Θ is smaller than tan-1 (2h / a), the portion occupied by the sidewall of the opening 133a increases excessively.

Reflective insulating layer 133 is described again later, but exhibits good reflectance characteristics when having a designed thickness. However, since the sidewall of the opening 133a has a thickness smaller than the designed thickness of the reflective insulating layer 133, the reflectance is relatively very low. When the part with low reflectance occupies more than 1/2 of a, it is difficult to ensure the reflection performance of the reflective insulating layer 133.

Further, when the conductive layer 131 is formed of a metal layer, the area reflected by the reflective insulating layer 133 is relatively reduced. Accordingly, since the ratio of the sidewalls of the openings 133a of the reflective insulating layer 133 to the reflective portions of the reflective insulating layer 133 increases, it is necessary to reduce the sidewalls having low reflectance.

The inclination angle condition according to Equation 1 is not limited only to the opening 133a, and the same applies to the side surface of the reflective insulating layer 133 positioned on the lower semiconductor layer 123 around the mesa 130. Detailed description thereof will be omitted.

24 is a schematic cross-sectional view for describing the reflective insulating layer 133.

Referring to FIG. 24, the reflective insulating layer 133 has a laminated structure in which the first material layer 134a and the second material layer 134b having different refractive indices are alternately stacked. For example, the first material layer 134a may be a SiO ₂ layer and the second material layer 134b may be a TiO ₂ layer.

Meanwhile, the lowermost layer and the uppermost layer of the reflective insulating layer 133 may be a first material layer, for example, an SiO 2 layer. The lowermost layer may be formed relatively thick to improve adhesion of the reflective insulating layer 133 to the mesa 130 and the lower semiconductor layer 123, and the uppermost layer may be formed on the reflective insulating layer 133. It may be formed relatively thick to improve the adhesion of the (135).

The thicknesses of the first material layers 133a and the second material layers 133b are set to have a high reflectance in a relatively wide wavelength range. For example, the reflective insulating layer 133 may have a high reflectance of about 90% or more in the range of about 400 to 700 nm. The reflective insulating layer 133 may have a high reflectance with respect to the light generated by the active layer 125, and may further have a high reflectance with respect to visible light introduced from the outside, for example, green light or red light converted from wavelengths.

25 is a simulation graph of reflectance according to the wavelength of the reflective insulating layer using 21 layers together with reflectance according to the wavelength of the reflective insulating layer using 41 layers.

Referring to FIG. 25, it can be seen that the reflective insulating layer using 41 layers exhibits a high reflectance of almost 100% in a wide wavelength range of approximately 390 to 780 nm. In contrast, the reflective insulating layer using 21 layers exhibits a high reflectance of 95% or more in a wide wavelength range of approximately 420 to 800 nm, and almost 100% of reflectance in most regions within this range.

It can be seen that the 41 reflective insulating layers have better reflectance than the 21 reflective insulating layers. However, since the 41 reflective insulating layers have a thickness of approximately 3.8 µm, patterning using photolithography and etching techniques is difficult. During etching, the photoresist is unbearable and easily collapses, and when the photoresist is formed thick, it is difficult to pattern the side surface of the reflective insulating layer 133 to have a good inclination angle.

In consideration of the patterning of the reflective insulating layer 133, the thickness of the reflective insulating layer is about 2.5 μm or less, specifically 2 μm or less. In addition, in order to maintain a good reflectance, the reflective insulating layer 133 may be 1 μm or more, specifically 1.5 μm or more.

26 (a), 6 (b) and 6 (c) are graphs showing reflectance according to the wavelength of the reflective insulating layer composed of five, ten and fifteen layers, respectively.

Referring to FIG. 26, it can be seen that the reflectance varies depending on the layer of the reflective insulating layer, and it can be seen that good reflectance is difficult to be obtained at 15 layers or less.

Accordingly, the reflective insulating layer 133 needs to have a laminated structure of at least 216 or more layers, that is, eight pairs or more of the first material layer and the second material layer. On the other hand, the thickness of the reflective insulating layer 133 needs to be made small in consideration of the patterning process. Therefore, as shown in the graph of FIG. 25, the thickness of the reflective insulating layer 133 may be 11 pairs or less, specifically 21 layers or less.

In addition, even when the reflective insulating layer 133 is formed in a sufficient laminated structure, as shown in FIG. 23, the side surface of the reflective insulating layer 133 does not have a sufficient laminated structure and has a surface damaged by etching. Thus, the reflectance in terms of the reflective insulating layer 133 will be quite low. Therefore, it is necessary to reduce the area occupied by the side surface by adjusting the inclination angle of the side surface of the reflective insulating layer 133.

27 is a schematic cross-sectional view illustrating an electrode layer according to a particular embodiment of the present invention.

Referring to FIG. 27, the first electrode layer 135 and the second electrode layer 137 may include an adhesive layer 135a, a metal reflective layer 135b, diffusion barrier layers 135c and 135d, and an antioxidant layer 135e. The lowermost layer of the adhesive layer 135a of the first electrode layer 135 may be in ohmic contact with the lower semiconductor layer 123. For example, Ti, Cr, Ni, or the like may be used as the adhesive layer 135a. Meanwhile, the metal reflective layer 135b reflects light incident on the first electrode layer 135 to increase the reflectance of the light emitting diode. Al may be used as the metal reflective layer 135b. In addition, the diffusion barrier layers 135c and 135d prevent the diffusion of metal atoms to protect the metal reflective layer 135b. In particular, the diffusion barrier layers 135c and 135d can prevent diffusion of metal atoms in the solder paste such as Sn. The diffusion barrier layers 135c and 135d may include Cr, Ti, Ni, Mo, TiW, or W, or a combination thereof. In FIG. 27, the diffusion barrier layers 135c and 135d including two layers are illustrated, but the present invention is not limited thereto and may be configured as a single layer or three or more layers. For example, Mo, TiW and W may be formed in a single layer. Meanwhile, Cr, Ti, and Ni may be formed in pairs. In particular, the diffusion barrier layer may include at least 21 pairs of Ti / Ni or Ti / Cr. Meanwhile, the antioxidant layer 135e is formed to prevent oxidation of the diffusion barrier layers 135c and 135d and may include Au. Au also functions as an adhesive layer by solder paste.

The first electrode layer 135 and the second electrode layer 137 may further include an adhesive layer 135f disposed on the antioxidant layer 135e. The adhesive layer may comprise Ti, Cr, Ni or Ta. The adhesive layer 135f may be used to improve adhesion between the first and second electrode layers 135 and 137 and the upper insulating layer 139.

As shown in FIG. 27, the adhesive layer 135a, the metal reflective layer 135b, and the diffusion barrier layers 135c and 135d may be repeatedly formed under the antioxidant layer 135e. In FIG. 27, these layers 136a are repeated three times to form the lower layer structure 36a, the middle layer structure 136b, and the upper layer structure 136c. Accordingly, the electrode layer (Sn), which is high in reflectivity and safe for solder such as Sn ( 135, 137). For example, the first and second electrode layers 137 and 139 may have a multilayer structure of Cr / Al / Ni / Ti / Cr / Al / Ni / Ti / Cr / Al / Ni / Ti / Au / Ti. Can be. Although the same layers are repeated in FIG. 27, the present invention is not limited thereto, and other material layers may be stacked, and the number of layers may be adjusted.

FIG. 28 is a schematic view for explaining the shape of the opening 133a of the reflective insulating layer 133 according to a specific embodiment of the present invention, and FIG. 29 is the first electrode layer 135 formed at the ends of the openings of FIG. 28. The pictures show. Here, FIG. 28A illustrates a mask pattern of the opening 133a of the reflective insulating layer 133 according to the related art, and FIG. 28B illustrates a reflective pattern of the reflective insulating layer 133 according to a specific embodiment of the present invention. The mask pattern of the opening 133a is shown.

Referring to FIGS. 28A and 28B, the mask pattern of the opening 133a of the reflective insulating layer 133 according to the related art has an elongated shape, and the end end is rounded. In contrast, the mask pattern of the opening 133a of the reflective insulating layer 133 according to the specific embodiment of the present invention has a round shape with a wider end.

Referring to FIGS. 29A and 29B, when the opening 133a of the reflective insulating layer 133 is formed using a conventional mask pattern, as shown in FIG. 29A, the reflective insulating layer is illustrated. A severe double step is formed on the sidewall of 133, and the angle formed by the reflective insulating layer 133 and the lower semiconductor layer 123 increases. The inclination angle was 59.7 °, and as a result, cracking occurred as shown in the first electrode layer 135.

On the contrary, when the mask pattern shape of the opening 133a of the reflective insulating layer 133 is changed as in the present embodiment, as shown in FIG. 29 (b), the inclination angle is reduced to 51.8 ° and the first electrode layer is formed. No crack occurred at 135.

That is, by changing the mask pattern shape of the opening 133a of the reflective insulating layer 133 as shown in FIG. 28B, the sidewalls of the reflective insulating layer 133 may be smoothly formed at the end of the opening 133a. Thus, cracking of the first electrode layer 135 can be prevented. In addition, by using the mask pattern of FIG. 28 (b), the opening 133a of the reflective insulating layer 133 actually formed also has a round shape in which the end end thereof becomes wider.

30 is a schematic cross-sectional view for describing a light emitting device module according to another embodiment of the present invention.

Referring to FIG. 30, the light emitting device module includes a printed circuit board 151 having pads 153a and 153b and a light emitting diode 100 bonded to the printed circuit board 151 through solder paste 155. . Here, the light emitting diodes schematically illustrate the light emitting diodes described above with reference to FIGS. 21 and 22.

A printed circuit board is a board | substrate with a printed circuit, and if it is a board | substrate for providing a light emitting element module, it will not specifically limit.

Meanwhile, a light emitting diode is mounted on a printed circuit board on which a lead frame or lead electrodes are formed, and a package on which the light emitting diode is mounted has been mounted on a printed circuit board. However, in the present embodiment, the light emitting diode 1000 is mounted on the printed circuit board 151 through the solder paste 155 directly.

The light emitting diode 1000 is inverted in a flip chip form and mounted on a printed circuit board. The light emitting diode 1000 has a first electrode pad region 143a and a second electrode pad region 143b to be mounted on a printed circuit board. As described with reference to FIG. 21, these first and second electrode pad regions 143a and 143b are defined by openings in the upper insulating layer 139, and thus, recess in one surface of the light emitting diode 1000. Can be located.

Meanwhile, the bottom surface of the light emitting diode 1000, that is, the surface facing the first and second electrode pad regions 143a and 143b may be covered by the wavelength converter 145. The wavelength converter 145 may cover the side surface as well as the bottom surface of the light emitting diode 1000.

31 is an exploded perspective view illustrating a lighting apparatus to which a light emitting diode according to another embodiment of the present invention is applied.

Referring to FIG. 31, the lighting apparatus according to the present embodiment includes a diffusion cover 1010, a light emitting device module 1020, and a body portion 1030. The body portion 1030 may accommodate the light emitting device module 1020, and the diffusion cover 1010 may be disposed on the body portion 1030 to cover the upper portion of the light emitting device module 1020.

The body portion 1030 is not limited as long as it can receive and support the light emitting device module 1020 and supply electric power to the light emitting device module 1020. For example, as shown, the body portion 1030 may include a body case 1031, a power supply device 1033, a power case 1035, and a power connection portion 1037.

The power supply device 1033 is accommodated in the power case 1035 and electrically connected to the light emitting device module 1020, and may include at least one IC chip. The IC chip may adjust, convert, or control the characteristics of the power supplied to the light emitting device module 1020. The power case 1035 may receive and support the power supply 1033, and the power case 1035 to which the power supply 1033 is fixed may be located inside the body case 1031. . The power connection unit 115 may be disposed at a lower end of the power case 1035 and may be coupled to the power case 1035. Accordingly, the power connection unit 1037 may be electrically connected to the power supply device 1033 inside the power case 1035 to serve as a path through which external power may be supplied to the power supply device 1033.

The light emitting device module 1020 includes a substrate 1023 and a light emitting diode 1021 disposed on the substrate 1023. The light emitting device module 1020 may be disposed on the body case 1031 and electrically connected to the power supply device 1033.

The substrate 1023 is not limited as long as it is a substrate capable of supporting the light emitting diode 1021. For example, the substrate 1023 may be a printed circuit board including wiring. The substrate 1023 may have a shape corresponding to the fixing portion of the upper portion of the body case 1031 so as to be stably fixed to the body case 1031. The light emitting diode 1021 may include at least one of the light emitting diodes according to the embodiments of the present invention described above.

The diffusion cover 1010 may be disposed on the light emitting diode 1021, and may be fixed to the body case 1031 to cover the light emitting diode 1021. The diffusion cover 1010 may have a translucent material and may adjust the directivity of the lighting device by adjusting the shape and the light transmittance of the diffusion cover 1010. Therefore, the diffusion cover 1010 may be modified in various forms according to the purpose of use of the lighting device and the application aspect.

32 is a cross-sectional view for describing a display device to which a light emitting diode according to another embodiment of the present invention is applied.

The display device according to the present exemplary embodiment includes a display panel 2110, a backlight unit providing light to the display panel 2110, and a panel guide supporting a lower edge of the display panel 2110.

The display panel 2110 is not particularly limited and may be, for example, a liquid crystal display panel including a liquid crystal layer. A gate driving PCB for supplying a driving signal to the gate line may be further located at the edge of the display panel 2110. Here, the gate driving PCB is not configured in a separate PCB, but may be formed on the thin film transistor substrate.

The backlight unit includes a light source module including at least one substrate and a plurality of light emitting diodes 2160. In addition, the backlight unit may further include a bottom cover 2180, a reflective sheet 2170, a diffusion plate 2131, and optical sheets 2130.

The bottom cover 2180 may be opened upward to accommodate the substrate, the light emitting diode 2160, the reflective sheet 2170, the diffusion plate 2131, and the optical sheets 2130. In addition, the bottom cover 2180 may be combined with the panel guide. The substrate may be disposed under the reflective sheet 2170 and be surrounded by the reflective sheet 2170. However, the present invention is not limited thereto, and when the reflective material is coated on the surface, the reflective material may be positioned on the reflective sheet 2170. In addition, the substrate may be formed in plural, and the plurality of substrates may be arranged in a side-by-side arrangement, but is not limited thereto.

The light emitting diode 2160 may include at least one of the light emitting diodes according to the embodiments of the present invention described above. The light emitting diodes 2160 may be regularly arranged in a predetermined pattern on the substrate. In addition, a lens 2210 may be disposed on each light emitting diode 2160 to improve uniformity of light emitted from the plurality of light emitting diodes 2160.

The diffusion plate 2131 and the optical sheets 2130 are located on the light emitting diode 2160. Light emitted from the light emitting diodes 2160 may be supplied to the display panel 2110 in the form of a surface light source through the diffusion plate 2131 and the optical sheets 2130.

As such, the light emitting diode according to the embodiments of the present invention may be applied to the direct type display device as the present embodiment.

33 is a cross-sectional view for describing a display device to which a light emitting diode is applied, according to another exemplary embodiment.

The display device including the backlight unit according to the present exemplary embodiment includes a display panel 3210 on which an image is displayed and a backlight unit disposed on a rear surface of the display panel 3210 to irradiate light. In addition, the display apparatus includes a frame 240 that supports the display panel 3210 and accommodates the backlight unit, and covers 3240 and 3280 that surround the display panel 3210.

The display panel 3210 is not particularly limited and may be, for example, a liquid crystal display panel including a liquid crystal layer. A gate driving PCB for supplying a driving signal to the gate line may be further located at an edge of the display panel 3210. Here, the gate driving PCB is not configured in a separate PCB, but may be formed on the thin film transistor substrate. The display panel 3210 may be fixed by covers 3240 and 3280 positioned at upper and lower portions thereof, and the cover 3280 positioned at lower portions thereof may be coupled to the backlight unit.

The backlight unit for providing light to the display panel 3210 may include a lower cover 3270 having a portion of an upper surface thereof, a light source module disposed on one side of the lower cover 3270, and positioned in parallel with the light source module to provide point light. And a light guide plate 3250 for converting to surface light. In addition, the backlight unit according to the present exemplary embodiment is disposed on the light guide plate 3250 and is disposed below the light guide plate 3250 and the optical sheets 3230 for diffusing and condensing light. The display apparatus may further include a reflective sheet 3260 reflecting in the direction of the display panel 3210.

The light source module includes a substrate 3220 and a plurality of light emitting diodes 3110 spaced at regular intervals from one surface of the substrate 3220. The substrate 3220 is not limited as long as it supports the light emitting diode 3110 and is electrically connected to the light emitting diode 3110. For example, the substrate 3220 may be a printed circuit board. The light emitting diode 3110 may include at least one light emitting diode according to the embodiments of the present invention described above. Light emitted from the light source module is incident to the light guide plate 3250 and is supplied to the display panel 3210 through the optical sheets 3230. Through the light guide plate 3250 and the optical sheets 3230, the point light source emitted from the light emitting diodes 3110 may be transformed into a surface light source.

As such, the light emitting diode according to the embodiments of the present invention may be applied to the edge type display device as the present embodiment.

34 is a cross-sectional view illustrating an example in which a light emitting diode according to another embodiment of the present invention is applied to a head lamp.

Referring to FIG. 34, the head lamp includes a lamp body 4070, a substrate 4020, a light emitting diode 4010, and a cover lens 4050. Furthermore, the head lamp may further include a heat dissipation unit 4030, a support rack 4060, and a connection member 4040.

The substrate 4020 is fixed by the support rack 4060 and spaced apart from the lamp body 4070. The substrate 4020 is not limited as long as it is a substrate capable of supporting the light emitting diode 4010. For example, the substrate 4020 may be a substrate having a conductive pattern such as a printed circuit board. The light emitting diode 4010 is positioned on the substrate 4020 and may be supported and fixed by the substrate 4020. In addition, the light emitting diode 4010 may be electrically connected to an external power source through the conductive pattern of the substrate 4020. In addition, the light emitting diode 4010 may include at least one light emitting diode according to the above-described embodiments of the present invention.

The cover lens 4050 is positioned on a path along which light emitted from the light emitting diode 4010 travels. For example, as shown, the cover lens 4050 may be disposed spaced apart from the light emitting diode 4010 by the connecting member 4040, and may be disposed in a direction to provide light emitted from the light emitting diode 4010. Can be. By the cover lens 4050, the direction angle and / or color of the light emitted from the head lamp to the outside may be adjusted. Meanwhile, the connection member 4040 may fix the cover lens 4050 with the substrate 4020 and may be disposed to surround the light emitting diode 4010 to serve as a light guide for providing the light emitting path 4045. In this case, the connection member 4040 may be formed of a light reflective material or coated with a light reflective material. Meanwhile, the heat dissipation unit 4030 may include a heat dissipation fin 4031 and / or a heat dissipation fan 4033, and emits heat generated when the light emitting diode 4010 is driven to the outside.

As such, the light emitting diode according to the embodiments of the present invention can be applied to the head lamp, in particular, a vehicle head lamp as in the present embodiment.

Although described above with reference to the limited embodiments and drawings, it will be apparent to those skilled in the art that various modifications are possible within the scope of the technical idea of the present invention. For example, the embodiments and the drawings have been described using the flip-type light emitting diode as an example, which is exemplary, and the technical idea of the present invention may be used in light emitting devices other than the horizontal light emitting diode, the vertical light emitting diode, or the light emitting diode. . Therefore, the protection scope of the present invention should be defined by the description of the claims and their equivalents.

Claims (38)

At least one mesa structure in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are stacked and etched to expose at least a portion of the first conductive semiconductor layer; A first electrode electrically connected to the exposed first conductive semiconductor layer; A second electrode formed on an upper surface of the mesa and electrically connected to the second conductivity type semiconductor layer; A mesa exposed portion is formed in at least a portion of the mesa upper edge portion to expose the second conductive semiconductor layer without being covered by the second electrode. The mesa exposing portion includes a first mesa exposing portion having a first separation distance and a second mesa exposing portion having a second separation distance between the second electrode and the mesa top edge, The second separation distance is greater than the first separation distance, Light-emitting diodes, characterized in that the insulating reflector is formed on at least the second mesa exposed portion. The method according to claim 1, And a third mesa exposed portion surrounded by the second electrode on the upper surface of the mesa. The method according to claim 1 or 2, And the insulating reflecting part comprises a stack of first insulating reflecting parts for reflecting light in a relatively long wavelength range and second insulating reflecting parts for reflecting light in a relatively short wavelength range. The method according to claim 1 or 2, A light emitting diode, characterized in that a lower insulating layer is formed below the insulating reflector. The method according to claim 5, A first opening and a second opening are formed in the lower insulating layer; The first electrode and the second electrode is a light emitting diode, characterized in that formed in the first opening and the second opening, respectively. The method according to claim 1, The mesa exposed portion is a light emitting diode, characterized in that formed in at least a portion of the edge portion of the device. The method according to claim 1, The first separation distance is a light emitting diode, characterized in that the separation distance between the second electrode extended electrode extending portion and the mesa upper edge. The method according to claim 7, And the reflective electrode extension part is formed at a vertex of the device. The method according to claim 1, The second separation distance is a light emitting diode, characterized in that 20㎛ or more. The method according to claim 1 or 2, A first pad and a second pad for electrically connecting the first electrode and the second electrode to an external power source, respectively; The first pad and the second pad are electrically connected to the first electrode and the second electrode through a first contact portion and a second contact portion, respectively. The light emitting diode of claim 2, wherein the second contact portion is larger than the first contact portion. The method according to claim 1 or 2, And a second electrode connection pad electrically connected to the second electrode. And the first electrode and the second electrode connection pad are electrically insulated by an upper insulating layer. The method according to claim 11, The first electrode and the second electrode connection pad is a light emitting diode, characterized in that formed in the same process. A light emitting diode package comprising the light emitting diode of claim 3, The light emitting diode package further comprises a wavelength conversion layer for converting the wavelength of the light emitted through the substrate. The method according to claim 13, The light emitting diode is a blue light emitting diode, The wavelength conversion layer includes a light emitting diode package comprising at least one phosphor of yellow, green and red. A method of manufacturing the light emitting diode of claim 5, Wherein said first opening and said second opening are formed in different processing steps. A light emitting diode package comprising a light emitting diode and a wavelength conversion layer, The light emitting diode includes a reflective electrode reflecting light generated from an active layer toward the transparent substrate and an insulating reflecting portion formed on the mesa not covered by the reflective electrode. The insulation reflecting unit includes a first insulation reflecting unit for reflecting light converted in wavelength in the wavelength conversion layer and a second insulation reflecting unit for reflecting light generated in the active layer, The wavelength-converted light in the wavelength conversion layer is a light emitting diode package, characterized in that the light having a longer wavelength than the light generated in the active layer. The method according to claim 16, The first insulation reflector is formed closer to the transparent substrate than the second insulation reflector LED package. A lower semiconductor layer; An upper semiconductor layer disposed on the lower semiconductor layer; An active layer disposed between the lower semiconductor layer and the upper semiconductor layer; A first opening exposing the lower semiconductor layer through the upper semiconductor layer and the active layer; A reflective insulating layer covering the upper semiconductor layer and the lower semiconductor layer, the reflective insulating layer having a second opening defining a first contact region of the lower semiconductor layer in the first opening; And A first electrode layer disposed on the reflective insulating layer and connected to the first contact region of the lower semiconductor layer; The reflective insulating layer has a laminated structure in which a first material layer having a first refractive index and a second material layer having a second refractive index are alternately stacked, The first contact region is located in a bottom surface of the first opening, An angle formed by the sidewall of the second opening with respect to the lower semiconductor layer, h, a thickness of the reflective insulating layer, and a length of the bottom surface of the first opening from the first contact region to the sidewall of the first opening. When the light emitting diode satisfies the following equation (1). (Equation 1) tan-1 (2h / a) ≤Θ ≤ 55 °. In claim 18, The length a of the bottom surface of the first opening from the contact region to the sidewall of the first opening is in the range of 1.5 to 10 μm, The thickness h of the reflective insulating layer is in the range of 1 to 2.5㎛. The method according to claim 19, The reflective insulating layer includes 8 to 11 pairs of the first material layer and the second material layer. The method of claim 20, The first material layer is a SiO ₂ layer and the second material layer is a TiO ₂ layer. The method according to claim 21, The first layer and the last layer of the reflective insulating layer is a SiO ₂ layer. The method according to claim 18, The second opening has an elongated shape, but one end of the second opening has a round shape having a wider width. The method according to claim 18, Further comprising a mesa including the upper semiconductor layer and the active layer, A second contact region is disposed around the mesa along an edge of the first conductivity type semiconductor layer, And the first electrode layer extends around the mesa to connect to the second contact region. The method of claim 24, The first contact region extends from the second contact region. The method according to claim 25, A light emitting diode in which a plurality of first contact regions extend from the second contact region. The method according to claim 18, Further comprising a second electrode layer disposed on the reflective insulating layer, The reflective insulating layer further includes at least one third opening positioned on the upper semiconductor layer, And the second electrode layer is electrically connected to the upper semiconductor layer through the third opening. The method of claim 27, A conductive layer disposed between the upper semiconductor layer and the reflective insulating layer and contacting the upper semiconductor layer, The conductive layer is exposed through the third opening, The second electrode layer is connected to the conductive layer through the third opening. The method of claim 27, And further comprising an upper insulating layer disposed on the first electrode layer and the second electrode layer, wherein the upper insulating layer exposes the first electrode layer and the second electrode layer, respectively, to form a first electrode pad region and a second electrode pad region. A light emitting diode having openings defining a. The method of claim 29, Each of the first electrode layer and the second electrode layer includes a Ti layer in contact with the upper insulating layer. The method of claim 27, The second electrode layer is formed of the same material as the first electrode layer. The method according to claim 31, The second electrode layer is a light emitting diode surrounded by the first electrode layer. The method according to claim 31, The first and second electrode layers include an ohmic contact layer, a metal reflective layer, a diffusion barrier layer, and an anti-oxidation layer. The method according to claim 18, The light emitting diode further comprising a substrate positioned below the lower semiconductor layer. A lower semiconductor layer; A mesa disposed on the lower semiconductor layer and including the upper semiconductor layer and the active layer; A reflective insulating layer covering the mesa and the lower semiconductor layer around the mesa and exposing an edge of the lower semiconductor layer; A first electrode layer disposed on the reflective insulating layer and contacting an edge of the lower semiconductor layer around the mesa; The reflective insulating layer has a laminated structure in which a first material layer having a first refractive index and a second material layer having a second refractive index are alternately stacked, An angle between the side surface of the reflective insulating layer with respect to the lower semiconductor layer, a thickness of the reflective insulating layer h, and a distance from the contact region where the first electrode layer contacts the edge of the lower semiconductor layer to the mesa sidewall When the light emitting diode satisfies the following equation (1). (Equation 1) tan-1 (2h / a) ≤Θ ≤ 55 °. The method of claim 35, wherein The distance a from the contact region where the first electrode layer contacts the edge of the lower semiconductor layer to the mesa sidewall is in the range of 1.5 to 10 μm, The thickness h of the reflective insulating layer is in the range of 1 to 2.5㎛. The method of claim 36, The reflective insulating layer includes 8 to 11 pairs of the first material layer and the second material layer. Printed circuit boards; 38. A light emitting diode according to any one of claims 18 to 37; And A solder paste bonding the light emitting diode to the printed circuit board, And the solder paste is connected to the first electrode layer.

Images