US20190115832A1 - Power conversion device, time signal generator and method thereof - Google Patents
Power conversion device, time signal generator and method thereof Download PDFInfo
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- US20190115832A1 US20190115832A1 US15/910,018 US201815910018A US2019115832A1 US 20190115832 A1 US20190115832 A1 US 20190115832A1 US 201815910018 A US201815910018 A US 201815910018A US 2019115832 A1 US2019115832 A1 US 2019115832A1
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- 238000000034 method Methods 0.000 title claims description 9
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- 238000007599 discharging Methods 0.000 claims description 8
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from DC input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
-
- H02M2001/0025—
Definitions
- the invention is related to a power conversion technology, and particularly to a power conversion device, a time signal generator and a method thereof.
- a power conversion device generates a plurality of continuous on-time signals via a time signal generator to control power switch in a power output stage.
- the power conversion device enters a discontinuous conduction mode (DCM) from a general mode, by extending the interval time between two adjacent on-time signals, power consumption is reduced and output stably.
- DCM discontinuous conduction mode
- the signal frequency output by the time signal generator is similar to audio, and thus noise is generated.
- discontinuous conduction mode In order to avoid generation of noise, discontinuous conduction mode generally has a noise-cancelling function.
- In general mode a constant-on-time signal is output, and the minimum-on-time signal is output in the discontinuous conduction mode.
- the time signal generator keeps switching between the general mode and the discontinuous conduction mode, the time signal generator keeps outputting the constant-on-time signal and the minimum-on-time signal alternately, which causes the output voltage of the power conversion device to generate ripple, and thus and stability of the power conversion device is reduced.
- the invention provides a power conversion device, a time signal generator and a method thereof, which may avoid that an output voltage of the power conversion device to generate ripple, thereby improving stability of the power conversion device.
- a time signal generator of the invention includes a time signal circuit and a timing circuit.
- the time signal circuit includes a current source and a current source circuit, and has a first mode and a second mode.
- the time signal generator provides a first on-time signal according to the current source in the first mode.
- the timing circuit is connected to the time signal circuit, and includes a first timing circuit. When the timing circuit counts to a first predetermined time, the first timing circuit provides a first control signal to the current source circuit, such that the time signal generator provides a second on-time signal according to the current source and the current source circuit in a second mode.
- a width of the second on-time signal is smaller than a width of the first on-time signal.
- a time signal generating method of the invention includes the following steps.
- a first on-time signal is provided according to a current source.
- a first control signal is provided to a current source circuit, and a second on-time signal is provided according to the current source and the current source circuit in a second mode.
- a width of the second on-time signal is smaller than a width of the first on-time signal.
- a power conversion device includes a driving circuit, a power output stage, a feedback circuit and a time signal generator.
- the driving circuit generates a driving signal according to a time signal.
- the power output stage is electrically connected to the driving circuit and controlled by the driving signal such that power conversion device converts an input voltage into an output voltage.
- the feedback circuit is electrically connected to the power output stage and generates a time control signal according to the output voltage and a reference voltage.
- the time signal generator is electrically connected to a feedback circuit and the driving circuit, and includes a time signal circuit and a timing circuit.
- the time signal circuit includes a current source and a current source circuit, and has a first mode and a second mode.
- the time signal generator provides a first on-time signal according to the current source in the first mode.
- the timing circuit is connected to the time signal circuit and includes a first timing circuit. When the timing circuit counts to a first predetermined time, the first timing circuit provides a first control signal to the current source circuit such that the time signal generator provides a second on-time signal according to the current source and the current source circuit in the second mode. A width of the second on-time signal is smaller than a width of the first on-time signal.
- the time signal circuit in the time signal generator of the invention includes the current source and the current source circuit.
- a noise-cancelling function can be provided in a light load mode such that the width of on-time is inversely proportional to the length of interval time. In this manner, it can be avoided that the output voltage of the power conversion device generates ripple, thereby improving stability of power conversion device.
- FIG. 1 is a schematic view of a power conversion device according to an embodiment of the invention.
- FIG. 2 is a flowchart of a time signal generating method according to an embodiment of the invention.
- FIG. 3 is a time chart describing a time signal generator in FIG. 1 .
- FIG. 4 is a time chart describing a control voltage according to an embodiment of the invention.
- FIG. 5 is a schematic view illustrating a width of an on-time signal relative to an interval time according to an embodiment of the invention.
- FIG. 1 is a schematic view of a power conversion device according to an embodiment of the invention.
- a power conversion device 10 includes a time signal generator 100 , a driving circuit 11 , a power output stage 12 , an impedance circuit consisting of an inductor L 1 and a capacitor C 1 , resistances R 1 -R 2 and a feedback circuit 13 .
- the time signal generator 100 may generate an on-time signal TON.
- the driving circuit 11 is electrically connected to the time signal generator 100 and may generate a plurality of driving signals DR 1 -DR 2 in response to the on-time signal TON.
- the power output stage 12 is electrically connected to the driving circuit 11 , and may control the current flowing through the inductor L 1 and capacitor C 1 in response to the driving signals DR 1 -DR 2 . In this manner, the power conversion device 10 may convert an input voltage VIN into an output voltage VO.
- the driving circuit 11 includes a buffer 14 and an inverter 15 , and the power output stage 12 includes power switches 16 - 17 .
- the buffer 14 may generate a driving signal DR 1 according to the on-time signal TON to control the on-state of the power switch 16 .
- the inverter 15 may generate a driving signal DR 2 according to the on-time signal TON to control the on-state of the power switch 17 .
- the current flowing through the inductor L 1 is also changed correspondingly, and the capacitor C 1 also generates corresponding charging action or discharging action such that the input voltage VIN can be converted into output voltage VO.
- a feedback circuit 13 is electrically connected to the power output stage 12 via resistances R 1 -R 2 as well as the impedance circuit, and generates a time control signal S 11 according to an output voltage VO and a reference voltage VR.
- the feedback circuit 13 may include an error amplifier 18 , a comparator 19 , a compensation resistance R 3 and a compensation capacitor C 2 .
- the resistances R 1 and R 2 are serially connected between the output voltage VO and a ground end, and the resistances R 1 and R 2 may be formed into a dividing circuit to generate a feedback voltage VFB related to the output voltage VO.
- the error amplifier 18 may generate an error signal COMP according to the feedback voltage VFB and the reference voltage VR.
- the comparator 19 compares the error signal COMP with a saw-tooth wave signal RAMP and generates the time control signal S 11 accordingly.
- the time signal generator 100 is electrically connected to the feedback circuit 13 and the driving circuit 11 , and including a timing circuit 110 , a time signal circuit 120 and a logic circuit 130 .
- the time signal circuit 120 is electrically connected to the timing circuit 110 and the logic circuit 130 , and the time signal circuit 120 includes a current source 121 and a current source circuit 122 .
- the time signal generator 100 includes a first mode and a second mode. In the first mode (e.g., general mode), the time signal generator 100 may provide a first on-time signal according to current source 121 . In the second mode (e.g., discontinuous conduction mode having noise-cancelling function), the time signal generator 100 may provide a second on-time signal according to the current source 121 and the current source circuit 122 .
- the first mode e.g., general mode
- the time signal generator 100 may provide a first on-time signal according to current source 121 .
- the second mode e.g., discontinuous conduction mode having noise-cancell
- the timing circuit 110 includes a first timing circuit 111 .
- the first timing circuit 111 may provide a first control signal CT 1 to the current source circuit 122 , such that the time signal generator 100 provides the second on-time signal according to the current source 121 and the current source circuit 122 in the second mode.
- a width of the second on-time signal is smaller than a width of the first on-time signal.
- the time signal generator 100 may generate an on-time signal (e.g., first on-time signal) with a constant width according to the current source 121 .
- the time signal generator 100 may generate the on-time signal (e.g., second on-time signal) with a variable width using the current source circuit 122 .
- the time signal generator 100 keeps switching between the first mode (e.g., general mode) and the second mode (e.g., discontinuous conduction mode having noise-cancelling function), it still can be avoided that the output voltage VO of the power conversion device 10 generates ripple, thereby improving stability of the power conversion device 10 .
- the first mode e.g., general mode
- the second mode e.g., discontinuous conduction mode having noise-cancelling function
- FIG. 2 is a flowchart of a time signal generating method according to an embodiment of the invention.
- FIG. 3 is a time chart describing a time signal generator in FIG. 1 . The following paragraph further describes the operation of the time signal generator 100 with reference to FIG. 1 to FIG. 3 .
- the timing circuit 110 further includes a second timing circuit 112 , a current source 113 , a switch 114 and a capacitor 115 .
- the current source 113 and the switch 114 are serially connected between a power voltage VS and the ground end.
- the capacitor 115 and the switch 114 are connected to each other in parallel.
- the first timing circuit 111 and the second timing circuit 112 may be constructed respectively via a comparator.
- the current source 113 , the switch 114 and the capacitor 115 may be formed into a charging/discharging circuit 116 .
- the switch 114 When the switch 114 is turned off, the constant current provided by the current source 113 may charge the capacitor 115 , thereby continuously increasing the level of the control voltage VT stored by the capacitor 115 .
- the first timing circuit 111 receives and compares the control voltage VT with a first threshold voltage V 1
- the second timing circuit 112 receives and compares the control voltage VT with a second threshold voltage V 2 .
- FIG. 4 is a time chart describing a control voltage according to an embodiment of the invention.
- a time during which the control voltage VT is risen from the ground voltage to the first threshold voltage V 1 is equal to a first predetermined time T 1 (e.g., 10 us)
- a time during which the control voltage VT is risen from the ground voltage to the second threshold voltage V 2 is equal to a second predetermined time T 2 (e.g., 30 us).
- T 1 e.g. 10 us
- T 2 e.g. 10 us
- the timing circuit 110 counts to the second predetermined time T 2 . That is to say, the first timing circuit 111 may be used to determine whether the counting time reaches the first predetermined time T 1 , and the second timing circuit 112 may be used to determine whether the counting time reaches the second predetermined time T 2 .
- the time signal circuit 120 further includes a switch 123 , a capacitor 124 and a comparator 125 .
- the switch 123 is electrically connected between the current source circuit 122 and the ground end.
- the capacitor 124 is electrically connected to the current source 121 and the switch 123 .
- a comparator 125 receives a third threshold voltage V 3 and electrically connected to the capacitor 124 .
- the switch 123 is controlled by an inverting signal S 13 of the on-time signal TON.
- the time signal circuit 120 may use the current source 121 or use both of the current source 121 and the current source circuit 122 to charge the capacitor 124 , such that the level of the charging voltage VN stored by the capacitor 124 can rise continuously.
- the comparator 125 may receive and compare the charging voltage VN with the third threshold voltage V 3 , and generate a second control signal CT 2 when the charging voltage VN is larger than the third threshold voltage V 3 .
- the time signal circuit 120 may reset the level of the charging voltage VN to be the ground voltage.
- the current source circuit 122 includes a voltage-current converter 101 , a current source 102 and a switch 103 .
- the voltage-current converter 101 may convert the control voltage VT into an adjusting current.
- the current source circuit 122 may generate a variable current that is proportional to the control voltage VT according to a constant current generated by the adjusting current and the current source 102 .
- persons having ordinary skill in the art may selectively remove the current source 102 according to the need of design, and directly use the adjusting current generated by the voltage-current converter 101 to form the variable current that is proportional to the control voltage VT.
- the current source circuit 122 may determine whether to output the variable current in response to whether the switch 103 is turned on or not.
- the logic circuit 130 includes an OR gate 131 and an SR latch 132 .
- the OR gate 131 is electrically connected to the second timing circuit 112 and the feedback circuit 13 .
- the SR latch 132 is electrically connected to the OR gate 131 and the comparator 125 .
- the SR latch 132 generates the on-time signal TON.
- the time signal generator 100 may provide a first on-time signal TON 31 according to the current source 121 .
- the logic circuit 130 may start outputting the first on-time signal TON 31 in response to the time control signal S 11 at a time point t 31 , that is, to control a rising edge of the first on-time signal TON 31 .
- the charging/discharging circuit 116 in the timing circuit 110 may continuously increase the level of the control voltage VT in response to the turned-off state of the switch 114 .
- the time signal circuit 120 may charge the capacitor 124 using the constant current provided by the current source 121 in response to the turned-off state of the switch 123 and the switch 103 .
- the comparator 125 outputs the second control signal CT 2 .
- the logic circuit 130 may stop outputting the first on-time signal TON 31 in response to the second control signal CT 2 , that is, to control a falling edge of the first on-time signal TON 31 .
- the time signal generator 100 may control the rising edge of the first on-time signal TON 31 according to the time control signal S 11 , and control the falling edge of the first on-time signal TON 31 according to the constant current provided by the current source 121 .
- the time signal generator 100 may provide the first control signal CT 1 to the current source circuit 122 , and provides the second on-time signal TON 32 according to the current source 121 and the current source circuit 122 in the second mode.
- the time signal generator 100 may generate a reset pulse S 12 at the time point t 32 in response to the falling edge of the first on-time signal TON 31 .
- the switch 114 in the charging/discharging circuit 116 may be turned on in response to the reset pulse S 12 , such that the level of the control voltage VT is reset to be the ground voltage.
- the charging/discharging circuit 116 continuously increases the level of the control voltage VT.
- the charging/discharging circuit 116 may continuously increase the level of the control voltage VT and reset the level of the control voltage VT to be the ground voltage in response to the reset pulse S 12 .
- the first timing circuit 111 may compare the control voltage VT with the first threshold voltage V 1 to determine whether the counting time reaches the first predetermined time T 1 . As shown in step S 224 , when the control voltage VT is larger than the first threshold voltage V 1 , it represents that the timing circuit 110 counts to the first predetermined time T 1 . At this time, the first timing circuit 110 may provide the first control signal CT 1 to the current source circuit 122 to turn on the switch 103 in the current source circuit 122 .
- the current source circuit 122 may output the variable current that is proportional to the control voltage VT, such that the time signal generator 100 may generate the second on-time signal TON 32 according to the constant current provided by the variable current and the current source 121 , that is, to control the falling edge of the second on-time signal TON 32 according to the constant current and the variable current.
- the logic circuit 130 may start outputting the second on-time signal TON 32 in response to the time control signal S 11 a time point t 33 , that is, to control the rising edge of the second on-time signal TON 32 .
- the time signal circuit 120 may charge the capacitor 124 using the constant current provided by the current source 121 first.
- the time signal current 120 may charge the capacitor 124 using the constant current and the variable current.
- the charging voltage VN during the time point t 33 and the time point t 35 can reach the third threshold voltage V 3 more quickly, such that the width of the second on-time signal TON 32 is smaller than the width of the first on-time signal TON 31 . That is to say, in the second mode, the time signal generator 100 may control the rising edge of the second on-time signal TON 32 according to the time control signal S 11 , and control the falling edge of the second on-time signal TON 32 according to the variable current provided by the current source circuit 122 and the constant current provided by the current source 121 .
- the time signal generator 100 may further provide a third on-time signal TON 33 according to the current source 121 and the current source circuit 122 .
- the third on-time signal TON 33 follows the second on-time signal TON 32 .
- the time signal generator 100 may provide the second on-time signal TON 32 and the third on-time signal TON 33 in sequence according to the current source 121 and the current source circuit 122 .
- the timing circuit 110 may reset the level of the control voltage VT to be the ground voltage in response to the reset pulse S 12 at the time point t 35 to start calculating the interval time between the second on-time signal TON 32 and the third on-time signal TON 33 .
- the logic circuit 130 may start outputting the third on-time signal TON 33 in response to the time control signal S 11 at a time point t 36 , that is, to control the rising edge of the third on-time signal TON 33 .
- the switch 123 and the switch 103 in the time signal circuit 120 may be turned on together, such that the time signal circuit 120 may charge the capacitor 124 using the constant current and the variable current.
- the charging voltage VN during the time point t 36 and the time point t 37 can reach the third threshold voltage V 3 more quickly, such that the width of the third on-time signal TON 33 is smaller than the width of the second on-time signal TON 32 .
- step S 240 when the second predetermined time T 2 is counted to, the time signal generator 100 may generate a cut-off signal EN 1 and provides the minimum-on-time signal TON 34 .
- the second timing circuit 112 may compare the control voltage VT with the second threshold voltage V 2 to determine whether the counting time reaches the second predetermined time T 2 . As shown in step S 242 , when the control voltage VT is larger than the second threshold voltage V 2 , it represents that the timing circuit 110 counts to the second predetermined time T 2 .
- the second timing circuit 112 may generate the cut-off signal EN 1 such that the logic circuit 130 may start outputting the minimum-on-time signal TON 34 in response to the cut-off signal EN 1 , that is, to control the rising edge of the minimum-on-time signal TON 34 .
- the time signal circuit 120 may charge the capacitor 124 using the constant current and the variable current. Since the control voltage VT during the time points t 38 and t 39 is larger than the control voltage VT during the time points t 36 and t 37 , the variable current generated during time points t 38 and t 39 by the current source circuit 112 is larger than the variable current generated during the time points t 36 and t 37 .
- the charging voltage VN during the time points t 38 and t 39 can reach the third threshold voltage V 3 more quickly, such that the width of the minimum-on-time signal TON 34 can be smaller than the width of the third on-time signal TON 33 .
- FIG. 5 is a schematic view illustrating a width of an on-time signal relative to an interval time according to an embodiment of the invention.
- the time signal circuit 120 may enter the second mode. In the second mode, the time signal circuit 120 may accelerate the boosting speed of the charging voltage VN using the current source circuit 122 , thereby reducing the width of the current on-time signal.
- the current source circuit 122 may adjust the boosting speed of the charging voltage VN using the variable current that is proportional to the control voltage VT, such that the width of the current on-time signal (e.g., third on-time signal TON 33 ) may be reversely proportional to the interval time between the current on-time signal and the previous on-time signal (e.g., third on-time signal TON 33 ).
- the width of the current on-time signal becomes smaller linearly along with the increase of time interval.
- the time signal generator 100 In the second predetermined time T 2 at which the previous on-time signal is received, if the time signal generator 100 does not receive the time control signal S 11 from the feedback circuit 13 , the time signal generator 100 outputs the minimum-on-time signal using the cut-off signal EN 1 and the second control signal CT 2 . In other words, when the time signal generator 100 stops outputting the on-time signal for a time period to the second predetermined time T 2 , the time signal generator 100 is forced to output the minimum-on-time signal.
- the time signal circuit in the time signal generator includes the current source and the current source circuit.
- the time signal generator may provide the first on-time signal according to the current source.
- the time signal generator provides the second on-time signal according to the current source and the current source circuit, and adjusts the width of the second on-time signal using the variable current that is proportional to the control voltage. In this manner, it can be avoided that the output voltage of the power conversion device generates ripple, thereby improving the stability of the current conversion device.
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Abstract
Description
- This application claims the priority benefit of Taiwan application serial no. 106135563, filed on Oct. 17, 2017. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
- The invention is related to a power conversion technology, and particularly to a power conversion device, a time signal generator and a method thereof.
- Generally speaking, a power conversion device generates a plurality of continuous on-time signals via a time signal generator to control power switch in a power output stage. In light load conditions, the power conversion device enters a discontinuous conduction mode (DCM) from a general mode, by extending the interval time between two adjacent on-time signals, power consumption is reduced and output stably. When the interval time between two adjacent on-time signals is over large, the signal frequency output by the time signal generator is similar to audio, and thus noise is generated. In order to avoid generation of noise, discontinuous conduction mode generally has a noise-cancelling function. In general mode, a constant-on-time signal is output, and the minimum-on-time signal is output in the discontinuous conduction mode. However, when the time signal generator keeps switching between the general mode and the discontinuous conduction mode, the time signal generator keeps outputting the constant-on-time signal and the minimum-on-time signal alternately, which causes the output voltage of the power conversion device to generate ripple, and thus and stability of the power conversion device is reduced.
- The invention provides a power conversion device, a time signal generator and a method thereof, which may avoid that an output voltage of the power conversion device to generate ripple, thereby improving stability of the power conversion device.
- A time signal generator of the invention includes a time signal circuit and a timing circuit. The time signal circuit includes a current source and a current source circuit, and has a first mode and a second mode. The time signal generator provides a first on-time signal according to the current source in the first mode. The timing circuit is connected to the time signal circuit, and includes a first timing circuit. When the timing circuit counts to a first predetermined time, the first timing circuit provides a first control signal to the current source circuit, such that the time signal generator provides a second on-time signal according to the current source and the current source circuit in a second mode. A width of the second on-time signal is smaller than a width of the first on-time signal.
- A time signal generating method of the invention includes the following steps. In the first mode, a first on-time signal is provided according to a current source. When a first predetermined time is counted to, a first control signal is provided to a current source circuit, and a second on-time signal is provided according to the current source and the current source circuit in a second mode. A width of the second on-time signal is smaller than a width of the first on-time signal.
- In the embodiment of the invention, a power conversion device includes a driving circuit, a power output stage, a feedback circuit and a time signal generator. The driving circuit generates a driving signal according to a time signal. The power output stage is electrically connected to the driving circuit and controlled by the driving signal such that power conversion device converts an input voltage into an output voltage. The feedback circuit is electrically connected to the power output stage and generates a time control signal according to the output voltage and a reference voltage. The time signal generator is electrically connected to a feedback circuit and the driving circuit, and includes a time signal circuit and a timing circuit. The time signal circuit includes a current source and a current source circuit, and has a first mode and a second mode. The time signal generator provides a first on-time signal according to the current source in the first mode. The timing circuit is connected to the time signal circuit and includes a first timing circuit. When the timing circuit counts to a first predetermined time, the first timing circuit provides a first control signal to the current source circuit such that the time signal generator provides a second on-time signal according to the current source and the current source circuit in the second mode. A width of the second on-time signal is smaller than a width of the first on-time signal.
- In summary, the time signal circuit in the time signal generator of the invention includes the current source and the current source circuit. A noise-cancelling function can be provided in a light load mode such that the width of on-time is inversely proportional to the length of interval time. In this manner, it can be avoided that the output voltage of the power conversion device generates ripple, thereby improving stability of power conversion device.
- In order to make the aforementioned features and advantages of the invention more comprehensible, embodiments accompanying figures are described in detail below.
-
FIG. 1 is a schematic view of a power conversion device according to an embodiment of the invention. -
FIG. 2 is a flowchart of a time signal generating method according to an embodiment of the invention. -
FIG. 3 is a time chart describing a time signal generator inFIG. 1 . -
FIG. 4 is a time chart describing a control voltage according to an embodiment of the invention. -
FIG. 5 is a schematic view illustrating a width of an on-time signal relative to an interval time according to an embodiment of the invention. -
FIG. 1 is a schematic view of a power conversion device according to an embodiment of the invention. As shown inFIG. 1 , apower conversion device 10 includes atime signal generator 100, adriving circuit 11, apower output stage 12, an impedance circuit consisting of an inductor L1 and a capacitor C1, resistances R1-R2 and afeedback circuit 13. Thetime signal generator 100 may generate an on-time signal TON. Thedriving circuit 11 is electrically connected to thetime signal generator 100 and may generate a plurality of driving signals DR1-DR2 in response to the on-time signal TON. Thepower output stage 12 is electrically connected to thedriving circuit 11, and may control the current flowing through the inductor L1 and capacitor C1 in response to the driving signals DR1-DR2. In this manner, thepower conversion device 10 may convert an input voltage VIN into an output voltage VO. - The
driving circuit 11 includes abuffer 14 and aninverter 15, and thepower output stage 12 includes power switches 16-17. Thebuffer 14 may generate a driving signal DR1 according to the on-time signal TON to control the on-state of thepower switch 16. Theinverter 15 may generate a driving signal DR2 according to the on-time signal TON to control the on-state of thepower switch 17. Along with change of the on-state of the power switches 16-17, the current flowing through the inductor L1 is also changed correspondingly, and the capacitor C1 also generates corresponding charging action or discharging action such that the input voltage VIN can be converted into output voltage VO. - A
feedback circuit 13 is electrically connected to thepower output stage 12 via resistances R1-R2 as well as the impedance circuit, and generates a time control signal S11 according to an output voltage VO and a reference voltage VR. Thefeedback circuit 13 may include anerror amplifier 18, acomparator 19, a compensation resistance R3 and a compensation capacitor C2. The resistances R1 and R2 are serially connected between the output voltage VO and a ground end, and the resistances R1 and R2 may be formed into a dividing circuit to generate a feedback voltage VFB related to the output voltage VO. Theerror amplifier 18 may generate an error signal COMP according to the feedback voltage VFB and the reference voltage VR. Thecomparator 19 compares the error signal COMP with a saw-tooth wave signal RAMP and generates the time control signal S11 accordingly. - The
time signal generator 100 is electrically connected to thefeedback circuit 13 and thedriving circuit 11, and including atiming circuit 110, atime signal circuit 120 and alogic circuit 130. Thetime signal circuit 120 is electrically connected to thetiming circuit 110 and thelogic circuit 130, and thetime signal circuit 120 includes acurrent source 121 and acurrent source circuit 122. Thetime signal generator 100 includes a first mode and a second mode. In the first mode (e.g., general mode), thetime signal generator 100 may provide a first on-time signal according tocurrent source 121. In the second mode (e.g., discontinuous conduction mode having noise-cancelling function), thetime signal generator 100 may provide a second on-time signal according to thecurrent source 121 and thecurrent source circuit 122. - The
timing circuit 110 includes afirst timing circuit 111. When thetiming circuit 110 counts to a first predetermined time (e.g., 10 us), thefirst timing circuit 111 may provide a first control signal CT1 to thecurrent source circuit 122, such that thetime signal generator 100 provides the second on-time signal according to thecurrent source 121 and thecurrent source circuit 122 in the second mode. A width of the second on-time signal is smaller than a width of the first on-time signal. - In other words, in the first mode (e.g., general mode), the
time signal generator 100 may generate an on-time signal (e.g., first on-time signal) with a constant width according to thecurrent source 121. In addition, in the second mode (e.g., the discontinuous conduction mode having noise-cancelling function), thetime signal generator 100 may generate the on-time signal (e.g., second on-time signal) with a variable width using thecurrent source circuit 122. In this manner, even if thetime signal generator 100 keeps switching between the first mode (e.g., general mode) and the second mode (e.g., discontinuous conduction mode having noise-cancelling function), it still can be avoided that the output voltage VO of thepower conversion device 10 generates ripple, thereby improving stability of thepower conversion device 10. -
FIG. 2 is a flowchart of a time signal generating method according to an embodiment of the invention.FIG. 3 is a time chart describing a time signal generator inFIG. 1 . The following paragraph further describes the operation of thetime signal generator 100 with reference toFIG. 1 toFIG. 3 . As shown inFIG. 1 , thetiming circuit 110 further includes asecond timing circuit 112, acurrent source 113, aswitch 114 and acapacitor 115. Thecurrent source 113 and theswitch 114 are serially connected between a power voltage VS and the ground end. Thecapacitor 115 and theswitch 114 are connected to each other in parallel. Thefirst timing circuit 111 and thesecond timing circuit 112 may be constructed respectively via a comparator. As respect of operation, thecurrent source 113, theswitch 114 and thecapacitor 115 may be formed into a charging/dischargingcircuit 116. When theswitch 114 is turned off, the constant current provided by thecurrent source 113 may charge thecapacitor 115, thereby continuously increasing the level of the control voltage VT stored by thecapacitor 115. Thefirst timing circuit 111 receives and compares the control voltage VT with a first threshold voltage V1, and thesecond timing circuit 112 receives and compares the control voltage VT with a second threshold voltage V2. -
FIG. 4 is a time chart describing a control voltage according to an embodiment of the invention. As shown inFIG. 4 , a time during which the control voltage VT is risen from the ground voltage to the first threshold voltage V1 is equal to a first predetermined time T1 (e.g., 10 us), and a time during which the control voltage VT is risen from the ground voltage to the second threshold voltage V2 is equal to a second predetermined time T2 (e.g., 30 us). In this manner, when the control voltage VT is larger than the first threshold voltage V1, it represents that thetiming circuit 110 counts to the first predetermined time T1. In addition, when the control voltage VT is larger than the second threshold voltage V2, it represents that thetiming circuit 110 counts to the second predetermined time T2. That is to say, thefirst timing circuit 111 may be used to determine whether the counting time reaches the first predetermined time T1, and thesecond timing circuit 112 may be used to determine whether the counting time reaches the second predetermined time T2. - The
time signal circuit 120 further includes aswitch 123, acapacitor 124 and acomparator 125. Theswitch 123 is electrically connected between thecurrent source circuit 122 and the ground end. Thecapacitor 124 is electrically connected to thecurrent source 121 and theswitch 123. Acomparator 125 receives a third threshold voltage V3 and electrically connected to thecapacitor 124. As respect of operation, theswitch 123 is controlled by an inverting signal S13 of the on-time signal TON. When theswitch 123 is turned off, thetime signal circuit 120 may use thecurrent source 121 or use both of thecurrent source 121 and thecurrent source circuit 122 to charge thecapacitor 124, such that the level of the charging voltage VN stored by thecapacitor 124 can rise continuously. Thecomparator 125 may receive and compare the charging voltage VN with the third threshold voltage V3, and generate a second control signal CT2 when the charging voltage VN is larger than the third threshold voltage V3. When theswitch 123 is turned on, thetime signal circuit 120 may reset the level of the charging voltage VN to be the ground voltage. - The
current source circuit 122 includes a voltage-current converter 101, acurrent source 102 and aswitch 103. As respect of operation, the voltage-current converter 101 may convert the control voltage VT into an adjusting current. Thecurrent source circuit 122 may generate a variable current that is proportional to the control voltage VT according to a constant current generated by the adjusting current and thecurrent source 102. In another embodiment, persons having ordinary skill in the art may selectively remove thecurrent source 102 according to the need of design, and directly use the adjusting current generated by the voltage-current converter 101 to form the variable current that is proportional to the control voltage VT. In addition, thecurrent source circuit 122 may determine whether to output the variable current in response to whether theswitch 103 is turned on or not. Thelogic circuit 130 includes an ORgate 131 and anSR latch 132. The ORgate 131 is electrically connected to thesecond timing circuit 112 and thefeedback circuit 13. TheSR latch 132 is electrically connected to theOR gate 131 and thecomparator 125. TheSR latch 132 generates the on-time signal TON. - Referring to
FIG. 1 toFIG. 3 , as shown in step S210, in the first mode, thetime signal generator 100 may provide a first on-time signal TON31 according to thecurrent source 121. For example, thelogic circuit 130 may start outputting the first on-time signal TON31 in response to the time control signal S11 at a time point t31, that is, to control a rising edge of the first on-time signal TON31. During time points t31 and t32, the charging/dischargingcircuit 116 in thetiming circuit 110 may continuously increase the level of the control voltage VT in response to the turned-off state of theswitch 114. On the other hand, thetime signal circuit 120 may charge thecapacitor 124 using the constant current provided by thecurrent source 121 in response to the turned-off state of theswitch 123 and theswitch 103. - At time point t32, the level of the charging voltage VN rises to the third threshold voltage V3; therefore the
comparator 125 outputs the second control signal CT2. Thelogic circuit 130 may stop outputting the first on-time signal TON31 in response to the second control signal CT2, that is, to control a falling edge of the first on-time signal TON31. In other words, in the first mode, thetime signal generator 100 may control the rising edge of the first on-time signal TON31 according to the time control signal S11, and control the falling edge of the first on-time signal TON31 according to the constant current provided by thecurrent source 121. - As shown in step S220, when the first predetermined time T1 is counted to, the
time signal generator 100 may provide the first control signal CT1 to thecurrent source circuit 122, and provides the second on-time signal TON32 according to thecurrent source 121 and thecurrent source circuit 122 in the second mode. In terms of detailed steps of step S220, as shown in step S221, thetime signal generator 100 may generate a reset pulse S12 at the time point t32 in response to the falling edge of the first on-time signal TON31. As shown in step S222, theswitch 114 in the charging/dischargingcircuit 116 may be turned on in response to the reset pulse S12, such that the level of the control voltage VT is reset to be the ground voltage. In addition, when thetime signal generator 100 stops generating the reset pulse S12, the charging/dischargingcircuit 116 continuously increases the level of the control voltage VT. In other words, the charging/dischargingcircuit 116 may continuously increase the level of the control voltage VT and reset the level of the control voltage VT to be the ground voltage in response to the reset pulse S12. - As shown in step S223, the
first timing circuit 111 may compare the control voltage VT with the first threshold voltage V1 to determine whether the counting time reaches the first predetermined time T1. As shown in step S224, when the control voltage VT is larger than the first threshold voltage V1, it represents that thetiming circuit 110 counts to the first predetermined time T1. At this time, thefirst timing circuit 110 may provide the first control signal CT1 to thecurrent source circuit 122 to turn on theswitch 103 in thecurrent source circuit 122. In this manner, thecurrent source circuit 122 may output the variable current that is proportional to the control voltage VT, such that thetime signal generator 100 may generate the second on-time signal TON32 according to the constant current provided by the variable current and thecurrent source 121, that is, to control the falling edge of the second on-time signal TON32 according to the constant current and the variable current. - Specifically, the
logic circuit 130 may start outputting the second on-time signal TON32 in response to the time control signal S11 a time point t33, that is, to control the rising edge of the second on-time signal TON32. During the time points t33 and t34, thetime signal circuit 120 may charge thecapacitor 124 using the constant current provided by thecurrent source 121 first. Then, during time points t34 and t35, the time signal current 120 may charge thecapacitor 124 using the constant current and the variable current. In this manner, as compared with the charging voltage VN during the time points t31 and t32, the charging voltage VN during the time point t33 and the time point t35 can reach the third threshold voltage V3 more quickly, such that the width of the second on-time signal TON32 is smaller than the width of the first on-time signal TON31. That is to say, in the second mode, thetime signal generator 100 may control the rising edge of the second on-time signal TON32 according to the time control signal S11, and control the falling edge of the second on-time signal TON32 according to the variable current provided by thecurrent source circuit 122 and the constant current provided by thecurrent source 121. - As shown in step S230, in the second mode, the
time signal generator 100 may further provide a third on-time signal TON33 according to thecurrent source 121 and thecurrent source circuit 122. The third on-time signal TON33 follows the second on-time signal TON32. In other words, in the second mode, thetime signal generator 100 may provide the second on-time signal TON32 and the third on-time signal TON33 in sequence according to thecurrent source 121 and thecurrent source circuit 122. - The
timing circuit 110 may reset the level of the control voltage VT to be the ground voltage in response to the reset pulse S12 at the time point t35 to start calculating the interval time between the second on-time signal TON32 and the third on-time signal TON33. Thelogic circuit 130 may start outputting the third on-time signal TON33 in response to the time control signal S11 at a time point t36, that is, to control the rising edge of the third on-time signal TON33. In addition, during time points t36 and t37, theswitch 123 and theswitch 103 in thetime signal circuit 120 may be turned on together, such that thetime signal circuit 120 may charge thecapacitor 124 using the constant current and the variable current. In this manner, as compared with the charging voltage VN during the time point t33 and the time point t35, the charging voltage VN during the time point t36 and the time point t37 can reach the third threshold voltage V3 more quickly, such that the width of the third on-time signal TON33 is smaller than the width of the second on-time signal TON32. - As shown in step S240, when the second predetermined time T2 is counted to, the
time signal generator 100 may generate a cut-off signal EN1 and provides the minimum-on-time signal TON34. In terms of detailed steps of step S240, as shown in step S241, thesecond timing circuit 112 may compare the control voltage VT with the second threshold voltage V2 to determine whether the counting time reaches the second predetermined time T2. As shown in step S242, when the control voltage VT is larger than the second threshold voltage V2, it represents that thetiming circuit 110 counts to the second predetermined time T2. At this time, thesecond timing circuit 112 may generate the cut-off signal EN1 such that thelogic circuit 130 may start outputting the minimum-on-time signal TON34 in response to the cut-off signal EN1, that is, to control the rising edge of the minimum-on-time signal TON34. - During time points t38 and t39, the
time signal circuit 120 may charge thecapacitor 124 using the constant current and the variable current. Since the control voltage VT during the time points t38 and t39 is larger than the control voltage VT during the time points t36 and t37, the variable current generated during time points t38 and t39 by thecurrent source circuit 112 is larger than the variable current generated during the time points t36 and t37. In this manner, as compared with the charging voltage VN during the time points t36 and t37, the charging voltage VN during the time points t38 and t39 can reach the third threshold voltage V3 more quickly, such that the width of the minimum-on-time signal TON34 can be smaller than the width of the third on-time signal TON33. -
FIG. 5 is a schematic view illustrating a width of an on-time signal relative to an interval time according to an embodiment of the invention. As shown inFIG. 5 , when the interval time between the current on-time signal (e.g., the second on-time signal TON32) and the previous on-time signal (e.g., first on-time signal TON31) is larger than the first predetermined time T1, thetime signal circuit 120 may enter the second mode. In the second mode, thetime signal circuit 120 may accelerate the boosting speed of the charging voltage VN using thecurrent source circuit 122, thereby reducing the width of the current on-time signal. - In terms of the two on-time signals (e.g., the second on-time signal TON32 and the third on-time signal TON33) generated in sequence in the second mode by the
time signal generator 100, thecurrent source circuit 122 may adjust the boosting speed of the charging voltage VN using the variable current that is proportional to the control voltage VT, such that the width of the current on-time signal (e.g., third on-time signal TON33) may be reversely proportional to the interval time between the current on-time signal and the previous on-time signal (e.g., third on-time signal TON33). In other words, in the second mode, the width of the current on-time signal becomes smaller linearly along with the increase of time interval. - Within the second predetermined time T2 at which the previous on-time signal is received, if the
time signal generator 100 does not receive the timecontrol signal S 11 from thefeedback circuit 13, thetime signal generator 100 outputs the minimum-on-time signal using the cut-off signal EN1 and the second control signal CT2. In other words, when thetime signal generator 100 stops outputting the on-time signal for a time period to the second predetermined time T2, thetime signal generator 100 is forced to output the minimum-on-time signal. - In summary, according to the invention, the time signal circuit in the time signal generator includes the current source and the current source circuit. In the first mode, the time signal generator may provide the first on-time signal according to the current source. In the second mode, the time signal generator provides the second on-time signal according to the current source and the current source circuit, and adjusts the width of the second on-time signal using the variable current that is proportional to the control voltage. In this manner, it can be avoided that the output voltage of the power conversion device generates ripple, thereby improving the stability of the current conversion device.
- It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the disclosed embodiments without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims and their equivalents.
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TW106135563A TW201917999A (en) | 2017-10-17 | 2017-10-17 | Power conversion device, time signal generator and method thereof |
TW106135563A | 2017-10-17 | ||
TW106135563 | 2017-10-17 |
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Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7652461B2 (en) | 2004-12-03 | 2010-01-26 | Texas Instruments Incorporated | High efficiency power converter operating free of an audible frequency range |
US7800923B2 (en) * | 2008-02-29 | 2010-09-21 | System General Corp. | Offline synchronous switching regulator |
US8253403B2 (en) * | 2008-12-16 | 2012-08-28 | Green Solution Technology Co., Ltd. | Converting circuit and controller for controlling the same |
JP5507980B2 (en) | 2009-11-27 | 2014-05-28 | スパンション エルエルシー | Switching power supply control circuit, electronic device, and switching power supply control method |
US8339116B2 (en) | 2010-03-22 | 2012-12-25 | Intersil Americas Inc. | DC/DC converter including ultrasonic feature for use with low quiescent currents |
US8148966B2 (en) * | 2010-08-24 | 2012-04-03 | Semiconductor Components Industries, Llc | Power supply control circuits including enhanced ramp pulse modulation |
US8482268B2 (en) * | 2010-09-16 | 2013-07-09 | System General Corporation | Correction circuit of a switching-current sample for power converters in both CCM and DCM operation |
TWI505618B (en) | 2010-11-30 | 2015-10-21 | Richtek Technology Corp | Audio-skipping control method and circuit for a constant on-time power converter |
CN102751870B (en) * | 2011-04-21 | 2015-05-27 | 登丰微电子股份有限公司 | DC-to-DC Buck Converter Controller |
US9293989B2 (en) * | 2011-04-21 | 2016-03-22 | Green Solution Technology Co., Ltd. | DC to DC buck converting controller with programmable on-time period unit |
CN102761247A (en) * | 2011-04-26 | 2012-10-31 | 登丰微电子股份有限公司 | Control circuit of conversion circuit |
US8896284B2 (en) | 2011-06-28 | 2014-11-25 | Texas Instruments Incorporated | DC-DC converter using internal ripple with the DCM function |
US9178417B2 (en) * | 2011-07-27 | 2015-11-03 | Upi Semiconductor Corp. | DC-DC converter and voltage conversion method thereof |
TWI477048B (en) * | 2011-07-27 | 2015-03-11 | Upi Semiconductor Corp | Dc-dc converter and voltage conversion method thereof |
CN102377342B (en) * | 2011-08-12 | 2015-08-26 | 成都芯源系统有限公司 | Control circuit and control method for DC-DC conversion circuit |
TWI470392B (en) * | 2012-06-14 | 2015-01-21 | Upi Semiconductor Corp | Dc-dc controller and operation method thereof |
CN102891596B (en) * | 2012-09-27 | 2015-02-25 | 成都芯源系统有限公司 | Control circuit, switching converter and control method thereof |
TWI470918B (en) * | 2012-12-17 | 2015-01-21 | Upi Semiconductor Corp | Dc-dc converter, time generating circuit, and operating method thereof |
US9407147B2 (en) * | 2013-03-18 | 2016-08-02 | Green Solution Technology Co., Ltd. | Multiphase converter controller with current balance |
TW201445858A (en) * | 2013-05-16 | 2014-12-01 | Upi Semiconductor Corp | Timing generator and timing signal generation method for power converter |
TWI496389B (en) * | 2013-05-16 | 2015-08-11 | Upi Semiconductor Corp | Timing generator and timing signal generation method for power converter |
TWI513152B (en) * | 2013-09-17 | 2015-12-11 | Upi Semiconductor Corp | Time signal generator and time signal generating method |
US9647558B2 (en) * | 2014-05-02 | 2017-05-09 | Intersil Americas LLC | System and method for maintaining a constant output voltage ripple in a buck converter in discontinuous conduction mode |
JP2016116336A (en) | 2014-12-15 | 2016-06-23 | 株式会社東芝 | Power supply circuit and control method thereof |
TWI578704B (en) * | 2015-03-20 | 2017-04-11 | 力智電子股份有限公司 | Time signal generating circuit and time signal generating method |
TWI675278B (en) * | 2015-11-09 | 2019-10-21 | 力智電子股份有限公司 | Parameter setting circuit of a power conversion apparatus and a method for generating a currcnt |
CN105553263B (en) * | 2015-12-28 | 2018-04-06 | 成都芯源系统有限公司 | Switching power supply with constant on-time control, and control circuit and control method thereof |
CN105896942B (en) * | 2016-05-18 | 2018-12-25 | 矽力杰半导体技术(杭州)有限公司 | Control circuit, control method and the switch type regulator of switch type regulator |
US10333403B2 (en) * | 2016-06-28 | 2019-06-25 | Dialog Semiconductor (Uk) Limited | Adaptive on-time switching converter |
TWI613883B (en) * | 2017-01-06 | 2018-02-01 | 茂達電子股份有限公司 | Constant on-time converter having fast transient response |
-
2017
- 2017-10-17 TW TW106135563A patent/TW201917999A/en unknown
- 2017-11-17 CN CN201711143152.7A patent/CN109672335A/en active Pending
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- 2018-03-02 US US15/910,018 patent/US10284088B1/en active Active
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