US20150060123A1 - Locking dual leadframe for flip chip on leadframe packages - Google Patents
Locking dual leadframe for flip chip on leadframe packages Download PDFInfo
- Publication number
- US20150060123A1 US20150060123A1 US14/017,800 US201314017800A US2015060123A1 US 20150060123 A1 US20150060123 A1 US 20150060123A1 US 201314017800 A US201314017800 A US 201314017800A US 2015060123 A1 US2015060123 A1 US 2015060123A1
- Authority
- US
- United States
- Prior art keywords
- frame portion
- metal frame
- protruding features
- apertures
- leadframe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00012—Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49121—Beam lead frame or beam lead device
Definitions
- Disclosed embodiments relate to flip chip on leadframe packages.
- Leadframe packages are well known and widely used in the electronics industry to house, mount, and interconnect a variety of different integrated circuits (ICs).
- a conventional leadframe is typically die-stamped from a sheet of flat-stock metal, and includes a plurality of metal leads temporarily held together in a planar arrangement about a central region during package manufacture by a rectangular frame including a plurality of expendable “dam-bars.”
- a mounting die pad for a semiconductor die is supported in the central region by “tie-bars” that attach to the frame.
- the leads extend from a first end integral with the frame to an opposite second end adjacent to, but spaced apart from the die pad.
- an IC die having solder bumps on its bond pads on the topside of the die is flipped (topside/circuit side) onto a leadframe, where the die is bonded to the die pad and is electrically coupled to the wire bond pads through re-flowing of the solder bumps.
- One problem with flip chip on leadframe packages resulting in rejected devices is lack of solder ball attachment to the wire bond pads of the leadframe causing electrical opens which can occur due to lack of leadframe co-planarity.
- One solution to this problem involves increasing the solder ball size which can help somewhat to resolve this issue.
- increasing the solder ball size has disadvantages including an increased incidence of solder ball collapse and solder smearing which each can cause yield loss.
- Disclosed embodiments include a locking dual leadframe (LDLF) which includes a top metal frame portion including a die pad and protruding features and a bottom metal frame portion having apertures positioned lateral to the die pad area sized and positioned so that when the frame portions are pressed together the protruding features penetrate into the apertures to enable a locking feature.
- the locking feature resists loss of planarity during assembly which helps solve the solder ball detach problem for flip chip on lead package technology caused by lack of leadframe co-planarity noted for known conventional LFs.
- Disclosed embodiments recognize the lack of leadframe coplanarity for flip chip on leadframe packages is generally due to leadframe warpage as the leadframe goes through several heated reflow processes. Also, leadframe sheet handing during transfer for each different process during assembly can lead to a loss of leadframe co planarity. With flip chip on leadframe packages having disclosed leadframes including disclosed locking feature(s), warpage is minimized or at least the warpage on the top and bottom metal frame portions is in same direction, so the assembly stack components within the later formed molded package will remain essentially intact during the pre-molding assembly steps.
- FIG. 1 is a flow chart that shows steps in an example method of assembling a flip chip on a leadframe package using a disclosed LDLF, according to an example embodiment.
- FIG. 2A is a cross sectional depiction of an example flip chip on leadframe package including a disclosed LDLF before singulation, according to an example embodiment.
- FIG. 2B is a cross sectional depiction of another example flip chip on leadframe package including a disclosed LDLF before singulation, according to an example embodiment.
- FIGS. 3A-D is a top view depiction of a top side of a leadframe sheet, a close up on a section of the bottom side of the top metal frame portion showing button shaped protruding features including necking, a section of a bottom metal frame portion having apertures comprising circular holes, and a depiction in FIG. 3D of the sections shown in FIG. 3B and FIG. 3C after being locked together, respectively, demonstrating button mating, according to an example embodiment.
- FIGS. 4A-D is a top view depiction of a top side of a leadframe sheet, a close up on a section of the bottom side of the top metal frame portion showing a “U” shape feature with side necking, a section 420 of a bottom metal frame portion having apertures comprising circular holes, and a depiction in FIG. 4D of the sections in FIG. 4B and FIG. 4C after being locked together, respectively, demonstrating “U” shape mating, according to an example embodiment.
- FIGS. 5A-D is a top view depiction of a top side of a leadframe sheet, a close up on a section of the bottom side of the top metal frame portion showing a linear frame feature, a section of a bottom metal frame portion having apertures a comprising a longitudinal hole, and a depiction in FIG. 5D of the sections in FIG. 5B and FIG. 5C after being locked together, respectively, demonstrating stapler mating, according to an example embodiment.
- FIG. 6 is a depiction of an example flip chip on a leadframe package after singulation.
- Example embodiments are described with reference to the drawings, wherein like reference numerals are used to designate similar or equivalent elements. Illustrated ordering of acts or events should not be considered as limiting, as some acts or events may occur in different order and/or concurrently with other acts or events. Furthermore, some illustrated acts or events may not be required to implement a methodology in accordance with this disclosure.
- FIG. 1 is a flow chart that shows steps in an example method 100 of assembling a flip chip on a leadframe package using a disclosed LDLF, according to an example embodiment.
- Step 101 comprises providing a LDLF including a top metal frame portion including a die pad and protruding features and a bottom metal frame portion having apertures positioned lateral to an area of the die pad.
- the protruding features and apertures are similarly sized and alignable so that when the top metal frame portion is pressed together with the bottom metal frame portion the protruding features penetrate the apertures to permit locking together.
- the top metal frame portion and bottom metal frame portion are generally both parts of leadframe sheets including a plurality of frame portions.
- the top metal frame portion and bottom metal frame portion can both including optional metal plating layers.
- the protruding features are generally part of top metal frame portion which can be formed through a metal stamping process, so that the protruding feature are an integral part of the top metal leadframe portion.
- the protruding features are generally slightly smaller in area as compared to the apertures to permit fitting therethrough and longer than a thickness of the bottom metal frame portion.
- the top metal frame portion and bottom metal frame portion are both about 7 to 9 mm thick, and the protruding features are about 20 mm long.
- Step 102 comprises mounting a flipped integrated circuit (IC) die having a bottomside and a topside including circuitry (including transistor(s)) connected to bond pads having solder balls on the bond pads with the topside down onto the die pad area of the top metal frame portion.
- Step 103 comprises aligning the top metal frame portion to the bottom metal frame portion so that the protruding features are aligned to the apertures.
- the respective frame portions can include pilot holes located on top and bottom area of the frame portions which can be used for alignment (e.g., optical alignment) between the respective frame portions.
- Step 104 comprises pressing the bottomside of the IC die onto a top surface of the bottom metal frame portion having a die attach material thereon, wherein the protruding features penetrate into the apertures.
- a mechanical press can be used for the pressing along with optional heating.
- Subsequent assembly steps generally include reflowing the solder, molding with a mold material, then singulating the leadframe sheets into individual packaged devices. Singulation cuts around mold material, where the disclosed locking features are generally beyond the mold material and are thus removed by the singulation (e.g., see flip chip on leadframe package 600 in FIG. 6 described below).
- top metal frame portion includes routing for adding discrete devices (e.g., passives) within the package, such as depicted in FIG. 6 , this arrangement may reduce the routing possibilities as it will consume some area that otherwise can be used for routing lines.
- discrete devices e.g., passives
- FIG. 2A is a cross sectional depiction of an example flip chip on leadframe package 200 including a disclosed LDLF before singulation, according to an example embodiment.
- the LDLF includes a top metal frame portion 210 including protruding features 225 being button shaped including necking (see FIG. 3B described below) and a die pad area 210 a, and a bottom metal frame portion 220 having apertures 220 a positioned lateral to the die pad area 210 a sized and alignable so that when the top metal frame portion 210 is pressed together with the bottom metal frame portion 220 the protruding features penetrate into the apertures 220 a.
- the apertures 220 a can comprise circular holes (see FIG. 3C described below).
- An integrated circuit (IC) die 215 has a bottomside and a topside including circuitry 223 connected to bond pads 216 having solder balls 219 on the bond pads 216 mounted flipped with its topside onto the top metal frame portion 210 .
- a die attach material (e.g., an epoxy material) 218 is between the bottomside of the IC die 215 and the bottom metal frame portion 220 for securing the IC die 215 to the bottom metal frame portion 220 .
- Underfill 237 is also shown.
- the top metal frame portion 210 is aligned to the bottom metal frame portion 220 so that the protruding features 225 are aligned to the apertures 220 a.
- the protruding features 225 are sufficiently long to penetrate into, and generally through the full thickness of the apertures 225 a.
- a mold compound (e.g., an epoxy) 230 encapsulates the flip chip on leadframe package 200 except for the bottom of the bottom metal frame portion 220 being exposed to enable an electrical and/or enhanced thermal contact to be made.
- FIG. 2B is a cross sectional depiction of an example flip chip on leadframe package 250 including a disclosed LDLF before singulation, where the protruding features 225 ′ are in the form a linear frame extending from the top metal frame portion 210 (see FIG. 5B described below) which are bent after being inserted through the apertures 220 a.
- the apertures 220 a can comprise a longitudinal hole (see FIG. 5C described below).
- FIGS. 3A-D is a top view depiction of a top side of a leadframe sheet 300 , a close up on a section 310 of the bottom side of the top metal frame portion showing button shaped protruding features 325 including necking, a section 320 of a bottom metal frame portion having apertures comprising circular holes 320 a, and in FIG. 3D a depiction 330 of the sections in FIG. 3B and FIG. 3C after being locked together, respectively, demonstrating button mating according to an example embodiment.
- Routing 337 is shown on the top side of the top metal frame portion that enables connection between components such as passive devices (e.g., capacitors) and the leads 341 of the leadframe.
- Pilot holes 319 are shown for aligning the top metal frame portion and a bottom metal frame portion.
- the circular holes 320 a on bottom frame portion enable the button shaped protruding features 325 including necking to lock together as shown in FIG. 3D .
- the leadframe sheet 300 includes eight (8) top metal frame portions as an example only.
- FIGS. 4A-D is a top view depiction of a top side of a leadframe sheet 400 , a close up on a section 410 of the bottom side of the top metal frame portion showing a “U” shape feature 425 with side necking, a section 420 of a bottom metal frame portion having apertures 420 a comprising circular holes, and in FIG. 4D a depiction 430 of the sections in FIG. 4B and FIG. 4C after being locked together, respectively, demonstrating “U” shape mating, according to an example embodiment. Apertures 420 a on the bottom metal frame enables the “U” shape features 425 on the top metal frame to lock together.
- the leadframe sheet 400 includes eight (8) top metal frame portions as an example only.
- FIGS. 5A-D is a top view depiction of a top side of a leadframe sheet 500 , a close up on a section 510 of the bottom side of the top metal frame portion showing a linear frame feature 525 , a section 520 of a bottom metal frame portion having apertures 520 a comprising a longitudinal hole, and in FIG. 5D a depiction 530 of the sections in FIG. 5B and FIG. 5C after being locked together, respectively, demonstrating stapler mating according to an example embodiment.
- the linear frame features 525 are shown in FIG. 5B in a rectangular shape.
- the longitudinal hole shaped apertures 520 a on bottom frame enable the linear frame feature 525 to enter the apertures 520 a and then be bent as shown in FIG. 5D (analogous to a staple) to lock the linear frame feature 525 on the top metal frame portion and the apertures 520 a on the bottom metal frame portion together.
- the leadframe sheet 500 includes eight (8) top metal frame portions as an example only.
- FIG. 6 is a depiction of an example flip chip on a leadframe package 600 after singulation.
- the top metal frame portion 210 is shown including components 633 , 634 , 635 and 636 which are connected by routing 337 on top metal frame portion 210 for coupling to the lead fingers 618 .
- the side of the top metal frame portion 210 opposite the components 633 - 636 has an IC mounted thereto, and there is a bottom metal frame portion thereunder.
- Advantages of disclosed embodiments include the protrusion features on the top metal frame portion with necking locking together to secure the top and bottom metal frame portions together during assembly.
- Disclosed leadframe locking avoid leadframes from moving in the X and Y direction (along the plane of the leadframes) during assembly processing, and helps ensure no separation between the top and bottom metal frame portions in the Z direction.
- Disclosed leadframes having mated metal frames portions are rigid and stable ensuring essentially no misalignment of leadframes from subsequent assembly processes, and thus a significant reduction in rejected devices for lack of solder ball attachment to the wire bond pads of the leadframe causing electrical opens.
- Disclosed embodiments can be integrated into a variety of assembly flows to form a variety of different semiconductor integrated circuit (IC) devices and related products.
- the assembly can comprise single semiconductor die or multiple semiconductor die, such as package-on-package (PoP) configurations comprising a plurality of stacked semiconductor die.
- the semiconductor die may include various elements therein and/or layers thereon, including barrier layers, dielectric layers, device structures, active elements and passive elements including source regions, drain regions, bit lines, bases, emitters, collectors, conductive lines, conductive vias, etc.
- the semiconductor die can be formed from a variety of processes including bipolar, CMOS, BiCMOS and MEMS.
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Abstract
Description
- Disclosed embodiments relate to flip chip on leadframe packages.
- Leadframe packages are well known and widely used in the electronics industry to house, mount, and interconnect a variety of different integrated circuits (ICs). A conventional leadframe is typically die-stamped from a sheet of flat-stock metal, and includes a plurality of metal leads temporarily held together in a planar arrangement about a central region during package manufacture by a rectangular frame including a plurality of expendable “dam-bars.” A mounting die pad for a semiconductor die is supported in the central region by “tie-bars” that attach to the frame. The leads extend from a first end integral with the frame to an opposite second end adjacent to, but spaced apart from the die pad.
- In a flip chip on leadframe package, an IC die having solder bumps on its bond pads on the topside of the die is flipped (topside/circuit side) onto a leadframe, where the die is bonded to the die pad and is electrically coupled to the wire bond pads through re-flowing of the solder bumps. One problem with flip chip on leadframe packages resulting in rejected devices is lack of solder ball attachment to the wire bond pads of the leadframe causing electrical opens which can occur due to lack of leadframe co-planarity. One solution to this problem involves increasing the solder ball size which can help somewhat to resolve this issue. However, increasing the solder ball size has disadvantages including an increased incidence of solder ball collapse and solder smearing which each can cause yield loss.
- Disclosed embodiments include a locking dual leadframe (LDLF) which includes a top metal frame portion including a die pad and protruding features and a bottom metal frame portion having apertures positioned lateral to the die pad area sized and positioned so that when the frame portions are pressed together the protruding features penetrate into the apertures to enable a locking feature. The locking feature resists loss of planarity during assembly which helps solve the solder ball detach problem for flip chip on lead package technology caused by lack of leadframe co-planarity noted for known conventional LFs.
- Disclosed embodiments recognize the lack of leadframe coplanarity for flip chip on leadframe packages is generally due to leadframe warpage as the leadframe goes through several heated reflow processes. Also, leadframe sheet handing during transfer for each different process during assembly can lead to a loss of leadframe co planarity. With flip chip on leadframe packages having disclosed leadframes including disclosed locking feature(s), warpage is minimized or at least the warpage on the top and bottom metal frame portions is in same direction, so the assembly stack components within the later formed molded package will remain essentially intact during the pre-molding assembly steps.
- Reference will now be made to the accompanying drawings, which are not necessarily drawn to scale, wherein:
-
FIG. 1 is a flow chart that shows steps in an example method of assembling a flip chip on a leadframe package using a disclosed LDLF, according to an example embodiment. -
FIG. 2A is a cross sectional depiction of an example flip chip on leadframe package including a disclosed LDLF before singulation, according to an example embodiment. -
FIG. 2B is a cross sectional depiction of another example flip chip on leadframe package including a disclosed LDLF before singulation, according to an example embodiment. -
FIGS. 3A-D is a top view depiction of a top side of a leadframe sheet, a close up on a section of the bottom side of the top metal frame portion showing button shaped protruding features including necking, a section of a bottom metal frame portion having apertures comprising circular holes, and a depiction inFIG. 3D of the sections shown inFIG. 3B andFIG. 3C after being locked together, respectively, demonstrating button mating, according to an example embodiment. -
FIGS. 4A-D is a top view depiction of a top side of a leadframe sheet, a close up on a section of the bottom side of the top metal frame portion showing a “U” shape feature with side necking, asection 420 of a bottom metal frame portion having apertures comprising circular holes, and a depiction inFIG. 4D of the sections inFIG. 4B andFIG. 4C after being locked together, respectively, demonstrating “U” shape mating, according to an example embodiment. -
FIGS. 5A-D is a top view depiction of a top side of a leadframe sheet, a close up on a section of the bottom side of the top metal frame portion showing a linear frame feature, a section of a bottom metal frame portion having apertures a comprising a longitudinal hole, and a depiction inFIG. 5D of the sections inFIG. 5B andFIG. 5C after being locked together, respectively, demonstrating stapler mating, according to an example embodiment. -
FIG. 6 is a depiction of an example flip chip on a leadframe package after singulation. - Example embodiments are described with reference to the drawings, wherein like reference numerals are used to designate similar or equivalent elements. Illustrated ordering of acts or events should not be considered as limiting, as some acts or events may occur in different order and/or concurrently with other acts or events. Furthermore, some illustrated acts or events may not be required to implement a methodology in accordance with this disclosure.
-
FIG. 1 is a flow chart that shows steps in anexample method 100 of assembling a flip chip on a leadframe package using a disclosed LDLF, according to an example embodiment.Step 101 comprises providing a LDLF including a top metal frame portion including a die pad and protruding features and a bottom metal frame portion having apertures positioned lateral to an area of the die pad. The protruding features and apertures are similarly sized and alignable so that when the top metal frame portion is pressed together with the bottom metal frame portion the protruding features penetrate the apertures to permit locking together. The top metal frame portion and bottom metal frame portion are generally both parts of leadframe sheets including a plurality of frame portions. The top metal frame portion and bottom metal frame portion can both including optional metal plating layers. - The protruding features are generally part of top metal frame portion which can be formed through a metal stamping process, so that the protruding feature are an integral part of the top metal leadframe portion. The protruding features are generally slightly smaller in area as compared to the apertures to permit fitting therethrough and longer than a thickness of the bottom metal frame portion. In one particular embodiment the top metal frame portion and bottom metal frame portion are both about 7 to 9 mm thick, and the protruding features are about 20 mm long.
-
Step 102 comprises mounting a flipped integrated circuit (IC) die having a bottomside and a topside including circuitry (including transistor(s)) connected to bond pads having solder balls on the bond pads with the topside down onto the die pad area of the top metal frame portion.Step 103 comprises aligning the top metal frame portion to the bottom metal frame portion so that the protruding features are aligned to the apertures. As described below (seepilot holes 319 inFIGS. 3A , 4A and 5A), the respective frame portions can include pilot holes located on top and bottom area of the frame portions which can be used for alignment (e.g., optical alignment) between the respective frame portions. -
Step 104 comprises pressing the bottomside of the IC die onto a top surface of the bottom metal frame portion having a die attach material thereon, wherein the protruding features penetrate into the apertures. A mechanical press can be used for the pressing along with optional heating. Subsequent assembly steps generally include reflowing the solder, molding with a mold material, then singulating the leadframe sheets into individual packaged devices. Singulation cuts around mold material, where the disclosed locking features are generally beyond the mold material and are thus removed by the singulation (e.g., see flip chip onleadframe package 600 inFIG. 6 described below). Embedding the locking features inside the packages is also possible, but when the top metal frame portion includes routing for adding discrete devices (e.g., passives) within the package, such as depicted inFIG. 6 , this arrangement may reduce the routing possibilities as it will consume some area that otherwise can be used for routing lines. -
FIG. 2A is a cross sectional depiction of an example flip chip onleadframe package 200 including a disclosed LDLF before singulation, according to an example embodiment. The LDLF includes a topmetal frame portion 210 including protrudingfeatures 225 being button shaped including necking (seeFIG. 3B described below) and adie pad area 210 a, and a bottommetal frame portion 220 havingapertures 220 a positioned lateral to thedie pad area 210 a sized and alignable so that when the topmetal frame portion 210 is pressed together with the bottommetal frame portion 220 the protruding features penetrate into theapertures 220 a. In this embodiment theapertures 220 a can comprise circular holes (seeFIG. 3C described below). - An integrated circuit (IC) die 215 has a bottomside and a
topside including circuitry 223 connected to bondpads 216 havingsolder balls 219 on thebond pads 216 mounted flipped with its topside onto the topmetal frame portion 210. A die attach material (e.g., an epoxy material) 218 is between the bottomside of the IC die 215 and the bottommetal frame portion 220 for securing the IC die 215 to the bottommetal frame portion 220.Underfill 237 is also shown. - The top
metal frame portion 210 is aligned to the bottommetal frame portion 220 so that the protruding features 225 are aligned to theapertures 220 a. The protruding features 225 are sufficiently long to penetrate into, and generally through the full thickness of the apertures 225 a. A mold compound (e.g., an epoxy) 230 encapsulates the flip chip onleadframe package 200 except for the bottom of the bottommetal frame portion 220 being exposed to enable an electrical and/or enhanced thermal contact to be made. -
FIG. 2B is a cross sectional depiction of an example flip chip onleadframe package 250 including a disclosed LDLF before singulation, where the protruding features 225′ are in the form a linear frame extending from the top metal frame portion 210 (seeFIG. 5B described below) which are bent after being inserted through theapertures 220 a. In this embodiment theapertures 220 a can comprise a longitudinal hole (seeFIG. 5C described below). -
FIGS. 3A-D is a top view depiction of a top side of aleadframe sheet 300, a close up on asection 310 of the bottom side of the top metal frame portion showing button shaped protruding features 325 including necking, asection 320 of a bottom metal frame portion having apertures comprisingcircular holes 320 a, and inFIG. 3D adepiction 330 of the sections inFIG. 3B andFIG. 3C after being locked together, respectively, demonstrating button mating according to an example embodiment. Routing 337 is shown on the top side of the top metal frame portion that enables connection between components such as passive devices (e.g., capacitors) and theleads 341 of the leadframe. -
Pilot holes 319 are shown for aligning the top metal frame portion and a bottom metal frame portion. Thecircular holes 320 a on bottom frame portion enable the button shaped protruding features 325 including necking to lock together as shown inFIG. 3D . Theleadframe sheet 300 includes eight (8) top metal frame portions as an example only. -
FIGS. 4A-D is a top view depiction of a top side of aleadframe sheet 400, a close up on asection 410 of the bottom side of the top metal frame portion showing a “U”shape feature 425 with side necking, asection 420 of a bottom metal frameportion having apertures 420 a comprising circular holes, and inFIG. 4D adepiction 430 of the sections inFIG. 4B andFIG. 4C after being locked together, respectively, demonstrating “U” shape mating, according to an example embodiment.Apertures 420 a on the bottom metal frame enables the “U” shape features 425 on the top metal frame to lock together. Theleadframe sheet 400 includes eight (8) top metal frame portions as an example only. -
FIGS. 5A-D is a top view depiction of a top side of aleadframe sheet 500, a close up on asection 510 of the bottom side of the top metal frame portion showing alinear frame feature 525, asection 520 of a bottom metal frameportion having apertures 520 a comprising a longitudinal hole, and inFIG. 5D adepiction 530 of the sections inFIG. 5B andFIG. 5C after being locked together, respectively, demonstrating stapler mating according to an example embodiment. The linear frame features 525 are shown inFIG. 5B in a rectangular shape. The longitudinal hole shapedapertures 520 a on bottom frame enable thelinear frame feature 525 to enter theapertures 520 a and then be bent as shown inFIG. 5D (analogous to a staple) to lock thelinear frame feature 525 on the top metal frame portion and theapertures 520 a on the bottom metal frame portion together. Theleadframe sheet 500 includes eight (8) top metal frame portions as an example only. -
FIG. 6 is a depiction of an example flip chip on aleadframe package 600 after singulation. The topmetal frame portion 210 is shown includingcomponents metal frame portion 210 for coupling to thelead fingers 618. Although not able to be shown inFIG. 6 , the side of the topmetal frame portion 210 opposite the components 633-636 has an IC mounted thereto, and there is a bottom metal frame portion thereunder. - Advantages of disclosed embodiments include the protrusion features on the top metal frame portion with necking locking together to secure the top and bottom metal frame portions together during assembly. Disclosed leadframe locking avoid leadframes from moving in the X and Y direction (along the plane of the leadframes) during assembly processing, and helps ensure no separation between the top and bottom metal frame portions in the Z direction. Disclosed leadframes having mated metal frames portions are rigid and stable ensuring essentially no misalignment of leadframes from subsequent assembly processes, and thus a significant reduction in rejected devices for lack of solder ball attachment to the wire bond pads of the leadframe causing electrical opens.
- Disclosed embodiments can be integrated into a variety of assembly flows to form a variety of different semiconductor integrated circuit (IC) devices and related products. The assembly can comprise single semiconductor die or multiple semiconductor die, such as package-on-package (PoP) configurations comprising a plurality of stacked semiconductor die. The semiconductor die may include various elements therein and/or layers thereon, including barrier layers, dielectric layers, device structures, active elements and passive elements including source regions, drain regions, bit lines, bases, emitters, collectors, conductive lines, conductive vias, etc. Moreover, the semiconductor die can be formed from a variety of processes including bipolar, CMOS, BiCMOS and MEMS. Those skilled in the art to which this disclosure relates will appreciate that many other embodiments and variations of embodiments are possible within the scope of the claimed invention, and further additions, deletions, substitutions and modifications may be made to the described embodiments without departing from the scope of this disclosure.
Claims (16)
Priority Applications (3)
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US14/017,800 US20150060123A1 (en) | 2013-09-04 | 2013-09-04 | Locking dual leadframe for flip chip on leadframe packages |
US15/645,272 US11056462B2 (en) | 2013-09-04 | 2017-07-10 | Locking dual leadframe for flip chip on leadframe packages |
US15/674,983 US10541225B2 (en) | 2013-09-04 | 2017-08-11 | Methods of assembling a flip chip on a locking dual leadframe |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US14/017,800 US20150060123A1 (en) | 2013-09-04 | 2013-09-04 | Locking dual leadframe for flip chip on leadframe packages |
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US15/645,272 Continuation US11056462B2 (en) | 2013-09-04 | 2017-07-10 | Locking dual leadframe for flip chip on leadframe packages |
US15/674,983 Division US10541225B2 (en) | 2013-09-04 | 2017-08-11 | Methods of assembling a flip chip on a locking dual leadframe |
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US20150060123A1 true US20150060123A1 (en) | 2015-03-05 |
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US14/017,800 Abandoned US20150060123A1 (en) | 2013-09-04 | 2013-09-04 | Locking dual leadframe for flip chip on leadframe packages |
US15/645,272 Active 2034-09-05 US11056462B2 (en) | 2013-09-04 | 2017-07-10 | Locking dual leadframe for flip chip on leadframe packages |
US15/674,983 Active US10541225B2 (en) | 2013-09-04 | 2017-08-11 | Methods of assembling a flip chip on a locking dual leadframe |
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US15/645,272 Active 2034-09-05 US11056462B2 (en) | 2013-09-04 | 2017-07-10 | Locking dual leadframe for flip chip on leadframe packages |
US15/674,983 Active US10541225B2 (en) | 2013-09-04 | 2017-08-11 | Methods of assembling a flip chip on a locking dual leadframe |
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US20170213781A1 (en) * | 2016-01-21 | 2017-07-27 | Texas Instruments Incorporated | Integrated circuit package |
US20190273040A1 (en) * | 2016-11-23 | 2019-09-05 | Abb Schweiz Ag | Manufacturing of a power semiconductor module |
US11417578B2 (en) * | 2014-05-21 | 2022-08-16 | Mitsubishi Electric Corporation | Semiconductor device, manufacturing apparatus for semiconductor device and manufacturing method for semiconductor device, and semiconductor module |
US11502045B2 (en) | 2019-01-23 | 2022-11-15 | Texas Instruments Incorporated | Electronic device with step cut lead |
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JP7382210B2 (en) * | 2019-11-15 | 2023-11-16 | 新光電気工業株式会社 | Wiring board, electronic device, and wiring board manufacturing method |
US11264310B2 (en) | 2020-06-04 | 2022-03-01 | Texas Instruments Incorporated | Spring bar leadframe, method and packaged electronic device with zero draft angle |
CN114944375B (en) * | 2022-05-23 | 2022-10-28 | 山东中清智能科技股份有限公司 | Power device packaging structure and preparation method thereof |
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Also Published As
Publication number | Publication date |
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US11056462B2 (en) | 2021-07-06 |
US20170345790A1 (en) | 2017-11-30 |
US10541225B2 (en) | 2020-01-21 |
US20170309595A1 (en) | 2017-10-26 |
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