US20140299908A1 - Light emitting diode package and method of fabricating the same - Google Patents
Light emitting diode package and method of fabricating the same Download PDFInfo
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- US20140299908A1 US20140299908A1 US14/267,985 US201414267985A US2014299908A1 US 20140299908 A1 US20140299908 A1 US 20140299908A1 US 201414267985 A US201414267985 A US 201414267985A US 2014299908 A1 US2014299908 A1 US 2014299908A1
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- emitting diode
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
-
- H01L33/62—
-
- H01L33/005—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2933/0016—
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- H01L2933/0033—
-
- H01L2933/0066—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/032—Manufacture or treatment of electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0364—Manufacture or treatment of packages of interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/8506—Containers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/851—Wavelength conversion means
- H10H20/8515—Wavelength conversion means not being in contact with the bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/858—Means for heat extraction or cooling
- H10H20/8585—Means for heat extraction or cooling being an interconnection
Definitions
- This invention relates to Light Emitting Diodes (LED), and, more particularly, to an LED assembly and a method of fabricating the same.
- LED Light Emitting Diodes
- LED light emitting diodes
- the LED chip is available in two configurations: (a) with both its +ve & ⁇ ve contact terminals (bond pads) on the same surface, shown as 10 in FIG. 1A ; (b) with its +ve & ⁇ ve contact terminals (bond pads) on the opposite surfaces, shown as 10 ′ in FIG. 1B .
- FIGS. 1A , 1 A′ and 1 B show three different interconnect approaches in typical LED packages 1 , 1 ′′ and 1 ′ according to the prior art.
- an LED chip 10 is disposed through an adhesive 102 on a substrate 12 having an inner circuit (not shown) and conductive pads 120 ; a wire bonding process is performed to electrically connect the electrode pads 100 of the LED chip 10 to the conductive pads 120 with gold wires 11 ; a light-pervious encapsulant 13 is formed on the substrate 12 for encapsulating the wire-bonded structure and a phosphor layer 14 is further formed over the light-pervious encapsulant 13 , in more than one form or combination with the option to dispose the LED package 1 on and electrically connected to a circuit board (not shown).
- metal electrodes also known as ‘bumps’
- the wire bonding process is eliminated and is replaced by ‘flip-chip interconnect’.
- metal electrodes also known as ‘bumps’
- the electrode pads 100 of the LED chip 10 are implanted on the electrode pads 100 of the LED chip 10 and are used to electrically connect the LED chip 10 on a substrate 12 having an inner circuit (not shown) to the conductive pads 120 .
- an LED chip 10 ′ is disposed through an electrically conductive adhesive 102 on a substrate 12 that has an inner circuit (not shown) and conductive pads 120 and 121
- An electrode pad 101 formed on a bottom side of the LED chip 10 ′ is electrically connected to the conductive pad 121 ; and a wire bonding process is performed to electrically connect an electrode pad 100 on a top side of the LED chip 10 ′ to the conductive pad 120 with a gold wire 11 .
- a light-pervious encapsulant 13 is formed on the substrate 12 for encapsulating the wire-bonded structure and a phosphor layer 14 is formed over the light-pervious encapsulant 13 in more than one form or combination with the option to dispose the LED package 1 on and electrically connected to a circuit board (not shown).
- the LED packages 1 and 1 ′ since the electrode pads 100 are electrically connected to the conductive pads 120 with the gold wires 11 , the substrate 12 that has the conductive pads 120 and 121 is needed for the conduction of the LED chips 10 and 10 ′. Therefore, the LED packages 1 and 1 ′ have an increased overall height due to the use of the substrate 12 having a thickness h and the arc-shaped gold wire 11 . However, in the LED packages 1 ′′ the height constraint due to the use of gold wires is eliminated, but the substrate still prevails.
- the conductive pads 120 and 121 of the substrate 12 have to be formed in accordance with the LED chips 10 and 10 ′ and the circuit board, and thus sizes and pitches thereof have to be adjusted from one product to another. As such, the LED packages 1 and 1 are costly to fabricate.
- the adhesive 102 needs to be disposed between the LED chips 10 and 10 ′ and the substrate 12 and the substrate 12 is generally made of ceramics or plastics, the LED chips 10 and 10 ′ have poor heat-dissipating efficacy.
- the present invention provides a method of fabricating an LED package, comprising: providing a light emitting diode (LED) chip having a first surface and a second surface opposing the first surface, and forming at least a first electrode pad on the first surface of the LED chip; and connecting at least a first lead of a metal frame to the at least a first electrode pad.
- LED light emitting diode
- the method further comprises disposing the light emitting diode (LED) package on a carrier component, forming on the carrier component a first light-pervious encapsulant that encapsulates the light emitting diode chip; and removing the carrier component.
- LED light emitting diode
- the present invention further provides a method of fabricating a metal frame.
- the present invention further provides an LED package, comprising: an LED chip having a first surface and a second surface opposing the first surface; at least a first electrode pad formed on the first surface of the LED chip; and a metal frame having at least a first lead electrically connected to the at least a first electrode pad.
- the at least a first lead each has a first end and a second end opposing the first end, and has a bended structure, allowing a height difference to exist between the first end and the second end and the light emitting diode chip to be received therein.
- the first lead has a first end connected to the first electrode pad and a second end opposing the first end, and a support layer that is metal is formed on the second end.
- an LED package according to the present invention a conductive metal frame or TAB tape is used as an electrical connection element, in place of a gold wire or added metal electrodes (bumps) used in the prior art. Therefore, the LED package does not need a substrate that is used to connect with the gold wire. Compared with an LED package according to the prior art, an LED package according to the present invention has a reduced thickness.
- an LED package according to the present invention costs less.
- the chip is now attached directly on the metal frame, the junction temperature of chip is lower due to improved heat-dissipating efficacy.
- FIGS. 1A , 1 A′ and 1 B are cross-sectional views of three different LED packages according to the prior art
- FIGS. 2A and 2B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 2 A′ is a stereogram of FIG. 2A , and FIG. 2 A′′ is another embodiment of FIG. 2A ;
- FIGS. 3A to 3B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 3 A′ is a stereogram of FIG. 3A ;
- FIGS. 4A-4C illustrates a novel method of fabricating a metal frame according to the present invention, wherein FIG. 4 A′ is a cross-sectional view along a cutting line 4 - 4 of FIG. 4A , FIG. 4 C′ is another embodiment of FIG. 4C , and FIG. 4 C′′ is a schematic diagram illustrating a chip disposed in a dent of the carrier component;
- FIG. 5 is a cross-sectional view of a metal frame fabricated through the use of a mold
- FIGS. 6A-6B illustrates a method of fabricating a light emitting diode package according to the present invention, wherein FIG. 6 A′ is a cross-sectional view along a cutting line 6 - 6 of FIG. 6A , and FIG. 6B-1 is another embodiment of FIG. 6A ; and
- FIGS. 7A , 7 B, and 7 C are schematic diagrams illustrating a metal frame electrically connected to a chip.”
- FIGS. 2A to 2C are cross-sectional views illustrating a method of fabricating a package of a first embodiment according to the present invention.
- the chip 20 is a light emitting diode (LED) chip, and has a first surface 20 a and a second surface 20 b opposing the first surface 20 a.
- a plurality of first electrode pads 200 are disposed on the first surface 20 a of the chip 20 .
- two first electrode pads 200 are disposed on the first surface 20 a of the chip 20 .
- the metal frame 21 or TAB tape 21 has a plurality of first leads 210 .
- the first leads 210 have first ends (hereinafter referred to as “inner ends 210 a ”) and second ends (hereinafter referred to as “outer ends 210 b ”) opposing the inner ends 210 a.
- Each of the first leads 210 has a bended structure, and the first end and the second end have a height difference.
- the inner end 210 a are connected to the first electrode pad 200 , and the outer end 210 b are used for connection of an external electronic device such as a circuit board.
- the plurality of first leads 210 form a dent structure for the chip 20 to be received therein.
- FIG. 2 A′ shows a modularized embodiment.
- the light emitting device structures 2 may be separated by cutting along a cutting line 2 A- 2 A, for facilitating the serial or parallel design.
- the plurality of first leads 210 may be coplanar, the first leads 210 may be disposed on connection pads 22 a of a carrier component 22 having a circuit, and the chip 20 is disposed on the first leads 210 .
- the chip 20 is thus installed on the carrier component 22 through the metal frame, such that the first leads 210 of the metal frame are disposed between the chip 20 and the carrier component 22 , and a first light-pervious encapsulant 23 a may be further formed to encapsulate the first leads 210 of the metal frame.
- a first light-pervious encapsulant 23 a may be further formed to encapsulate the first leads 210 of the metal frame.
- the thin enough LED chip 10 is easily cracked because a phosphor layer is adhered to the LED chip 10 , if an underfill (not shown) is not formed between the LED chip 10 and the substrate 12 .
- an underfill (not shown) is not formed between the LED chip 10 and the substrate 12 .
- the first leads 210 of the present invention are used as electrical connections, a high-density of phosphor layer may be formed on the chip 20 by an electrostatic charge process, without using the underfill. Therefore, a first light-pervious encapsulant is formed directly, and a package is thus obtained.
- the electrostatic charge process is preferably performed in a reduced-pressure or a vacuum environment, so as to deposit a substantially uniform phosphor layer on a surface of the chip 20 .
- the electrostatic charge process is detailed in U.S. Application No. 61/216,374 filed on May 15, 2009, U.S. Application No. 61/273,129 filed on Jul. 30, 2009, U.S. Application No. 61/284,792 filed on Dec. 26, 2009, U.S. application Ser. No. 12/587,290 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,281 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,291 filed on Oct. 5, 2009 and U.S. Application No. 61/322,866 filed on Apr. 11, 2010, which are incorporated herein for references.
- the uniform phosphor layer may be formed by forming electrostatic charges on the chip 20 or grounding the chip 20 , and moving the chip 20 to be close to and absorb the phosphor powder having opposite charges or particles formed by phosphor powder and a bonding material, so as to form the uniform phosphor layer.
- the phosphor powder may contain no charge, and the chip 20 has charges, in order to form the uniform phosphor layer.
- the electrostatic charge process is performed in a non-liquid environment. In other words, the deposition process does not need to maintain and suffer from the uniform distribution of the phosphor powder and the boding agent in the liquid suspension.
- the phosphor powder and the bonding material are formed on the surface of the chip 20 , respectively. Therefore, the electrostatic charge process may accurately control the encapsulating density of the phosphor powder and the layer thickness.
- the previous mentioned “particles formed by the phosphor powder and bonding material” may be a mixture having phosphor powder and bonding material or another mixture having phosphor powder encapsulated by bonding material, and the phosphor powder occupies more than 75% of the volume of the phosphor layer.
- the uniform phosphor layer comprises phosphor powder constituted by a plurality of phosphor particles
- the phosphor particles of the phosphor layer occupy more than 75% of the volume of the phosphor layer.
- a bonding layer (having a thickness less than 10 ⁇ m) is further formed on the uniform phosphor layer after the electrostatic charge process.
- the bonding layer may be silicone, epoxy resin, glass, softens or any suitable material applicable to an LED package, such as Parylene, which has excellent anti-moisture property and can prevent the phosphor hr LED from being degraded in a humid/hot environment.
- FIG. 2B which illustrates a method of electrically connecting first leads 210 and forming a first-light pervious component 23 a.
- the second surface 20 b of the chip 20 is disposed on the carrier component 22 through an adhesive 220 .
- the first leads 210 shown in FIG. 2A are electrically connected to the first electrode pads 200 and the connection pads 220 .
- the first light-pervious encapsulant 23 a is disposed on the carrier component 22 to encapsulate the chip 20 and the first lead 210 , a uniform phosphor layer 24 is, optionally, formed on the first light-pervious encapsulant 23 a to cover the first surface 20 a of the chip 20 , and the first light-pervious encapsulant 23 a is disposed between the uniform phosphor layer 24 and the chip 20 .
- the uniform phosphor layer 24 comprises phosphor powder and a bonding material, and the phosphor powder occupies more than 75% of a volume of the uniform phosphor layer 24 .
- the phosphor layer may also be formed on a surface of the chip.
- the phosphor is used to convert or change the wavelength of light emitted by an LED, for example.
- the phosphor includes YAG, TAG, ZnSeS, and SiAlON such as ⁇ -SiALON.
- any material may be used as the phosphor material, as long as it can convert the wavelength of incident light.
- the term “phosphor” used herein indicates all materials that convert or change a wavelength to another wavelength, and includes compound or composition of different wavelength-converting materials.
- the phosphor since being in a powder form, is also called phosphor powder.
- the phosphor powder is composed of a plurality of phosphor particles.
- the metal frame 21 is used to replace the gold wire used in the prior art.
- the semiconductor package 2 does not include a substrate that is used to electrically connect the gold wire, and has a reduced overall height.
- FIGS. 3A and 3B are cross-sectional views illustrating a method of fabricating a semiconductor package of a second embodiment according to the present invention.
- the second embodiment differs from the first embodiment in locations of the electrode pads of the chip and the structure of the metal frame.
- a plurality of second electrode pads 201 are further disposed on the second surface 20 b of the chip 20 ′, and a metal frame 21 ′ further comprises a plurality of second leads 211 having top surfaces 211 a connected to the second electrode pads 201 .
- the second leads 211 may be connected to the second electrode pads 201 through an adhesive 212 .
- the second leads 211 are connected to the connection pads 22 b of the carrier component 22 , then the chip 20 ′ is disposed on the second leads 211 through the encapsulant 220 , the first leads shown in FIG. 2A are electrically connected to the first electrode pads 200 and the connection pads 22 a, and the first light-pervious encapsulant 23 a and the uniform phosphor layer 24 are formed sequentially.
- the metal frame 21 ′ is made of a metal material, which can provide a good enough heat-dissipating path.
- the second surface 20 b of the chip 20 ′ has an improved heat-dissipating efficacy.
- the light emitting device 2 , 2 ′ has: a chip 20 , 20 ′ having a first surface 20 a and a second surface 20 b opposing the first surface 20 a, and a metal frame 21 , 21 ′ having first leads 210 .
- the light emitting device 2 , 2 ′ may further comprise a first light-pervious encapsulant 23 a that encapsulates the chip 20 , 20 ′, and a uniform phosphor layer 24 formed on the first light-pervious encapsulant 23 a.
- the chip 20 , 20 ′ is a light emitting diode chip, and first electrode pads 200 are formed on the first surface 20 a.
- Each of the first leads 210 of the metal frame 21 , 21 ′ has an inner end 210 a connected to one of the electrode pads 200 and an outer end 210 b connected to an electronic device such as a circuit board (not shown).
- the second surface 20 b of the chip 20 , 20 ′ is exposed from the first light-pervious encapsulant 23 a.
- second electrode pads 201 are formed on the second surface 20 b of the chip 20 ′, and the metal frame 21 ′ further has second leads 211 for electrical connection of the exposed second electrode pads 201 .
- the uniform phosphor layer 24 covers the chip 20 , 20 ′, and the first light-pervious encapsulant 23 a is formed between the uniform phosphor layer 24 and the chip 20 , 20 ′.
- the uniform phosphor layer may be formed between the first light-pervious encapsulant 23 a and the chip 20 , 20 ′, or formed on the second surface 20 b of the chip 20 (not shown).
- the uniform phosphor layer 24 comprises phosphor powder and bonding material, and the phosphor powder occupies more than 75% of the volume of the uniform phosphor layer 24 .
- the uniform phosphor layer 24 may comprise phosphor powder composed of a plurality of phosphor particles, and the phosphor particles occupy more than 75% of the volume of the uniform phosphor layer.
- FIGS. 4A to 4C illustrate a method of fabricating a metal frame.
- FIG. 4 A′ is a cross-sectional view of the metal frame along a cutting line 4 - 4 of FIG. 4A .
- the metal frame is made by: forming on a substrate 40 a leaf of metal layer 410 having a first end 410 a and a second end 410 b opposing the first end 410 a; and forming on the first end 410 a and second end 411 b of the metal layer 410 conductive elements 410 c , 410 c ′ made of conductive materials (for example: nickel, gold/tin or the combination thereof), such that the metal layer 410 and the conductive element 410 c constitute a first lead 41 .
- the metal layer 410 may be formed by screen printing or other conventional plating or etching techniques.
- the substrate 40 is bended and reversed, such that the first end 410 a and the second end 410 b have a height difference, as shown in FIG. 4C , and the conductive element 410 c of the first lead 41 is electrically connected to the first electrode pad 420 of the light emitting diode chip 42 ; and the substrate 40 is removed.
- the substrate is an organic substrate, such as polyimide or other cheaper and softer polymer such as polyethylene, as long as the bonding force of the substrate and the metal layer does not affect the separation thereof.
- a support layer 43 is formed on the substrate, as shown in FIG. 4A .
- the substrate is not bended, and may be removed after the first lead 41 is connected to the first electrode pad 420 .
- a first light-pervious encapsulant 44 that encapsulates the metal frame may be formed on the substrate before the substrate is removed, as shown in FIG. 4 C′.
- a conductive element 410 c ′ made of nickel, gold/tin or the combination thereof is also formed on a second end 410 b of a leaf of metal layer 410 .
- the present invention is not limited to the embodiment of FIG. 4 C′′ in which the conductive component 410 c ′ is formed on the metal layer 410 .
- the metal layer 410 is not bended.
- the chip 42 is disposed in a dent 450 of a carrier component, and the metal layer 410 that acts as a first lead comprises a first end 410 a electrically connected to a first electrode pad 420 and a second end 410 b opposing the first end 410 a and electrically connected to the carrier component 45 . Since the metal layer 410 is stiffer than a solder wire and has a certain flexibility, a broader dimension tolerance, e.g., a vertical drop between the chip 42 and the dent 450 , may be provided.
- FIG. 5 illustrates another method of fabricating the metal frame.
- the method comprises: forming on a mold 50 at least a leaf of metal layer 510 having a first end 510 a and a second end 510 b opposing the first end 510 a, wherein the first end 510 a and the second end 510 b have a height difference due to the shape of the mold 50 ; forming a conductive element 510 c on the first end 510 a of the metal layer 510 , such that the metal layer 510 and the conductive element 510 c constitute the first lead 51 ; electrically connecting the conductive element 510 c of the first lead 51 to the first electrode 520 ; and removing the mold 50 .
- FIGS. 6A and 6B another method of fabricating a light emitting diode package of an embodiment according to the present invention is illustrated.
- the metal frame is formed on a support layer 60 having a plurality of opening areas 600 .
- the support layer 60 is made of metal or polymer such as polyimide.
- At least a portion of the first lead 61 is exposed from the opening area 600 .
- the first lead 61 has a first end 610 a and a second end 610 b opposing the first end 610 a.
- the exposed first end 610 a is connectible to the first electrode pad of the light emitting diode chip, and the second end 610 b is exposed from the opening area 600 .
- Said opening areas 600 could prevent the support layer 60 from being contacted with a heater during reflow process.
- the support layer 60 and the first lead 61 are bended, and the first electrode pad 620 of the light emitting diode chip 62 is formed on the first end 610 a.
- the first end 610 a and second end 610 b are respectively formed with conductive elements 610 c, 610 c ′.
- the support layer may be peeled off so as to obtain a plurality of light emitting devices.
- conductive elements 610 c, 610 c ′ are respectively formed on the top surface of the first end 610 a and bottom surface of the second end 610 b before the light emitting diode chip 62 is disposed on the first end 610 a.
- the first lead 61 has a first end 610 a connected to the first electrode pad 620 and a second end 610 b opposing the first end 610 a, and the conductive element 610 c and support layer 60 are positioned on the same surface.
- FIGS. 7A , 7 B, and 7 C schematic diagrams illustrating a metal frame electrically connected to a chip in a serial manner according to the present invention are shown.
- a plurality of chips 70 are disposed on a carrier component 72 , each of the chips 70 has a plurality of first electrode pads 700 , and connection pads 720 are formed on the carrier component 72 adjacent the chips 70 .
- the metal frame of the present invention has a plurality of first leads 710 , each of which has a first end 710 a electrically connected to one of the first electrode pads 700 and a second end 710 b electrically connected to one of the connection pads 720 of the carrier component 72 .
- each of the formed first leads 710 ′ has two ends 711 a and 711 b serially electrically connected to the chips 70 , respectively.
- a serial structure of the plurality of chips 70 and carrier component 72 is achieved as long as the second end 710 b of one of the first leads 710 on one of the chips 70 is connected to one of the connection pads 720 of the carrier component 72 .
- Each of the first leads 710 has a first end 710 a electrically connected to the top surface of the chip 70 and a second end 710 b electrically connected to the bottom surface of the chip 70 .
- a metal frame is used to carry a chip and to electrically connect a circuit board. Therefore, the semiconductor package does not need a substrate installed or conduct a wire bonding process. The semiconductor package thus has a reduced height.
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- Led Device Packages (AREA)
Abstract
A light emitting diode package and a method of fabricating the same. The package includes a light emitting diode chip having a first surface and a second surface opposing the first surface, a metal frame (or TAB tape) having leads connected to the light emitting diode chip, and a light-pervious encapsulant encapsulating the light emitting diode chip, wherein the second surface of the chip is exposed from the first light-pervious encapsulant. The metal frame (or TAB tape) connects the light emitting diode chip to an external circuit board. The LED package does not need wire-bonding process. A method of fabricating a light emitting diode package is also provided.
Description
- This application is a Division of application Ser. No. 13/401,347 filed Feb. 21, 2012, the entire contents of which are incorporated herein by reference.
- 1. Field of the Invention
- This invention relates to Light Emitting Diodes (LED), and, more particularly, to an LED assembly and a method of fabricating the same.
- 2. Description of Related Art
- With the progress of electronic industry and the advent of digital age, electronic products are designed to have a variety of functionalities. In recent years, eco-friendly electronic products such as light emitting diodes (LED) come to the market.
- The LED chip is available in two configurations: (a) with both its +ve & −ve contact terminals (bond pads) on the same surface, shown as 10 in
FIG. 1A ; (b) with its +ve & −ve contact terminals (bond pads) on the opposite surfaces, shown as 10′ inFIG. 1B . As the LED technology is advancing, several packaging and architectures are now available accommodating both these configurations.FIGS. 1A , 1A′ and 1B show three different interconnect approaches intypical LED packages - As shown in
FIG. 1A , in the fabrication of theLED package 1 anLED chip 10 is disposed through an adhesive 102 on asubstrate 12 having an inner circuit (not shown) andconductive pads 120; a wire bonding process is performed to electrically connect theelectrode pads 100 of theLED chip 10 to theconductive pads 120 withgold wires 11; a light-pervious encapsulant 13 is formed on thesubstrate 12 for encapsulating the wire-bonded structure and aphosphor layer 14 is further formed over the light-pervious encapsulant 13, in more than one form or combination with the option to dispose theLED package 1 on and electrically connected to a circuit board (not shown). - As shown in FIG. 1A′, in the fabrication of the
LED package 1″ the wire bonding process is eliminated and is replaced by ‘flip-chip interconnect’. In this case metal electrodes (also known as ‘bumps’) are implanted on theelectrode pads 100 of theLED chip 10 and are used to electrically connect theLED chip 10 on asubstrate 12 having an inner circuit (not shown) to theconductive pads 120. - In the fabrication of the
LED package 1′ shown inFIG. 1B , anLED chip 10′ is disposed through an electricallyconductive adhesive 102 on asubstrate 12 that has an inner circuit (not shown) andconductive pads electrode pad 101 formed on a bottom side of theLED chip 10′ is electrically connected to theconductive pad 121; and a wire bonding process is performed to electrically connect anelectrode pad 100 on a top side of theLED chip 10′ to theconductive pad 120 with agold wire 11. A light-pervious encapsulant 13 is formed on thesubstrate 12 for encapsulating the wire-bonded structure and aphosphor layer 14 is formed over the light-pervious encapsulant 13 in more than one form or combination with the option to dispose theLED package 1 on and electrically connected to a circuit board (not shown). - In the
LED packages electrode pads 100 are electrically connected to theconductive pads 120 with thegold wires 11, thesubstrate 12 that has theconductive pads LED chips LED packages substrate 12 having a thickness h and the arc-shaped gold wire 11. However, in theLED packages 1″ the height constraint due to the use of gold wires is eliminated, but the substrate still prevails. - Moreover, the
conductive pads substrate 12 have to be formed in accordance with theLED chips LED packages - Because the
adhesive 102 needs to be disposed between theLED chips substrate 12 and thesubstrate 12 is generally made of ceramics or plastics, theLED chips - Therefore, how to overcome the problems of the prior art is becoming one of the critical issues in the art.
- In view of the above-mentioned problems of the prior art, the present invention provides a method of fabricating an LED package, comprising: providing a light emitting diode (LED) chip having a first surface and a second surface opposing the first surface, and forming at least a first electrode pad on the first surface of the LED chip; and connecting at least a first lead of a metal frame to the at least a first electrode pad.
- The method further comprises disposing the light emitting diode (LED) package on a carrier component, forming on the carrier component a first light-pervious encapsulant that encapsulates the light emitting diode chip; and removing the carrier component.
- The present invention further provides a method of fabricating a metal frame.
- According to the previously described method, the present invention further provides an LED package, comprising: an LED chip having a first surface and a second surface opposing the first surface; at least a first electrode pad formed on the first surface of the LED chip; and a metal frame having at least a first lead electrically connected to the at least a first electrode pad.
- In an embodiment, the at least a first lead each has a first end and a second end opposing the first end, and has a bended structure, allowing a height difference to exist between the first end and the second end and the light emitting diode chip to be received therein. Alternatively, the first lead has a first end connected to the first electrode pad and a second end opposing the first end, and a support layer that is metal is formed on the second end.
- In an LED package according to the present invention, a conductive metal frame or TAB tape is used as an electrical connection element, in place of a gold wire or added metal electrodes (bumps) used in the prior art. Therefore, the LED package does not need a substrate that is used to connect with the gold wire. Compared with an LED package according to the prior art, an LED package according to the present invention has a reduced thickness.
- In the fabrication of an LED package according to the present invention, a conductive metal frame is disposed on a circuit board, and a substrate having a conductive pad is no longer needed. Therefore, an LED package according to the present invention costs less.
- the chip is now attached directly on the metal frame, the junction temperature of chip is lower due to improved heat-dissipating efficacy.
- The invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:
-
FIGS. 1A , 1A′ and 1B are cross-sectional views of three different LED packages according to the prior art; -
FIGS. 2A and 2B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 2A′ is a stereogram ofFIG. 2A , and FIG. 2A″ is another embodiment ofFIG. 2A ; -
FIGS. 3A to 3B are cross-sectional views illustrating a method of fabricating an LED package of a first embodiment according to the present invention, wherein FIG. 3A′ is a stereogram ofFIG. 3A ; - Besides the standard methods existing per prior art,
FIGS. 4A-4C illustrates a novel method of fabricating a metal frame according to the present invention, wherein FIG. 4A′ is a cross-sectional view along a cutting line 4-4 ofFIG. 4A , FIG. 4C′ is another embodiment ofFIG. 4C , and FIG. 4C″ is a schematic diagram illustrating a chip disposed in a dent of the carrier component; -
FIG. 5 is a cross-sectional view of a metal frame fabricated through the use of a mold; -
FIGS. 6A-6B illustrates a method of fabricating a light emitting diode package according to the present invention, wherein FIG. 6A′ is a cross-sectional view along a cutting line 6-6 ofFIG. 6A , andFIG. 6B-1 is another embodiment ofFIG. 6A ; and -
FIGS. 7A , 7B, and 7C are schematic diagrams illustrating a metal frame electrically connected to a chip.” - The following illustrative embodiments are provided to illustrate the disclosure of the present invention, these and other advantages and effects can be apparently understood by those in the art after reading the disclosure of this specification. The present invention can also be performed or applied by other different embodiments. The details of the specification may be on the basis of different points and applications, and numerous modifications and variations can be devised without departing from the spirit of the present invention.
-
FIGS. 2A to 2C are cross-sectional views illustrating a method of fabricating a package of a first embodiment according to the present invention. - As shown in FIGS. 2A and 2A′, a
chip 20 and ametal frame 21 are provided. Thechip 20 is a light emitting diode (LED) chip, and has afirst surface 20 a and asecond surface 20 b opposing thefirst surface 20 a. A plurality offirst electrode pads 200 are disposed on thefirst surface 20 a of thechip 20. For instance, twofirst electrode pads 200 are disposed on thefirst surface 20 a of thechip 20. - The
metal frame 21 orTAB tape 21 has a plurality of first leads 210. The first leads 210 have first ends (hereinafter referred to as “inner ends 210 a”) and second ends (hereinafter referred to as “outer ends 210 b”) opposing the inner ends 210 a. Each of the first leads 210 has a bended structure, and the first end and the second end have a height difference. Theinner end 210 a are connected to thefirst electrode pad 200, and theouter end 210 b are used for connection of an external electronic device such as a circuit board. The plurality offirst leads 210 form a dent structure for thechip 20 to be received therein. FIG. 2A′ shows a modularized embodiment. The light emittingdevice structures 2 may be separated by cutting along acutting line 2A-2A, for facilitating the serial or parallel design. - As shown in FIG. 2A″, the plurality of
first leads 210 may be coplanar, the first leads 210 may be disposed onconnection pads 22 a of acarrier component 22 having a circuit, and thechip 20 is disposed on the first leads 210. Thechip 20 is thus installed on thecarrier component 22 through the metal frame, such that the first leads 210 of the metal frame are disposed between thechip 20 and thecarrier component 22, and a first light-pervious encapsulant 23 a may be further formed to encapsulate the first leads 210 of the metal frame. Unlike the convention flip-chip structure shown in FIG. 1A′, the thinenough LED chip 10 is easily cracked because a phosphor layer is adhered to theLED chip 10, if an underfill (not shown) is not formed between theLED chip 10 and thesubstrate 12. However, if the first leads 210 of the present invention are used as electrical connections, a high-density of phosphor layer may be formed on thechip 20 by an electrostatic charge process, without using the underfill. Therefore, a first light-pervious encapsulant is formed directly, and a package is thus obtained. - The electrostatic charge process is preferably performed in a reduced-pressure or a vacuum environment, so as to deposit a substantially uniform phosphor layer on a surface of the
chip 20. The electrostatic charge process is detailed in U.S. Application No. 61/216,374 filed on May 15, 2009, U.S. Application No. 61/273,129 filed on Jul. 30, 2009, U.S. Application No. 61/284,792 filed on Dec. 26, 2009, U.S. application Ser. No. 12/587,290 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,281 filed on Oct. 5, 2009, U.S. application Ser. No. 12/587,291 filed on Oct. 5, 2009 and U.S. Application No. 61/322,866 filed on Apr. 11, 2010, which are incorporated herein for references. - For example, the uniform phosphor layer may be formed by forming electrostatic charges on the
chip 20 or grounding thechip 20, and moving thechip 20 to be close to and absorb the phosphor powder having opposite charges or particles formed by phosphor powder and a bonding material, so as to form the uniform phosphor layer. Of course, the phosphor powder may contain no charge, and thechip 20 has charges, in order to form the uniform phosphor layer. Unlike the conventional electro-chemical charge process in a slurry environment, the electrostatic charge process is performed in a non-liquid environment. In other words, the deposition process does not need to maintain and suffer from the uniform distribution of the phosphor powder and the boding agent in the liquid suspension. By contrast, in some embodiments the phosphor powder and the bonding material are formed on the surface of thechip 20, respectively. Therefore, the electrostatic charge process may accurately control the encapsulating density of the phosphor powder and the layer thickness. The previous mentioned “particles formed by the phosphor powder and bonding material” may be a mixture having phosphor powder and bonding material or another mixture having phosphor powder encapsulated by bonding material, and the phosphor powder occupies more than 75% of the volume of the phosphor layer. - When the uniform phosphor layer comprises phosphor powder constituted by a plurality of phosphor particles, the phosphor particles of the phosphor layer occupy more than 75% of the volume of the phosphor layer. A bonding layer (having a thickness less than 10 μm) is further formed on the uniform phosphor layer after the electrostatic charge process. The bonding layer may be silicone, epoxy resin, glass, softens or any suitable material applicable to an LED package, such as Parylene, which has excellent anti-moisture property and can prevent the phosphor hr LED from being degraded in a humid/hot environment.
- Refer to
FIG. 2B , which illustrates a method of electrically connectingfirst leads 210 and forming a first-lightpervious component 23 a. Thesecond surface 20 b of thechip 20 is disposed on thecarrier component 22 through an adhesive 220. Then, the first leads 210 shown inFIG. 2A are electrically connected to thefirst electrode pads 200 and theconnection pads 220. Then, the first light-pervious encapsulant 23 a is disposed on thecarrier component 22 to encapsulate thechip 20 and thefirst lead 210, auniform phosphor layer 24 is, optionally, formed on the first light-pervious encapsulant 23 a to cover thefirst surface 20 a of thechip 20, and the first light-pervious encapsulant 23 a is disposed between theuniform phosphor layer 24 and thechip 20. - The
uniform phosphor layer 24 comprises phosphor powder and a bonding material, and the phosphor powder occupies more than 75% of a volume of theuniform phosphor layer 24. - Of course, the phosphor layer may also be formed on a surface of the chip.
- The phosphor is used to convert or change the wavelength of light emitted by an LED, for example. In general, the phosphor includes YAG, TAG, ZnSeS, and SiAlON such as α-SiALON. However, any material may be used as the phosphor material, as long as it can convert the wavelength of incident light. The term “phosphor” used herein indicates all materials that convert or change a wavelength to another wavelength, and includes compound or composition of different wavelength-converting materials. The phosphor, since being in a powder form, is also called phosphor powder.
- Alternatively, the phosphor powder is composed of a plurality of phosphor particles.
- In the method of fabricating the
semiconductor package 2, themetal frame 21 is used to replace the gold wire used in the prior art. As such, thesemiconductor package 2 does not include a substrate that is used to electrically connect the gold wire, and has a reduced overall height. -
FIGS. 3A and 3B are cross-sectional views illustrating a method of fabricating a semiconductor package of a second embodiment according to the present invention. The second embodiment differs from the first embodiment in locations of the electrode pads of the chip and the structure of the metal frame. - As shown in FIGS. 3A and 3A′, a plurality of
second electrode pads 201 are further disposed on thesecond surface 20 b of thechip 20′, and ametal frame 21′ further comprises a plurality ofsecond leads 211 havingtop surfaces 211 a connected to thesecond electrode pads 201. Optionally, the second leads 211 may be connected to thesecond electrode pads 201 through an adhesive 212. - As shown in
FIG. 3B , the second leads 211 are connected to theconnection pads 22 b of thecarrier component 22, then thechip 20′ is disposed on the second leads 211 through theencapsulant 220, the first leads shown inFIG. 2A are electrically connected to thefirst electrode pads 200 and theconnection pads 22 a, and the first light-pervious encapsulant 23 a and theuniform phosphor layer 24 are formed sequentially. - If an adhesive 212 is used in the
semiconductor package 2′, themetal frame 21′ is made of a metal material, which can provide a good enough heat-dissipating path. Compared with the substrate of the prior art which is made of ceramics or plastics, thesecond surface 20 b of thechip 20′ has an improved heat-dissipating efficacy. - The
light emitting device chip first surface 20 a and asecond surface 20 b opposing thefirst surface 20 a, and ametal frame light emitting device pervious encapsulant 23 a that encapsulates thechip uniform phosphor layer 24 formed on the first light-pervious encapsulant 23 a. - The
chip first electrode pads 200 are formed on thefirst surface 20 a. - Each of the first leads 210 of the
metal frame inner end 210 a connected to one of theelectrode pads 200 and anouter end 210 b connected to an electronic device such as a circuit board (not shown). - The
second surface 20 b of thechip pervious encapsulant 23 a. In an embodiment,second electrode pads 201 are formed on thesecond surface 20 b of thechip 20′, and themetal frame 21′ further has second leads 211 for electrical connection of the exposedsecond electrode pads 201. - The
uniform phosphor layer 24 covers thechip pervious encapsulant 23 a is formed between theuniform phosphor layer 24 and thechip pervious encapsulant 23 a and thechip second surface 20 b of the chip 20 (not shown). - The
uniform phosphor layer 24 comprises phosphor powder and bonding material, and the phosphor powder occupies more than 75% of the volume of theuniform phosphor layer 24. Alternatively, theuniform phosphor layer 24 may comprise phosphor powder composed of a plurality of phosphor particles, and the phosphor particles occupy more than 75% of the volume of the uniform phosphor layer. -
FIGS. 4A to 4C illustrate a method of fabricating a metal frame. FIG. 4A′ is a cross-sectional view of the metal frame along a cutting line 4-4 ofFIG. 4A . The metal frame is made by: forming on a substrate 40 a leaf ofmetal layer 410 having afirst end 410 a and asecond end 410 b opposing thefirst end 410 a; and forming on thefirst end 410 a and second end 411 b of themetal layer 410conductive elements metal layer 410 and theconductive element 410 c constitute afirst lead 41. Themetal layer 410 may be formed by screen printing or other conventional plating or etching techniques. - As shown in
FIG. 4B , thesubstrate 40 is bended and reversed, such that thefirst end 410 a and thesecond end 410 b have a height difference, as shown inFIG. 4C , and theconductive element 410 c of thefirst lead 41 is electrically connected to thefirst electrode pad 420 of the light emittingdiode chip 42; and thesubstrate 40 is removed. - In an embodiment, the substrate is an organic substrate, such as polyimide or other cheaper and softer polymer such as polyethylene, as long as the bonding force of the substrate and the metal layer does not affect the separation thereof. When a softer substrate is used, a
support layer 43 is formed on the substrate, as shown inFIG. 4A . - If the metal frame is formed as shown in FIG. 2A″, the substrate is not bended, and may be removed after the
first lead 41 is connected to thefirst electrode pad 420. Of course, a first light-pervious encapsulant 44 that encapsulates the metal frame may be formed on the substrate before the substrate is removed, as shown in FIG. 4C′. - Referring to FIG. 4C″, a
conductive element 410 c′ made of nickel, gold/tin or the combination thereof is also formed on asecond end 410 b of a leaf ofmetal layer 410. - The present invention is not limited to the embodiment of FIG. 4C″ in which the
conductive component 410 c′ is formed on themetal layer 410. In the embodiment, themetal layer 410 is not bended. Thechip 42 is disposed in adent 450 of a carrier component, and themetal layer 410 that acts as a first lead comprises afirst end 410 a electrically connected to afirst electrode pad 420 and asecond end 410 b opposing thefirst end 410 a and electrically connected to thecarrier component 45. Since themetal layer 410 is stiffer than a solder wire and has a certain flexibility, a broader dimension tolerance, e.g., a vertical drop between thechip 42 and thedent 450, may be provided. - Please refer to
FIG. 5 , which illustrates another method of fabricating the metal frame. The method comprises: forming on amold 50 at least a leaf ofmetal layer 510 having afirst end 510 a and asecond end 510 b opposing thefirst end 510 a, wherein thefirst end 510 a and thesecond end 510 b have a height difference due to the shape of themold 50; forming aconductive element 510 c on thefirst end 510 a of themetal layer 510, such that themetal layer 510 and theconductive element 510 c constitute thefirst lead 51; electrically connecting theconductive element 510 c of thefirst lead 51 to thefirst electrode 520; and removing themold 50. - Referring to
FIGS. 6A and 6B , another method of fabricating a light emitting diode package of an embodiment according to the present invention is illustrated. The metal frame is formed on asupport layer 60 having a plurality of openingareas 600. Thesupport layer 60 is made of metal or polymer such as polyimide. At least a portion of thefirst lead 61 is exposed from theopening area 600. Thefirst lead 61 has afirst end 610 a and asecond end 610 b opposing thefirst end 610 a. The exposedfirst end 610 a is connectible to the first electrode pad of the light emitting diode chip, and thesecond end 610 b is exposed from theopening area 600. Said openingareas 600 could prevent thesupport layer 60 from being contacted with a heater during reflow process. As shown inFIG. 6B , thesupport layer 60 and thefirst lead 61 are bended, and thefirst electrode pad 620 of the light emittingdiode chip 62 is formed on thefirst end 610 a. Besides, thefirst end 610 a andsecond end 610 b are respectively formed withconductive elements diode chip 62, the support layer may be peeled off so as to obtain a plurality of light emitting devices. - In another aspect, as shown in
FIG. 6B-1 ,conductive elements first end 610 a and bottom surface of thesecond end 610 b before the light emittingdiode chip 62 is disposed on thefirst end 610 a. - According to the light emitting device structure obtained from the fifth embodiment, the
first lead 61 has afirst end 610 a connected to thefirst electrode pad 620 and asecond end 610 b opposing thefirst end 610 a, and theconductive element 610 c andsupport layer 60 are positioned on the same surface. - Referring to
FIGS. 7A , 7B, and 7C, schematic diagrams illustrating a metal frame electrically connected to a chip in a serial manner according to the present invention are shown. - As shown in
FIG. 7A , a plurality ofchips 70 are disposed on acarrier component 72, each of thechips 70 has a plurality offirst electrode pads 700, andconnection pads 720 are formed on thecarrier component 72 adjacent thechips 70. - The metal frame of the present invention has a plurality of
first leads 710, each of which has afirst end 710 a electrically connected to one of thefirst electrode pads 700 and asecond end 710 b electrically connected to one of theconnection pads 720 of thecarrier component 72. - Alternatively, each of the formed first leads 710′ has two
ends chips 70, respectively. A serial structure of the plurality ofchips 70 andcarrier component 72 is achieved as long as thesecond end 710 b of one of the first leads 710 on one of thechips 70 is connected to one of theconnection pads 720 of thecarrier component 72. A person skilled in the art is allowed to amend the above embodiments. - Referring to
FIG. 7C , another example of serial structure is illustrated. Each of the first leads 710 has afirst end 710 a electrically connected to the top surface of thechip 70 and asecond end 710 b electrically connected to the bottom surface of thechip 70. - In a semiconductor package and a method of fabricating the same according to the present invention, a metal frame is used to carry a chip and to electrically connect a circuit board. Therefore, the semiconductor package does not need a substrate installed or conduct a wire bonding process. The semiconductor package thus has a reduced height.
- The foregoing descriptions of the detailed embodiments are only illustrated to disclose the features and functions of the present invention and not restrictive of the scope of the present invention. It should be understood to those in the art that all modifications and variations according to the spirit and principle in the disclosure of the present invention should fall within the scope of the appended claims.
Claims (12)
1. A light emitting diode package, comprising:
a light emitting diode chip having a first surface and a second surface opposing the first surface;
at least a first electrode pad formed on the first surface of the light emitting diode chip;
a metal frame having at least a first lead electrically connected to the at least a first electrode pad; and
a carrier component and a first light-pervious encapsulant, such that the light emitting diode chip is disposed on the carrier component, and the first light-pervious encapsulant is formed on the carrier component for encapsulating the light emitting diode chip and the first leads of the metal frame.
2. The light emitting diode package of claim 1 , wherein the at least a first lead is in a bending structure and has a first end and a second end opposing the first end, and the first end and the second end have a height difference for the light emitting diode chip to be received therein.
3. The light emitting diode package of claim 1 , further comprising a support layer having a plurality of opening areas, and wherein the at least a first lead each has a first end connected to the at least a first electrode pad and a second end opposing the first end, and both of the first end and the second end are exposed from a corresponding one of the opening areas.
4. The light emitting diode package of claim 3 , wherein the support layer is made of metal or polymer.
5. The light emitting diode package of claim 1 , wherein the carrier component has a dent, so as for the light emitting diode chip to be disposed in the dent, and the at least a first lead each has a first end connected to the at least a first electrode pads and a second end opposing the first end and connected to the carrier component.
6. The light emitting diode package of claim 1 , wherein the light emitting diode chip is disposed on the carrier component through the metal frame, allowing the metal frame to be sandwiched between the light emitting diode chip and the carrier component, and the first light-pervious encapsulant encapsulates the at least a first leads of the metal frame.
7. The light emitting diode package of claim 1 , further comprising at least a second electrode pad formed on the second surface of the light emitting diode chip, wherein the metal frame further comprises at least a second lead connected to the at least a second electrode pad.
8. A method of fabricating a light emitting diode package, comprising:
providing a light emitting diode chip having a first surface and a second surface opposing the first surface, and at least a first electrode pad formed on the first surface; and
connecting at least a the first lead of a metal frame to the at least a first electrode pad.
9. The method of claim 8 , further comprising forming on a carrier component on which the light emitting diode chip is disposed a first light-pervious encapsulant that encapsulates the light emitting diode chip.
10. The method of claim 9 , wherein the carrier component has a dent, the light emitting diode chip is disposed in the dent, and the at least a first lead each has a first end connected to the at least a first electrode pad and a second end opposing the first end and connected to the carrier component.
11. The method of claim 9 , wherein the light emitting diode chip is disposed on the carrier component through the metal frame, allowing the metal frame to be sandwiched between the light emitting diode chip and the carrier component, and the first light-pervious encapsulant encapsulates the at least a first lead of the metal frame.
12. The method of claim 8 , wherein the light emitting diode chip further comprises at least a second electrode pad formed on the second surface of the light emitting diode chip, and the metal frame further comprises at least a second lead connected to the at least a second electrode pad.
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US8803185B2 (en) * | 2012-02-21 | 2014-08-12 | Peiching Ling | Light emitting diode package and method of fabricating the same |
DE102012107668A1 (en) * | 2012-08-21 | 2014-03-20 | Epcos Ag | component assembly |
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Also Published As
Publication number | Publication date |
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TW201336124A (en) | 2013-09-01 |
US20130214315A1 (en) | 2013-08-22 |
US8803185B2 (en) | 2014-08-12 |
WO2013126169A1 (en) | 2013-08-29 |
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