US20100139966A1 - Inner substrate for manufacturing multilayer printed circuit boards - Google Patents
Inner substrate for manufacturing multilayer printed circuit boards Download PDFInfo
- Publication number
- US20100139966A1 US20100139966A1 US12/702,439 US70243910A US2010139966A1 US 20100139966 A1 US20100139966 A1 US 20100139966A1 US 70243910 A US70243910 A US 70243910A US 2010139966 A1 US2010139966 A1 US 2010139966A1
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- United States
- Prior art keywords
- substrate
- line
- inner substrate
- units
- folding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 310
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000010410 layer Substances 0.000 description 22
- 238000000034 method Methods 0.000 description 20
- 238000010030 laminating Methods 0.000 description 9
- 238000005553 drilling Methods 0.000 description 6
- 238000009713 electroplating Methods 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 239000010931 gold Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 5
- 239000002390 adhesive tape Substances 0.000 description 4
- 239000002356 single layer Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/05—Flexible printed circuits [FPCs]
- H05K2201/055—Folded back on itself
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/1028—Thin metal strips as connectors or conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1545—Continuous processing, i.e. involving rolls moving a band-like or solid carrier along a continuous production path
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
- H05K3/242—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4635—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating flexible circuit boards using additional insulating adhesive materials between the boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
- H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
- Y10T29/49135—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting and shaping, e.g., cutting or bending, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/15—Sheet, web, or layer weakened to permit separation through thickness
Definitions
- the present invention relates to printed circuit boards, and more particularly relates to an inner substrate for manufacturing multilayer printed circuit boards and a method for manufacturing multilayer printed circuit boards using the inner substrate.
- multilayer printed circuit boards are widely used due to their characteristics such as micromation, light quality, high-density interconnection.
- Multilayer printed circuit boards usually include multilayer rigid printed circuit boards and multilayer flexible printed circuit boards.
- multilayer printed circuit boards are manufactured using a typical sheet-by-sheet process.
- only one multilayer printed circuit board can be manufactured at a time, using the typical method describe above.
- efficiency of manufacturing multilayer printed circuit boards is low and cost of manufacturing multilayer printed circuit boards is high.
- flexible printed boards can be manufactured using a roll-to-roll process that is a substitute of a typical sheet-by-sheet process.
- the roll-to-roll process can enhance efficiency of manufacturing flexible printed boards.
- a multilayer flexible printed circuit board is generally thicker than a single layer flexible printed circuit board, flexibility of the multilayer flexible printed circuit board is low.
- the roll-to-roll process for manufacturing the single flexible printed circuit board is not suitable for manufacturing the multilayer flexible printed circuit board. Therefore, multilayer flexible printed circuit boards are still manufactured using the sheet-by-sheet process like typical multilayer rigid printed circuit boards.
- efficiency of manufacturing multilayer flexible printed circuit boards is also low and cost of manufacturing multilayer flexible printed circuit boards is also high.
- the inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate.
- Each of the substrate units is configured for forming a unitary printed circuit board.
- Each of the folding portions is interconnected between neighboring substrate units.
- Each of the folding portions defines at least one line of weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other.
- Another present embodiment provides a method for multilayer printed circuit boards.
- an elongated inner substrate having a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate is formed.
- Each of the substrate units is configured for forming a unitary printed circuit board.
- Each of the folding portions is interconnected between neighboring substrate units.
- Each of the folding portions defines at least one line of weakness perpendicular to the longitudinal direction of the inner substrate.
- at least one circuit substrate is laminated on each of the substrate units.
- the inner substrate is folded in a manner such that at least two of the substrate units are stacked one on another.
- the stacked substrate units are unfolded.
- the at least one circuit substrate on each of the unfolded substrate units is processed.
- FIG. 1 is a schematic view of an inner substrate according to a present embodiment.
- FIG. 2 is a schematic, cross-sectional view of the inner substrate in FIG. 1 .
- FIG. 3 is a schematic view of another inner substrate according to the present embodiment.
- FIG. 4 is a schematic, cross-sectional view of the inner substrate in FIG. 3 .
- FIG. 5 is a schematic view of further another inner substrate according to the present embodiment.
- FIG. 6 is a schematic, cross-sectional view of the inner substrate in FIG. 5 .
- FIG. 7 is a schematic, cross-sectional view of an inner substrate having circuit substrates laminated thereon according to the present embodiment.
- FIG. 8 is a schematic, cross-sectional view of folding of the substrate units of an inner substrate having circuit substrates laminated thereon according to the present embodiment.
- FIG. 9 is a schematic, cross-sectional view of unfolding and folding of the substrate units of an inner substrate having circuit substrates laminated thereon according to the present embodiment.
- FIG. 10 is a schematic view of an inner substrate having conductive adhesive tapes attaching thereon.
- the inner substrate 10 is elongated tape-shaped.
- the inner substrate 10 can be a rigid printed circuit substrate or a flexible printed circuit substrate.
- the inner substrate 10 can be a single-layer structure or a multilayer structure containing two layers, four layers, six layers or more.
- the inner substrate 10 is a double-sided structure.
- the inner substrate 10 includes an insulating base film and two electrically conductive layers formed on two opposite sides of the insulating base film.
- the inner substrate 10 has a number of substrate units 11 and a number of transverse folding portions 20 alternately arranged along a longitudinal direction thereof.
- the substrate units 11 are arranged along a longitudinal direction of the inner substrate 10 .
- Each of the substrate units 11 includes an insulating layer 12 (i.e., the insulating base film of the inner substrate 10 ) and two conductive circuit layers 13 (i.e., the corresponding electrically conductive layer of the inner substrate 10 ).
- the conductive circuit layers 13 are configured for forming conductive circuit patterns on two opposite sides of the insulating layer 12 , respectively.
- Each of the substrate units 11 can be configured for forming a unitary printed circuit board.
- Each of the folding portions 20 interconnects the two neighboring substrate units 11 .
- the folding portions 20 are also arranged along a longitudinal direction of the inner substrate 10 . Therefore, it is noted that the inner substrate 10 is divided into a number of the substrate units 11 by the folding portions 20 .
- Each of the folding portions 20 defines two line of weaknesses including a first line 211 and a second line 212 both perpendicular to the longitudinal direction of the inner substrate 10 , for facilitating folding and unfolding the neighboring substrate units 11 with/from each other.
- the first line 211 is parallel to the second line 212 .
- Each of the folding portions 20 defines a number of first through-holes 21 aligned in the first line 211 and a number of second through-holes 22 aligned in the second line 212 .
- a distance between the first line 211 and the second line 212 is determined by a thickness of the corresponding multilayer printed circuit board finally produced.
- the distance between the first line 211 and the second line 212 is either equal to or larger than a total thickness of two neighboring stacked substrate units 11 of the inner substrate 10 and two circuit substrates sandwiched between the stacked substrate units 11 once the inner substrate 10 has been folded. That is, at least one circuit substrate is laminated onto each of the two neighboring substrate units 11 , on an identical side of the inner substrate 10 , and then later on the two adjacent circuit substrates on the identical side of the inner substrate 10 become sandwiched between the two neighboring substrate units 11 during folding of the inner substrate 10 .
- FIG. 7 please refer to the description provided below in relation to FIG. 7 .
- the thicknesses of the two circuit substrates sandwiched between any two neighboring stacked substrate units 11 may be the same or may be different. Accordingly, the distance between the first line 211 and the second line 212 of each folding portion 20 can be identical with that of the other folding portions 20 or different from that of any or all of the other folding portions 20 . Because the weakness of the inner substrate 10 at the first through-holes 21 and the second through-holes 22 , the flexibility of inner substrate 10 is increased, especially/particularly at the area of the first through-holes 21 and the second through-holes 22 . Thus, the inner substrate 10 can be folded or unfolded at the first through-holes 21 along the first line 211 and the second through-holes 22 along the second line 212 .
- folding portions 20 can be in other structures.
- FIGS. 3 and 4 another exemplary inner substrate 30 for manufacturing multilayer printed circuit boards is shown.
- the inner substrate 30 is similar to the inner substrate 10 except for folding portions 35 .
- Each of the folding portions 35 defines a line of weakness including a third line 350 for facilitating folding and unfolding the neighboring substrate units 31 with/from each other.
- the third line 350 extends perpendicularly to a longitudinal direction of the inner substrate 30 .
- Each of the folding portions 35 defines a groove 351 on one side thereof along the third line 350 .
- a width of the groove 351 is determined by a thickness of the corresponding multilayer printed circuit board finally produced.
- the width of the groove 351 is either equal to or larger than a total thickness of e two neighboring stacked substrate units 31 of the inner substrate 30 and two circuit substrates sandwiched between the stacked substrate units 31 once the inner substrate 30 has been folded. That is, at least one circuit substrate is laminated onto each of the two neighboring substrate units 31 , on an identical side of the inner substrate 30 , and then later on the two adjacent circuit substrates on the identical side of the inner substrate 30 become sandwiched between the neighboring substrate units 31 during folding of the inner substrate 30 . It is noted that each of the folding portions 35 can define a groove 351 at each of the two opposite sides of the inner substrate 30 .
- each of the folding portions 45 defines a first groove 451 along a first line 450 and a second groove 453 along a second line 452 . It is noted that each of the folding portions 45 can define a first groove 451 along the first line 450 respectively on two opposite sides of the inner substrate 40 and a second groove 453 along the second line 452 respectively on two opposite sides of the inner substrate 40 .
- Multilayer printed circuit boards can be manufactured using the inner substrate 10 , 30 , or 40 , as described above.
- the method for manufacturing multilayer printed circuit boards using the inner substrate 10 includes the following steps.
- Step 1 the inner substrate 10 , as described above, is formed.
- the inner substrate 10 is a single-layer double-sided structure, therefore, the inner substrate 10 can be formed with a double-sided copper-clad substrate.
- a large sheet of raw double-sided copper-clad substrate is divided into a number of elongated tape-shaped double-sided copper-clad substrate according to sizes of multilayer printed circuit boards.
- the elongated tape-shaped double-sided copper-clad substrate can be wrapped around a roller and be configured for forming the inner substrate 10 .
- the conductive circuit layer 13 on the two opposite sides of the inner substrate 10 can be formed with two copper foils of the double-sided copper-clad substrate using a photolithographic process or a laser ablation process.
- the folding portions 20 can be formed before or after the conductive circuit layers 13 are formed.
- the folding portions 20 can be formed using a laser drilling process, a mechanical drilling process or a chemical etching process.
- Step 2 at least one circuit substrate is laminated on each of the substrate units 11 of the inner substrate 10 .
- each of the substrate units 11 of the inner substrate 10 has two circuit substrates laminated on two opposite sides thereof, respectively. It is noted that in alternative embodiments, each of the substrate units 11 of the inner substrate 10 can have only one circuit substrate laminated on only one side thereof.
- the circuit substrates laminated can be rigid printed circuit substrates or flexible printed circuit substrates.
- the circuit substrates can be single-layer structures, or multilayer structures containing two layers, four layers, six layers or more. In the present embodiment, each of the circuit substrates is a single-sided structure that including an insulating layer and an electrically conductive layer.
- the insulating layer of each of the circuit substrates is in contact with the corresponding conductive circuit layer 13 of the corresponding substrate unit 11 . Thereby, the circuit substrates are laminated onto the two opposite sides of the substrate unit 11 .
- the inner substrate 10 can be provided using a roller 15 .
- the inner substrate 10 includes a first substrate unit 111 , a second substrate unit 112 , a third substrate unit 113 , a first folding portion 201 and a second folding portion 202 .
- the first folding portion 201 interconnects the first substrate unit 111 and the second substrate unit 112 .
- the second folding portion 202 interconnects the second substrate unit 112 and the third substrate unit 113 .
- a first circuit substrate 301 and a second circuit substrate 401 are laminated onto two opposite sides of the first substrate unit 111 , respectively.
- a third circuit substrate 302 and a fourth circuit substrate 402 are laminated onto two opposite sides of the second substrate unit 112 , respectively.
- a fifth circuit substrate 303 and a sixth circuit substrate 403 are laminated onto two opposite sides of the third substrate unit 113 , respectively.
- the first circuit substrate 301 , the second circuit substrate 401 , the third circuit substrate 302 , the fourth circuit substrate 402 , the fifth circuit substrate 303 and the sixth circuit substrate 403 have an identical thickness. It is noted that the first circuit substrate 301 , the second circuit substrate 401 , the third circuit substrate 302 , the fourth circuit substrate 402 , the fifth circuit substrate 303 and the sixth circuit substrate 403 can have different thicknesses.
- Each of the first circuit substrate 301 , the second circuit substrate 401 , the third circuit substrate 302 , the fourth circuit substrate 402 , the fifth circuit substrate 303 and the sixth circuit substrate 403 has at least one electrically conductive layer. It is noted that a circuit pattern can be preformed in the at least one electrically conductive layer. Alternatively, the circuit pattern could be formed in a later step, e.g. after the step of unfolding the inner substrate, which should also be considered to have the same meanings of “circuit substrates” of the present invention.
- Step 3 the inner substrate 10 is folded in a manner such that at least two of the substrate units 11 are stacked one on another.
- a distance between the first line of the first through-holes 2011 and the second line of the second through-holes 2012 of the first folding portion 201 is equal to a total thickness of the inner substrate 10 , the first circuit substrate 301 laminated onto the first substrate unit 111 and the third circuit substrate 302 laminated onto the second substrate unit 112 .
- the inner substrate 10 can be folded at the first folding portion 201 , and thus the second substrate unit 112 is stacked on the first substrate unit 111 .
- the third circuit substrate 302 laminated onto the second substrate unit 112 can contact with and disposed onto the first circuit substrate 301 laminated onto the first substrate unit 111 .
- the first circuit substrate 301 and the third circuit substrate 302 are sandwiched between the first substrate unit 111 and the second substrate unit 112 .
- a distance between the first line of the first through-holes 2021 and the second line of the second through-holes 2022 of the second folding portion 202 is equal to a total thickness of the inner substrate 10 , the fourth circuit substrate 401 laminated onto the second substrate unit 112 and the sixth circuit substrate 403 laminated onto the third substrate unit 113 .
- the inner substrate 10 can also be folded at the second folding portion 202 , and thus the third substrate unit 113 is stacked on the second substrate unit 112 .
- the sixth circuit substrate 403 laminated onto the third substrate unit 113 can be in contact with and disposed onto the fourth circuit substrate 402 laminated onto the second substrate unit 112 .
- the fourth circuit substrate 401 and the sixth circuit substrate 403 are sandwiched between the second substrate unit 112 and the third substrate unit 113 .
- multiple substrate units 11 laminated with circuit substrates can be stacked one by one in the manner described above.
- the surplus adhesive may overflow from the edges of the substrate units 11 and the circuit substrates during laminating.
- the surplus adhesive may overflow and cause the substrate units 11 to adhere to each other.
- a separating film (not shown) can be interposed between the two neighboring stacked substrate units 11 .
- one separating film can be interposed between the third circuit substrate 302 laminated onto the second substrate unit 112 and the first circuit substrate 301 laminated onto the first substrate unit 111
- another separating film can be interposed between the sixth circuit substrate 403 laminated onto the third substrate unit 113 and the fourth circuit substrate 402 laminated onto the second substrate unit 112 .
- Step 4 the stacked substrate units 11 are unfolded.
- a process for manufacturing multilayer printed circuit boards using the substrate units of the inner substrate 10 includes the step of drilling holes in the circuit substrates, forming electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, laminating protective films on the circuit substrates, inspecting electrical connection and external appearance, and so on. Therefore, the stacked substrate units may need to be unfolded to undergo these steps.
- the inner substrate 10 stacked as described above can be unfolded at the first folding portion 201 and the second folding portion 202 .
- the third substrate unit 113 can be unstacked from the second substrate unit 112
- the second substrate unit 112 can unstacked from the first substrate unit 111 .
- multiple substrate units 11 can be unstacked one by one.
- sequential steps to form multilayer printed circuit boards for example, forming outside electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, and laminating protective films on the circuit substrates, can be performed.
- Step 5 the at least one circuit substrate on each of the unfolded substrate units 11 is processed.
- the sequential steps includes drilling holes in the circuit substrates, forming outside electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, laminating protective films on the circuit substrates, inspecting electrical connection and external appearance, and so on.
- multilayer printed circuit boards can be manufactured using the substrate units 11 of the inner substrate 10 in a manner such that the inner substrate 10 is unfolded at the folding portions 20 .
- one substrate unit 11 When one substrate unit 11 is unfolded from a stack of the substrate units 11 , one of the steps of drilling holes in the circuit substrates, forming outside electrical traces on the circuit substrates, electroplating gold, laminating protective films on the circuit substrates, and inspecting electrical connection and external appearance, can be performed on the one unfolded substrate unit 11 .
- the one unfolded substrate unit 11 can be stacked on the other substrate units 11 again.
- the one unfolded substrate unit 11 can be stacked on the other substrate units 11 that have already undergone the same step.
- some steps can be performed on the stacked substrate units 11 .
- a baking step can be performed after the substrate units 11 laminated with the circuit substrates are stacked together.
- a conductive adhesive tape 50 can be attached on the inner substrate 10 , as shown in FIG. 10 .
- the conductive adhesive tape 50 is configured for connecting the two neighboring substrate units 11 so as to electrically connect the conductive circuit patterns formed with conductive circuit layers 13 of the two neighboring substrate units 11 .
- the conductive adhesive tape 50 can be attached onto the conductive circuit layers 13 using a method such as a thermal attachment or an ultrasonic attachment.
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Abstract
An exemplary inner substrate for manufacturing multilayer printed circuit boards is provided. The inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line of weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other.
Description
- This application is a divisional application of and claims the benefit of U.S. patent application Ser. No. 11/959,212 filed Dec. 18, 2007, entitled “METHOD FOR MANUFACTURING MULTILAYER PRINTED CIRCUIT BOARDS USING INNER SUBSTRATE”, the entire contents of which are incorporated herein by reference.
- 1. Technical Field
- The present invention relates to printed circuit boards, and more particularly relates to an inner substrate for manufacturing multilayer printed circuit boards and a method for manufacturing multilayer printed circuit boards using the inner substrate.
- 2. Description of Related Art
- In order to accommodate development of miniaturization and multifunction of electronic products, multilayer printed circuit boards are widely used due to their characteristics such as micromation, light quality, high-density interconnection.
- Multilayer printed circuit boards usually include multilayer rigid printed circuit boards and multilayer flexible printed circuit boards. Nowadays, multilayer printed circuit boards are manufactured using a typical sheet-by-sheet process. However, only one multilayer printed circuit board can be manufactured at a time, using the typical method describe above. Thus, efficiency of manufacturing multilayer printed circuit boards is low and cost of manufacturing multilayer printed circuit boards is high.
- Currently, flexible printed boards can be manufactured using a roll-to-roll process that is a substitute of a typical sheet-by-sheet process. The roll-to-roll process can enhance efficiency of manufacturing flexible printed boards. However, a multilayer flexible printed circuit board is generally thicker than a single layer flexible printed circuit board, flexibility of the multilayer flexible printed circuit board is low. Thus, it is difficult for the multilayer flexible printed circuit board to be wrapped around a roller. Therefore, the roll-to-roll process for manufacturing the single flexible printed circuit board is not suitable for manufacturing the multilayer flexible printed circuit board. Therefore, multilayer flexible printed circuit boards are still manufactured using the sheet-by-sheet process like typical multilayer rigid printed circuit boards. Thus, efficiency of manufacturing multilayer flexible printed circuit boards is also low and cost of manufacturing multilayer flexible printed circuit boards is also high.
- What is needed, therefore, is an inner substrate for manufacturing multilayer printed circuit boards and a method for manufacturing multilayer printed circuit boards using the inner substrate, thereby improving efficiency of manufacturing multilayer printed circuit boards.
- One present embodiment provides an inner substrate for manufacturing multilayer printed circuit boards. The inner substrate has a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line of weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the neighboring substrate units to each other.
- Another present embodiment provides a method for multilayer printed circuit boards. In the method, firstly, an elongated inner substrate having a number of substrate units and a number of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate is formed. Each of the substrate units is configured for forming a unitary printed circuit board. Each of the folding portions is interconnected between neighboring substrate units. Each of the folding portions defines at least one line of weakness perpendicular to the longitudinal direction of the inner substrate. Secondly, at least one circuit substrate is laminated on each of the substrate units. Thirdly, the inner substrate is folded in a manner such that at least two of the substrate units are stacked one on another. Fourthly, the stacked substrate units are unfolded. Fifthly, the at least one circuit substrate on each of the unfolded substrate units is processed.
- Many aspects of the present embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
-
FIG. 1 is a schematic view of an inner substrate according to a present embodiment. -
FIG. 2 is a schematic, cross-sectional view of the inner substrate inFIG. 1 . -
FIG. 3 is a schematic view of another inner substrate according to the present embodiment. -
FIG. 4 is a schematic, cross-sectional view of the inner substrate inFIG. 3 . -
FIG. 5 is a schematic view of further another inner substrate according to the present embodiment. -
FIG. 6 is a schematic, cross-sectional view of the inner substrate inFIG. 5 . -
FIG. 7 is a schematic, cross-sectional view of an inner substrate having circuit substrates laminated thereon according to the present embodiment. -
FIG. 8 is a schematic, cross-sectional view of folding of the substrate units of an inner substrate having circuit substrates laminated thereon according to the present embodiment. -
FIG. 9 is a schematic, cross-sectional view of unfolding and folding of the substrate units of an inner substrate having circuit substrates laminated thereon according to the present embodiment. -
FIG. 10 is a schematic view of an inner substrate having conductive adhesive tapes attaching thereon. - Embodiments will now be described in detail below and with reference to the drawings.
- Referring to
FIG. 1 andFIG. 2 , an exemplaryinner substrate 10 for manufacturing multilayer printed circuit boards is shown. Theinner substrate 10 is elongated tape-shaped. Theinner substrate 10 can be a rigid printed circuit substrate or a flexible printed circuit substrate. Theinner substrate 10 can be a single-layer structure or a multilayer structure containing two layers, four layers, six layers or more. In the present embodiment, referring toFIG. 2 , theinner substrate 10 is a double-sided structure. Theinner substrate 10 includes an insulating base film and two electrically conductive layers formed on two opposite sides of the insulating base film. Theinner substrate 10 has a number ofsubstrate units 11 and a number oftransverse folding portions 20 alternately arranged along a longitudinal direction thereof. - In detail, the
substrate units 11 are arranged along a longitudinal direction of theinner substrate 10. Each of thesubstrate units 11 includes an insulating layer 12 (i.e., the insulating base film of the inner substrate 10) and two conductive circuit layers 13 (i.e., the corresponding electrically conductive layer of the inner substrate 10). Theconductive circuit layers 13 are configured for forming conductive circuit patterns on two opposite sides of theinsulating layer 12, respectively. Each of thesubstrate units 11 can be configured for forming a unitary printed circuit board. Each of the foldingportions 20 interconnects the two neighboringsubstrate units 11. Thus, thefolding portions 20 are also arranged along a longitudinal direction of theinner substrate 10. Therefore, it is noted that theinner substrate 10 is divided into a number of thesubstrate units 11 by thefolding portions 20. - Each of the
folding portions 20 defines two line of weaknesses including afirst line 211 and asecond line 212 both perpendicular to the longitudinal direction of theinner substrate 10, for facilitating folding and unfolding the neighboringsubstrate units 11 with/from each other. Thefirst line 211 is parallel to thesecond line 212. Each of thefolding portions 20 defines a number of first through-holes 21 aligned in thefirst line 211 and a number of second through-holes 22 aligned in thesecond line 212. A distance between thefirst line 211 and thesecond line 212 is determined by a thickness of the corresponding multilayer printed circuit board finally produced. Generally, the distance between thefirst line 211 and thesecond line 212 is either equal to or larger than a total thickness of two neighboringstacked substrate units 11 of theinner substrate 10 and two circuit substrates sandwiched between thestacked substrate units 11 once theinner substrate 10 has been folded. That is, at least one circuit substrate is laminated onto each of the two neighboringsubstrate units 11, on an identical side of theinner substrate 10, and then later on the two adjacent circuit substrates on the identical side of theinner substrate 10 become sandwiched between the two neighboringsubstrate units 11 during folding of theinner substrate 10. For more details, please refer to the description provided below in relation toFIG. 7 . - Additionally, in general, the thicknesses of the two circuit substrates sandwiched between any two neighboring
stacked substrate units 11 may be the same or may be different. Accordingly, the distance between thefirst line 211 and thesecond line 212 of each foldingportion 20 can be identical with that of theother folding portions 20 or different from that of any or all of theother folding portions 20. Because the weakness of theinner substrate 10 at the first through-holes 21 and the second through-holes 22, the flexibility ofinner substrate 10 is increased, especially/particularly at the area of the first through-holes 21 and the second through-holes 22. Thus, theinner substrate 10 can be folded or unfolded at the first through-holes 21 along thefirst line 211 and the second through-holes 22 along thesecond line 212. - It is noted that the
folding portions 20 can be in other structures. - Referring to
FIGS. 3 and 4 , another exemplaryinner substrate 30 for manufacturing multilayer printed circuit boards is shown. Theinner substrate 30 is similar to theinner substrate 10 except forfolding portions 35. Each of thefolding portions 35 defines a line of weakness including athird line 350 for facilitating folding and unfolding the neighboringsubstrate units 31 with/from each other. Thethird line 350 extends perpendicularly to a longitudinal direction of theinner substrate 30. Each of thefolding portions 35 defines agroove 351 on one side thereof along thethird line 350. A width of thegroove 351 is determined by a thickness of the corresponding multilayer printed circuit board finally produced. Generally, the width of thegroove 351 is either equal to or larger than a total thickness of e two neighboringstacked substrate units 31 of theinner substrate 30 and two circuit substrates sandwiched between thestacked substrate units 31 once theinner substrate 30 has been folded. That is, at least one circuit substrate is laminated onto each of the two neighboringsubstrate units 31, on an identical side of theinner substrate 30, and then later on the two adjacent circuit substrates on the identical side of theinner substrate 30 become sandwiched between the neighboringsubstrate units 31 during folding of theinner substrate 30. It is noted that each of thefolding portions 35 can define agroove 351 at each of the two opposite sides of theinner substrate 30. - Referring to
FIGS. 5 and 6 , further another exemplaryinner substrate 40 for manufacturing multilayer printed circuit boards is shown. Theinner substrate 40 is similar to theinner substrate 10 except thefolding portions 45. Each of thefolding portions 45 defines a first groove 451 along afirst line 450 and a second groove 453 along asecond line 452. It is noted that each of thefolding portions 45 can define a first groove 451 along thefirst line 450 respectively on two opposite sides of theinner substrate 40 and a second groove 453 along thesecond line 452 respectively on two opposite sides of theinner substrate 40. - Multilayer printed circuit boards can be manufactured using the
inner substrate inner substrate 10 includes the following steps. - Step 1: the
inner substrate 10, as described above, is formed. - In the present embodiment, the
inner substrate 10 is a single-layer double-sided structure, therefore, theinner substrate 10 can be formed with a double-sided copper-clad substrate. A large sheet of raw double-sided copper-clad substrate is divided into a number of elongated tape-shaped double-sided copper-clad substrate according to sizes of multilayer printed circuit boards. The elongated tape-shaped double-sided copper-clad substrate can be wrapped around a roller and be configured for forming theinner substrate 10. Theconductive circuit layer 13 on the two opposite sides of theinner substrate 10 can be formed with two copper foils of the double-sided copper-clad substrate using a photolithographic process or a laser ablation process. - The
folding portions 20 can be formed before or after the conductive circuit layers 13 are formed. Thefolding portions 20 can be formed using a laser drilling process, a mechanical drilling process or a chemical etching process. - Step 2: at least one circuit substrate is laminated on each of the
substrate units 11 of theinner substrate 10. - For the purpose of illustration only, in the present embodiment, each of the
substrate units 11 of theinner substrate 10 has two circuit substrates laminated on two opposite sides thereof, respectively. It is noted that in alternative embodiments, each of thesubstrate units 11 of theinner substrate 10 can have only one circuit substrate laminated on only one side thereof. The circuit substrates laminated can be rigid printed circuit substrates or flexible printed circuit substrates. The circuit substrates can be single-layer structures, or multilayer structures containing two layers, four layers, six layers or more. In the present embodiment, each of the circuit substrates is a single-sided structure that including an insulating layer and an electrically conductive layer. During laminating the circuit substrates, the insulating layer of each of the circuit substrates is in contact with the correspondingconductive circuit layer 13 of thecorresponding substrate unit 11. Thereby, the circuit substrates are laminated onto the two opposite sides of thesubstrate unit 11. - In detail, referring to
FIG. 7 , theinner substrate 10 can be provided using aroller 15. Theinner substrate 10 includes afirst substrate unit 111, asecond substrate unit 112, athird substrate unit 113, afirst folding portion 201 and asecond folding portion 202. Thefirst folding portion 201 interconnects thefirst substrate unit 111 and thesecond substrate unit 112. Thesecond folding portion 202 interconnects thesecond substrate unit 112 and thethird substrate unit 113. During laminating, afirst circuit substrate 301 and asecond circuit substrate 401 are laminated onto two opposite sides of thefirst substrate unit 111, respectively. Athird circuit substrate 302 and afourth circuit substrate 402 are laminated onto two opposite sides of thesecond substrate unit 112, respectively. Afifth circuit substrate 303 and asixth circuit substrate 403 are laminated onto two opposite sides of thethird substrate unit 113, respectively. - In the present embodiment, the
first circuit substrate 301, thesecond circuit substrate 401, thethird circuit substrate 302, thefourth circuit substrate 402, thefifth circuit substrate 303 and thesixth circuit substrate 403 have an identical thickness. It is noted that thefirst circuit substrate 301, thesecond circuit substrate 401, thethird circuit substrate 302, thefourth circuit substrate 402, thefifth circuit substrate 303 and thesixth circuit substrate 403 can have different thicknesses. Each of thefirst circuit substrate 301, thesecond circuit substrate 401, thethird circuit substrate 302, thefourth circuit substrate 402, thefifth circuit substrate 303 and thesixth circuit substrate 403 has at least one electrically conductive layer. It is noted that a circuit pattern can be preformed in the at least one electrically conductive layer. Alternatively, the circuit pattern could be formed in a later step, e.g. after the step of unfolding the inner substrate, which should also be considered to have the same meanings of “circuit substrates” of the present invention. - Step 3: the
inner substrate 10 is folded in a manner such that at least two of thesubstrate units 11 are stacked one on another. - In detail, in order to stack the
second substrate unit 112 on thefirst substrate unit 111, a distance between the first line of the first through-holes 2011 and the second line of the second through-holes 2012 of thefirst folding portion 201 is equal to a total thickness of theinner substrate 10, thefirst circuit substrate 301 laminated onto thefirst substrate unit 111 and thethird circuit substrate 302 laminated onto thesecond substrate unit 112. ReferringFIG. 8 , after laminating, theinner substrate 10 can be folded at thefirst folding portion 201, and thus thesecond substrate unit 112 is stacked on thefirst substrate unit 111. In such configuration, thethird circuit substrate 302 laminated onto thesecond substrate unit 112 can contact with and disposed onto thefirst circuit substrate 301 laminated onto thefirst substrate unit 111. Thus, thefirst circuit substrate 301 and thethird circuit substrate 302 are sandwiched between thefirst substrate unit 111 and thesecond substrate unit 112. - Similarly, in order to stack the
third substrate unit 113 on thesecond substrate unit 112, a distance between the first line of the first through-holes 2021 and the second line of the second through-holes 2022 of thesecond folding portion 202 is equal to a total thickness of theinner substrate 10, thefourth circuit substrate 401 laminated onto thesecond substrate unit 112 and thesixth circuit substrate 403 laminated onto thethird substrate unit 113. Theinner substrate 10 can also be folded at thesecond folding portion 202, and thus thethird substrate unit 113 is stacked on thesecond substrate unit 112. In such configuration, thesixth circuit substrate 403 laminated onto thethird substrate unit 113 can be in contact with and disposed onto thefourth circuit substrate 402 laminated onto thesecond substrate unit 112. Thefourth circuit substrate 401 and thesixth circuit substrate 403 are sandwiched between thesecond substrate unit 112 and thethird substrate unit 113. Similarly,multiple substrate units 11 laminated with circuit substrates can be stacked one by one in the manner described above. - Additionally, because the circuit substrates are laminated onto the
substrate units 11 using an adhesive, the surplus adhesive may overflow from the edges of thesubstrate units 11 and the circuit substrates during laminating. When thesubstrate units 11 are stacked one by one, the surplus adhesive may overflow and cause thesubstrate units 11 to adhere to each other. Thus, it is difficult for thesubstrate units 11 to be stacked or unstacked repeatedly. Advantageously, when onesubstrate unit 11 is stacked on anothersubstrate unit 11, a separating film (not shown) can be interposed between the two neighboringstacked substrate units 11. For example, in the present embodiment, one separating film can be interposed between thethird circuit substrate 302 laminated onto thesecond substrate unit 112 and thefirst circuit substrate 301 laminated onto thefirst substrate unit 111, and another separating film can be interposed between thesixth circuit substrate 403 laminated onto thethird substrate unit 113 and thefourth circuit substrate 402 laminated onto thesecond substrate unit 112. - Step 4: the stacked
substrate units 11 are unfolded. - Generally, a process for manufacturing multilayer printed circuit boards using the substrate units of the
inner substrate 10 includes the step of drilling holes in the circuit substrates, forming electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, laminating protective films on the circuit substrates, inspecting electrical connection and external appearance, and so on. Therefore, the stacked substrate units may need to be unfolded to undergo these steps. - It is understood that the
inner substrate 10 stacked as described above can be unfolded at thefirst folding portion 201 and thesecond folding portion 202. Thus thethird substrate unit 113 can be unstacked from thesecond substrate unit 112, and thesecond substrate unit 112 can unstacked from thefirst substrate unit 111. Similarly,multiple substrate units 11 can be unstacked one by one. When onesubstrate unit 11 is unstacked from theother substrate units 11, sequential steps to form multilayer printed circuit boards, for example, forming outside electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, and laminating protective films on the circuit substrates, can be performed. - Step 5: the at least one circuit substrate on each of the unfolded
substrate units 11 is processed. - The sequential steps includes drilling holes in the circuit substrates, forming outside electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, laminating protective films on the circuit substrates, inspecting electrical connection and external appearance, and so on. In these steps, referring to
FIG. 9 , multilayer printed circuit boards can be manufactured using thesubstrate units 11 of theinner substrate 10 in a manner such that theinner substrate 10 is unfolded at thefolding portions 20. When onesubstrate unit 11 is unfolded from a stack of thesubstrate units 11, one of the steps of drilling holes in the circuit substrates, forming outside electrical traces on the circuit substrates, electroplating gold, laminating protective films on the circuit substrates, and inspecting electrical connection and external appearance, can be performed on the one unfoldedsubstrate unit 11. - It is understood that, after one
substrate unit 11 has undergone one of the steps of drilling holes in the circuit substrates, forming electrical traces on the circuit substrates, electroplating gold on terminals of the electrical traces, laminating protective films on the circuit substrates, and inspecting electrical connection and external appearance, the one unfoldedsubstrate unit 11 can be stacked on theother substrate units 11 again. For example, as shown inFIG. 9 , the one unfoldedsubstrate unit 11 can be stacked on theother substrate units 11 that have already undergone the same step. It is also understood that some steps can be performed on the stackedsubstrate units 11. For example, a baking step can be performed after thesubstrate units 11 laminated with the circuit substrates are stacked together. - Preferably, in the step of electroplating gold on terminals of the electrical traces, at least a conductive
adhesive tape 50 can be attached on theinner substrate 10, as shown inFIG. 10 . The conductiveadhesive tape 50 is configured for connecting the two neighboringsubstrate units 11 so as to electrically connect the conductive circuit patterns formed with conductive circuit layers 13 of the two neighboringsubstrate units 11. The conductiveadhesive tape 50 can be attached onto the conductive circuit layers 13 using a method such as a thermal attachment or an ultrasonic attachment. - While certain embodiments have been described and exemplified above, various other embodiments will be apparent to those skilled in the art from the foregoing disclosure. The present invention is not limited to the particular embodiments described and exemplified but is capable of considerable variation and modification without departure from the scope of the appended claims.
Claims (13)
1. An inner substrate for manufacturing multilayer printed circuit boards, the inner substrate comprising:
a plurality of substrate units and a plurality of transverse folding portions alternately arranged along a longitudinal direction of the inner substrate, each of the substrate units being configured for forming a unitary multilayer printed circuit board, each of the folding portions being interconnected between two neighboring substrate units, each of the folding portions defining at least one line of weakness perpendicular to the longitudinal direction of the inner substrate for facilitating folding and unfolding the inner substrate.
2. The inner substrate of claim 1 , wherein the at least one line of weakness includes a first line and a second line parallel to the first line, each of the folding portions comprising a plurality of first through-holes aligned in the first line and a plurality of second through-holes aligned in the second line.
3. The inner substrate of claim 2 , wherein the inner substrate includes an insulating base film and two electrically conductive layers formed on two opposite sides of the insulating base film, and the first through-holes and the second through-holes penetrate through the insulating base film and the electrically conductive layers.
4. The inner substrate of claim 2 , wherein the distance between the first line and the second line of each folding portion is equal.
5. The inner substrate of claim 2 , wherein the distance between the first line and the second line of one folding portion is different from that of another folding portion.
6. The inner substrate of claim 1 , wherein each of the folding portions defines at least one groove in at least one side thereof along the at least one line of weakness.
7. The inner substrate of claim 6 , wherein the inner substrate includes an insulating base film and two electrically conductive layers formed on two opposite sides of the insulating base film, and a thickness of the at least one groove is larger than a thickness of one of the electrically conductive layers and less than a sum of thicknesses of the insulating base film and one of the electrically conductive layers.
8. The inner substrate of claim 1 , wherein each of the folding portions defines at least one groove in at each of the two opposite sides of the inner substrate along the at least one line of weakness.
9. The inner substrate of claim 1 , wherein the at least one line of weakness includes a first line and a second line, each of the folding portions comprising a first groove in at least one side thereof along the first line and a second groove in at least one side thereof along the second line parallel to the first line.
10. The inner substrate of claim 8 , wherein the distance between the first line and the second line of each folding portion is equal.
11. The inner substrate of claim 8 , wherein the distance between the first line and the second line of one folding portion is different from that of another folding portion.
12. The inner substrate of claim 1 , wherein the at least one line of weakness includes a first line and a second line parallel to the first line, each of the folding portions comprising a first groove respectively at two opposite sides of the inner substrate along the first line and a second groove respectively at two opposite sides of the inner substrate along the second line.
13. The inner substrate of claim 1 , wherein each of the substrate units includes at least one insulating layer and at least one electrically conductive layer formed on the dielectric layer.
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US13/186,486 US20110274866A1 (en) | 2007-07-13 | 2011-07-20 | Inner substrate for manufacturing multilayer printed circuit boards |
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CN200710076017.5 | 2007-07-13 | ||
CN2007100760175A CN101346047B (en) | 2007-07-13 | 2007-07-13 | Manufacturing method of multilayer circuit board and inner substrate for manufacturing multilayer circuit board |
US11/959,212 US7698811B2 (en) | 2007-07-13 | 2007-12-18 | Method for manufacturing multilayer printed circuit boards using inner substrate |
US12/702,439 US20100139966A1 (en) | 2007-07-13 | 2010-02-09 | Inner substrate for manufacturing multilayer printed circuit boards |
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US13/186,486 Abandoned US20110274866A1 (en) | 2007-07-13 | 2011-07-20 | Inner substrate for manufacturing multilayer printed circuit boards |
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2007
- 2007-07-13 CN CN2007100760175A patent/CN101346047B/en active Active
- 2007-12-18 US US11/959,212 patent/US7698811B2/en not_active Expired - Fee Related
-
2010
- 2010-02-09 US US12/702,439 patent/US20100139966A1/en not_active Abandoned
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2011
- 2011-07-20 US US13/186,486 patent/US20110274866A1/en not_active Abandoned
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US5224023A (en) * | 1992-02-10 | 1993-06-29 | Smith Gary W | Foldable electronic assembly module |
US20030051902A1 (en) * | 2001-09-18 | 2003-03-20 | Fujitsu Limited | Multi-layer interconnection board |
US20050205201A1 (en) * | 2002-08-16 | 2005-09-22 | Samsung Electro-Mechanics Co., Ltd. | Method of attaching optical waveguide component to printed circuit board |
US20070126123A1 (en) * | 2005-12-01 | 2007-06-07 | Fujifilm Corporation | Wiring board and wiring board connecting apparatus |
Also Published As
Publication number | Publication date |
---|---|
US7698811B2 (en) | 2010-04-20 |
US20090013526A1 (en) | 2009-01-15 |
US20110274866A1 (en) | 2011-11-10 |
CN101346047B (en) | 2010-06-02 |
CN101346047A (en) | 2009-01-14 |
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