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US20090032902A1 - Semiconductor Devices and Methods for Manufacturing the Same - Google Patents

Semiconductor Devices and Methods for Manufacturing the Same Download PDF

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US20090032902A1
US20090032902A1 US12/249,883 US24988308A US2009032902A1 US 20090032902 A1 US20090032902 A1 US 20090032902A1 US 24988308 A US24988308 A US 24988308A US 2009032902 A1 US2009032902 A1 US 2009032902A1
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oxynitride layer
layer
semiconductor device
region
oxynitride
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Chul-Ho Shin
Tae-Hong Kim
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
    • H—ELECTRICITY
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

Definitions

  • the present disclosure relates generally to semiconductor devices and semiconductor fabrication, and, more particularly, to semiconductor devices having a dual gate structure and methods for manufacturing the same.
  • a logic circuit or a central processing unit should have a dynamic random access memory (DRAM) and a static random access memory (SRAM) merged together.
  • DRAM dynamic random access memory
  • SRAM static random access memory
  • gate oxide layers with different thicknesses must be formed on one chip so as to preserve the respective characteristics of the devices. Also, even when these devices are used without being merged together, gate oxide layers with different thicknesses must still be formed on one chip to enable operation at different operating voltages.
  • Such gate oxide layers are thermal oxide layers. Such layers have become thinner in accordance with the development of the design rules.
  • a gate insulating layer is formed by implanting boron as a P-type impurity into a SiO 2 substrate so as to form a P-type gate structure, boron penetration occurs due to the thinness of the gate oxide layer. The boron penetration degrades the characteristics of the thin film transistors (TFTs) by varying the threshold voltage.
  • an oxynitride layer (also called a nitrided oxide layer) is provided.
  • the oxynitride layer may be formed by a growing method performed in a furnace under a NO, N 2 O, or NH 3 gas atmosphere, or by a plasma enhanced chemical vapor deposition (PECVD) method.
  • the PECVD method is disadvantageous in that it increases production costs due to the need to purchase PECVD equipment.
  • the growing method performed in a furnace is also disadvantageous in that it increases the process/fabrication time, because an oxide layer is formed and then an oxynitride layer is formed by thermally treating the oxide layer under a nitrogen gas atmosphere.
  • the method for growing the oxynitride layer in a furnace is disadvantageous in that it further increases production cost, since an apparatus for implanting nitrogen gas, an apparatus for neutralizing harmful gas, and a plurality of stabilization apparatus are required to grow the oxynitride layer in a furnace.
  • FIG. 1 is a schematic cross-sectional view of an example semiconductor device constructed in accordance with the teachings of the present invention.
  • FIG. 2A to FIG. 2C are cross-sectional views illustrating an example method of manufacturing an example semiconductor device performed in accordance with the teachings of the present invention.
  • FIG. 3 is a schematic cross-sectional view of a boat mounted with substrates which may be used in the example method of FIGS. 2A-2C .
  • any part e.g., a layer, film, area, or plate
  • any part is in any way positioned on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part
  • the referenced part is either in contact with the other part, or that the referenced part is above the other part with one or more intermediate part(s) located therebetween.
  • Stating that any part is in contact with another part means that there is no intermediate part between the two parts.
  • an example semiconductor device 1 includes a Si substrate 10 , a plurality of active regions 11 formed in the Si substrate 10 , and a device isolation region 12 separating the active regions 11 .
  • the device isolation region 12 may be formed by a shallow trench isolation (STI) method or a local oxidation of silicon (LOCOS) method.
  • the active region 11 is formed by implanting boron as a P-type impurity into the Si substrate 10 .
  • a first region A and a second region B are designated.
  • Each of the first region A and the second region B has an insulating layer (e.g., an oxynitride layer).
  • the insulating layer in region A is formed with a different thickness than the insulating layer in region B.
  • the first region A and the second region B may be applied to the first region A and the second region B.
  • the operating voltage of the first region A may be lower than that of the second region B.
  • the first region A and the second region B respectively have a first oxynitride layer 16 and a second oxynitride layer 16 ′ that are of different thicknesses.
  • the first oxynitride 16 has a thinner thickness than the second oxynitride 16 ′.
  • FIG. 2A to FIG. 2C are cross-sectional views illustrating an example method of manufacturing a semiconductor device performed in accordance with the teachings of the present invention.
  • FIG. 3 is a schematic cross-sectional view of a boat loaded with substrates used in the method of FIG. 2 .
  • FIG. 2A is a schematic, cross-sectional view of an example semiconductor device 50 without an oxynitride layer.
  • a device isolation region 12 is formed in a predetermined position of the Si substrate by an STI or LOCOS method to divide an active region 11 .
  • ions for controlling a P-type threshold voltage (Vth), ions for fixing a channel, ions for forming a well, and ions for avoiding a punch-through are implanted into the active region(s).
  • Vth P-type threshold voltage
  • ions for fixing a channel ions for fixing a channel
  • ions for forming a well ions for forming a well
  • ions for avoiding a punch-through are implanted into the active region(s).
  • a PMOS is formed.
  • the order of forming the active region(s) 11 and the device isolation region 12 can be varied, as will be evident to persons of ordinary skill in the art.
  • FIG. 2B is a schematic, cross-sectional view of an example semiconductor device 100 with an oxynitride layer formed only on the first active area 11 a so as to form the first oxynitride layer and second oxynitride layer to have different thicknesses. It is to be understood that the semiconductor device 100 shows the semiconductor device 50 at a later production stage.
  • a P-type gate may have a dual gate characteristic.
  • a first oxide layer 14 may be formed on the active region 11 by a thermal oxidation process.
  • the first oxide layer 14 is defined to have a uniform crystalline structure and to be formed once.
  • the first oxide layer 14 is provided to enable formation of the different insulation layers in the first region A and the second region B. Since, due to the first oxide layer 14 , the first region A and the second region B respectively have the first oxynitride layer 16 and the second oxynitride 16 ′ of different thicknesses, the first region A and the second region B may be operated at different operating voltages.
  • the first oxide layer (see 14 ′ defined by the dotted line in FIG. 2B ) is removed from one active region 11 a (e.g., the first region A).
  • the first oxide layer 14 remains on the other active region 11 b (e.g., on the second region B).
  • FIG. 2C is a schematic cross-sectional view of an example semiconductor device 1 with the first oxynitride layer 16 and the second oxynitride layer 16 ′.
  • the semiconductor device 1 illustrates the semiconductor device 100 at a later stage of fabrication.
  • semiconductor device substrate 100 hereinafter called the first substrate
  • the first oxynitride layer 16 and the second oxynitride layer 16 ′ are formed to have different thicknesses, thereby completing the semiconductor device 1 . Since the semiconductor device 1 has the first region A and the second region B, different regions of the device 1 can be operated at different operating voltages.
  • first and the second oxynitride layers ( 16 , 16 ′) will now be described in detail with reference to FIG. 3 .
  • First oxide layers 14 are selectively formed on one active region 11 b of each of the first substrates 100 , and at the same time, nitride layers are formed on the surfaces of each of the second substrates 200 .
  • the first and second substrates 100 and 200 are alternately loaded into the slots of a boat 202 to be mounted in the furnace.
  • the first substrate 100 and the second substrate 200 are oxidized by a heat treatment under an oxygen atmosphere.
  • the first substrate may be differentially oxidized depending on the first oxide layer 14 .
  • the second substrate 200 may also be oxidized.
  • the Si when the Si is separated from the nitride layer (i.e., Si 3 N 4 film) and oxygen gas is injected into the furnace, the Si reacts with the oxygen gas to form an oxide layer on the second substrate 200 and nitrogen radicals are separated from the nitride layer.
  • the nitrogen radicals have good reactivity. Accordingly, the nitrogen radicals have an effect on the oxidation of the first substrate 100 .
  • the nitrogen radicals are subject to reaction with free oxygen. Accordingly, the nitrogen radicals are combined with the free oxygen to directly form the first oxynitride layer 16 on the active region 11 a .
  • the nitrogen radicals are attached to the first (or original) oxide layer 14 to form the second oxynitride layer 16 ′.
  • the first oxynitride layer 16 is formed on the active region 11 a to form the first region A and the second oxynitride layer 16 ′ is formed on the first oxide layer 14 to form the second region B.
  • the oxide layer i.e., the first oxynitride 16
  • the nitrogen radicals are separated from the nitride layer and, thus, have an effect on the oxidation of the first substrate.
  • the first oxynitride layer 16 has a thinner thickness and has a uniform crystalline structure.
  • the second oxynitride layer 16 ′ has approximately the same thickness as the first oxide layer 14 regardless of the nitrogen radicals.
  • the second oxynitride layer 16 ′ has a high concentration of the nitrogen radicals at the surface thereof, and the concentration of the nitrogen radicals decreases along a depth direction proceeding away from the surface. Accordingly, the second oxynitride layer 16 ′ has a non-uniform crystalline structure in comparison with the first oxynitride layer 16 .
  • the first oxide layer may not be formed on the active region 11 .
  • only one oxynitride layer may be formed on the active region 11 without using the harmful nitrogen gas.
  • the oxynitride layer can be easily formed without an additional process.
  • the oxynitride layer can be safely formed.
  • An example method of manufacturing a semiconductor device disclosed herein includes loading first and second substrates together into a boat, wherein the first substrate is to be formed with an oxynitride layer and the second substrate has been formed with a nitride layer, and thereafter forming the oxynitride layer on the first substrate by placing the boat into a furnace and thermally treating the boat in an oxygen atmosphere.
  • the nitride layer may be formed on the surface of the first substrate.
  • An oxide layer may be selectively formed on only a predetermined area of the first substrate before loading the first and the second substrates. (In other words, one or more areas of the first substrate might not include the oxide layer).
  • An example semiconductor device disclosed herein includes a silicon substrate, a plurality of active regions formed in the silicon substrate and a device isolation region to separate the active regions, wherein the active regions contain a small amount of boron; and the active regions are divided into a first region and a second region, the first region having a first oxynitride layer and the second region having a secondary oxynitride layer.
  • the first oxynitride layer may have a thinner thickness than the second oxynitride layer.
  • the first oxynitride layer may have a more uniform crystalline structure than the second oxynitride layer.
  • the second oxynitride layer may have a decreased concentration of nitrogen along a depth direction of the second oxynitride layer.
  • the first and the second oxynitride layers may have no annealed fine crystalline structure.
  • the first oxynitride layer may have a thinner thickness and a more uniform crystalline structure than the second oxynitride layer.
  • the second oxynitride layer may have approximately the same thickness as that of the first oxide layer and a concentration of nitrogen decreased along a depth direction of the second oxynitride layer.
  • the first oxynitride layer may have a uniform crystalline structure and the second oxynitride layer may have a concentration of nitrogen which decreases along a depth direction of the second oxynitride layer.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

Semiconductor devices and methods for manufacturing the same are disclosed. An example method includes loading a first substrate to be provided with an oxynitride layer along with a second substrate having a nitride layer in a boat, and forming the oxynitride layer on the first substrate by placing the boat into a furnace and thermally treating the boat under an oxygen atmosphere.

Description

    RELATED APPLICATIONS
  • This application claims the benefit of U.S. patent application Ser. No. 11/191,182, filed Jul. 27, 2005 (Attorney Docket No. OPP-GZ-2007-0179-US-00), and claims the benefit of Korean Patent Application No. 10-2004-0059206, filed Jul. 28, 2004, which are incorporated herein by reference in their entirety.
    • FIELD OF THE DISCLOSURE
  • The present disclosure relates generally to semiconductor devices and semiconductor fabrication, and, more particularly, to semiconductor devices having a dual gate structure and methods for manufacturing the same.
    • BACKGROUND
  • As various semiconductor devices have been developed, their characteristics have evolved as well. For example, a logic circuit or a central processing unit (CPU) should have a dynamic random access memory (DRAM) and a static random access memory (SRAM) merged together.
  • When these memory devices are merged, gate oxide layers with different thicknesses must be formed on one chip so as to preserve the respective characteristics of the devices. Also, even when these devices are used without being merged together, gate oxide layers with different thicknesses must still be formed on one chip to enable operation at different operating voltages.
  • Such gate oxide layers are thermal oxide layers. Such layers have become thinner in accordance with the development of the design rules. However, when a gate insulating layer is formed by implanting boron as a P-type impurity into a SiO2 substrate so as to form a P-type gate structure, boron penetration occurs due to the thinness of the gate oxide layer. The boron penetration degrades the characteristics of the thin film transistors (TFTs) by varying the threshold voltage.
  • In order to prevent the boron implanted into the SiO2 substrate from penetrating a channel region, an oxynitride layer (also called a nitrided oxide layer) is provided. The oxynitride layer may be formed by a growing method performed in a furnace under a NO, N2O, or NH3 gas atmosphere, or by a plasma enhanced chemical vapor deposition (PECVD) method.
  • The PECVD method is disadvantageous in that it increases production costs due to the need to purchase PECVD equipment. The growing method performed in a furnace is also disadvantageous in that it increases the process/fabrication time, because an oxide layer is formed and then an oxynitride layer is formed by thermally treating the oxide layer under a nitrogen gas atmosphere. Further, the method for growing the oxynitride layer in a furnace is disadvantageous in that it further increases production cost, since an apparatus for implanting nitrogen gas, an apparatus for neutralizing harmful gas, and a plurality of stabilization apparatus are required to grow the oxynitride layer in a furnace.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a schematic cross-sectional view of an example semiconductor device constructed in accordance with the teachings of the present invention.
  • FIG. 2A to FIG. 2C are cross-sectional views illustrating an example method of manufacturing an example semiconductor device performed in accordance with the teachings of the present invention.
  • FIG. 3 is a schematic cross-sectional view of a boat mounted with substrates which may be used in the example method of FIGS. 2A-2C.
    •
  • To clarify multiple layers and regions, the thickness of the layers are enlarged in the drawings. Wherever possible, the same reference numbers will be used throughout the drawing(s) and accompanying written description to refer to the same or like parts. As used in this patent, stating that any part (e.g., a layer, film, area, or plate) is in any way positioned on (e.g., positioned on, located on, disposed on, or formed on, etc.) another part, means that the referenced part is either in contact with the other part, or that the referenced part is above the other part with one or more intermediate part(s) located therebetween. Stating that any part is in contact with another part means that there is no intermediate part between the two parts.
    • DETAILED DESCRIPTION
  • In the example of FIG. 1, an example semiconductor device 1 includes a Si substrate 10, a plurality of active regions 11 formed in the Si substrate 10, and a device isolation region 12 separating the active regions 11.
  • The device isolation region 12 may be formed by a shallow trench isolation (STI) method or a local oxidation of silicon (LOCOS) method. In the illustrated example, the active region 11 is formed by implanting boron as a P-type impurity into the Si substrate 10. In order for one substrate to realize multiple device characteristics, a first region A and a second region B are designated. Each of the first region A and the second region B has an insulating layer (e.g., an oxynitride layer). The insulating layer in region A is formed with a different thickness than the insulating layer in region B.
  • As a result, different operating voltages may be applied to the first region A and the second region B. For instance, the operating voltage of the first region A may be lower than that of the second region B. To this end, the first region A and the second region B respectively have a first oxynitride layer 16 and a second oxynitride layer 16′ that are of different thicknesses. In the illustrated example, the first oxynitride 16 has a thinner thickness than the second oxynitride 16′.
  • An example method for manufacturing a semiconductor device will now be described with reference to the accompanying drawings.
  • FIG. 2A to FIG. 2C are cross-sectional views illustrating an example method of manufacturing a semiconductor device performed in accordance with the teachings of the present invention. FIG. 3 is a schematic cross-sectional view of a boat loaded with substrates used in the method of FIG. 2.
  • FIG. 2A is a schematic, cross-sectional view of an example semiconductor device 50 without an oxynitride layer.
  • As shown in FIG. 2A, a device isolation region 12 is formed in a predetermined position of the Si substrate by an STI or LOCOS method to divide an active region 11.
  • Then, ions for controlling a P-type threshold voltage (Vth), ions for fixing a channel, ions for forming a well, and ions for avoiding a punch-through are implanted into the active region(s). As a result, a PMOS is formed. The order of forming the active region(s) 11 and the device isolation region 12 can be varied, as will be evident to persons of ordinary skill in the art.
  • FIG. 2B is a schematic, cross-sectional view of an example semiconductor device 100 with an oxynitride layer formed only on the first active area 11 a so as to form the first oxynitride layer and second oxynitride layer to have different thicknesses. It is to be understood that the semiconductor device 100 shows the semiconductor device 50 at a later production stage.
  • As noted above, when the insulating layers are formed to have different thicknesses on the same semiconductor device, the same semiconductor device can realize different device characteristics. With such a structure, for example, a P-type gate may have a dual gate characteristic.
  • As such, in order to form the insulating layers with different thicknesses, a first oxide layer 14 may be formed on the active region 11 by a thermal oxidation process. Herein, the first oxide layer 14 is defined to have a uniform crystalline structure and to be formed once.
  • The first oxide layer 14 is provided to enable formation of the different insulation layers in the first region A and the second region B. Since, due to the first oxide layer 14, the first region A and the second region B respectively have the first oxynitride layer 16 and the second oxynitride 16′ of different thicknesses, the first region A and the second region B may be operated at different operating voltages. The first oxide layer (see 14′ defined by the dotted line in FIG. 2B) is removed from one active region 11 a (e.g., the first region A). The first oxide layer 14 remains on the other active region 11 b (e.g., on the second region B).
  • FIG. 2C is a schematic cross-sectional view of an example semiconductor device 1 with the first oxynitride layer 16 and the second oxynitride layer 16′. (It should be understood that the semiconductor device 1 illustrates the semiconductor device 100 at a later stage of fabrication). When semiconductor device substrate 100 (hereinafter called the first substrate) such as those shown in FIG. 2 are loaded into the boat of FIG. 3 and oxidized in a furnace, the first oxynitride layer 16 and the second oxynitride layer 16′ are formed to have different thicknesses, thereby completing the semiconductor device 1. Since the semiconductor device 1 has the first region A and the second region B, different regions of the device 1 can be operated at different operating voltages.
  • An example method of manufacturing the first and the second oxynitride layers (16, 16′) will now be described in detail with reference to FIG. 3. First, one or more first substrates 100 and one or more second substrates 200 are prepared. First oxide layers 14 are selectively formed on one active region 11 b of each of the first substrates 100, and at the same time, nitride layers are formed on the surfaces of each of the second substrates 200. The first and second substrates 100 and 200 are alternately loaded into the slots of a boat 202 to be mounted in the furnace.
  • When the boat 202 carrying the substrates 100, 200 is mounted in the furnace, the first substrate 100 and the second substrate 200 are oxidized by a heat treatment under an oxygen atmosphere.
  • In this example, the first substrate may be differentially oxidized depending on the first oxide layer 14.
  • The second substrate 200 may also be oxidized. In detail, when the Si is separated from the nitride layer (i.e., Si3N4 film) and oxygen gas is injected into the furnace, the Si reacts with the oxygen gas to form an oxide layer on the second substrate 200 and nitrogen radicals are separated from the nitride layer.
  • The nitrogen radicals have good reactivity. Accordingly, the nitrogen radicals have an effect on the oxidation of the first substrate 100. In more detail, since Si is fixed in the active region 11 a, the nitrogen radicals are subject to reaction with free oxygen. Accordingly, the nitrogen radicals are combined with the free oxygen to directly form the first oxynitride layer 16 on the active region 11 a. Also, the nitrogen radicals are attached to the first (or original) oxide layer 14 to form the second oxynitride layer 16′. In this example, the first oxynitride layer 16 is formed on the active region 11 a to form the first region A and the second oxynitride layer 16′ is formed on the first oxide layer 14 to form the second region B.
  • It has been experimentally determined that, when the first substrate 100 is loaded in the furnace and is oxidized along with the second substrate 200 having the nitride layer, the oxide layer (i.e., the first oxynitride 16) is grown to be thinner. It is believed that the nitrogen radicals are separated from the nitride layer and, thus, have an effect on the oxidation of the first substrate.
  • Accordingly, the first oxynitride layer 16 has a thinner thickness and has a uniform crystalline structure. Meanwhile, the second oxynitride layer 16′ has approximately the same thickness as the first oxide layer 14 regardless of the nitrogen radicals. The second oxynitride layer 16′ has a high concentration of the nitrogen radicals at the surface thereof, and the concentration of the nitrogen radicals decreases along a depth direction proceeding away from the surface. Accordingly, the second oxynitride layer 16′ has a non-uniform crystalline structure in comparison with the first oxynitride layer 16.
  • The first oxide layer may not be formed on the active region 11. As a result, only one oxynitride layer may be formed on the active region 11 without using the harmful nitrogen gas.
  • In some examples, when the first substrate 100 is oxidized along with the second substrate 200 having the nitride layer, the oxynitride layer can be easily formed without an additional process.
  • Since the example method does not use harmful NO, N2O gas and/or the like, the oxynitride layer can be safely formed.
  • From the foregoing, persons of ordinary skill in the art will appreciate that semiconductor devices and method of manufacturing the same have been provided wherein an oxynitride layer can be easily formed without reforming a conventional furnace or using harmful NO, N2O gas and/or the like.
  • An example method of manufacturing a semiconductor device disclosed herein includes loading first and second substrates together into a boat, wherein the first substrate is to be formed with an oxynitride layer and the second substrate has been formed with a nitride layer, and thereafter forming the oxynitride layer on the first substrate by placing the boat into a furnace and thermally treating the boat in an oxygen atmosphere.
  • The nitride layer may be formed on the surface of the first substrate.
  • The first and the second substrates may be alternately loaded in a plurality of slots of the boat.
  • An oxide layer may be selectively formed on only a predetermined area of the first substrate before loading the first and the second substrates. (In other words, one or more areas of the first substrate might not include the oxide layer).
  • An example semiconductor device disclosed herein includes a silicon substrate, a plurality of active regions formed in the silicon substrate and a device isolation region to separate the active regions, wherein the active regions contain a small amount of boron; and the active regions are divided into a first region and a second region, the first region having a first oxynitride layer and the second region having a secondary oxynitride layer.
  • The first oxynitride layer may have a thinner thickness than the second oxynitride layer.
  • The first oxynitride layer may have a more uniform crystalline structure than the second oxynitride layer.
  • The second oxynitride layer may have a decreased concentration of nitrogen along a depth direction of the second oxynitride layer.
  • The first and the second oxynitride layers may have no annealed fine crystalline structure.
  • The first oxynitride layer may have a thinner thickness and a more uniform crystalline structure than the second oxynitride layer.
  • The second oxynitride layer may have approximately the same thickness as that of the first oxide layer and a concentration of nitrogen decreased along a depth direction of the second oxynitride layer.
  • The first oxynitride layer may have a thinner thickness than the second oxynitride layer, and the second oxynitride layer may have approximately the same thickness as the first oxide layer.
  • The first oxynitride layer may have a uniform crystalline structure and the second oxynitride layer may have a concentration of nitrogen which decreases along a depth direction of the second oxynitride layer.
  • This application claims priority from Korean Patent Application 10-2004-0059206 which was filed in the Korean Intellectual Property Office on Jul. 28, 2004. The entire content of Korean Patent Application 10-2004-0059206 is incorporated herein by reference.
  • Although certain example methods, apparatus and articles of manufacture have been described herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus and articles of manufacture fairly falling within the scope of the appended claims either literally or under the doctrine of equivalents.

Claims (11)

1. A semiconductor device comprising:
a silicon substrate;
a plurality of active regions in the silicon substrate;
a device isolation region to separate the active regions, wherein the active regions contain boron; the active regions are divided into a first region and a second region; and the first region has a first oxynitride layer and the second region has a second oxynitride layer.
2. A semiconductor device as defined in claim 1, wherein the first oxynitride layer has a thinner thickness than the second oxynitride layer.
3. A semiconductor device as defined in claim 1, wherein the first oxynitride layer has a more homogenous crystalline structure than the second oxynitride layer.
4. A semiconductor device as defined in claim 1, wherein the second oxynitride layer has a concentration of nitrogen which decreases along a depth direction of the second oxynitride layer.
5. A semiconductor device as defined in claim 1, wherein the second oxynitride layer has approximately the same thickness as the first oxide layer.
6. A semiconductor device as defined in claim 1, wherein the first and the second oxynitride layers have no annealed fine crystalline structure.
7. A semiconductor device as defined in claim 1, wherein the first oxynitride layer has a thinner thickness and a more uniform crystalline structure than the second oxynitride layer.
8. A semiconductor device as defined in claim 1, wherein the second oxynitride layer has approximately the same thickness as a first oxide layer from which the second oxynitride layer is formed and the second oxynitride layer has a concentration of nitrogen which decreases along a depth direction of the second oxynitride layer.
9. A semiconductor device as defined in claim 1, wherein the first oxynitride layer has a thinner thickness than the second oxynitride layer and the second oxynitride layer has approximately the same thickness as a first oxide layer from which the second oxynitride layer is formed.
10. A semiconductor device as defined in claim 1, wherein the first oxynitride layer has a uniform crystalline structure and the second oxynitride layer has a concentration of nitrogen which decreases along a depth direction of the second oxynitride layer.
11. A semiconductor device as defined in claim 1, wherein the first oxynitride layer has a thinner thickness and a more uniform crystalline structure than the second oxynitride layer;
the second oxynitride layer has approximately the same thickness as a first oxide layer from which the second oxynitride layer is formed;
a concentration of nitrogen decreases along a depth direction of the second oxynitride layer; and
the first and the second oxynitride layers have no annealed fine crystalline structure.
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