US20080315982A1 - Coupled-inductor core for unbalanced phase currents - Google Patents
Coupled-inductor core for unbalanced phase currents Download PDFInfo
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- US20080315982A1 US20080315982A1 US12/136,018 US13601808A US2008315982A1 US 20080315982 A1 US20080315982 A1 US 20080315982A1 US 13601808 A US13601808 A US 13601808A US 2008315982 A1 US2008315982 A1 US 2008315982A1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/04—Regulating voltage or current wherein the variable is AC
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0064—Magnetic structures combining different functions, e.g. storage, filtering or transformation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/28—Coils; Windings; Conductive connections
- H01F27/2804—Printed windings
Definitions
- An embodiment of a coupled-inductor core includes first and second members and first and second forms extending between members.
- the first form has a parameter (e.g., length) of a first value, and is operable to conduct a first magnetic flux having a first density that depends on the first value of the parameter.
- the second form is spaced apart from the first form, has the parameter (e.g., length) of a second value different from the first value, and is operable to conduct a second magnetic flux having a second density that depends on the second value of the parameter.
- the core may be suitable for use in a multiphase power supply where the currents through the phases are unequal, i.e., are unbalanced, but the windings disposed about the forms have the same number of turns.
- a coupled-inductor assembly “coupled-inductor assembly” is an assembly that includes the core and the windings—having windings with different numbers of turns
- a coupled-inductor assembly having windings with the same number of turns may have at least one winding with less resistance, and thus may be more energy efficient and may generate less heat.
- FIG. 1 is a schematic diagram of an embodiment of a multiphase buck converter that includes a coupled-inductor assembly.
- FIG. 2 is a diagram of switching signals that drive, and balanced currents that flow through, the phase paths of an embodiment of the buck converter of FIG. 1 .
- FIG. 3 is schematic diagram of an embodiment of a phase-current unbalancing circuit that may compose part of the power-supply controller of FIG. 1 .
- FIG. 4 is a perspective view of an embodiment of the coupled-inductor assembly of FIG. 1 that has at least two forms with different values for the same form parameter.
- FIG. 5 is a magnetic-circuit model of an embodiment of the coupled-inductor assembly of FIG. 4 .
- FIG. 6 is a simplified magnetic-circuit model of an embodiment of the coupled-inductor assembly of FIG. 4 having two wound forms, a leakage form, and two windings respectively disposed about the two winding forms.
- FIG. 7 is a block diagram of an embodiment of a computer system having a multiphase power supply that includes an embodiment of the coupled-inductor assembly of FIG. 4 .
- FIG. 1 is a schematic diagram of an embodiment of a multiphase buck converter 10 , which includes phase paths (alternatively “phases”) 12 1 - 12 n and a coupled-inductor assembly 14 having magnetically coupled windings 16 1 - 16 n , one winding per phase.
- the assembly 14 may be designed to carry unbalanced phase currents even when the windings 16 carrying these currents have the same number N of turns. This may reduce the resistance of at least one of these windings, and thus may allow the converter 10 to have an increased power efficiency and to generate less heat as compared to a buck converter that incorporates a conventional coupled-inductor assembly having windings with different numbers of turns.
- the converter 10 includes a power-supply controller 18 , high-side drive transistors 20 1 - 20 n , low-side drive transistors 22 1 - 22 n , a filter capacitor 24 , and an optional filter inductor 26 .
- a winding 16 and the high-side and low-side transistors 20 and 22 coupled to the winding compose a respective phase 12 .
- the winding 16 1 and transistors 20 1 and 22 1 compose the phase 12 1 .
- the controller 18 may be any type of controller suitable for use in a buck converter, is supplied by voltages VDD controller and VSS controller , and receives the regulated output voltage V out , a reference voltage V ref , and feedback signals I FB1 -I FBn , which are respectively proportional to the phase currents i 1 -i n that flow through the respective phase windings 16 1 - 16 n .
- each of these feedback signals I FB1 -I FBn may be a respective voltage that has substantially the same signal phase as the corresponding phase current i and that has an amplitude proportional to the amplitude of the corresponding phase current, and may be generated by a series coupled resistor and capacitor (not shown in FIG. 1 ) coupled in electrical parallel with the corresponding winding 16 .
- the high-side transistors 20 1 - 20 n which are each switched “on” and “off” by the controller 18 , are power NMOS transistors that are respectively coupled between input voltages VIN 1 -VIN n and the windings 16 1 - 16 n .
- the transistors 20 1 - 20 n may be other than power NMOS transistors, and may be coupled to a common input voltage.
- the transistors 20 1 - 20 n may be integrated on the same die as the controller 18 , may be integrated on a same die that is separate from the die on which the controller is integrated, or may be discrete components.
- the low-side transistors 22 1 - 22 n which are each switched on and off by the controller 18 , are power NMOS transistors that are respectively coupled between low-side voltages VL 1 -VL n and the windings 16 1 - 16 n .
- the transistors 22 1 - 22 n may be other than power NMOS transistors, and may be coupled to a common low-side voltage such as ground.
- the transistors 22 1 - 22 n may be integrated on the same die as the controller 18 , may be integrated on a same die that is separate from the die on which the controller is integrated, may be integrated on a same die as the high-side transistors 20 1 - 20 n , may be integrated on respective dies with the corresponding high-side transistors 20 1 - 20 n (e.g., transistors 20 1 and 22 1 on a first die, transistors 20 2 and 22 2 on a second die, and so on), or may be discrete components.
- the filter capacitor 24 is coupled between V out and a voltage VSS cap , and works in concert with the windings 16 1 - 16 n and the filter inductor 26 (if present) to maintain the amplitude of the steady-state ripple voltage component of the regulated output voltage V out within a desired range that may be on the order of hundreds of microvolts to tens of millivolts.
- VSS cap may be equal to VSS controller and to VL 1 -VL n ; for example, all of these voltages may equal ground.
- the filter inductor 26 may be omitted if the leakage inductances L lk1 -L lkn of the windings 16 1 - 16 n are sufficient to perform the desired inductive filtering function. In some applications, the filter inductor 26 may be omitted to reduce the size and component count of the converter 10 .
- Each of the windings 16 1 - 16 n of the coupled-inductor assembly 14 may be modeled as a self inductance L and a resistance DCR. For purposes of discussion, only the model components of the winding 16 1 are discussed, it being understood that the model components of the other windings 16 2 - 16 n are similar, except for possibly their values.
- the self inductance L 1 of the winding 16 1 may be modeled as two zero-resistance inductances: a magnetic-coupling inductance LC 1 , and a leakage inductance L lk1 .
- a phase current i 1 flows through the winding 16 1 , the current generates a magnetic flux.
- the value of the coupling inductance LC 1 is proportional to the amount of this flux that is coupled to other windings 16 2 - 16 n
- the value of the leakage inductance L lk1 is proportional to the amount of the remaining flux, which is not coupled to the other windings 16 2 - 16 n .
- the respective magnetic-coupling coefficients between pairs of coupling inductances LC are equal (e.g., a current through LC 1 magnetically induces respective equal currents in LC 2 , . . . LC n ), although unequal coupling coefficients are contemplated.
- FIG. 2 is a timing diagram of the drive signals PWM 1 and PWM 2 and the phase currents i 1 and i 2 during steady-state operation of an embodiment of the converter 10 of FIG. 1 having two magnetically coupled phases 16 1 and 16 2 , where the phase currents i 1 and i 2 are balanced.
- the signals may not be drawn to scale.
- the maximum A 1max of i 1 substantially equals the maximum A 2max of i 2
- the minimum A 1min of i 1 substantially equals the minimum A 2min of i 2
- the peak-to-peak amplitude A 1pp substantially equals the peak-to-peak amplitude A 2pp of i 2
- the average A 1avg of i 1 substantially equals the average A 2avg of i 2 .
- FIGS. 1-2 an embodiment of the operation of the buck converter 10 is discussed where the converter has only two phases 12 1 and 12 2 .
- the two phases 12 1 and 12 2 are switched 180° apart at a switching frequency F sw .
- This increasing current i 1 generates a magnetic flux that induces a corresponding increase in the current i 2 flowing through the other coupled phase 12 2 .
- V out may be the average or minimum of the output ripple component.
- the controller 18 may increase the on times or otherwise alter the duty cycles of PWM 1 and PWM 2 to accommodate the increased load current; conversely, as the load current decreases, the controller may decrease the on times or otherwise alter the duty cycles of PWM 1 and PWM 2 to accommodate the decreased load current.
- the controller 18 may use a pulse-width-modulation (PWM) technique, a constant-on-time technique, or another technique to control the on and off times of the high-side and low-side transistors 20 1 - 20 2 and 22 1 - 22 2 .
- PWM pulse-width-modulation
- the controller 18 may also monitor the feedback signals I FB1 and I FB2 , and adjusts the on times or otherwise adjusts the duty cycles of PWM 1 and PWM 2 as needed to maintain the balance between the currents i 1 and i 2 . That is, the controller 18 adjusts PWM 1 and PWM 2 so that A 1max , A 1min , A 1pp , and A 1avg stay substantially equal to A 2max , A 2min , A 2pp , and A 2avg respectively.
- An embodiment of current-balancing circuitry that the controller 18 may include is disclosed in U.S. Pat. No. 6,278,263, which is incorporated by reference.
- the coupled-inductor assembly 14 may be symmetrical such that there is little or no chance of saturating the core (not shown in FIGS. 1-2 ) of the assembly. That is, the core rung about which the winding 16 1 is wound has the same parameters (e.g., dimensions, reluctance) as the rung about which the winding 16 2 is wound, and the number N 1 of turns of the winding 16 1 is the same as the number N 2 of turns of the winding 16 2 .
- Unbalanced currents i flowing in the phases 12 may be suitable, for example, where the controller 18 may deactivate one or more of the phases 12 under less-than-full load conditions to conserve power.
- a two-phase embodiment of the converter 10 that is designed to provide a steady-state average light load current of 15 Amperes (A), a steady-state average normal-load current of 30 A, and a steady-state average heavy-load current of 45 A.
- the controller 18 activates only the phase 12 1 , and causes this phase to provide a 15 A steady-state average current i 1 .
- the controller 18 activates only the phase 12 2 , and causes this phase to provide a 30 A steady-state average current i 2 .
- phase currents i 1 and i 2 may be unbalanced if one or more of A max , A min , A pp , and A avg of the first current do not substantially equal a respective one or more of A max , A min , A pp , and A avg of the second current.
- An embodiment of a circuit for unbalancing phase currents is discussed below in conjunction with FIG. 3 .
- the core of the coupled-inductor assembly 14 may be designed so that no portion of the assembly's core saturates during operation of the converter.
- One technique for preventing saturation of the assembly 14 core is to make the Ni products equal in each of the phases carrying unbalanced currents i; therefore, because the currents i in these phases are unequal, the number of turns N of the respective windings 16 are also unequal.
- another technique for preventing saturation of the core may reduce the DCR of at least one winding 16 as compared to the previously described technique, and may allow one unbalanced current to be a non-integer multiple of another unbalanced current.
- portions of the core such as the rungs about which the windings are wound, have different values of a same parameter, and each of the respective windings 16 carrying the unbalanced currents has a same number N of turns, such that one winding need not be longer than another winding as in the previously described technique.
- this technique does contemplate that the respective windings carrying the unbalanced currents may have different numbers N of turns.
- Reducing the DCR of one or more of the windings 16 1 - 16 n may reduce the amount of power (I rms 2 ⁇ DCR) that the windings (and thus the coupled-inductor assembly 14 ) consume, and thus may reduce the amount of heat that the windings (and thus the coupled-inductor assembly) generate.
- a coupled-inductor assembly 14 allowing unbalanced phase currents and having one or more windings with reduced DCRs may allow the converter 10 to be more power efficient and to generate less heat than a converter that has unbalanced phase currents and that includes a coupled-inductor assembly with windings having different numbers of turns.
- allowing one unbalanced current to be a non-integer multiple of another unbalanced current may increase the number of applications in which one may use a coupled-inductor power supply such as the converter 10 .
- the converter 10 may be modified to generate V out having a negative value.
- the converter 10 may include one or more magnetically uncoupled phases as described in previously incorporated U.S. patent application Ser. Nos. 12/136,014 and 12/136,023.
- Coupled-inductor power supplies appear in the following references, which are incorporated by reference: Wong et al., Investigating Coupling Inductors In The Interleaved QSW VRM, IEEE 2000, and Park et al., Modeling And Analysis Of Multi-Interphase Transformers For Connecting Power Converters In Parallel, IEEE 1997.
- FIG. 3 is a diagram of an embodiment of a current-unbalancing circuit 30 , which the controller 18 of FIG. 1 may include to unbalance two or more of the phase currents i 1 -i n of the buck converter 10 of FIG. 1 .
- the circuit 30 includes an error amplifier 32 , a phase-current summer 34 , phase-current scalers 36 1 - 36 n , current-unbalancing summers 38 1 - 38 n , gain blocks 40 1 - 40 n , PWM summers 42 1 - 42 n , and PWM signal generators 44 1 - 44 n .
- the error amplifier 32 generates a control voltage V EA , which is proportional to the difference between the regulated output voltage V out (or a scaled version of V out ) and the reference voltage V ref .
- V EA may be the result of the amplifier 32 low-pass filtering the difference between V out and V ref .
- the phase-current summer 34 adds the feedback signals I FB1 -I FBn to generate a signal I LOADcalculated , which is proportional to the actual load current I LOAD through the load 28 ( FIG. 1 ).
- Each of the phase-current scalers 36 1 - 36 n scales I LOADcalculated by a respective one of the values n/a 1 -n/a n according to the respective phase current to be carried by the respective winding 16 , where n is the number of coupled phases 12 1 - 12 n and where a 1 -a n are respective balancing coefficients.
- Each of the current-unbalancing summers 38 1 - 38 n subtracts from a respective signal I FB1 -I FBn a scaled signal from a respective one of the scalers 36 1 - 36 n .
- Each of the gain blocks 40 1 - 40 n multiplies a sum from a respective one of the summers 38 1 - 38 n by a respective gain value G 1 -G n to generate a respective signal ⁇ I 1 - ⁇ I n .
- the values G 1 -G n may be selected to give specified frequency and error-correction responses to the respective feedback loops formed in part by the summer 34 , the scalers 36 1 - 36 n , the summers 38 1 - 38 n , and the gain blocks 40 1 - 40 n .
- Each of the summers 42 1 - 42 n subtracts a respective one of the signals ⁇ I 1 - ⁇ I n from V EA .
- Each of the PWM signal generators 44 1 - 44 n includes a comparator that receives on a non-inverting input node the resulting sum from a respective one of the summers 42 1 - 42 n , that receives on an inverting input node a respective conventional ramp signal, and that generates on an output node a respective one of the signals PWM 1 -PWMn.
- the phases of the ramp signals may be offset in a conventional manner such that the phases of PWM 1 -PWMn are offset, for example, by 360°/n as discussed above in conjunction with FIG. 2 .
- i 1 represents the average current flowing through the phase 12 1 and i 2 represents the average current flowing through the phase 12 2 .
- i 1 and i 2 may represent, e.g., the peak, minimum, or rms currents respectively flowing through the phases 12 1 and 12 2 .
- the “on” portions of PWM 1 and PWM 2 are proportional to V EA .
- V EA the amount of V EA
- the increases in the lengths of the on portions of PWM 1 and PWM 2 increase the on times of the high-side transistors 20 1 - 20 2 , and this tends to cause V out to increase back toward V ref .
- V out increases to more than V ref , then V EA tends to decrease, and this reduction in V EA tends to decrease the lengths of the on portions of PWM 1 and PWM 2 .
- the decreases in the lengths of the on portions of PWM 1 and PWM 2 decrease the on times of the high-side transistors 20 1 - 20 2 , and this tends to cause V out to decrease back toward V ref .
- a 1 a 2 ⁇ n /( a 2 ⁇ n ) (8)
- the difference output of the unbalancing summer 38 1 is negative and the value ⁇ I 1 is negative, but the inverting input of the PWM summer 42 1 effectively makes ⁇ I 1 positive, and thus makes the output of the PWM summer 44 1 more positive as compared to the summer output due to V EA alone. This tends to increase the on portion of PWM 1 , and thus tends to increase both I FB1 , and i 1 .
- the difference output of the unbalancing summer 38 2 is positive and the value ⁇ I 2 is positive, but the inverting input of the PWM summer 42 2 effectively makes ⁇ I 2 negative, and thus makes the output of the PWM summer 44 2 more negative as compared to the output due to V EA alone. This tends to decrease the on portion of PWM 2 , and thus tends to decrease both I FB2 and i 2 .
- the current-unbalancing circuit 30 maintains I LOADcalculated (and thus maintains the actual load current I LOAD ) substantially constant, the unbalancing circuit ideally does not cause V out to drift out of regulation by causing V out to increase or decrease relative to V ref .
- the unbalancing circuit 30 acts to decrease I FB1 and i 1 and to increase I FB2 and i 2 to the respective values set by the scalers 36 1 - 36 2 when I FB1 and i 1 are too high and I FB2 and i 2 are too low.
- the current-unbalancing circuit 30 may operate in a similar manner when the converter 10 includes more than two phases 12 , and when the currents i through more than two of these phases are unbalanced.
- FIG. 4 is a perspective view of an embodiment of the coupled-inductor core assembly 14 of FIG. 1 , where the core assembly may be designed for use when two or more of the phases 12 1 - 12 n of the buck converter 10 of FIG. 1 carry unbalanced currents.
- the core assembly 14 includes a core 50 having winding forms 52 1 - 52 n and an optional leakage form 53 , and members 54 and 56 , which interconnect the forms. That is, using a ladder analogy, the forms 52 1 - 52 n are the rungs of the ladder, and the members 54 and 56 are the rails to which the rungs are connected. Spaces 58 1 - 58 n are located between the forms 52 1 - 52 n and 54 .
- Each winding 16 1 - 16 n is formed from a respective conductor 60 1 - 60 n , which has a respective width W 1 -W n , and each conductor 60 1 - 60 n is wound, in a Faraday's law sense, N 1 -N n turns about a respective form 52 1 - 52 n and extends beneath and adjacent to the remaining forms.
- the conductor 60 1 is adjacent to only three sides of the form 52 1 , the current i 1 through the conductor 60 1 traverses a closed loop through which the form 52 1 passes.
- N 1 is the integer number of closed loops through which the form 52 1 extends.
- the conductors 60 1 - 60 n may be made from any suitable conductive material such as copper or another metal, and may, but need not be, electrically insulated from the forms 52 1 - 52 n .
- Each form 52 1 - 52 n and 53 has a respective length I 1 -I n and I lk , a respective permeability ⁇ 1 - ⁇ n and ⁇ lk , and a respective cross-sectional area A 1 -A n and A lk .
- these like parameters e.g., the lengths I 1 -I n and I lk
- some or all of these like parameters may have different values.
- some or all of the permeabilities ⁇ 1 - ⁇ n and ⁇ lk may be made to be different by forming the respective forms 52 from different materials.
- an optional gap 62 (e.g., an air gap) may be disposed in the leakage form 53 to adjust the reluctance thereof. Alternatively, the optional gap 62 may be distributed throughout the material from which the leakage form 53 is made.
- the operation of the coupled-inductor assembly 14 is generally described when a current i 1 flows through the conductor 60 1 in the direction shown, it being understood that the operation is similar when a current flows through the other conductors 60 2 - 60 n .
- the coupled-inductor assembly 14 is mounted to a printed circuit board such that the forms 52 2 - 52 n do not pass inside the loop(s) composed in part by the conductor 60 1 .
- the first flux portion ⁇ 1 flows through the remaining forms 52 2 - 52 n and 53 such that the sum of the fluxes ⁇ 2 - ⁇ n and ⁇ lk flowing through each of the remaining forms equals ⁇ 1 . Because the portion of ⁇ 1 that equals ⁇ 2 + ⁇ 3 + . . . + ⁇ n flows through the forms 52 2 - 52 n about which the conductors 60 2 - 60 n are wound, this portion of ⁇ 1 is called the coupling flux. The portion ⁇ 2 - ⁇ n of the coupling flux ⁇ 1 induce respective currents to flow in the conductors 60 2 - 60 n . As discussed further below in conjunction with FIGS. 5-6 , the specific values of the fluxes ⁇ 1 - ⁇ n depend on the reluctances R 1 -R n and R lk of the forms 52 1 - 52 n and 53 .
- the total leakage flux is called the total leakage flux, because it does not induce any currents to flow in the conductors 60 2 - 60 n .
- the total leakage flux may be approximated as ⁇ lk .
- the specific value of the flux ⁇ lk depends on the reluctances R 1 -R n and R lk of the forms 52 1 - 52 n and 53 .
- each portion of the core 50 has a respective maximum flux density B above which that portion of the core will magnetically saturate.
- FIG. 5 is an embodiment of an equivalent magnetic circuit 70 of the core-assembly 14 of FIG. 4 .
- R 1 -R n and R lk are the respective reluctances of the forms 52 1 - 52 n and 53 of FIG. 4
- R 12 -R (n-1)n and R nk are the respective reluctances of the portions of the member 54 between adjacent pairs of the forms
- R 21 -R n(n-1) and R kn are the respective reluctances of the portions of the member 56 between adjacent pairs of the forms.
- R 12 is the reluctance of the portion of the member 54 between the forms 52 1 and 52 2
- R 23 is the reluctance of the portion of the member 54 between the forms 52 2 and 52 3
- R 21 is the reluctance of the portion of the member 56 between the forms 52 2 and 52 1
- R 32 is the reluctance of the portion of the member 56 between the forms 52 3 and 52 2 , and so on.
- the directions of the fluxes ⁇ 2 - ⁇ n have been reversed relative to their directions in FIG. 4 for purposes of mathematical convention that may simplify mathematical calculations that use the circuit model 70 .
- the model 70 may ignore the leakage flux ⁇ out if ⁇ out ⁇ lk , or may include the contribution of ⁇ out in ⁇ lk .
- n two-phase embodiment
- the reluctances of the members 54 and 56 are much less (for example, at least ten times less) than each of the reluctances R 1 -R 2 and R lk ; therefore, the reluctances of the members 54 and 56 are approximated as zero in the magnetic circuit 80 , thus further simplifying the circuit 80 as compared to the circuit 70 of FIG. 5 .
- the circuit model 80 includes the contribution of ⁇ out ( FIG.
- ⁇ 1 and ⁇ 2 of the model circuit 80 may be given by the following:
- R 1 , R 2 , and R lk are given by the following:
- R 1 l 1 ⁇ 1 ⁇ A 1 ( 14 )
- R 2 l 2 ⁇ 2 ⁇ A 2 ( 15 )
- R lk l lk ⁇ lk ⁇ A lk ( 16 )
- flux densities B 1 and B 2 through the forms 52 1 and 52 2 are given by the following:
- B 1 ⁇ 1 A 1 ( 17 )
- B 2 ⁇ 2 A 2 ( 18 )
- B 1 max is the maximum flux density that the form 52 1 is able to conduct without saturating
- B 2max is the maximum flux density that the form 52 2 is able to conduct without saturating.
- B 1max and B 2max may be determined in a conventional manner. For example, one may determine B 1max and B 2max from ⁇ 1 and ⁇ 2 , or retrieve B 1max and B 2max from a table based on the respective materials from which the forms 52 1 and 52 2 are made.
- n may be any positive number.
- a designer may select values for A, N, ⁇ , ⁇ lk , I 1 , I 2 , and I lk such that equations (27) and (28) are true. Furthermore, to set B 1 equal to B 2 , the designer may select the values for ⁇ , ⁇ lk , I 1 , I 2 , and I lk according to the following equation, which is derived from equations (27) and (28):
- the coupled-inductor assembly 14 is designed for the windings 16 1 and 16 2 to carry unbalanced currents i 1 and i 2 , the windings have the same number of turns N. Moreover, unlike the number of turns N, the variable m is not constrained to only integer values.
- Appendix A includes additional mathematical expressions that are derived from the circuit model 80 of FIG. 6 and that may be useful in designing the coupled-inductor assembly 14 and a power supply such as the buck converter 10 ( FIG. 1 ).
- the design procedure may be extrapolated to design a coupled-inductor assembly having more than two coupled phase 12 , and having fewer or more than one leakage form.
- the circuit model 70 of FIG. 5 may be used to design the assembly 14 by modifying the design equations accordingly.
- design equations similar to those described above to mathematically demonstrate that other portions of the core 50 (e.g., the members 54 and 56 and the leakage form 53 ) do not saturate in a specified application.
- the coupled-inductor assembly 14 may include uncoupled forms as discussed in U.S. patent application Ser. Nos. 12/136,014 and 12/136,023, which are incorporated by reference.
- the core assembly 14 may include a leakage plate as described in U.S. patent application Ser. No. 11/903,185, which is incorporated by reference.
- FIG. 7 is a block diagram of a system 90 (here a computer system), which may incorporate a multiphase power supply 92 (such as the buck converter 10 of FIG. 1 ) that generates unbalanced phase currents and that includes an embodiment of the coupled-inductor assembly 14 of FIG. 4 .
- a multiphase power supply 92 such as the buck converter 10 of FIG. 1
- the system 90 includes computer circuitry 94 for performing computer functions, such as executing software to perform desired calculations and tasks.
- the circuitry 94 typically includes a controller, processor, or one or more other integrated circuits (ICs) 96 , and the power supply 92 , which provides power to the IC(s) 96 .
- One or more input devices 98 such as a keyboard or a mouse, are coupled to the computer circuitry 94 and allow an operator (not shown) to manually input data thereto.
- One or more output devices 100 are coupled to the computer circuitry 94 to provide to the operator data generated by the computer circuitry. Examples of such output devices 100 include a printer and a video display unit.
- One or more data-storage devices 102 are coupled to the computer circuitry 94 to store data on or retrieve data from external storage media (not shown). Examples of the storage devices 102 and the corresponding storage media include drives that accept hard and floppy disks, tape cassettes, compact disk read-only memories (CD-ROMs), and digital-versatile disks (DVDs).
- Examples of the storage devices 102 and the corresponding storage media include drives that accept hard and floppy disks, tape cassettes, compact disk read-only memories (CD-ROMs), and digital-versatile disks (DVDs).
- L 1 Lc 1 +L lk1 is the self inductance of the winding 16 1 .
- L 2 Lc 2 +L lk2 is the self inductance of the winding 16 2 .
- R 1 is the reluctance of the form 52 1 .
- R 2 is the reluctance of the form 52 2 .
- R lk is the reluctance of the leakage form 53 .
- a 1 is the cross-sectional area of the form 52 1 .
- a 2 is the cross-sectional area of the form 52 2 .
- a lk is the cross-sectional area of the form 53 .
- ⁇ 1 is the permeability of the form 52 1 .
- ⁇ 2 is the permeability of the form 52 2 .
- ⁇ 3 is the permeability of the form 53 .
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Abstract
Description
- This application claims priority to U.S. Provisional Application Ser. No. 60/933,949 filed on Jun. 8, 2007, which is incorporated by reference.
- This application is related to U.S. patent application Ser. No. 12/136,014 entitled POWER SUPPLY WITH A MAGNETICALLY UNCOUPLED PHASE AND AN ODD NUMBER OF MAGNETICALLY COUPLED PHASES, AND CONTROL FOR A POWER SUPPLY WITH MAGNETICALLY COUPLED AND MAGNETICALLY UNCOUPLED PHASES, filed on Jun. 9, 2008, and Ser. No. 12/136,023 entitled INDUCTOR ASSEMBLY HAVING A CORE WITH MAGNETICALLY ISOLATED FORMS, filed on Jun. 9, 2008, which have a common owner and which are incorporated herein by reference.
- This Summary is provided to introduce, in a simplified form, a selection of concepts that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
- An embodiment of a coupled-inductor core includes first and second members and first and second forms extending between members. The first form has a parameter (e.g., length) of a first value, and is operable to conduct a first magnetic flux having a first density that depends on the first value of the parameter. The second form is spaced apart from the first form, has the parameter (e.g., length) of a second value different from the first value, and is operable to conduct a second magnetic flux having a second density that depends on the second value of the parameter.
- Because two or more of the forms of such a core may have different values for the same parameter, the core may be suitable for use in a multiphase power supply where the currents through the phases are unequal, i.e., are unbalanced, but the windings disposed about the forms have the same number of turns. As compared to a coupled-inductor assembly—“coupled-inductor assembly” is an assembly that includes the core and the windings—having windings with different numbers of turns, a coupled-inductor assembly having windings with the same number of turns may have at least one winding with less resistance, and thus may be more energy efficient and may generate less heat.
-
FIG. 1 is a schematic diagram of an embodiment of a multiphase buck converter that includes a coupled-inductor assembly. -
FIG. 2 is a diagram of switching signals that drive, and balanced currents that flow through, the phase paths of an embodiment of the buck converter ofFIG. 1 . -
FIG. 3 is schematic diagram of an embodiment of a phase-current unbalancing circuit that may compose part of the power-supply controller ofFIG. 1 . -
FIG. 4 is a perspective view of an embodiment of the coupled-inductor assembly ofFIG. 1 that has at least two forms with different values for the same form parameter. -
FIG. 5 is a magnetic-circuit model of an embodiment of the coupled-inductor assembly ofFIG. 4 . -
FIG. 6 is a simplified magnetic-circuit model of an embodiment of the coupled-inductor assembly ofFIG. 4 having two wound forms, a leakage form, and two windings respectively disposed about the two winding forms. -
FIG. 7 is a block diagram of an embodiment of a computer system having a multiphase power supply that includes an embodiment of the coupled-inductor assembly ofFIG. 4 . -
FIG. 1 is a schematic diagram of an embodiment of amultiphase buck converter 10, which includes phase paths (alternatively “phases”) 12 1-12 n and a coupled-inductor assembly 14 having magnetically coupled windings 16 1-16 n, one winding per phase. As discussed below in conjunction withFIGS. 3-6 , theassembly 14 may be designed to carry unbalanced phase currents even when thewindings 16 carrying these currents have the same number N of turns. This may reduce the resistance of at least one of these windings, and thus may allow theconverter 10 to have an increased power efficiency and to generate less heat as compared to a buck converter that incorporates a conventional coupled-inductor assembly having windings with different numbers of turns. - In addition to the coupled-
inductor assembly 14, theconverter 10 includes a power-supply controller 18, high-side drive transistors 20 1-20 n, low-side drive transistors 22 1-22 n, afilter capacitor 24, and anoptional filter inductor 26. A winding 16 and the high-side and low-side transistors 20 and 22 coupled to the winding compose arespective phase 12. For example, the winding 16 1 and transistors 20 1 and 22 1 compose thephase 12 1. - The
controller 18 may be any type of controller suitable for use in a buck converter, is supplied by voltages VDDcontroller and VSScontroller, and receives the regulated output voltage Vout, a reference voltage Vref, and feedback signals IFB1-IFBn, which are respectively proportional to the phase currents i1-in that flow through the respective phase windings 16 1-16 n. For example, each of these feedback signals IFB1-IFBn may be a respective voltage that has substantially the same signal phase as the corresponding phase current i and that has an amplitude proportional to the amplitude of the corresponding phase current, and may be generated by a series coupled resistor and capacitor (not shown inFIG. 1 ) coupled in electrical parallel with thecorresponding winding 16. - The high-side transistors 20 1-20 n, which are each switched “on” and “off” by the
controller 18, are power NMOS transistors that are respectively coupled between input voltages VIN1-VINn and the windings 16 1-16 n. Alternatively, the transistors 20 1-20 n may be other than power NMOS transistors, and may be coupled to a common input voltage. Moreover, the transistors 20 1-20 n may be integrated on the same die as thecontroller 18, may be integrated on a same die that is separate from the die on which the controller is integrated, or may be discrete components. - Similarly, the low-side transistors 22 1-22 n, which are each switched on and off by the
controller 18, are power NMOS transistors that are respectively coupled between low-side voltages VL1-VLn and the windings 16 1-16 n. Alternatively, the transistors 22 1-22 n may be other than power NMOS transistors, and may be coupled to a common low-side voltage such as ground. Moreover, the transistors 22 1-22 n may be integrated on the same die as thecontroller 18, may be integrated on a same die that is separate from the die on which the controller is integrated, may be integrated on a same die as the high-side transistors 20 1-20 n, may be integrated on respective dies with the corresponding high-side transistors 20 1-20 n (e.g., transistors 20 1 and 22 1 on a first die, transistors 20 2 and 22 2 on a second die, and so on), or may be discrete components. - The
filter capacitor 24 is coupled between Vout and a voltage VSScap, and works in concert with the windings 16 1-16 n and the filter inductor 26 (if present) to maintain the amplitude of the steady-state ripple voltage component of the regulated output voltage Vout within a desired range that may be on the order of hundreds of microvolts to tens of millivolts. Although only onefilter capacitor 24 is shown, theconverter 10 may include multiple filter capacitors coupled in electrical parallel. Furthermore, VSScap may be equal to VSScontroller and to VL1-VLn; for example, all of these voltages may equal ground. - As further discussed below, the
filter inductor 26 may be omitted if the leakage inductances Llk1-Llkn of the windings 16 1-16 n are sufficient to perform the desired inductive filtering function. In some applications, thefilter inductor 26 may be omitted to reduce the size and component count of theconverter 10. - Each of the windings 16 1-16 n of the coupled-
inductor assembly 14 may be modeled as a self inductance L and a resistance DCR. For purposes of discussion, only the model components of thewinding 16 1 are discussed, it being understood that the model components of the other windings 16 2-16 n are similar, except for possibly their values. - The self inductance L1 of the
winding 16 1 may be modeled as two zero-resistance inductances: a magnetic-coupling inductance LC1, and a leakage inductance Llk1. When a phase current i1 flows through the winding 16 1, the current generates a magnetic flux. The value of the coupling inductance LC1 is proportional to the amount of this flux that is coupled to other windings 16 2-16 n, and the value of the leakage inductance Llk1 is proportional to the amount of the remaining flux, which is not coupled to the other windings 16 2-16 n. In one embodiment, LC1=LC2= . . . =LCn, and Llk1=Llk2= . . . =Llkn, although inequality among the coupling inductances LC, the leakage inductances Llk, or both LC and Llk, is contemplated. Furthermore, in an embodiment, the respective magnetic-coupling coefficients between pairs of coupling inductances LC are equal (e.g., a current through LC1 magnetically induces respective equal currents in LC2, . . . LCn), although unequal coupling coefficients are contemplated. - The resistance DCR1 is the resistance of the winding 16 1 when a constant voltage V is applied across the winding and causes a constant current I to flow through the winding. That is, DCR1=V/I.
-
FIG. 2 is a timing diagram of the drive signals PWM1 and PWM2 and the phase currents i1 and i2 during steady-state operation of an embodiment of theconverter 10 ofFIG. 1 having two magnetically coupledphases - Because the phase currents i1 and i2 are balanced, the maximum A1max of i1 substantially equals the maximum A2max of i2, the minimum A1min of i1 substantially equals the minimum A2min of i2, the peak-to-peak amplitude A1pp substantially equals the peak-to-peak amplitude A2pp of i2, and the average A1avg of i1 substantially equals the average A2avg of i2.
- Referring to
FIGS. 1-2 , an embodiment of the operation of thebuck converter 10 is discussed where the converter has only twophases phases - While PWM1 is high (logic 1), the high-side transistor 20 1 is on and the low-side transistor 22 1 is off, and an increasing phase current i1 flows from VIN1, through the transistor 20 1, winding 16 1, and filter inductor 26 (if present), and to the
capacitor 24 and to aload 28 that is supplied by Vout. This increasing current i1 generates a magnetic flux that induces a corresponding increase in the current i2 flowing through the other coupledphase 12 2. - In contrast, while PWM1 is low (logic 0), the high-side transistor 20 1 is off and the low-side transistor 22 1 is on, and the current i1, which is now decreasing, flows from VL1, through the transistor 22 1, winding 16 1 and filter inductor 26 (if present), and to the
capacitor 24 and to theload 28. The current i2 also decreases. The currents i1 and i2 continue to decrease until PWM2 goes high as discussed below. - Similarly, while PWM2 is high, the high-side transistor 20 2 is on and the low-side transistor 22 2 is off, and an increasing current i2 flows from VIN2, through the transistor 20 2, winding 16 2, and filter inductor 26 (if present), and to the
capacitor 24 and to theload 28. This increasing current i2 generates a magnetic flux that induces a corresponding increase in the current i1 flowing through thephase 12 1. - In contrast, while PWM2 is low, the high-side transistor 20 2 is off and the low-side transistor 22 2 is on, and the current i2, which is now decreasing, flows from VL2, through the transistor 22 2, winding 16 2 and filter inductor 26 (if present), and to the
capacitor 24 and to theload 28. The current i1 also decreases. The currents i1 and i2 continue to decrease until PWM1 goes high again as discussed above. - The
controller 18 compares Vout to Vref, and controls the duty cycles of PWM1 and PWM2 to maintain a predetermined constant relationship between Vout and Vref in the steady state, e.g., Vout=2Vref for example, Vout may be the average or minimum of the output ripple component. For example, as current drawn by theload 28 increases, thecontroller 18 may increase the on times or otherwise alter the duty cycles of PWM1 and PWM2 to accommodate the increased load current; conversely, as the load current decreases, the controller may decrease the on times or otherwise alter the duty cycles of PWM1 and PWM2 to accommodate the decreased load current. Thecontroller 18 may use a pulse-width-modulation (PWM) technique, a constant-on-time technique, or another technique to control the on and off times of the high-side and low-side transistors 20 1-20 2 and 22 1-22 2. - The
controller 18 may also monitor the feedback signals IFB1 and IFB2, and adjusts the on times or otherwise adjusts the duty cycles of PWM1 and PWM2 as needed to maintain the balance between the currents i1 and i2. That is, thecontroller 18 adjusts PWM1 and PWM2 so that A1max, A1min, A1pp, and A1avg stay substantially equal to A2max, A2min, A2pp, and A2avg respectively. An embodiment of current-balancing circuitry that thecontroller 18 may include is disclosed in U.S. Pat. No. 6,278,263, which is incorporated by reference. - Because the currents i1 and i2 are balanced, the coupled-
inductor assembly 14 may be symmetrical such that there is little or no chance of saturating the core (not shown inFIGS. 1-2 ) of the assembly. That is, the core rung about which the winding 16 1 is wound has the same parameters (e.g., dimensions, reluctance) as the rung about which the winding 16 2 is wound, and the number N1 of turns of the winding 16 1 is the same as the number N2 of turns of the winding 16 2. For an ideal,symmetrical assembly 14 carrying balanced currents i1 and i2 and having Llk1=Llk2=0, the net flux through the core is zero, and thus there is no danger of saturating the core. And even if theassembly 14 is not ideal such that Llk1 and Llk2 are non zero, the peak magnitudes of the fluxes flowing through the core may be small enough such that there is little chance of saturating the core. - But still referring to
FIGS. 1-2 and as discussed below in conjunction withFIGS. 3-6 , one may design theconverter 10 so that two or more of the windings 16 1-16 n are able to carry a respective two or more unbalanced currents i1-in. Unbalanced currents i flowing in thephases 12 may be suitable, for example, where thecontroller 18 may deactivate one or more of thephases 12 under less-than-full load conditions to conserve power. For example, consider a two-phase embodiment of theconverter 10 that is designed to provide a steady-state average light load current of 15 Amperes (A), a steady-state average normal-load current of 30 A, and a steady-state average heavy-load current of 45 A. During light-load conditions, thecontroller 18 activates only thephase 12 1, and causes this phase to provide a 15 A steady-state average current i1. Similarly, during normal-load conditions, thecontroller 18 activates only thephase 12 2, and causes this phase to provide a 30 A steady-state average current i2. And during heavy-load conditions, thecontroller 18 activates bothphases FIG. 3 . - If the
converter 10 is designed for two or more windings 16 1-16 n to carry unbalanced currents, then the core of the coupled-inductor assembly 14 may be designed so that no portion of the assembly's core saturates during operation of the converter. - One technique for preventing saturation of the
assembly 14 core is to make the Ni products equal in each of the phases carrying unbalanced currents i; therefore, because the currents i in these phases are unequal, the number of turns N of therespective windings 16 are also unequal. - But this technique may result in one or more of the corresponding
windings 16 being longer than, and thus having a greater DCR than, respective windings in a core assembly designed to carry balanced currents i. - Furthermore, because N must be an integer per Maxwell's equations, this technique constrains the unbalanced currents i to be integer multiples of one another.
- Still referring to
FIGS. 1-2 , however, another technique for preventing saturation of the core may reduce the DCR of at least one winding 16 as compared to the previously described technique, and may allow one unbalanced current to be a non-integer multiple of another unbalanced current. In an embodiment of this other technique, portions of the core, such as the rungs about which the windings are wound, have different values of a same parameter, and each of therespective windings 16 carrying the unbalanced currents has a same number N of turns, such that one winding need not be longer than another winding as in the previously described technique. But this technique does contemplate that the respective windings carrying the unbalanced currents may have different numbers N of turns. - Reducing the DCR of one or more of the windings 16 1-16 n may reduce the amount of power (Irms 2·DCR) that the windings (and thus the coupled-inductor assembly 14) consume, and thus may reduce the amount of heat that the windings (and thus the coupled-inductor assembly) generate.
- Consequently, a coupled-
inductor assembly 14 allowing unbalanced phase currents and having one or more windings with reduced DCRs may allow theconverter 10 to be more power efficient and to generate less heat than a converter that has unbalanced phase currents and that includes a coupled-inductor assembly with windings having different numbers of turns. - Furthermore, allowing one unbalanced current to be a non-integer multiple of another unbalanced current may increase the number of applications in which one may use a coupled-inductor power supply such as the
converter 10. - Referring again to
FIG. 1 , alternate embodiments of thebuck converter 10 are contemplated. For example, theconverter 10 may be modified to generate Vout having a negative value. Furthermore, theconverter 10 may include one or more magnetically uncoupled phases as described in previously incorporated U.S. patent application Ser. Nos. 12/136,014 and 12/136,023. - Further descriptions of coupled-inductor power supplies appear in the following references, which are incorporated by reference: Wong et al., Investigating Coupling Inductors In The Interleaved QSW VRM, IEEE 2000, and Park et al., Modeling And Analysis Of Multi-Interphase Transformers For Connecting Power Converters In Parallel, IEEE 1997.
-
FIG. 3 is a diagram of an embodiment of a current-unbalancingcircuit 30, which thecontroller 18 ofFIG. 1 may include to unbalance two or more of the phase currents i1-in of thebuck converter 10 ofFIG. 1 . - The
circuit 30 includes anerror amplifier 32, a phase-current summer 34, phase-current scalers 36 1-36 n, current-unbalancing summers 38 1-38 n, gain blocks 40 1-40 n, PWM summers 42 1-42 n, and PWM signal generators 44 1-44 n. - The
error amplifier 32 generates a control voltage VEA, which is proportional to the difference between the regulated output voltage Vout (or a scaled version of Vout) and the reference voltage Vref. VEA may be the result of theamplifier 32 low-pass filtering the difference between Vout and Vref. - The phase-
current summer 34 adds the feedback signals IFB1-IFBn to generate a signal ILOADcalculated, which is proportional to the actual load current ILOAD through the load 28 (FIG. 1 ). - Each of the phase-current scalers 36 1-36 n scales ILOADcalculated by a respective one of the values n/a1-n/an according to the respective phase current to be carried by the respective winding 16, where n is the number of coupled phases 12 1-12 n and where a1-an are respective balancing coefficients.
- Each of the current-unbalancing summers 38 1-38 n subtracts from a respective signal IFB1-IFBn a scaled signal from a respective one of the scalers 36 1-36 n.
- Each of the gain blocks 40 1-40 n multiplies a sum from a respective one of the summers 38 1-38 n by a respective gain value G1-Gn to generate a respective signal ΔI1-ΔIn. The values G1-Gn may be selected to give specified frequency and error-correction responses to the respective feedback loops formed in part by the
summer 34, the scalers 36 1-36 n, the summers 38 1-38 n, and the gain blocks 40 1-40 n. Alternatively, the gain blocks 40 1-40 n may be omitted, which is equivalent to G1=G2= . . . =Gn=1. - Each of the summers 42 1-42 n subtracts a respective one of the signals ΔI1-ΔIn from VEA.
- Each of the PWM signal generators 44 1-44 n includes a comparator that receives on a non-inverting input node the resulting sum from a respective one of the summers 42 1-42 n, that receives on an inverting input node a respective conventional ramp signal, and that generates on an output node a respective one of the signals PWM1-PWMn. The phases of the ramp signals may be offset in a conventional manner such that the phases of PWM1-PWMn are offset, for example, by 360°/n as discussed above in conjunction with
FIG. 2 . - Referring to
FIGS. 1 and 3 , the operation of the unbalancingcircuit 30 is described according to an embodiment where theconverter 10 includes two phases 12 1-12 2 (n=2), and is designed to generate i1=3·i2. In this embodiment, i1 represents the average current flowing through thephase 12 1 and i2 represents the average current flowing through thephase 12 2. But in other embodiments, i1 and i2 may represent, e.g., the peak, minimum, or rms currents respectively flowing through thephases - The “on” portions of PWM1 and PWM2 (e.g., the portions of PWM1 and PWM2 at
logic 1 inFIG. 2 ) are proportional to VEA. For example, if Vout decreases to less than Vref, then VEA tends to increase, and this increase in VEA tends to increase the lengths of the on portions of PWM1 and PWM2. The increases in the lengths of the on portions of PWM1 and PWM2 increase the on times of the high-side transistors 20 1-20 2, and this tends to cause Vout to increase back toward Vref. Conversely if Vout increases to more than Vref, then VEA tends to decrease, and this reduction in VEA tends to decrease the lengths of the on portions of PWM1 and PWM2. The decreases in the lengths of the on portions of PWM1 and PWM2 decrease the on times of the high-side transistors 20 1-20 2, and this tends to cause Vout to decrease back toward Vref. - As described below, the signals ΔI1-ΔI2 effectively and respectively adjust the signal VEA for the phases 12 1-12 2 via the PWM summers 42 1-42 n to set i1=3·i2.
- When
-
i 1=3·i 2 (1) -
then -
I FB1=3·I FB2 (2) -
n/a 1 ·I LOADcalculated =I FB1 (3) -
and -
n/a 2 ·I LOADcalculated =I FB2. (4) - Also, because n/a1·ILOADcalculated+n/a2·ILOADcalculated=ILOADcalculated, then
-
n/a 1 +n/a 2=1. (5) - Therefore, from equations (2)-(4), one may derive the following:
-
n/a 1 ·I LOADcalculated=3·I FB2=3·n/a 2 ·I LOADcalculated (6) -
and -
a2=3a1. (7) - And, from equations (5) and (7) and that n=2 in this embodiment, one may derive the following:
-
a 1 =a 2 ·n/(a 2 −n) (8) -
a 1=8/3 (9) -
and -
a2=8. (10) - Therefore, when IFB1=3·IFB2, IFB1=2/(8/3)=¾·ILOADcalculated, IFB2=¼·ILOADcalculated, the output of the unbalancing summer 38 1 equals zero, and the output of the unbalancing summer 38 2 equals zero, and the
circuit 30 makes no adjustment to the signal VEA from theerror amplifier 32. - But suppose that IFB1<3·IFB2, and thus both IFB1, and i1 are too low.
- Therefore, the difference output of the unbalancing summer 38 1 is negative and the value ΔI1 is negative, but the inverting input of the PWM summer 42 1 effectively makes ΔI1 positive, and thus makes the output of the PWM summer 44 1 more positive as compared to the summer output due to VEA alone. This tends to increase the on portion of PWM1, and thus tends to increase both IFB1, and i1.
- In contrast, when IFB1<3IFB2, then IFB2>(IFB1)/3, and both IFB2 and i2 are too high.
- Therefore, the difference output of the unbalancing summer 38 2 is positive and the value ΔI2 is positive, but the inverting input of the PWM summer 42 2 effectively makes ΔI2 negative, and thus makes the output of the PWM summer 44 2 more negative as compared to the output due to VEA alone. This tends to decrease the on portion of PWM2, and thus tends to decrease both IFB2 and i2.
- Consequently, when IFB1 is too low and IFB2 is too high, the
current unbalancing circuit 30 acts to increase IFB1 and reduce IFB2 to the values set by the scalers 36 1-36 2, and thus acts to increase i1 and reduce i2 toward i1=3·i2. But since the current-unbalancingcircuit 30 maintains ILOADcalculated (and thus maintains the actual load current ILOAD) substantially constant, the unbalancing circuit ideally does not cause Vout to drift out of regulation by causing Vout to increase or decrease relative to Vref. - In a similar manner, the unbalancing
circuit 30 acts to decrease IFB1 and i1 and to increase IFB2 and i2 to the respective values set by the scalers 36 1-36 2 when IFB1 and i1 are too high and IFB2 and i2 are too low. - And when IFB1 and IFB2 equal the values respectively set by the scalers 36 1 and 36 2 (and thus i1=3·i2), the difference signals ΔI1=ΔI2=0, and the signal VEA sets the on portions of PWM1 and PWM2 as if the circuitry generating ΔI1 and ΔI2 were not present.
- Still referring to
FIGS. 1 and 3 , the current-unbalancingcircuit 30 may operate in a similar manner when theconverter 10 includes more than twophases 12, and when the currents i through more than two of these phases are unbalanced. - Referring again to
FIG. 3 , alternate embodiments of the current-unbalancingcircuit 30 are contemplated. -
FIG. 4 is a perspective view of an embodiment of the coupled-inductor core assembly 14 ofFIG. 1 , where the core assembly may be designed for use when two or more of the phases 12 1-12 n of thebuck converter 10 ofFIG. 1 carry unbalanced currents. - In addition to the windings 16 1-16 n, the
core assembly 14 includes a core 50 having winding forms 52 1-52 n and anoptional leakage form 53, andmembers members - Each winding 16 1-16 n is formed from a respective conductor 60 1-60 n, which has a respective width W1-Wn, and each conductor 60 1-60 n is wound, in a Faraday's law sense, N1-Nn turns about a respective form 52 1-52 n and extends beneath and adjacent to the remaining forms. For example, the winding 16 1 is formed from a conductor 60 1 that is wound N1=1 turn about the
form 52 1 and extends beneath and adjacent to the remaining forms 52 2-52 n. Although the conductor 60 1 is adjacent to only three sides of theform 52 1, the current i1 through the conductor 60 1 traverses a closed loop through which theform 52 1 passes. The portions of this closed loop other than the conductor 60 1 may be formed, e.g., by a conductive trace on a circuit board on which thecore assembly 14 is disposed. Therefore, N1 is the integer number of closed loops through which theform 52 1 extends. Similarly, the winding 16 2 is formed from a conductor 60 2 that is wound N2=1 turn about theform 52 2 and extends beneath and adjacent to the remainingforms 52 1 and 52 3-52 n, and so on. The conductors 60 1-60 n may be made from any suitable conductive material such as copper or another metal, and may, but need not be, electrically insulated from the forms 52 1-52 n. - Each form 52 1-52 n and 53 has a respective length I1-In and Ilk, a respective permeability μ1-μn and μlk, and a respective cross-sectional area A1-An and Alk. Although some of these like parameters (e.g., the lengths I1-In and Ilk) are shown as being equal in
FIG. 4 , some or all of these like parameters may have different values. Furthermore, some or all of the permeabilities μ1-μn and μlk may be made to be different by forming therespective forms 52 from different materials. Moreover, an optional gap 62 (e.g., an air gap) may be disposed in theleakage form 53 to adjust the reluctance thereof. Alternatively, theoptional gap 62 may be distributed throughout the material from which theleakage form 53 is made. - Referring to
FIGS. 1 and 4 , the operation of the coupled-inductor assembly 14 is generally described when a current i1 flows through the conductor 60 1 in the direction shown, it being understood that the operation is similar when a current flows through the other conductors 60 2-60 n. For purposes of example, it is assumed that the coupled-inductor assembly 14 is mounted to a printed circuit board such that the forms 52 2-52 n do not pass inside the loop(s) composed in part by the conductor 60 1. - As the current i1 flows through the conductive loop composed in part by the conductor 60 1, it generates a total magnetic flux φT. In a first-order approximation, a first portion φ1 of the total flux φT flows through the
form 52 1, and a second portion φout of the total flux φT flows outside of theform 52 1 such that φT is given by the following equation: -
φT=φ1+φout (11) - The first flux portion φ1 flows through the remaining forms 52 2-52 n and 53 such that the sum of the fluxes φ2-φn and φlk flowing through each of the remaining forms equals φ1. Because the portion of φ1 that equals φ2+φ3+ . . . +φn flows through the forms 52 2-52 n about which the conductors 60 2-60 n are wound, this portion of φ1 is called the coupling flux. The portion φ2-φn of the coupling flux φ1 induce respective currents to flow in the conductors 60 2-60 n. As discussed further below in conjunction with
FIGS. 5-6 , the specific values of the fluxes φ1-φn depend on the reluctances R1-Rn and Rlk of the forms 52 1-52 n and 53. - And the remaining flux equal to the sum φout+φlk is called the total leakage flux, because it does not induce any currents to flow in the conductors 60 2-60 n. Where φout<<φlk, then the total leakage flux may be approximated as φlk. As discussed further below in conjunction with
FIGS. 5-6 , the specific value of the flux φlk depends on the reluctances R1-Rn and Rlk of the forms 52 1-52 n and 53. - Referring again to
FIG. 4 , each portion of thecore 50 has a respective maximum flux density B above which that portion of the core will magnetically saturate. - For known reasons that are omitted for brevity, it may be desirable to run a power supply like the
buck converter 10 ofFIG. 1 such that no portion of the core 50 saturates when the phases 12 1-12 n carry the respective currents i1-in that they are designed to carry. - An embodiment of a technique for designing the
core 50 and the core-assembly 14 so that no portion of the core saturates under expected operating conditions is discussed below in conjunction withFIGS. 5-6 . For reasons discussed above in conjunction withFIG. 1 , this embodiment may allow N1≠N2≠ . . . ≠Nn. -
FIG. 5 is an embodiment of an equivalentmagnetic circuit 70 of the core-assembly 14 ofFIG. 4 . R1-Rn and Rlk are the respective reluctances of the forms 52 1-52 n and 53 ofFIG. 4 , R12-R(n-1)n and Rnk are the respective reluctances of the portions of themember 54 between adjacent pairs of the forms, and R21-Rn(n-1) and Rkn are the respective reluctances of the portions of themember 56 between adjacent pairs of the forms. For example, R12 is the reluctance of the portion of themember 54 between theforms member 54 between theforms member 56 between theforms member 56 between theforms FIG. 4 for purposes of mathematical convention that may simplify mathematical calculations that use thecircuit model 70. Furthermore, themodel 70 may ignore the leakage flux φout if φout<<φlk, or may include the contribution of φout in φlk. -
FIG. 6 is an embodiment of an equivalentmagnetic circuit 80 of the core-assembly 14 ofFIG. 4 for a two-phase embodiment (n=2) of thebuck converter 10 ofFIG. 1 . In this embodiment, it is assumed that the reluctances of themembers members magnetic circuit 80, thus further simplifying thecircuit 80 as compared to thecircuit 70 ofFIG. 5 . Furthermore, thecircuit model 80 includes the contribution of φout (FIG. 4 ) in φlk by including in Rlk the reluctance of the path traversed by φout (this also assumes that φout is the same for i1 and i2). Moreover, it is assumed that the maximum flux densities of theleakage form 53 and themembers forms leakage form 53 includes the gap 62 (FIG. 4 ) and the cross-sectional areas of theforms forms - φ1 and φ2 of the
model circuit 80 may be given by the following: -
- And R1, R2, and Rlk are given by the following:
-
- Furthermore, the flux densities B1 and B2 through the
forms -
- Therefore, to prevent saturation of the
forms 52 1 and 52 2 (and thus to prevent saturation of all portions of the core 50 in this example), one may designs the core 50 according to the following: -
B1<B1max (19) -
B2<B2max (20) - where B1max is the maximum flux density that the
form 52 1 is able to conduct without saturating, and B2max is the maximum flux density that theform 52 2 is able to conduct without saturating. One may determine B1max and B2max in a conventional manner. For example, one may determine B1max and B2max from μ1 and μ2, or retrieve B1max and B2max from a table based on the respective materials from which theforms - Referring to
FIGS. 4 and 6 , an example procedure for designing a two-phase embodiment of the coupled-inductor assembly 14 using thecircuit model 80 is described. In this example, -
i 1 =m·i 2 (21) - where m may be any positive number.
- From equations (12)-(21), one may derive the following expressions of the respective flux densities φ1 and φ2 in the
forms respective forms -
- In this design example, the following equalities are also assumed:
-
μ1=μ2=μ (24) -
B1max=B2max=Bmax (25) -
A1=A2=Ak=A (26) -
N1=N2=N (27) -
m=3 (28) - From equations (22)-(26), one may derive the following expressions for B1 and B2:
-
- Then, for a specified value for i1, a designer may select values for A, N, μ, μlk, I1, I2, and Ilk such that equations (27) and (28) are true. Furthermore, to set B1 equal to B2, the designer may select the values for μ, μlk, I1, I2, and Ilk according to the following equation, which is derived from equations (27) and (28):
-
- Furthermore, in this example, although the coupled-
inductor assembly 14 is designed for thewindings - Appendix A includes additional mathematical expressions that are derived from the
circuit model 80 ofFIG. 6 and that may be useful in designing the coupled-inductor assembly 14 and a power supply such as the buck converter 10 (FIG. 1 ). - Still referring to
FIGS. 4 and 6 , other embodiments of the coupled-inductor assembly 14 and the above-described procedure for designing the assembly are contemplated. For example, the design procedure may be extrapolated to design a coupled-inductor assembly having more than two coupledphase 12, and having fewer or more than one leakage form. Furthermore, one may use thecircuit model 70 ofFIG. 5 to design theassembly 14 by modifying the design equations accordingly. Moreover, one may develop design equations similar to those described above to mathematically demonstrate that other portions of the core 50 (e.g., themembers inductor assembly 14 may include uncoupled forms as discussed in U.S. patent application Ser. Nos. 12/136,014 and 12/136,023, which are incorporated by reference. Furthermore, instead of or in addition to theleakage form 53, thecore assembly 14 may include a leakage plate as described in U.S. patent application Ser. No. 11/903,185, which is incorporated by reference. -
FIG. 7 is a block diagram of a system 90 (here a computer system), which may incorporate a multiphase power supply 92 (such as thebuck converter 10 ofFIG. 1 ) that generates unbalanced phase currents and that includes an embodiment of the coupled-inductor assembly 14 ofFIG. 4 . - The
system 90 includescomputer circuitry 94 for performing computer functions, such as executing software to perform desired calculations and tasks. Thecircuitry 94 typically includes a controller, processor, or one or more other integrated circuits (ICs) 96, and thepower supply 92, which provides power to the IC(s) 96. One ormore input devices 98, such as a keyboard or a mouse, are coupled to thecomputer circuitry 94 and allow an operator (not shown) to manually input data thereto. One ormore output devices 100 are coupled to thecomputer circuitry 94 to provide to the operator data generated by the computer circuitry. Examples ofsuch output devices 100 include a printer and a video display unit. One or more data-storage devices 102 are coupled to thecomputer circuitry 94 to store data on or retrieve data from external storage media (not shown). Examples of thestorage devices 102 and the corresponding storage media include drives that accept hard and floppy disks, tape cassettes, compact disk read-only memories (CD-ROMs), and digital-versatile disks (DVDs). - From the foregoing it will be appreciated that, although specific embodiments have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the invention. Furthermore, where an alternative is disclosed for a particular embodiment, this alternative may also apply to other embodiments even if not specifically stated.
- The following are mathematical expressions for parameters of a two-phase embodiment of the coupled-
inductor core assembly 14 ofFIGS. 1 and 4 . These expressions have been derived using themagnetic circuit model 80 ofFIG. 6 . - L1=Lc1+Llk1 is the self inductance of the winding 16 1.
- L2=Lc2+Llk2 is the self inductance of the winding 16 2.
- Lm=Lc1=Lc2 is the coupling inductance between the
windings - Llk1 is the leakage inductance of the winding 16 1, and is defined in terms of the portion of the self flux L1i1 that flows through the
leakage form 53 when i1=1 A. - Llk2 is the leakage inductance of the winding 16 2, and is defined in terms of the portion of the self flux L2i2 that flows through the
leakage form 53 when i2=1 A. - R1 is the reluctance of the
form 52 1. - R2 is the reluctance of the
form 52 2. - Rlk is the reluctance of the
leakage form 53. - A1 is the cross-sectional area of the
form 52 1. - A2 is the cross-sectional area of the
form 52 2. - Alk is the cross-sectional area of the
form 53. - μ1 is the permeability of the
form 52 1. - μ2 is the permeability of the
form 52 2. - μ3 is the permeability of the
form 53. -
-
-
If core and winding If Leakage rung If core structure If winding structure structures are has no air gap is symmetrical is symmetrical both symmetrical (Rk = 0) (R1 = R2) (N1 = N2) (R1 = R2, N1 = N2) Lm = 0
Claims (29)
Priority Applications (2)
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US12/136,018 US20080315982A1 (en) | 2007-06-08 | 2008-06-09 | Coupled-inductor core for unbalanced phase currents |
US14/967,163 US20160098054A1 (en) | 2007-06-08 | 2015-12-11 | Coupled-inductor core for unbalanced phase currents |
Applications Claiming Priority (2)
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US93394907P | 2007-06-08 | 2007-06-08 | |
US12/136,018 US20080315982A1 (en) | 2007-06-08 | 2008-06-09 | Coupled-inductor core for unbalanced phase currents |
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US14/967,163 Division US20160098054A1 (en) | 2007-06-08 | 2015-12-11 | Coupled-inductor core for unbalanced phase currents |
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US20080315982A1 true US20080315982A1 (en) | 2008-12-25 |
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US12/136,014 Expired - Fee Related US8570009B2 (en) | 2007-06-08 | 2008-06-09 | Power supply with a magnetically uncoupled phase and an odd number of magnetically coupled phases, and control for a power supply with magnetically coupled and magnetically uncoupled phases |
US12/136,018 Abandoned US20080315982A1 (en) | 2007-06-08 | 2008-06-09 | Coupled-inductor core for unbalanced phase currents |
US12/136,023 Active 2028-10-10 US8179116B2 (en) | 2007-06-08 | 2008-06-09 | Inductor assembly having a core with magnetically isolated forms |
US14/967,163 Abandoned US20160098054A1 (en) | 2007-06-08 | 2015-12-11 | Coupled-inductor core for unbalanced phase currents |
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US12/136,014 Expired - Fee Related US8570009B2 (en) | 2007-06-08 | 2008-06-09 | Power supply with a magnetically uncoupled phase and an odd number of magnetically coupled phases, and control for a power supply with magnetically coupled and magnetically uncoupled phases |
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US12/136,023 Active 2028-10-10 US8179116B2 (en) | 2007-06-08 | 2008-06-09 | Inductor assembly having a core with magnetically isolated forms |
US14/967,163 Abandoned US20160098054A1 (en) | 2007-06-08 | 2015-12-11 | Coupled-inductor core for unbalanced phase currents |
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Also Published As
Publication number | Publication date |
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US8179116B2 (en) | 2012-05-15 |
US20160098054A1 (en) | 2016-04-07 |
US20080309299A1 (en) | 2008-12-18 |
US8570009B2 (en) | 2013-10-29 |
US20080303495A1 (en) | 2008-12-11 |
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