US20080127485A1

US20080127485A1 - Vents with signal image for signal return path

Info

Publication number: US20080127485A1
Application number: US11/968,695
Authority: US
Inventors: Timothy W. Budell; Thomas P. Camino; Todd W. Davies; Ross W. Keesler; Steven G. Rosser; David B. Stone
Original assignee: Individual
Current assignee: GlobalFoundries Inc
Priority date: 2002-01-08
Filing date: 2008-01-03
Publication date: 2008-06-05
Also published as: US7351917B2; US6977345B2; US20030127249A1; US20060108142A1

Abstract

A method for forming an electrical structure. A dielectric substrate having a metal signal line therein is provided. A first metal voltage plane is laminated to a first surface of the dielectric substrate. An opening in the first metal voltage plane is formed such that a first electrically conductive strip across the opening includes an image of a first portion of the metal signal line, wherein the image of the first portion of the metal signal line projects across the opening in the first metal voltage plane. A signal current is flowed through the metal signal line, wherein the signal current is an alternating current. A return current is flowed through the first electrically conductive strip, wherein the return current includes a portion of the signal current.

Description

This application is a divisional application claiming priority to Ser. No. 11/251,745, filed Oct. 17, 2005, which is divisional of Ser. No. 10/042,031 filed on Jan. 8, 2002, issued as U.S. Pat. No. 6,977,345.

BACKGROUND OF THE INVENTION

1. Technical Field
The present invention relates to a method and structure for venting gases formed during fabrication of a laminate without degradation of performance of alternating current flow in metal signal lines within the laminate.
2. Related Art
Gases formed during fabrication of dielectric laminates may cause catastrophic mechanical failure if not adequately vented. Although clearances in internal power planes aid in this venting, additional venting may be needed. Unfortunately, such additional venting in a voltage plane near signal lines within the laminate may degrade performance of an alternating current (AC) that flows through the signal lines, because such additional venting modifies the electrical path of the alternating current in the voltage plane. Such degraded electrical performance may include: increased characteristic impedance, increased signal loop inductance, increased signal time delay, increased crosstalk with adjacent signal traces, etc. Thus, there is a need for a method and structure for venting gases formed during fabrication of a laminate without degradation of performance of alternating current flow within the laminate.

SUMMARY OF THE INVENTION

The present invention provides an electrical structure, comprising:
a dielectric substrate having a metal signal line therein; and
a metal voltage plane laminated to a surface of the dielectric substrate, wherein the metal voltage plane includes an opening, wherein an image of a portion of the metal signal line projects across the opening, and wherein an electrically conductive strip across the opening includes the image.
The present invention provides a method for forming an electrical structure, comprising:
providing a dielectric substrate having a metal signal line therein;
laminating a metal voltage plane to a surface of the dielectric substrate; and
forming an opening in the metal voltage plane such that an electrically conductive strip across the opening includes an image of a portion of the metal signal line, wherein the image projects across the opening.
The present invention provides a method for designing an electrical structure that includes a dielectric laminate, said method comprising:
designing the dielectric laminate to include at least one dielectric substrate and at least one metal voltage plane, wherein a first metal voltage plane of the at least one metal voltage plane is laminated to a first dielectric substrate of the at least one dielectric substrate;
determining where in the at least one metal voltage plane to place openings for venting of gases generated during fabrication of the dielectric laminate;
determining at least one problematic opening of the openings, wherein the at least one problematic opening is above or below a corresponding metal signal line within the dielectric laminate such that an image of a portion of the corresponding metal signal line projects across the at least one problematic opening; and
designing the at least one problematic opening to include an electrically conductive strip across the at least one problematic opening, wherein the electrically conductive strip includes the image.
The present invention provides a method, structure, and method of design for venting gases formed during fabrication of a laminate without degradation of performance of alternating current flow within the laminate.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 depicts a top view of an electrical structure having metal voltage planes laminated to a dielectric substrate, said substrate including a metal signal line therein, said metal voltage planes having openings therein, in accordance with embodiments of the present invention.

FIG. 2 depicts a front cross-sectional view taken along line 2-2 of FIG. 1, in accordance with embodiments of the present invention.

FIG. 3 depicts the top view of FIG. 1 with electrically conductive strips across the openings, in accordance with embodiments of the present invention.

FIG. 4 depicts a front cross-sectional view taken along line 4-4 of FIG. 3, in accordance with embodiments of the present invention.

FIG. 5 depicts the top view of FIG. 3 with alternative electrically conductive strips across the openings, in accordance with embodiments of the present invention.

FIG. 6 depicts a front cross-sectional view taken along line 6-6 of FIG. 5, in accordance with embodiments of the present invention.

FIG. 7 depicts the top view of FIG. 3 with changed electrically conductive strips across the openings, in accordance with embodiments of the present invention FIG. 8 depicts a front cross-sectional view taken along line 8-8 of FIG. 7, in accordance with embodiments of the present invention.

FIG. 9 is a flow chart of a method for designing any of the electrical structures of FIG. 3-4, 5-6, or 7-8, in accordance with embodiments of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 depicts a top view of an electrical structure 10, and FIG. 2 depicts a front cross-sectional view taken along line 2-2 of FIG. 1, in accordance with embodiments of the present invention. The electrical structure 10 includes metal voltage planes 12 and 32 laminated to a dielectric substrate 20. “Laminating” of layers, planes, etc. is defined herein as uniting said layers, planes, etc. in any manner known to one of ordinary skill in the art (e.g., by adhesive coupling). Similarly, a “laminate” is a series of layers, planes, etc. that has been formed by “laminating.” The dielectric substrate 20 includes a dielectric material 22 (e.g., polyimide, epoxy-glass composite, FR4, alumina, ceramic, polytetrafluoroethylene, BT resin, etc.) and metal signal lines 18 and 19. The metal signal lines 18 and 19 each include an electrically conductive material such as a metal, a metallic alloy, or a non-metallic conductor (e.g., copper, molybdenum, aluminum, conductive ink, etc.) that is known to one of ordinary skill in the art as being suitable for carrying an alternating current. The metal voltage plane 12 is a contiguous metal layer that includes a material 14 on which a voltage V is held constant. The material 14 includes an electrically conductive material such as a metal, a metallic alloy, or a non-metallic conductor (e.g., copper, molybdenum, aluminum, conductive ink, etc. The metal voltage plane 12 may be, inter alia, a ground plane (V=0) or a power plane (V≠0). The metal voltage plane 12 includes an opening (or “vent hole”) 16 which may serve to vent gases generated in the dielectric material 22 during fabrication of the electrical structure 10. The opening 16 may be formed in the metallic material 14 of the metal voltage plane 12 by any method known to one of ordinary skill in the art, such as by, inter alia, chemical etching in combination with lithography to define the opening 16 to be created by etching. Alternatively, the opening 16 may be formed in the metallic material 14 of the metal voltage plane 12 by mechanical or laser drilling. The opening 16 may be formed either before or after the metal voltage plane 12 is laminated to the dielectric substrate 20. Although, the opening 16 is shown in FIG. 1 as having a boundary 15 that is circular, the boundary 15 is a generally closed curve of any geometrical shape: circular or non-circular (e.g., elliptical). The metal voltage plane 32 is contiguous metal layer that includes a metallic material 32. The metal voltage plane 32 has material and voltage properties that are analogous to those of the metal voltage plane 12. The metal voltage plane 32 includes an opening 33 that has physical, geometrical, and functional properties that are analogous to those of the opening 16. The opening 33 could may be formed in the metallic material 34 of the metal voltage plane 32 by any method described supra for forming the opening 16.
If in FIGS. 1 and 2 an alternating electrical current were to flow along an electrical flow path 5 in the signal line 18 in a direction 11, there would be an electrical return flow path 25 in the metal voltage plane 12 due to an electrically disrupting effect of the opening 16, and a geometrically analogous return path in the metal voltage plane 32 due to an electrically disrupting effect of the opening 33. Similarly, if an alternating electrical current were to flow along an electrical flow path 6 in the signal line 19 in the direction 11, there would be an electrical return flow path 29 in the metal voltage plane 12 due to an electrically disrupting effect of the opening 16, and a geometrically analogous return path in the metal voltage plane 32 due to an electrically disrupting effect of the opening 33. The electrical return flow paths 25 and 29 (and geometrically analogous return paths in the metal voltage plane 32) cause degraded electrical performance. Fortunately, the present invention avoids the electrical return flow paths 25 and 29, and associated degraded electrical performance, as explained infra in conjunction with FIGS. 3-8.
FIG. 3 depicts a top view of an electrical structure 30, and FIG. 4 depicts a front cross-sectional view taken along line 4-4 of FIG. 3, in accordance with embodiments of the present invention. The electrical structure 30 of FIGS. 3 and 4 depict the electrical structure 10 of FIGS. 1 and 2 with electrically conductive strips 37 and 38 across the opening 16, and electrically conductive strips 42 and 44 across the opening 33. The electrically conductive strips 37, 38, 42, and 44 each includes an electrically conductive material such as a metal, a metallic alloy, or a non-metallic conductor (e.g., copper, molybdenum, aluminum, conductive ink, etc.). The electrically conductive strips 37 and 42 each includes an image of that portion of the signal line 18 that projects across the openings 16 and 33, respectively. Said images of the portion of the metal signal line 18 may or may not be about (i.e., approximately) congruent to each other. Additionally, the electrically conductive strips 37 and 42 may or may not be about congruent to each other, and the electrically conductive strips 38 and 44 or may not be about congruent to each other. A first geometric entity (i.e., region, figure, shape, etc.) is said to be congruent to a second geometric entity if the first geometric entity coincides with the second geometric entity when the first geometric entity is superimposed on the second geometric entity. The electrically conductive strips 37 and 42 are at least as wide as the metal signal line 18 in the direction 9 (or wider, as shown in FIGS. 3 and 4). Similarly, the electrically conductive strips 38 and 44 are at least as wide as the metal signal line 19 in the direction 9 (or wider, as shown in FIGS. 3 and 4). The electrically conductive strips 38 and 44 each include an image of that portion of the metal signal line 19 that projects across the openings 16 and 33, respectively. The electrically conductive strips 37 and 38 result in the opening 16 having portions 26, 27, and 28 which can be used for, inter alia, the venting of gases generated in the dielectric material 22 during fabrication of the electrical structure 30. Similarly, the electrically conductive strips 42 and 44 result in the opening 33 having portions 46, 47, and 48 which can be used for, inter alia, the venting of gases generated in the dielectric material 22 during fabrication of the electrical structure 30. The portions 26, 27, and 28, in composite, of the opening 16 may have any open cross-sectional area that is sufficient for venting purposes depending on the dielectric material 22 and the processes used to fabricate the electrical structure 30 (e.g., about 0.1 square millimeters or more for some microelectronics applications). Similarly, the portions 46, 47, and 48, in composite, of the opening 33 may have any open cross-sectional area that is sufficient for venting purposes depending on the dielectric material 22 and the processes used to fabricate the electrical structure 30 (e.g., about 0.1 square millimeters or more for some microelectronics applications). The opening 16 comprising portions 26, 27, and 28 in FIGS. 3 and 4 may be formed by any method described supra for forming the opening 16 in FIGS. 1 and 2.
The openings 16 and 33, without regard to electrically conductive strips across the openings 16 and 33, may or may not be about (i.e., approximately) congruent to each other. The opening 16 is congruent to the opening 33 if the opening 16 coincides with the opening 33 when the opening 16 is superimposed on the opening 33, and vice versa.
While FIGS. 3 and 4 show the two electrically conductive strips 37 and 38 across the opening 16, the scope of the present invention generally includes one or more of such electrically conductive strips across the opening 16 and across the opening 33, depending on the number of metal signal lines (e.g., metal signal lines 18 and 19) existing in the substrate 20 and projecting across the openings 16 and 32.
If in FIGS. 3 and 4 an alternating electrical current I were to flow along the electrical flow path 5 in the signal line 18 in the direction 11, there would be an alternating electrical current I₁in an electrical return flow path 24 in the metal voltage plane 12 along the electrically conductive strip 37 in the direction 13, and there would be an alternating electrical current I₂in a geometrically analogous return path in the metal voltage plane 32 along the electrically conductive strip 42 in the direction 13. I₁and I₂are portions of I; i.e., |I₁|≦|I|, |I₂|≦|I|, and |I₁|+|I₂|≦|I|. Similarly, if in FIGS. 3 and 4 an alternating electrical current were to flow along the electrical flow path 6 in the signal line 19 in the direction 11, there would be an electrical return flow path 35 in the metal voltage plane 12 along the electrically conductive strip 38 in the direction 13, and a geometrically analogous return path in the metal voltage plane 32 along the electrically conductive strip 44 in the direction 13. The electrical flow paths 5 and 24 are images of each other looking downward into the opening 16 from the top view of FIG. 3, as are the electrical flow path 5 and the geometrically analogous return path in the metal voltage plane 32. Similarly, the electrical flow paths 6 and 35 are images of each other looking downward into the opening 16 from the top view of FIG. 3, as are the electrical flow path 6 and the geometrically analogous return path in the metal voltage plane 32. The preceding pairs of path images of electrical flow paths 5 and 24, electrical flow paths 6 and 35, etc., avoid the problems of degraded electrical performance associated with the electrical return paths 25 and 29 of FIG. 1.
The electrically conductive strips 37 and 38 are shown in FIGS. 3 and 4 as being integral with the metallic material 14 and of the same material as the metallic material 14, and may be formed as part of the process, described supra, for forming the portions 26, 27, and 28 of the opening 16. Similarly, the electrically conductive strips 42 and 44 may be integral with the metallic material 34 and of the same material as the metallic material 34, and may be formed as part of the process, described supra, for forming the portions 46, 47, and 48 of the opening 33. Other possibilities exist for the conductive strips 37, 38, 42, and 44, as illustrated infra in FIGS. 5 and 6.
FIG. 5 depicts a top view of an electrical structure 40, and FIG. 6 depicts a front cross-sectional view taken along line 6-6 of FIG. 5, in accordance with embodiments of the present invention. The electrical structure 40 of FIGS. 5 and 6 depict the electrical structure 30 of FIGS. 3 and 4 with alternative electrically conductive strips 51 and 52 across the opening 16 for defining portions 53, 54, and 55 of the opening 16, and alternative electrically conductive strips 61 and 62 across the opening 33 for defining portions 63, 64, and 65 of the opening 33. The electrically conductive strips 51 and 52 of FIGS. 5 and 6 respectively replace the electrically conductive strips 37 and 38 of FIGS. 3 and 4, while the electrically conductive strips 61 and 62 of FIGS. 5 and 6 respectively replace the electrically conductive strips 42 and 44 of FIGS. 3 and 4. In FIGS. 5 and 6, the electrically conductive strips 51 and 52 are not integral with the metallic material 14 and thus may be formed or merged with the metallic material 14 and may be of the same or different material as the metallic material 14, and may be formed before, during, or after formation of the portions 53, 54, and 55 of the opening 16. Similarly, the electrically conductive strips 61 and 62 may not be integral with the metallic material 34 and thus may be formed or merged with the metallic material 34 and may be of the same or different material as the metallic material 34, and may be formed before, during, or after formation of the portions 63, 64, and 65 of the opening 33. The electrically conductive strips 51, 52, 61, and 62 may be formed as part of the electrical structure 40 by any method known to one of ordinary skill in the art such as by, inter alia, welding, adhesion such as with conductive epoxy, etc. Aside from the conductive strips 51, 52, 61, and 62 of FIGS. 5 and 6 respectively replacing the conductive strips 37, 38, 42, and 44 of FIGS. 3 and 4, the electrical structure 40 of FIGS. 5 and 6 is the same in function, geometry, structure, etc. as the electrical structure 30 of FIGS. 3 and 4.
The electrically conductive strip 37 in FIGS. 3 and 4 is “linear;” i.e., a centroidal path between ends 56 and end 57 of the electrically conductive strip 37 is approximately linear (i.e., in a straight line) and thus does not include bends or curved segments. The electrically conductive strips 38, 42, and 44 in FIGS. 3 and 4 are similarly linear. Nonetheless, the electrically conductive strips of the present invention may be nonlinear as illustrated infra in FIGS. 7 and 8.
FIG. 7 depicts a top view of an electrical structure 50, and FIG. 8 depicts a front cross-sectional view taken along line 8-8 of FIG. 7, in accordance with embodiments of the present invention. The electrical structure 50 of FIGS. 7 and 8 depict the electrical structure 30 of FIGS. 3 and 4 with alternative electrically conductive strips 71 and 72 across the opening 16 for defining portions 73, 74, and 75 of the opening 16, and alternative electrically conductive strips 81 and 82 across the opening 33 for defining portions 83, 84, and 85 (portion 85 not shown) of the opening 33. The electrically conductive strips 71 and 72 of FIGS. 7 and 8 respectively replace the electrically conductive strips 37 and 38 of FIGS. 3 and 4, while the electrically conductive strips 81 and 82 of FIGS. 7 and 8 respectively replace the electrically conductive strips 42 and 44 of FIGS. 3 and 4. While the electrically conductive strips 71 and 81 are “linear,” the electrically conductive strips 72 and 82 are “nonlinear.” An electrically conductive strip is defined as nonlinear if it is not linear. For example, a centroidal path between ends 86 and end 87 of the electrically conductive strip 72 is not in a straight line and makes a right-angled turn at point 76 on the electrically conductive strip 72. Although not explicitly shown in FIG. 7 or 8, the electrically conductive strip 82 makes a similar right-angled turn. The metal signal line 17 is parallel to the electrically conductive strips 72 and 82, and also makes a similar right-angled turn to maintain said parallelity. The electrically conductive strips 72 and 82 each includes an image of that portion of the metal signal line 17 that projects across the openings 16 and 33, respectively. Although FIGS. 7 and 8 show the electrically conductive strip 72 as having a right-angled bend, the scope of the present invention includes a nonlinear electrically conductive strip of any type, including any degree of curvature and any angle of bend. The electrically conductive strips 72 and 82 are at least as wide as the metal signal line 17 (or wider, as shown in FIGS. 7 and 8). Aside from the nonlinear conductive strips 72 and 82 of FIGS. 7 and 8 respectively replacing the conductive strips 38 and 44 of FIGS. 3 and 4, the electrical structure 50 of FIGS. 7 and 8 is the same in function, geometry, structure, etc. as the electrical structure 30 of FIGS. 3 and 4.
The electrical structures 10, 30, 40, and 50 of FIGS. 1-2, 3-4, 5-6, and 7-8, respectively, may each represent one of a variety of different electrical structures such as, inter alia, a chip carrier or a printed circuit board.
Any of the electrical structures 10, 30, 40, and 50 of FIGS. 3-4, 5-6, and 7-8, respectively, as described herein, may be designed as shown in FIG. 9 and in accordance with embodiments of the present invention. The dielectric laminate of the electrical structure is designed (step 91) to include at least one dielectric substrate and at least one metal voltage plane, and each metal voltage plane is laminated to a corresponding dielectric substrate. Next, a determination is made (step 92) of where in each metal voltage plane to place openings for venting of gases generated during fabrication of the dielectric laminate. Of such openings, problematic openings are determined (step 93). A problematic opening is defined herein as an opening that is above or below a corresponding metal signal line within the dielectric laminate such that an image of a portion of the corresponding metal signal line projects across the problematic opening, such that the problematic opening results in unacceptably degraded electrical performance. Each problematic opening is designed (step 94) to include an electrically conductive strip across the problematic opening, wherein the electrically conductive strip includes said image.
While embodiments of the present invention have been described herein for purposes of illustration, many modifications and changes will become apparent to those skilled in the art. Accordingly, the appended claims are intended to encompass all such modifications and changes as fall within the true spirit and scope of this invention.

Claims

1. A method for forming an electrical structure, comprising:

providing a dielectric substrate having a metal signal line therein;

laminating a first metal voltage plane to a first surface of the dielectric substrate;

forming an opening in the first metal voltage plane such that a first electrically conductive strip across the opening includes an image of a first portion of the metal signal line, wherein the image of the first portion of the metal signal line projects across the opening in the first metal voltage plane;

flowing a signal current through the metal signal line, wherein the signal current is an alternating current; and

flowing a return current through the first electrically conductive strip, wherein the return current includes a portion of the signal current.

2. The method of claim 1, further comprising:

laminating a second metal voltage plane to a second surface of the dielectric substrate; and

forming an opening in the second metal voltage plane such that a second electrically conductive strip across the opening includes an image of a second portion of the metal signal line, wherein the image of the second portion of the metal signal line projects across the opening in the second metal voltage plane.

3. The method of claim 2, further comprising:

flowing a signal current through the metal signal line, wherein the signal current is an alternating current;

flowing a first return current through the first electrically conductive strip, wherein the first return current includes a first portion of the signal current; and

flowing a second return current through the second electrically conductive strip, wherein the second return current includes a second portion of the signal current.

4. The method of claim 2, wherein the opening in the second metal voltage plane is not congruent to the opening in the first metal voltage plane.

5. The method of claim 2, wherein the image of the second portion of the metal signal line is not congruent to the image of the first portion of the metal signal line.

6. The method of claim 2, wherein the second electrically conductive strip is not congruent to the first electrically conductive strip.

7. The method of claim 2, wherein the second electrically conductive strip is about congruent to the first electrically conductive strip

8. The method of claim 1, wherein an electrical performance of the signal current and the return current is not degraded relative to a case in which the opening is not present.

9. The method of claim 1, wherein said laminating the first metal voltage plane to the first surface of the dielectric substrate is performed before said forming the opening in the first metal voltage plane.

10. The method of claim 1, wherein the opening in the first metal voltage plane has an outer boundary whose shape is elliptical.

11. A method for forming an electrical structure, comprising:

providing a dielectric substrate having a metal signal line therein;

laminating a first metal voltage plane to a first surface of the dielectric substrate, wherein the first metal voltage plane includes an opening, wherein an image of a first portion of the metal signal line projects across the opening in the first metal voltage plane, and wherein a first electrically conductive strip across the opening in the first metal voltage plane includes the image of the first portion; and

laminating a second metal voltage plane laminated to a second surface of the dielectric substrate, wherein the second metal voltage plane includes an opening, wherein an image of a second portion of the metal signal line projects across the opening in the second metal voltage plane, and wherein a second electrically conductive strip across the opening in the second metal voltage plane includes the image of the second portion;

12. The method of claim 11, wherein the opening in the first metal voltage plane has an outer boundary whose shape is circular or elliptical.

13. The method of claim 11, wherein the opening in the second metal voltage plane is not congruent to the opening in the first metal voltage plane.

14. The method of claim 11, wherein the image of the second portion of the metal signal line is not congruent to the image of the first portion of the metal signal line.

15. The method of claim 11, wherein the second electrically conductive strip is not congruent to the first electrically conductive strip.

16. The method of claim 11, wherein the second electrically conductive strip is congruent to the first electrically conductive strip.

17. The method of claim 11, wherein the electrical structure comprises an electrical apparatus is a chip carrier, and wherein the electrical apparatus includes the dielectric substrate and the metal voltage plane.

18. The method of claim 11, wherein the first electrically conductive strip is integral with the first metal voltage plane.

19. The method of claim 11, wherein the first electrically conductive strip is linear across the opening in the first metal voltage plane.