US20080055124A1 - Parallel concatenated code with bypass - Google Patents
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- US20080055124A1 US20080055124A1 US11/847,866 US84786607A US2008055124A1 US 20080055124 A1 US20080055124 A1 US 20080055124A1 US 84786607 A US84786607 A US 84786607A US 2008055124 A1 US2008055124 A1 US 2008055124A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/103—Selection of coding mode or of prediction mode
- H04N19/107—Selection of coding mode or of prediction mode between spatial and temporal predictive coding, e.g. picture refresh
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/142—Detection of scene cut or scene change
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
- H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
- H04N19/172—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a picture, frame or field
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards
Definitions
- the present invention relates generally to video encoding and decoding and, in particular, to a bypass to a parallel concatenated code.
- Various products such as digital cameras and digital video cameras, are used to capture images and video.
- These products contain an image sensing device, such as a charge coupled device (CCD), which is used to capture light energy focussed on the image sensing device that is indicative of a scene. The captured light energy is then processed to form a digital image.
- CCD charge coupled device
- a complex encoder requires complex hardware.
- Complex encoding hardware in turn is disadvantageous in terms of design cost, manufacturing cost and physical size of the encoding hardware. Furthermore, long encoding runtime delays the camera shutter. Additionally, more complex encoding hardware has higher battery consumption. As battery life is essential for a mobile device, it is desirable that battery consumption be minimized in mobile devices.
- a method of encoding media data comprising the steps of:
- bitstream from said data by arranging bits from said data in a known order
- a method of encoding video data of a non-key frame comprising the steps of:
- bitstream from said data by arranging bits from said data in a known order
- an apparatus for implementing any one of the aforementioned methods there is provided an apparatus for implementing any one of the aforementioned methods.
- a computer program product including a computer readable medium having recorded thereon a computer program for implementing any one of the methods described above.
- FIG. 1A shows a schematic block diagram of a system 1000 for encoding an input video, for storing or transmitting the encoded video, and for decoding the encoded video;
- FIG. 1B shows a schematic flow diagram of the steps performed by a non-key frame encoder
- FIG. 1C shows a schematic block diagram of a joint decoder
- FIG. 2 shows a schematic block diagram of a turbo coder
- FIG. 3 shows a schematic block diagram of a decoder in which bit plane information is used
- FIG. 4 shows a schematic flow diagram of turning a block of coefficients into a bit stream
- FIG. 5 shows a schematic block diagram of a computer system in which the system shown in FIG. 1A may be implemented.
- FIG. 1A shows a schematic block diagram of a system 1000 for encoding an input video 1005 , for storing or transmitting the encoded video, and for decoding the encoded video.
- the input to system 1000 may be any media data, which include audio data, video data, and audio-video data.
- the system 1000 includes an encoder 1001 and a decoder 1002 connected through a storage or transmission medium 1003 .
- the components 1001 , 1002 and 1003 of the system 1000 may be implemented using a computer system 5000 , such as that shown in FIG. 5 , wherein the encoder 1001 and decoder 1002 may be implemented as software, such as one or more application programs executable within the computer system 5000 .
- the software may be stored in a computer readable medium, including the storage devices described below, for example.
- the software is loaded into the computer system 5000 from the computer readable medium, and then executed by the computer system 5000 .
- a computer readable medium having such software or computer program recorded on it is a computer program product.
- the computer system 5000 is formed by a computer module 5001 , input devices such as a keyboard 5002 and a mouse pointer device 5003 , and output devices including a display device 5014 and loudspeakers 5017 .
- An external Modulator-Demodulator (Modem) transceiver device 5016 may be used by the computer module 5001 for communicating to and from a communications network 5020 via a connection 5021 .
- the computer module 5001 typically includes at least one processor unit 5005 , and a memory unit 5006 .
- the module 5001 also includes an number of input/output (I/O) interfaces including an audio-video interface 5007 that couples to the video display 5014 and loudspeakers 5017 , an I/O interface 5013 for the keyboard 5002 and mouse 5003 , and an interface 5008 for the external modem 5016 .
- the modem 5016 may be incorporated within the computer module 5001 , for example within the interface 5008 .
- a storage device 5009 is provided and typically includes a hard disk drive 5010 and a floppy disk drive 5011 .
- a CD-ROM drive 5012 is typically provided as a non-volatile source of data.
- the components 5005 , to 5013 of the computer module 5001 typically communicate via an interconnected bus 5004 and in a manner which results in a conventional mode of operation of the computer system 5000 known to those in the relevant art.
- the application programs discussed above are resident on the hard disk drive 5010 and read and controlled in execution by the processor 5005 . Intermediate storage of such programs and any data fetched from the network 5020 may be accomplished using the semiconductor memory 5006 , possibly in concert with the hard disk drive 5010 . In some instances, the application programs may be supplied to the user encoded on one or more CD-ROM and read via the corresponding drive 5012 , or alternatively may be read by the user from the network 5020 . Still further, the software can also be loaded into the computer system 5000 from other computer readable media. Computer readable media refers to any storage medium that participates in providing instructions and/or data to the computer system 5000 for execution and/or processing.
- the system 1000 may alternatively be implemented in dedicated hardware such as one or more integrated circuits.
- dedicated hardware may include graphic processors, digital signal processors, or one or more microprocessors and associated memories.
- an encoder 1001 and optionally a decoder 1002 are implemented within a camera (not illustrated), wherein the encoder 1001 and the decoder 1002 may be implemented as software executing in a processor of the camera, or implemented using hardware.
- an input video 1005 is split by a frame splitter 1010 into key frames 1011 and non-key frames 1012 .
- every 5 th frame is a key frame.
- the key frames 1011 and the non-key frames 1012 are encoded in encoders 1021 and 1022 respectively, with encoders 1021 and 1022 operating differently. Also, the encoding of the key frames 1011 and the encoding of the non-key frames 1012 are independent.
- Encoded key-frames 1031 and encoded non-key frames 1032 are stored or transmitted using the storage or transmission medium 1003 .
- the decoder 1002 receives both the encoded key-frames 1031 and the encoded non-key frames 1032 .
- a joint decoder 1100 decodes the encoded key-frames 1031 without using information from the non-key frames, while the encoded non-key frames 1032 are decoded using information from the key-frames.
- the decoded key-frames 1120 and decoded non-key frames 1110 are merged together in a merger 1180 to form output video 1200 .
- the encoding of key frames 1011 performed in the key frame encoder 1021 in a first implementation preferably employs the JPEG compression standard.
- JPEG compression In baseline mode JPEG compression, and in reverse using inverse operation decompression, an image (or frame) is typically tiled into a plurality of blocks, each block comprising eight rows of eight pixels (hereinafter referred to as an 8 ⁇ 8 block of pixels or simply a block of pixels). If necessary, extra columns of image pixel data are appended to the image by replicating a column of the image, so that the image width is a multiple of eight. Similarly, a row of the image is replicated to extend the image, if necessary.
- Each 8 ⁇ 8 block of pixels is then discrete cosine transformed (DCT) into an 8 ⁇ 8 block of DCT coefficients.
- the coefficients of each block of the image is quantised and arranged in a “zigzag” scan order.
- the coefficients are then lossless encoded using a zero run-length and magnitude type code with Huffman coding, or Arithmetic coding. In this manner, all the coefficients (i.e. entire zigzag sequence) of one block of pixels are encoded, into a bit-stream, before a next block is encoded into the bit-stream.
- the blocks of the tiled image are processed in raster scan order as required by the baseline JPEG standard.
- the zigzag sequence of coefficients, for each 8 ⁇ 8 block of DCT coefficients is divided into a plurality of contiguous segments.
- Each contiguous segment is then encoded, in order, in separate scans through the image. That is, coefficients in a first segment of each block are encoded into a bit-stream before coefficients of a next segment of each block are encoded, and so on until substantially all segments of preferably every block of the image are encoded.
- Motion JPEG encodes each frame of a video as a still image using JPEG, and provides a compressed video stream format for wrapping all the encoded frames of a video into a Motion JPEG encoded stream.
- Motion JPEG was never formally standardized.
- the key frame encoder 1021 uses the JPEG2000 standard to encode the key frames 1011 .
- JPEG2000 standard encoding an input image is optionally level shifted and transformed with a component transform.
- an input RGB colour space image for example, may be transformed to a YCbCr colour space image.
- Each component of the (subsequent) image is transformed independently with a discrete wavelet transform.
- the wavelet transform coefficients are quantized to integer values and tiled into code-blocks.
- Each code-block is encoded in bit-planes, or fractions thereof, down to some minimum fractional bit-plane with an arithmetic coder.
- the encoded code-blocks are then grouped along with header information into a JPEG2000 code-stream.
- a JPEG2000 image is decoded by performing the inverse of each of these steps, as far as is possible.
- Motion JPEG2000 encodes each frame of a video as a still image using JPEG2000. It provides a compressed video stream format for wrapping all the encoded frames of a video into a Motion JPEG2000 encoded stream.
- the key frame encoder 1021 uses the H.264 standard to encode the key frames 1011 .
- the H.264 standard is mainly used to compress videos.
- Intra H.264 is the mode where the H.264 standard is employed to encode key frames of video. Accordingly, the encoder 1021 employs intra H.264 to encode the key frames 1011 .
- each frame is divided into one or multiple slices. Each slice consists of macro-blocks which are blocks of 16 ⁇ 16 luminance samples. On each slice a prediction processing step is carried out, which may either be a spatial or a temporal prediction.
- the key frame encoder 1021 uses spatial prediction.
- macro-blocks may be subdivided into sub-macro-blocks, with each sub-macro-block having a size of 16 ⁇ 16, 8 ⁇ 8 or 4 ⁇ 4 samples.
- spatial prediction all pixels of a block are predicted from block edge pixels.
- the macro-blocks are also partitioned into sub-macro-blocks having a size of 16 ⁇ 16, 16 ⁇ 8, 8 ⁇ 16, 8 ⁇ 8, 8 ⁇ 4, 4 ⁇ 8 or 4 ⁇ 4 samples.
- the different sizes and shapes enhance the precision of the motion prediction.
- a 2-D transformation is carried out on each block to spatially decorrelate the data.
- This 2-D transformation supports 8 ⁇ 8 and 4 ⁇ 4 blocks, and is based in integers which enables an exact inverse transformation without rounding errors.
- the block samples are quantized. The quantization is controlled by a single quantization parameter which can be different for each single block.
- the 2-dimensional blocks are scanned in zigzag fashion such that the highest variance coefficients come first and the lowest variance coefficients come last.
- the sequences of coefficients are entropy encoded.
- variable length coding and binary arithmetic coding. Both of those modes are context adaptive.
- Non-key frames are supplied as input for a transformation in step 30 .
- this transformation is a DCT.
- the input non-key frame 1012 is typically transformed as it is done in JPEG, namely the non-key frame 1012 is tiled in a plurality of blocks, each block comprising 8 ⁇ 8 pixels.
- extra columns of image pixel data are appended to the image by replicating a column of the image so that the image width is a multiple of eight.
- a row of the image is replicated to extend the image, if necessary.
- Each 8 ⁇ 8 block of pixels is then discrete cosine transformed into an 8 ⁇ 8 block of DCT coefficients.
- the transformation in step 30 may be wavelet transformation.
- the non-key frame 1012 does not have to be tiled into 8 ⁇ 8 blocks.
- the entire frame can be wavelet transformed and then tiled into 8 ⁇ 8 blocks. Again, if necessary, extra columns of image pixel coefficients can be appended to the transformed image so that the transformed image dimensions are multiples of eight.
- each single 8 ⁇ 8 coefficient block is quantized.
- quantization involves dividing each of the 8 ⁇ 8 DCT coefficients with a corresponding coefficient in an 8 ⁇ 8 quantization matrix, and rounding the result to the nearest integer.
- Each 8 ⁇ 8 block of coefficients may have a different quantization step size parameter q.
- An advantage of using such a quantization step size parameter q is that the noise introduced by the quantization step 40 in some way matches the gain noise.
- the relative magnitude (gain noise/pixel magnitude) of gain noise is 1%.
- For quantization to match (in some way) the gain noise it is desirable for a pixel x and its dequantized value x′ to satisfy the constraint: 1 1 + g ⁇ x ′ x ⁇ 1 + g ( 2 )
- the quantization matches a gain noise of 1% (in a loose sense), while taking advantage of some basic frequency properties of the human visual system.
- quantization step sizes can be used for quantizing the DCT coefficients in the luminance and chrominance channels.
- the user may select a higher compression factor, trading off space for quality, which can be implemented by using larger quantization step sizes.
- the user may select a lower compression factor when quality is at a premium.
- step 40 The quantization of step 40 is followed by bit plane extraction in step 50 where each block of coefficients is turned into a bit stream.
- Step 50 is depicted in FIG. 4 in greater detail.
- the coefficients are scanned in a zig-zag order in step 4010 in a manner similar to that in JPEG.
- Alternative scanning paths are possible, such as raster scan or the scanning path as it is employed in the JPEG2000 standard.
- the scanning in step 4010 starts on the most significant bit plane and concatenates on the most significant bits of the coefficients of the block. This forms a bit stream containing the most significant bits.
- the scanning concatenates the second most significant bits of all coefficients of the block, selected in step 4020 .
- the bits from the second scanning path are appended, in step 4030 , to the bit stream generated in the previous scanning path.
- step 4040 determines that the least significant bit plane is completed. This generates as output of step 50 one bit stream for each single block.
- Steps 4010 therefore arrange the bits of the coefficients of the block in a predetermined, or known order.
- Bits 0 to 63 are from the most significant bit plane, 64 to 127 in the second bit plane and so on.
- bit plane information is stored in header information for each bit plane. Then single bit planes may be processed independently from each other.
- bit stream from each coefficient block is sent to a turbo coder for encoding in step 60 to form an encoded bit stream of each block.
- Step 60 is described in detail below.
- the number of leading zeros and the number of tailing zeros is written into header information to this (turbo) encoded bit stream 1032 of each block.
- a turbo coder performs better if the input bit stream is longer.
- the scanning described above can extend over two or more blocks of coefficients. This lengthens the bit stream and improves the performance of the turbo coder. This also lengthens the runs of the leading and the tailing zeros.
- turbo coder used in step 60 is now described in greater detail with reference to FIG. 2 where a schematic block diagram of the turbo coder is shown.
- the turbo coder receives as input the bit stream 2000 from the bit plane extractor and which consists of the bits from the coefficient block.
- An interleaver 2020 interleaves the bit stream 2000 (the information bit stream, also called the systematic bits).
- this interleaver 2020 is an algebraic interleaver.
- any other interleaver known in the art for example a block interleaver, a random or pseudo-random interleaver, or a circular-shift interleaver, may be used.
- the output from the interleaver 2020 is an interleaved bit stream, which is passed on to a recursive systematic coder 2030 which produces parity bits.
- a recursive systematic coder 2030 which produces parity bits.
- One parity bit per input bit is produced.
- the recursive systematic coder 2030 is generated using the octal generator polynomials 23 and 35 .
- a second recursive systematic coder 2060 operates directly on the bit stream 2000 from the bit plane extractor.
- the recursive systematic coders 2030 and 2060 are identical. However, the recursive systematic coders 2030 and 2060 may also differ. Both recursive systematic coders 2030 and 2060 output a parity bit stream to a puncturer 2040 . Each parity bit stream is equal in length to the input bit stream 2000 .
- the puncturer 2040 deletes deterministically parity bits to reduce the parity bit overhead previously generated by the recursive systematic coders 2030 and 2060 and the remaining parity bits form the encoded non-key frames 1032 .
- so called half-rate codes are employed which means that half the parity bits from each recursive systematic encoder 2030 and 2060 are punctured.
- a puncturer typically deletes every second bit regardless of the bit plane.
- the puncturer 2040 uses the bit plane information, indication from which bit plane each bit originates and associated with the bit in the bit stream 2000 , into a deterministic deletion process. Bits from less significant bit planes are less important and fewer parity bits are provided whereas bits from more significant bit planes are more important and more parity bits are provided.
- no parity bits are punctured in the first (most significant) bit plane.
- every fourth parity bit is preferably punctured.
- every third parity bit is preferably punctured.
- every second bit is preferably punctured.
- every third bit is preferably not punctured.
- every fourth bit is preferably not punctured.
- all parity bits are punctured. This bit plane dependent puncturing scheme produces a half rate code. However, any other code rate can be achieved with a similar coding scheme.
- bit plane information 2010 is retrieved from the header, which is passed to the puncturer 2040 . This allows independent processing of single bit planes.
- the puncturing 2040 does not obtain the bit plane information 2010 extracted from the bit stream 2000 , but rather receives the bit plane information 2010 directly from the bit plane extractor (step 50 in FIG. 1B ).
- bit plane depending puncturing scheme performed in the puncturer 2040 depends on the degree of quantization applied to a block of coefficients. No parity bits are provided on bit planes where quantization introduced large quantization errors.
- the puncturing process/method performed by the puncturer 2040 determines a rate of deleting parity bits from a property of the key frame associated with the non-key frame 1012 being encoded.
- the rate may be determined from the distribution of values of the coefficients of the key frame, allowing non-key frames 1012 associated with a high frequency key frame 1011 to be punctured differently to non-key frames 1012 associated with a low frequency key.
- the turbo coder 50 produce as output the punctured parity bit streams, which comprises parity bits produced by recursive systematic coders 2060 and 2030 .
- the encoding of both the key frames 1011 and the non-key frames 1012 is now fully described. In the following the joint decoding of both the encoded key 1031 and non-key frames 1032 performed in the joint decoder 1100 is described in detail with reference to FIG. 1C where a schematic block diagram of the joint decoder 1100 is shown.
- the encoded key-frames 1031 are retrieved and are decoded using conventional JPEG (intra) decoding, which results in decoded key frames 1120 .
- the decoded key frames 1120 are also supplied to an estimator 1150 where the preceding five (decoded key or non-key) frames are used to obtain an estimate for the next frame to decode.
- Techniques to obtain this estimate may be any low complexity motion estimation, any full motion estimation, any multi-frame motion estimation, and sub-motion estimation as they are described in the literature in the art.
- Alternative methods can be from the vast field of interpolations and from the vast field of extrapolations or any combination of motion estimation, interpolation and extrapolation.
- the estimated frame from the estimator 1150 is supplied to a discrete cosine transformer 1160 where a transformation of the estimated frame is produced. This results in a frame of predicted DCT coefficients in the preferred embodiment.
- the encoded bit stream 1032 from a non-key frame is decoded by the decoder 1080 .
- This is the inverse operation of the encoding performed by encoder 60 ( FIG. 1B ).
- the encoded bit stream 1032 consists of header information about the leading and tailing zeros, as well as the bit stream information 2010 (as described above with reference to FIG. 2 ). It is noted that the output of the decoder 1080 is coefficients in the transformation domain. After all blocks of the non-key frame are decoded, the complete non-key frame is available in the transform domain.
- the decoder 1080 also obtains input from the discrete cosine transformer 1160 , with that additional information being used to improve the decoding quality.
- the decoder 1080 is described in more detail below.
- Reconstructor 1090 receives two inputs.
- the first input is the decoded bit stream from the decoder 1080 representing DCT coefficients. This is a first set of DCT coefficients representing the current video frame.
- the second input to the reconstructor 1090 is the side information DCT coefficients produced by the discrete cosine transformer 1160 , which is a second set of DCT coefficients representing the current video frame for a second time.
- these two sets of DCT coefficients are compared.
- a DCT coefficient from the first set of DCT coefficients is compared to the DCT coefficient from the same pixel location of the second set of DCT coefficients.
- the resulting DCT coefficient for this pixel location is set to be equal to the DCT coefficient from the second set of DCT coefficients in the preferred embodiment. If this difference is not sufficiently small then the resulting DCT coefficient equals the DCT coefficient from the first set of DCT coefficients.
- coeff res denotes the resulting DCT coefficient
- coeff set1 and coeff set2 denote the DCT coefficients from the first and second sets of DCT coefficients.
- Parameter ⁇ depends on the difference between the DCT coefficients coeff set1 and coeff set2 .
- the resulting DCT coefficients coeff res from the reconstructor 1090 are supplied to an inverse transformer 1091 where inverse transformation is carried out. This is the inverse of the transformation performed in transformer 30 ( FIG. 1B ). The output of the inverse transformer 1091 is completely decoded non-key frames.
- the decoded non-key frames 1110 and the decoded key frames 1120 are supplied to merger 1180 ( FIG. 1A ) where the frames 1110 and 1120 are merged to form the complete decompressed video output 1200 .
- the decoder 1080 firstly splits the received encoded bit stream 1032 into parity bits 3000 and systematic bits 3010 .
- the parity bits 3000 are split into two sets of parity bits: one set for the parity bits originating from the recursive systematic coder 2030 ( FIG. 2 ) and one set of parity bits originating from the recursive systematic coder 2060 ( FIG. 2 ).
- Parity Bits 3020 are then input to a Component Decoder 3060 , which preferably employs the Max-Log Maximum Aposteriori Probability (MAP) algorithm known in the art. In alternative embodiments the MAP, the Soft Output Viterbi Decoder (SOVA) or variations thereof are used instead of the Max-Log MAP algorithm.
- the systematic bits 3010 are passed as input to an interleaver 3050 . This interleaver 3050 is also linked to the component decoder 3060 .
- Parity Bits 3040 are input to a Component Decoder 3070 , together with the systematic bits 3010 .
- the decoder 1080 works iteratively.
- a loop is formed starting from component decoder 3060 , to an adder 3065 , to a deinterleaver 3080 , to a component decoder 3070 , to adder 3075 , to interleaver 3090 and back to component decoder 3060 .
- the component decoder 3060 takes three inputs; the parity bits 3020 , the interleaved systematic bits from the interleaver 3050 and some output from the second component decoder 3070 , which was modified in adder 3075 and interleaved in the interleaver 3090 .
- the input from the one component decoder to the other component decoder provides information about the likely values of the bits to be decoded.
- the feedback input from the second component decoder 3070 does not exist, whereas in the first iteration this input is set to zero.
- the (decoded) bit sequence produced by component decoder 3060 is passed on to adder 3065 where the so called a priori information related to the bit stream is produced: the received systematic bits 3050 are extracted in adder 3065 and the information produced by the second component decoder 3070 (which are processed analogously in adder 3075 and interleaved in interleaver 3090 ) are extracted as well. Left over is the a priori information which gives the likely value of a bit. This information is valuable for the next decoder.
- the resulting bit stream is de-interleaved in deinterleaver 3080 , which performs the inverse action of interleaver 3050 .
- the de-interleaved bit stream from deinterleaver 3080 is obtained as input from component decoder 3070 .
- the component decoder 3070 as well as adder 3075 works analogously to component decoder 3060 and adder 3065 already described.
- the resulting bit stream is again interleaved in interleaver 3090 and used as input for the second iteration to the first component decoder 3060 .
- the word “comprising” means “including principally but not necessarily solely” or “having” or “including”, and not “consisting only of”. Variations of the word “comprising”, such as “comprise” and “comprises” have correspondingly varied meanings.
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Abstract
Description
- This application claims the right of priority under 35 U.S.C. § 119 based on Australian Patent Application No. 2006204632, filed Aug. 31, 2006, which is incorporated by reference herein in its entirety as if fully set forth herein.
- The present invention relates generally to video encoding and decoding and, in particular, to a bypass to a parallel concatenated code.
- Various products, such as digital cameras and digital video cameras, are used to capture images and video. These products contain an image sensing device, such as a charge coupled device (CCD), which is used to capture light energy focussed on the image sensing device that is indicative of a scene. The captured light energy is then processed to form a digital image. There are various formats to represent the digital images or videos, which include Motion JPEG, MPEG2, MPEG4 and H.264. These are all video formats, rather than image or video formats.
- All the formats listed above have in common that they are compression formats. While those formats offer high quality and improve the number of images that can be stored on a given media, they typically suffer because of their long encoding runtime.
- A complex encoder requires complex hardware. Complex encoding hardware in turn is disadvantageous in terms of design cost, manufacturing cost and physical size of the encoding hardware. Furthermore, long encoding runtime delays the camera shutter. Additionally, more complex encoding hardware has higher battery consumption. As battery life is essential for a mobile device, it is desirable that battery consumption be minimized in mobile devices.
- It is an object of the present invention to substantially overcome, or at least ameliorate, one or more disadvantages of existing arrangements.
- According to an aspect of the present invention, there is provided a method of encoding media data, said method comprising the steps of:
- forming a bitstream from said data by arranging bits from said data in a known order;
- interleaving said bitstream to form an interleaved bitstream;
- generating parity bits for each of said bitstream and said interleaved bitstream;
- deleting from the generated parity bits at least one bit dependant upon the bitplane of said at least one bit; and
- creating an encoded bitstream of the remaining parity bits.
- According to another aspect of the present invention, there is provided a method of encoding video data of a non-key frame, said method comprising the steps of:
- forming a bitstream from said data by arranging bits from said data in a known order;
- interleaving said bitstream to form an interleaved bitstream;
- generating parity bits for each of said bitstream and said interleaved bitstream;
- deleting from the generated parity bits at least one bit dependant upon a property of a key frame associated with said non-key frame; and
- creating an encoded bitstream of the remaining parity bits.
- According to another aspect of the present invention, there is provided an apparatus for implementing any one of the aforementioned methods.
- According to another aspect of the present invention there is provided a computer program product including a computer readable medium having recorded thereon a computer program for implementing any one of the methods described above.
- Other aspects of the invention are also disclosed.
- One or more embodiments of the present invention will now be described with reference to the drawings, in which:
-
FIG. 1A shows a schematic block diagram of asystem 1000 for encoding an input video, for storing or transmitting the encoded video, and for decoding the encoded video; -
FIG. 1B shows a schematic flow diagram of the steps performed by a non-key frame encoder; -
FIG. 1C shows a schematic block diagram of a joint decoder; -
FIG. 2 shows a schematic block diagram of a turbo coder; -
FIG. 3 shows a schematic block diagram of a decoder in which bit plane information is used; -
FIG. 4 shows a schematic flow diagram of turning a block of coefficients into a bit stream; and -
FIG. 5 shows a schematic block diagram of a computer system in which the system shown inFIG. 1A may be implemented. - Where reference is made in any one or more of the accompanying drawings to steps and/or features, which have the same reference numerals, those steps and/or features have for the purposes of this description the same function(s) or operation(s), unless the contrary intention appears.
-
FIG. 1A shows a schematic block diagram of asystem 1000 for encoding aninput video 1005, for storing or transmitting the encoded video, and for decoding the encoded video. The input tosystem 1000 may be any media data, which include audio data, video data, and audio-video data. Thesystem 1000 includes anencoder 1001 and adecoder 1002 connected through a storage ortransmission medium 1003. - The
components system 1000 may be implemented using acomputer system 5000, such as that shown inFIG. 5 , wherein theencoder 1001 anddecoder 1002 may be implemented as software, such as one or more application programs executable within thecomputer system 5000. The software may be stored in a computer readable medium, including the storage devices described below, for example. The software is loaded into thecomputer system 5000 from the computer readable medium, and then executed by thecomputer system 5000. A computer readable medium having such software or computer program recorded on it is a computer program product. - As seen in
FIG. 5 , thecomputer system 5000 is formed by acomputer module 5001, input devices such as akeyboard 5002 and amouse pointer device 5003, and output devices including adisplay device 5014 andloudspeakers 5017. An external Modulator-Demodulator (Modem)transceiver device 5016 may be used by thecomputer module 5001 for communicating to and from acommunications network 5020 via aconnection 5021. - The
computer module 5001 typically includes at least oneprocessor unit 5005, and amemory unit 5006. Themodule 5001 also includes an number of input/output (I/O) interfaces including an audio-video interface 5007 that couples to thevideo display 5014 andloudspeakers 5017, an I/O interface 5013 for thekeyboard 5002 andmouse 5003, and aninterface 5008 for theexternal modem 5016. In some implementations, themodem 5016 may be incorporated within thecomputer module 5001, for example within theinterface 5008. Astorage device 5009 is provided and typically includes ahard disk drive 5010 and afloppy disk drive 5011. A CD-ROM drive 5012 is typically provided as a non-volatile source of data. - The
components 5005, to 5013 of thecomputer module 5001 typically communicate via an interconnectedbus 5004 and in a manner which results in a conventional mode of operation of thecomputer system 5000 known to those in the relevant art. - Typically, the application programs discussed above are resident on the
hard disk drive 5010 and read and controlled in execution by theprocessor 5005. Intermediate storage of such programs and any data fetched from thenetwork 5020 may be accomplished using thesemiconductor memory 5006, possibly in concert with thehard disk drive 5010. In some instances, the application programs may be supplied to the user encoded on one or more CD-ROM and read via the correspondingdrive 5012, or alternatively may be read by the user from thenetwork 5020. Still further, the software can also be loaded into thecomputer system 5000 from other computer readable media. Computer readable media refers to any storage medium that participates in providing instructions and/or data to thecomputer system 5000 for execution and/or processing. - The
system 1000 may alternatively be implemented in dedicated hardware such as one or more integrated circuits. Such dedicated hardware may include graphic processors, digital signal processors, or one or more microprocessors and associated memories. - In one implementation an
encoder 1001 and optionally adecoder 1002 are implemented within a camera (not illustrated), wherein theencoder 1001 and thedecoder 1002 may be implemented as software executing in a processor of the camera, or implemented using hardware. - Referring again to
FIG. 1A , as in conventional video compression techniques, which include the MPEG1, MPEG2 and MPEG4 compression standards, aninput video 1005 is split by aframe splitter 1010 intokey frames 1011 and non-key frames 1012. Typically, every 5th frame is a key frame. The key frames 1011 and thenon-key frames 1012 are encoded inencoders encoders key frames 1011 and the encoding of thenon-key frames 1012 are independent. - Encoded key-
frames 1031 and encodednon-key frames 1032 are stored or transmitted using the storage ortransmission medium 1003. Thedecoder 1002 receives both the encoded key-frames 1031 and the encoded non-key frames 1032. Ajoint decoder 1100 decodes the encoded key-frames 1031 without using information from the non-key frames, while the encodednon-key frames 1032 are decoded using information from the key-frames. The decoded key-frames 1120 and decodednon-key frames 1110 are merged together in amerger 1180 to formoutput video 1200. - The encoding of
frames key frames 1011 is first described, followed by a description of encoding of the non-key frames 1012. - The encoding of
key frames 1011 performed in thekey frame encoder 1021 in a first implementation preferably employs the JPEG compression standard. In baseline mode JPEG compression, and in reverse using inverse operation decompression, an image (or frame) is typically tiled into a plurality of blocks, each block comprising eight rows of eight pixels (hereinafter referred to as an 8×8 block of pixels or simply a block of pixels). If necessary, extra columns of image pixel data are appended to the image by replicating a column of the image, so that the image width is a multiple of eight. Similarly, a row of the image is replicated to extend the image, if necessary. Each 8×8 block of pixels is then discrete cosine transformed (DCT) into an 8×8 block of DCT coefficients. The coefficients of each block of the image is quantised and arranged in a “zigzag” scan order. The coefficients are then lossless encoded using a zero run-length and magnitude type code with Huffman coding, or Arithmetic coding. In this manner, all the coefficients (i.e. entire zigzag sequence) of one block of pixels are encoded, into a bit-stream, before a next block is encoded into the bit-stream. The blocks of the tiled image are processed in raster scan order as required by the baseline JPEG standard. - In the spectral selection mode of JPEG compression the zigzag sequence of coefficients, for each 8×8 block of DCT coefficients, is divided into a plurality of contiguous segments. Each contiguous segment is then encoded, in order, in separate scans through the image. That is, coefficients in a first segment of each block are encoded into a bit-stream before coefficients of a next segment of each block are encoded, and so on until substantially all segments of preferably every block of the image are encoded.
- While JPEG compression is predominantly used to compress a still image, there are various video encoding formats known loosely as “Motion JPEG”. Motion JPEG encodes each frame of a video as a still image using JPEG, and provides a compressed video stream format for wrapping all the encoded frames of a video into a Motion JPEG encoded stream. However, Motion JPEG was never formally standardized.
- In an alternative implementation the
key frame encoder 1021 uses the JPEG2000 standard to encode the key frames 1011. In the JPEG2000 standard encoding an input image is optionally level shifted and transformed with a component transform. Thus, an input RGB colour space image, for example, may be transformed to a YCbCr colour space image. Each component of the (subsequent) image is transformed independently with a discrete wavelet transform. The wavelet transform coefficients are quantized to integer values and tiled into code-blocks. Each code-block is encoded in bit-planes, or fractions thereof, down to some minimum fractional bit-plane with an arithmetic coder. The encoded code-blocks are then grouped along with header information into a JPEG2000 code-stream. A JPEG2000 image is decoded by performing the inverse of each of these steps, as far as is possible. - While JPEG2000 is predominantly used to compress a still image, Motion JPEG2000 encodes each frame of a video as a still image using JPEG2000. It provides a compressed video stream format for wrapping all the encoded frames of a video into a Motion JPEG2000 encoded stream.
- In yet another alternative implementation the
key frame encoder 1021 uses the H.264 standard to encode the key frames 1011. The H.264 standard is mainly used to compress videos. Intra H.264 is the mode where the H.264 standard is employed to encode key frames of video. Accordingly, theencoder 1021 employs intra H.264 to encode the key frames 1011. In the H.264 standard each frame is divided into one or multiple slices. Each slice consists of macro-blocks which are blocks of 16×16 luminance samples. On each slice a prediction processing step is carried out, which may either be a spatial or a temporal prediction. - The
key frame encoder 1021 uses spatial prediction. In spatial prediction, macro-blocks may be subdivided into sub-macro-blocks, with each sub-macro-block having a size of 16×16, 8×8 or 4×4 samples. In spatial prediction all pixels of a block are predicted from block edge pixels. - In temporal prediction, motion estimation is carried out. To achieve more precise motion estimation the macro-blocks are also partitioned into sub-macro-blocks having a size of 16×16, 16×8, 8×16, 8×8, 8×4, 4×8 or 4×4 samples. The different sizes and shapes enhance the precision of the motion prediction.
- After the prediction processing step a 2-D transformation is carried out on each block to spatially decorrelate the data. This 2-D transformation supports 8×8 and 4×4 blocks, and is based in integers which enables an exact inverse transformation without rounding errors. After each block has been 2-D transformed, the block samples are quantized. The quantization is controlled by a single quantization parameter which can be different for each single block. After quantization the 2-dimensional blocks are scanned in zigzag fashion such that the highest variance coefficients come first and the lowest variance coefficients come last. Finally, the sequences of coefficients are entropy encoded. In the H.264 standard there are two modes of entropy encoding: variable length coding and binary arithmetic coding. Both of those modes are context adaptive.
- Having described the encoding of the
key frames 1011, the encoding ofnon-key frames 1012 performed in thenon-key frame encoder 1022 is described next with reference toFIG. 1B where a schematic flow diagram of the steps performed by theencoder 1022 are shown. Non-key frames are supplied as input for a transformation instep 30. In the preferred embodiment this transformation is a DCT. Withinstep 30 theinput non-key frame 1012 is typically transformed as it is done in JPEG, namely thenon-key frame 1012 is tiled in a plurality of blocks, each block comprising 8×8 pixels. Again, if necessary, extra columns of image pixel data are appended to the image by replicating a column of the image so that the image width is a multiple of eight. Similarly, a row of the image is replicated to extend the image, if necessary. Each 8×8 block of pixels is then discrete cosine transformed into an 8×8 block of DCT coefficients. - As an alternative embodiment, the transformation in
step 30 may be wavelet transformation. In this alternative embodiment, thenon-key frame 1012 does not have to be tiled into 8×8 blocks. The entire frame can be wavelet transformed and then tiled into 8×8 blocks. Again, if necessary, extra columns of image pixel coefficients can be appended to the transformed image so that the transformed image dimensions are multiples of eight. - Next, in
step 40, each single 8×8 coefficient block is quantized. In the preferred embodiment quantization involves dividing each of the 8×8 DCT coefficients with a corresponding coefficient in an 8×8 quantization matrix, and rounding the result to the nearest integer. In the preferred embodiment, the value of a quantization step size parameter q is defined as:
q=2×log2(1+tol) (1)
where the constant tol is some tolerance, preferably 1% (0.01). Each 8×8 block of coefficients may have a different quantization step size parameter q. An advantage of using such a quantization step size parameter q is that the noise introduced by thequantization step 40 in some way matches the gain noise. The relative magnitude (gain noise/pixel magnitude) of gain noise is 1%. For quantization to match (in some way) the gain noise, it is desirable for a pixel x and its dequantized value x′ to satisfy the constraint: - where g is the level of gain noise (e.g. g=0.01 for 1% gain noise). Now suppose the quantization is done uniformly in the log domain (y=log2(x)) with a step size of
q 2×/log2(1+tol), then the quantization error is bound as follows: - since the quantization error is at most ½ the quantization step size. Transforming back to the original pixel (x) domain, the error bound is then:
- Thus, the quantization noise matches, or satisfies the bound of, the gain noise. For example if the constant tol=1%, then the error introduced by the quantization is at a similar level to that of gain noise of 1%. By using such quantization a high quality can be maintained while compressing. The quantization matches a gain noise of 1% (in a loose sense), while taking advantage of some basic frequency properties of the human visual system.
- In other embodiments, other quantization step sizes can be used for quantizing the DCT coefficients in the luminance and chrominance channels. In particular the user may select a higher compression factor, trading off space for quality, which can be implemented by using larger quantization step sizes. Alternatively, the user may select a lower compression factor when quality is at a premium.
- The quantization of
step 40 is followed by bit plane extraction instep 50 where each block of coefficients is turned into a bit stream. -
Step 50 is depicted inFIG. 4 in greater detail. Within each single quantized 8×8 block of coefficients, the coefficients are scanned in a zig-zag order instep 4010 in a manner similar to that in JPEG. Alternative scanning paths are possible, such as raster scan or the scanning path as it is employed in the JPEG2000 standard. - In the preferred embodiment the scanning in
step 4010 starts on the most significant bit plane and concatenates on the most significant bits of the coefficients of the block. This forms a bit stream containing the most significant bits. In a second pass the scanning concatenates the second most significant bits of all coefficients of the block, selected instep 4020. The bits from the second scanning path are appended, instep 4030, to the bit stream generated in the previous scanning path. - The scanning and appending continues in this manner until
step 4040 determines that the least significant bit plane is completed. This generates as output ofstep 50 one bit stream for each single block. -
Steps 4010 therefore arrange the bits of the coefficients of the block in a predetermined, or known order. - Information as to from which bit plane each bit originates stays associated with the bit in the bit stream. In the preferred embodiment this association is achieved by deriving the bit plane from the position of the bit within the bit stream and the size of the coefficient block. In the preferred embodiment the block size is 8×8 and the bit depth is eight. Thus, there are 512 bits per coefficient block. Bits 0 to 63 are from the most significant bit plane, 64 to 127 in the second bit plane and so on.
- In an alternative embodiment the bit plane information is stored in header information for each bit plane. Then single bit planes may be processed independently from each other.
- Referring again to
FIG. 1B , the bit stream from each coefficient block is sent to a turbo coder for encoding instep 60 to form an encoded bit stream of each block.Step 60 is described in detail below. The number of leading zeros and the number of tailing zeros is written into header information to this (turbo) encodedbit stream 1032 of each block. - A turbo coder performs better if the input bit stream is longer. In an alternative embodiment, the scanning described above can extend over two or more blocks of coefficients. This lengthens the bit stream and improves the performance of the turbo coder. This also lengthens the runs of the leading and the tailing zeros.
- The turbo coder used in
step 60 is now described in greater detail with reference toFIG. 2 where a schematic block diagram of the turbo coder is shown. - The turbo coder receives as input the
bit stream 2000 from the bit plane extractor and which consists of the bits from the coefficient block. Aninterleaver 2020 interleaves the bit stream 2000 (the information bit stream, also called the systematic bits). In the preferred embodiment thisinterleaver 2020 is an algebraic interleaver. However, in alternative embodiments any other interleaver known in the art, for example a block interleaver, a random or pseudo-random interleaver, or a circular-shift interleaver, may be used. - The output from the
interleaver 2020 is an interleaved bit stream, which is passed on to a recursivesystematic coder 2030 which produces parity bits. One parity bit per input bit is produced. In the preferred embodiment the recursivesystematic coder 2030 is generated using the octal generator polynomials 23 and 35. - A second recursive
systematic coder 2060 operates directly on thebit stream 2000 from the bit plane extractor. In the preferred embodiment the recursivesystematic coders systematic coders systematic coders puncturer 2040. Each parity bit stream is equal in length to theinput bit stream 2000. - The
puncturer 2040 deletes deterministically parity bits to reduce the parity bit overhead previously generated by the recursivesystematic coders systematic encoder - In the prior art a puncturer typically deletes every second bit regardless of the bit plane. The
puncturer 2040 uses the bit plane information, indication from which bit plane each bit originates and associated with the bit in thebit stream 2000, into a deterministic deletion process. Bits from less significant bit planes are less important and fewer parity bits are provided whereas bits from more significant bit planes are more important and more parity bits are provided. - In the preferred embodiment, assuming that there are 8 bit planes, no parity bits are punctured in the first (most significant) bit plane. In the second bit plane, every fourth parity bit is preferably punctured. In the third bit plane, every third parity bit is preferably punctured. In the fourth and fifth bit planes, every second bit is preferably punctured. In the sixth bit plane every third bit is preferably not punctured. In the seventh bit plane every fourth bit is preferably not punctured. In the eighth (least significant) bit plane all parity bits are punctured. This bit plane dependent puncturing scheme produces a half rate code. However, any other code rate can be achieved with a similar coding scheme.
- In the preferred embodiment the
bit plane information 2010 indicating the bit plane to which a bit belongs is retrieved from the position of the bit within the bit stream as follows:
Bitplane=(position of coefficient)mod(block width×block height) (5) - In an alternative embodiment, when there is a header indicating the bit plane for each bit
plane bit stream 2000, thebit plane information 2010 is retrieved from the header, which is passed to thepuncturer 2040. This allows independent processing of single bit planes. - In yet another alternative embodiment the puncturing 2040 does not obtain the
bit plane information 2010 extracted from thebit stream 2000, but rather receives thebit plane information 2010 directly from the bit plane extractor (step 50 inFIG. 1B ). - In yet another alternative embodiment the bit plane depending puncturing scheme performed in the
puncturer 2040 depends on the degree of quantization applied to a block of coefficients. No parity bits are provided on bit planes where quantization introduced large quantization errors. - In yet another alternative embodiment the puncturing process/method performed by the
puncturer 2040 determines a rate of deleting parity bits from a property of the key frame associated with thenon-key frame 1012 being encoded. For example, the rate may be determined from the distribution of values of the coefficients of the key frame, allowingnon-key frames 1012 associated with a high frequencykey frame 1011 to be punctured differently tonon-key frames 1012 associated with a low frequency key. - The
turbo coder 50 produce as output the punctured parity bit streams, which comprises parity bits produced by recursivesystematic coders key frames 1011 and thenon-key frames 1012 is now fully described. In the following the joint decoding of both the encoded key 1031 andnon-key frames 1032 performed in thejoint decoder 1100 is described in detail with reference toFIG. 1C where a schematic block diagram of thejoint decoder 1100 is shown. - The encoded key-
frames 1031 are retrieved and are decoded using conventional JPEG (intra) decoding, which results in decodedkey frames 1120. - The decoded
key frames 1120 are also supplied to anestimator 1150 where the preceding five (decoded key or non-key) frames are used to obtain an estimate for the next frame to decode. Techniques to obtain this estimate may be any low complexity motion estimation, any full motion estimation, any multi-frame motion estimation, and sub-motion estimation as they are described in the literature in the art. Alternative methods can be from the vast field of interpolations and from the vast field of extrapolations or any combination of motion estimation, interpolation and extrapolation. - The estimated frame from the
estimator 1150 is supplied to adiscrete cosine transformer 1160 where a transformation of the estimated frame is produced. This results in a frame of predicted DCT coefficients in the preferred embodiment. - The encoded
bit stream 1032 from a non-key frame is decoded by thedecoder 1080. This is the inverse operation of the encoding performed by encoder 60 (FIG. 1B ). The encodedbit stream 1032 consists of header information about the leading and tailing zeros, as well as the bit stream information 2010 (as described above with reference toFIG. 2 ). It is noted that the output of thedecoder 1080 is coefficients in the transformation domain. After all blocks of the non-key frame are decoded, the complete non-key frame is available in the transform domain. - Furthermore, the
decoder 1080 also obtains input from thediscrete cosine transformer 1160, with that additional information being used to improve the decoding quality. Thedecoder 1080 is described in more detail below. -
Reconstructor 1090 receives two inputs. The first input is the decoded bit stream from thedecoder 1080 representing DCT coefficients. This is a first set of DCT coefficients representing the current video frame. The second input to thereconstructor 1090 is the side information DCT coefficients produced by thediscrete cosine transformer 1160, which is a second set of DCT coefficients representing the current video frame for a second time. In thereconstructor 1090 these two sets of DCT coefficients are compared. In the preferred embodiment a DCT coefficient from the first set of DCT coefficients is compared to the DCT coefficient from the same pixel location of the second set of DCT coefficients. If this difference is sufficiently small then the resulting DCT coefficient for this pixel location is set to be equal to the DCT coefficient from the second set of DCT coefficients in the preferred embodiment. If this difference is not sufficiently small then the resulting DCT coefficient equals the DCT coefficient from the first set of DCT coefficients. - In an alternative embodiment the DCT coefficients from the first and second sets are combined by a convex combination as follows:
coeffres=α·coeffset1·(1−α)·coeffset2, (6) - where coeffres denotes the resulting DCT coefficient, and coeffset1 and coeffset2 denote the DCT coefficients from the first and second sets of DCT coefficients. Parameter α depends on the difference between the DCT coefficients coeffset1 and coeffset2.
- The resulting DCT coefficients coeffres from the
reconstructor 1090 are supplied to aninverse transformer 1091 where inverse transformation is carried out. This is the inverse of the transformation performed in transformer 30 (FIG. 1B ). The output of theinverse transformer 1091 is completely decoded non-key frames. - The decoded
non-key frames 1110 and the decodedkey frames 1120 are supplied to merger 1180 (FIG. 1A ) where theframes video output 1200. - Having described the
joint decoder 1100, thedecoder 1080 within thejoint decoder 1100 is now described in further detail with reference toFIG. 3 where a schematic block diagram of thedecoder 1080 is shown. Thedecoder 1080 firstly splits the received encodedbit stream 1032 intoparity bits 3000 andsystematic bits 3010. Theparity bits 3000 are split into two sets of parity bits: one set for the parity bits originating from the recursive systematic coder 2030 (FIG. 2 ) and one set of parity bits originating from the recursive systematic coder 2060 (FIG. 2 ). -
Parity Bits 3020 are then input to aComponent Decoder 3060, which preferably employs the Max-Log Maximum Aposteriori Probability (MAP) algorithm known in the art. In alternative embodiments the MAP, the Soft Output Viterbi Decoder (SOVA) or variations thereof are used instead of the Max-Log MAP algorithm. Thesystematic bits 3010 are passed as input to aninterleaver 3050. Thisinterleaver 3050 is also linked to thecomponent decoder 3060. - In a similar manner,
Parity Bits 3040 are input to aComponent Decoder 3070, together with thesystematic bits 3010. - As can be seen in
FIG. 3 , thedecoder 1080 works iteratively. A loop is formed starting fromcomponent decoder 3060, to anadder 3065, to adeinterleaver 3080, to acomponent decoder 3070, to adder 3075, tointerleaver 3090 and back tocomponent decoder 3060. - The processing performed in this loop is now described in more detail. The
component decoder 3060 takes three inputs; theparity bits 3020, the interleaved systematic bits from theinterleaver 3050 and some output from thesecond component decoder 3070, which was modified inadder 3075 and interleaved in theinterleaver 3090. The input from the one component decoder to the other component decoder provides information about the likely values of the bits to be decoded. This information is typically provided in terms of the Log Likelihood
where P(uk+1) denotes the probability that the bit uk equals +1 and where P(uk−1) denotes the probability that the bit uk equals −1. - In the first iteration the feedback input from the
second component decoder 3070 does not exist, whereas in the first iteration this input is set to zero. - The (decoded) bit sequence produced by
component decoder 3060 is passed on toadder 3065 where the so called a priori information related to the bit stream is produced: the receivedsystematic bits 3050 are extracted inadder 3065 and the information produced by the second component decoder 3070 (which are processed analogously inadder 3075 and interleaved in interleaver 3090) are extracted as well. Left over is the a priori information which gives the likely value of a bit. This information is valuable for the next decoder. - After
adder 3065 the resulting bit stream is de-interleaved indeinterleaver 3080, which performs the inverse action ofinterleaver 3050. The de-interleaved bit stream fromdeinterleaver 3080 is obtained as input fromcomponent decoder 3070. In the preferred embodiment thecomponent decoder 3070 as well asadder 3075 works analogously tocomponent decoder 3060 andadder 3065 already described. The resulting bit stream is again interleaved ininterleaver 3090 and used as input for the second iteration to thefirst component decoder 3060. - In the preferred embodiment eight iterations between the
first component decoder 3060 and thesecond component decoder 3070 are carried out. After completion of eight iterations the resulting bit stream produced fromcomponent decoder 3070 is output to the reconstructor 1090 (FIG. 1C ). This completes the description of the joint decoding of both key and non-key frames. - The foregoing describes only some embodiments of the present invention, and modifications and/or changes can be made thereto without departing from the scope and spirit of the invention, the embodiments being illustrative and not restrictive.
- In the context of this specification, the word “comprising” means “including principally but not necessarily solely” or “having” or “including”, and not “consisting only of”. Variations of the word “comprising”, such as “comprise” and “comprises” have correspondingly varied meanings.
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Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2006204632 | 2006-08-31 | ||
AU2006204632A AU2006204632B2 (en) | 2006-08-31 | 2006-08-31 | Parallel concatenated code with bypass |
Publications (2)
Publication Number | Publication Date |
---|---|
US20080055124A1 true US20080055124A1 (en) | 2008-03-06 |
US8086942B2 US8086942B2 (en) | 2011-12-27 |
Family
ID=39150709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/847,866 Expired - Fee Related US8086942B2 (en) | 2006-08-31 | 2007-08-30 | Parallel concatenated code with bypass |
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---|---|
US (1) | US8086942B2 (en) |
AU (1) | AU2006204632B2 (en) |
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US9014278B2 (en) * | 2007-12-03 | 2015-04-21 | Canon Kabushiki Kaisha | For error correction in distributed video coding |
US20100309988A1 (en) * | 2007-12-12 | 2010-12-09 | Canon Kabushiki Kaisha | Error correction in distributed video coding |
US8634663B2 (en) | 2008-11-19 | 2014-01-21 | Canon Kabushiki Kaisha | DVC as generic file format for plenoptic camera |
US20100142839A1 (en) * | 2008-11-19 | 2010-06-10 | Canon Kabushiki Kaisha | Dvc as generic file format for plenoptic camera |
US20100158131A1 (en) * | 2008-12-18 | 2010-06-24 | Canon Kabushiki Kaisha | Iterative dvc decoder based on adaptively weighting of motion side information |
US11388412B2 (en) * | 2019-11-26 | 2022-07-12 | Board Of Regents, The University Of Texas System | Video compression technique using a machine learning system |
US12058340B2 (en) | 2019-11-26 | 2024-08-06 | Board Of Regents, The University Of Texas System | Video compression technique using a machine learning system |
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AU2006204632B2 (en) | 2009-03-26 |
US8086942B2 (en) | 2011-12-27 |
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