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US20070138625A1 - Semiconductor package with heat dissipating structure and method of manufacturing the same - Google Patents

Semiconductor package with heat dissipating structure and method of manufacturing the same Download PDF

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Publication number
US20070138625A1
US20070138625A1 US11/680,470 US68047007A US2007138625A1 US 20070138625 A1 US20070138625 A1 US 20070138625A1 US 68047007 A US68047007 A US 68047007A US 2007138625 A1 US2007138625 A1 US 2007138625A1
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Prior art keywords
heat
semiconductor package
heat slug
semiconductor chip
semiconductor
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Abandoned
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US11/680,470
Inventor
Jeong-Woo Seo
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to US11/680,470 priority Critical patent/US20070138625A1/en
Publication of US20070138625A1 publication Critical patent/US20070138625A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G9/00—Cultivation in receptacles, forcing-frames or greenhouses; Edging for beds, lawn or the like
    • A01G9/12—Supports for plants; Trellis for strawberries or the like
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G17/00—Cultivation of hops, vines, fruit trees, or like trees
    • A01G17/04—Supports for hops, vines, or trees
    • A01G17/06—Trellis-work
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G17/00—Cultivation of hops, vines, fruit trees, or like trees
    • A01G17/04—Supports for hops, vines, or trees
    • A01G17/10—Holders for boughs or branches
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G7/00—Botany in general
    • A01G7/06—Treatment of growing trees or plants, e.g. for preventing decay of wood, for tingeing flowers or wood, for prolonging the life of plants
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to a semiconductor package with a heat dissipating structure and a method of manufacturing the same, and more particularly, to a semiconductor package with a heat dissipating structure and a method of manufacturing the same for preventing malfunction of a semiconductor chip due to a hindrance in thermal dissipation when needing to rapidly dissipate heat that is generated during a high-speed operation of the semiconductor chip to the outside of the package using a heat spreader and a heat slug.
  • thermal dissipation is an important characteristic of semiconductor packages used by high-speed, high-frequency application specific integrated circuit (ASIC) products or high-speed semiconductor memory devices such as dynamic random access memories (DRAMs) and static random access memories (SRAMs).
  • ASIC application specific integrated circuit
  • DRAMs dynamic random access memories
  • SRAMs static random access memories
  • FIG. 1 is a cross-sectional view of a conventional ball grid array (BGA) package 100 .
  • BGA ball grid array
  • the BGA package 100 includes a substrate 110 , a semiconductor chip 130 and a heat sink 170 .
  • the semiconductor chip 130 is adhered to an upper surface of the substrate 110 and electrically connected with the substrate 110 by bonding wires 140 .
  • the BGA package 100 having the above-described construction has the heat sink 170 for effectively dissipating heat generated to the outside the BGA package 100 , when operating electronic components formed within the semiconductor chip 130 .
  • the heat sink 170 is located at an upper part of the semiconductor chip 130 and one surface of the heat sink 170 is exposed to the outside of the BGA package 100 .
  • the heat generated from the semiconductor chip 130 can be easily dissipated to the outside of the BGA package 100 .
  • the bonding wires 140 and the heat sink 170 on the substrate 110 are encapsulated by insulating encapsulant resin 180 .
  • the heat sink 170 is encapsulated to expose one surface thereof to the outside of the BGA package 100 .
  • Solder balls 190 are formed on a lower surface of the substrate 110 on which the semiconductor chip 130 is mounted.
  • the BGA package 100 is provided with the conventional heat sink 170 to ensure improved thermal properties compared to another conventional BGA package without a heat sink.
  • the heat sink 170 is exposed to a surface of the BGA package 100 so that the heat generated when operating the electric components formed in the semiconductor chip 130 is easily dissipated to the outside of the BGA package 100 .
  • the heat generated from the semiconductor chip 130 is dissipated to the outside of the BGA package 100 through the substrate 110 located at a lower part of the semiconductor chip 130 , and the rest is dissipated to the outside of the BGA package 100 through the heat sink 170 located at the upper part of the semiconductor chip 130 .
  • the heat sink 170 is formed on the semiconductor chip 130 to be spaced a distance (L 1 in FIG. 1 ) of about 300-400 ⁇ m apart from the semiconductor chip 130 so as not to damage the bonding wires 140 .
  • the gap L 1 is filled with the insulating encapsulant resin 180 .
  • a highly thermally conductive material for example a metal material, is used as the heat sink 170 .
  • the insulating encapsulant resin 180 is known to have a low thermal conductivity, however.
  • the semiconductor chip 130 is not directly in contact with the heat sink 170 , so most of the heat generated from the semiconductor chip 130 is transferred to the heat sink 170 in the form of radiant heat. Accordingly, thermal dissipation is not efficient with the conventional BGA package structure.
  • the invention provides a semiconductor package with a heat dissipating structure in which heat generated by the operation of electronic components formed in a semiconductor chip is efficiently dissipated by providing various heat dissipating means; the reliability of the operation of the electronic components can be improved; and the semiconductor chip can be prevented from being pressed by a mold when the semiconductor package is encapsulated by encapsulant resin after arranging the heat dissipating means.
  • the invention also provides a method of manufacturing the semiconductor package.
  • a semiconductor package with a heat dissipating structure comprising a substrate; a semiconductor chip mounted on the substrate and electrically connected thereto; a heat slug coupled to the semiconductor chip and formed of a thermally conductive material; and a heat spreader partially exposed to the outside of the semiconductor package and formed on the heat slug to be spaced apart from the heat slug.
  • a method of manufacturing the semiconductor package with a heat dissipating structure comprising electrically coupling a semiconductor chip to the substrate; coupling a heat slug made of a thermally conductive material to an upper surface of the semiconductor chip; and forming a heat spreader over an upper part of the heat slug to be spaced apart from the heat slug.
  • FIG. 1 is a cross-sectional view of a conventional ball grid array package (BGA).
  • BGA ball grid array package
  • FIGS. 2A through 2E are cross-sectional views showing a method of manufacturing a semiconductor package according to the present invention.
  • FIGS. 3A through 3C are perspective views showing a heat slug applied in the semiconductor package according to the present invention.
  • Semiconductor packages according to embodiments of the present invention constitute high-frequency microprocessors or ASIC products, or high-speed semiconductor memory devices such as DRAMs or SRAMs. Such devices mostly have input/output terminals with multiple pins. Semiconductor packages constituting such devices can be classified according to the multiple pin configurations, for example, a plastic or ceramic pin grid array (PGA) package, a land grid array (LGA) package, a ball grid array (BGA) package, a quad flat package, a lead frame package, and the like.
  • PGA plastic or ceramic pin grid array
  • LGA land grid array
  • BGA ball grid array
  • substrates that can be applied to the semiconductor package according to the present invention include a printed circuit board, a ceramic substrate, a metal substrate, a silicon substrate, and the like, which can be applied to semiconductor packages such as a PGA package, a LGA package, a BGA package, a quad flat package and a lead frame package.
  • a BGA package is used as the semiconductor package and a printed circuit board is used as the substrate in the embodiment of the present invention for convenience of explanation.
  • FIGS. 2A to 2 E are cross-sectional views showing a method of manufacturing a semiconductor package according to a preferred embodiment of the present invention. This method and the figures will be explained later.
  • a semiconductor package 200 includes a substrate 210 , a semiconductor chip 230 , a heat slug 260 , and a heat spreader 270 .
  • the substrate 210 has a plurality of solder balls 290 formed on a lower part of the substrate 210 . Coupling the solder balls 290 to the substrate 210 can be performed at any stage, regardless of the order of formation of the semiconductor package 200 .
  • the semiconductor chip 230 is mounted on an upper surface of the substrate 210 and adhered to the substrate 210 by an adhesive 220 .
  • a silver paste is typically used as the adhesive 220 .
  • the semiconductor chip 230 is a chip having a high-frequency microprocessor or ASIC product or a high-speed memory device, e.g., a DRAM or SRAM, embodied therein.
  • Bonding pads (not shown) of the semiconductor chip 230 and electrode pads (not shown) of the substrate 210 are electrically connected to each other by bonding means 240 .
  • the bonding wires are used as the bonding means 240 in the illustrative embodiment of the present invention, the present invention is not limited thereto. That is, the semiconductor chip 230 and the substrate 210 can be electrically connected to each other by flip chip bonding, for example.
  • the bonding wires may be formed of gold, copper, aluminum or a combination thereof.
  • the heat slug 260 is made of a thermally conductive material and adhered to an upper part of the semiconductor chip 230 .
  • the heat slug 260 is preferably made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof.
  • the heat slug 260 may be made of one selected from the group consisting of ceramic, an insulator or a semiconductor material.
  • the heat slug 260 may be formed by casting, forging or press-molding.
  • the heat slug 260 can be adhered to the semiconductor chip 230 using an adhesive 250 .
  • the adhesive 250 must meet several requirements, including not affecting the surface of the semiconductor chip 230 and properly supporting the heat slug 260 .
  • the adhesive 250 is an electric insulator, preferably a heat conductor. Thermally conductive resin is also preferably used as the adhesive 250 . More preferably, silicon rubber or a buffer binder consisting of an elastomer material is used as the adhesive 250 .
  • the adhesive 250 mitigates the transfer of external impact to the semiconductor chip 230 so that damage of the semiconductor chip 230 due to external impacts is suppressed. Further, the heat slug 260 can be prevented from being peeled off due to a difference in coefficients of thermal expansion between the heat slug 260 and the semiconductor chip 230 .
  • thermo-plastic adhesive epoxy thermo-setting adhesive epoxy, thermally conductive epoxy, an adhesive tape, or a combination thereof can also be used as the adhesive 250 .
  • the heat slug 260 disposed between the semiconductor chip 230 and the heat spreader 270 which will be described below, preferably has a thickness L 2 of about 200-400 ⁇ m.
  • FIGS. 3A through 3C are perspective views showing the heat slug 260 according to the illustrative embodiment of the present invention.
  • the heat slug 260 may have a planar surface 262 .
  • one surface of the heat slug 260 has protrusions 264 or grooves 266 so that the effect of dissipating heat generated by the semiconductor chip 230 can be maximized.
  • the heat spreader 270 is formed on the heat slug 260 to be spaced a buffer gap L 3 apart from the heat slug 260 .
  • the buffer gap L 3 is wide enough to serve as a buffer between the heat spreader 270 and the heat slug 260 , for example, about 100 ⁇ m or less.
  • the buffer gap L 3 plays a role as a buffer to absorb a pressure applied during encapsulation of the semiconductor chip 230 , and transfers the heat of the heat slug 260 to the heat spreader 270 .
  • the buffer gap L 3 is more preferably in a range of about 20-30 ⁇ m.
  • the heat spreader 270 includes an upper plate portion 272 and a support 274 .
  • the upper plate portion 272 is formed on the heat slug 260 and spaced the predetermined buffer gap L 3 apart from the heat slug 260 .
  • the support 274 is formed on a lower surface of and at an edge of the upper plate portion 272 , is adhered to the substrate 210 , and supports the upper plate portion 272 .
  • the upper plate portion 272 of the heat spreader 270 has a thickness of about 100-200 ⁇ m and a flat shape. It is preferable that the heat spreader 270 is made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof.
  • the heat spreader 270 can be manufactured by casting, forging, press-molding, and the like.
  • the insulating encapsulant resin 280 encapsulates the semiconductor chip 230 , the heat slug 260 and the heat spreader 270 mounted on the substrate 210 to protect them from external impact. As shown in FIG. 2E , one surface of the upper plate portion 272 of the heat spreader 270 is exposed to effectively dissipate the heat from the heat spreader 270 to the outside of the package 200 . Thus, the substrate 210 , the semiconductor chip 230 , the heat slug 260 and the support 274 of the heat spreader 270 are encapsulated by the insulating encapsulant resin 280 .
  • epoxy molding compound (EMC) can be used as the insulating encapsulant resin 280 .
  • an electric signal output from an external system board is input to the semiconductor chip 230 via the solder balls 290 , the substrate 210 and the bonding means 240 .
  • an electric signal output from the semiconductor chip 230 is input to the external system board via the bonding means 240 , the substrate 210 and the solder balls 290 .
  • the semiconductor chip 230 may be driven at a high speed through the above-described input and output processes.
  • the amount of heat generated from the semiconductor chip 230 may be proportional to the speed at which the semiconductor chip 230 is driven.
  • the heat slug 260 and the heat spreader 270 having a high thermal conductivity are disposed on the upper part of the semiconductor chip 230 .
  • the heat can be more easily dissipated using the heat slug 260 and the heat spreader 270 .
  • malfunction of the semiconductor chip 230 due to a hindrance in thermal dissipation can be prevented.
  • FIGS. 2A through 2E a method of manufacturing the semiconductor package according to the illustrative embodiment of the present invention is explained in reference to FIGS. 2A through 2E .
  • the semiconductor chip 230 is adhered to the substrate 210 using an adhesive 220 , e.g., silver paste. Electrode pads (not shown) of the substrate 210 are electrically connected with bonding pads (not shown) of the semiconductor chip 230 by the bonding means 240 .
  • the adhesive 250 is applied to the upper surface of the semiconductor chip 230 , followed by adhering the heat slug 260 to the semiconductor chip 230 , thereby preventing I/O bonding pads (not shown) formed on the upper surface of the semiconductor chip 230 from being damaged.
  • the heat spreader 270 is formed on the heat slug 260 to be spaced the predetermined buffer gap L 3 apart from the heat slug 260 .
  • the semiconductor chip 230 , the bonding means 240 , the heat slug 260 , and the heat spreader 270 are protected by molding using the insulating encapsulant resin 280 , for example, EMC.
  • the insulating encapsulant resin 280 for example, EMC.
  • the upper surface of the heat spreader 270 is not covered by the insulating encapsulant resin 280 .
  • the external I/O terminals of the semiconductor package 200 that is, the solder balls 290 shown in FIG. 2E . It is preferable, but not mandatory, that the forming of the external I/O terminals is performed after the encapsulating.
  • the external I/O terminals can be optionally formed regardless of the order of formation of the semiconductor package 200 .
  • heat generated from a semiconductor chip can be quickly dissipated by a heat slug and a heat spreader made of a highly thermally conductive material.
  • the semiconductor chip can be stably protected in an encapsulating process using insulating encapsulant resin by an adhesive between the heat slug and the semiconductor chip and a gap between the heat slug and the heat spreader. That is, since thermal dissipation function and a protective function of the semiconductor chip can be simultaneously carried out in the semiconductor package, according to the present invention, excellent performance of the semiconductor chip can be maintained for a long time.

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Abstract

A semiconductor package in which heat is easily dissipated and a semiconductor chip is not damaged during a molding process, and a method of manufacturing the same. The semiconductor package with a heat dissipating structure includes a substrate, a semiconductor chip, which is mounted on the substrate and electrically connected with the substrate by bonding means, a heat slug which is adhered to the semiconductor chip and formed of a thermally conductive material, and a heat spreader partially exposed to the outside of the semiconductor package, and which is formed on the heat slug to be spaced a buffer gap apart from the heat slug.

Description

  • This is a Divisional of U.S. patent application Ser. No. 11/046,514, filed on Jan. 28, 2005, now pending, which claims priority of Korean Patent Application No. 10-2004-05464, filed on Jan. 28, 2004 in the Korean Intellectual Property Office, the disclosures of which are incorporated herein in their entirety by reference.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a semiconductor package with a heat dissipating structure and a method of manufacturing the same, and more particularly, to a semiconductor package with a heat dissipating structure and a method of manufacturing the same for preventing malfunction of a semiconductor chip due to a hindrance in thermal dissipation when needing to rapidly dissipate heat that is generated during a high-speed operation of the semiconductor chip to the outside of the package using a heat spreader and a heat slug.
  • 2. Description of the Related Art
  • Generally, thermal dissipation is an important characteristic of semiconductor packages used by high-speed, high-frequency application specific integrated circuit (ASIC) products or high-speed semiconductor memory devices such as dynamic random access memories (DRAMs) and static random access memories (SRAMs).
  • There has recently been a growing demand for high-speed and high-output semiconductor devices, and semiconductor packages accommodate such demand. Semiconductor packages now being developed or having been developed are roughly classified into two types in terms of a power end demanding high-output: a plastic package type in which a heat sink is usually adhered to a power transistor or a module device, and a heat dissipating type in which heat generated during the operation of electronic components is easily dissipated by using a metal housing for a ceramic substrate.
  • FIG. 1 is a cross-sectional view of a conventional ball grid array (BGA) package 100.
  • As shown in FIG. 1, the BGA package 100 includes a substrate 110, a semiconductor chip 130 and a heat sink 170.
  • The semiconductor chip 130 is adhered to an upper surface of the substrate 110 and electrically connected with the substrate 110 by bonding wires 140. The BGA package 100 having the above-described construction has the heat sink 170 for effectively dissipating heat generated to the outside the BGA package 100, when operating electronic components formed within the semiconductor chip 130. As shown in FIG. 1, the heat sink 170 is located at an upper part of the semiconductor chip 130 and one surface of the heat sink 170 is exposed to the outside of the BGA package 100. Thus, the heat generated from the semiconductor chip 130 can be easily dissipated to the outside of the BGA package 100.
  • After the heat sink 170 is formed on the semiconductor chip 130, the bonding wires 140 and the heat sink 170 on the substrate 110 are encapsulated by insulating encapsulant resin 180. As described above, the heat sink 170 is encapsulated to expose one surface thereof to the outside of the BGA package 100.
  • Solder balls 190 are formed on a lower surface of the substrate 110 on which the semiconductor chip 130 is mounted.
  • The BGA package 100 is provided with the conventional heat sink 170 to ensure improved thermal properties compared to another conventional BGA package without a heat sink. The heat sink 170 is exposed to a surface of the BGA package 100 so that the heat generated when operating the electric components formed in the semiconductor chip 130 is easily dissipated to the outside of the BGA package 100.
  • In the BGA package 100 including the conventional heat sink 170, some of the heat generated from the semiconductor chip 130 is dissipated to the outside of the BGA package 100 through the substrate 110 located at a lower part of the semiconductor chip 130, and the rest is dissipated to the outside of the BGA package 100 through the heat sink 170 located at the upper part of the semiconductor chip 130.
  • The heat sink 170 is formed on the semiconductor chip 130 to be spaced a distance (L1 in FIG. 1) of about 300-400 μm apart from the semiconductor chip 130 so as not to damage the bonding wires 140. The gap L1 is filled with the insulating encapsulant resin 180. Generally, a highly thermally conductive material, for example a metal material, is used as the heat sink 170. Disadvantageously, the insulating encapsulant resin 180 is known to have a low thermal conductivity, however.
  • Accordingly, in the conventional BGA package 100 the semiconductor chip 130 is not directly in contact with the heat sink 170, so most of the heat generated from the semiconductor chip 130 is transferred to the heat sink 170 in the form of radiant heat. Accordingly, thermal dissipation is not efficient with the conventional BGA package structure.
    • SUMMARY OF THE INVENTION
  • The invention provides a semiconductor package with a heat dissipating structure in which heat generated by the operation of electronic components formed in a semiconductor chip is efficiently dissipated by providing various heat dissipating means; the reliability of the operation of the electronic components can be improved; and the semiconductor chip can be prevented from being pressed by a mold when the semiconductor package is encapsulated by encapsulant resin after arranging the heat dissipating means. The invention also provides a method of manufacturing the semiconductor package.
  • In accordance with an aspect of the invention, there is provided a semiconductor package with a heat dissipating structure comprising a substrate; a semiconductor chip mounted on the substrate and electrically connected thereto; a heat slug coupled to the semiconductor chip and formed of a thermally conductive material; and a heat spreader partially exposed to the outside of the semiconductor package and formed on the heat slug to be spaced apart from the heat slug.
  • In accordance with another aspect of the invention, there is provided a method of manufacturing the semiconductor package with a heat dissipating structure comprising electrically coupling a semiconductor chip to the substrate; coupling a heat slug made of a thermally conductive material to an upper surface of the semiconductor chip; and forming a heat spreader over an upper part of the heat slug to be spaced apart from the heat slug.
  • Other objectives, advantages, and features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The above features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
  • FIG. 1 is a cross-sectional view of a conventional ball grid array package (BGA).
  • FIGS. 2A through 2E are cross-sectional views showing a method of manufacturing a semiconductor package according to the present invention.
  • FIGS. 3A through 3C are perspective views showing a heat slug applied in the semiconductor package according to the present invention.
    • DETAILED DESCRIPTION OF THE INVENTION
  • The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout the specification.
  • Semiconductor packages according to embodiments of the present invention constitute high-frequency microprocessors or ASIC products, or high-speed semiconductor memory devices such as DRAMs or SRAMs. Such devices mostly have input/output terminals with multiple pins. Semiconductor packages constituting such devices can be classified according to the multiple pin configurations, for example, a plastic or ceramic pin grid array (PGA) package, a land grid array (LGA) package, a ball grid array (BGA) package, a quad flat package, a lead frame package, and the like.
  • Further, substrates that can be applied to the semiconductor package according to the present invention include a printed circuit board, a ceramic substrate, a metal substrate, a silicon substrate, and the like, which can be applied to semiconductor packages such as a PGA package, a LGA package, a BGA package, a quad flat package and a lead frame package.
  • Hereinafter, a BGA package is used as the semiconductor package and a printed circuit board is used as the substrate in the embodiment of the present invention for convenience of explanation.
  • The embodiment of the present invention is explained with reference to FIGS. 2A to 2E.
  • FIGS. 2A to 2E are cross-sectional views showing a method of manufacturing a semiconductor package according to a preferred embodiment of the present invention. This method and the figures will be explained later.
  • As shown in FIG. 2E, a semiconductor package 200 according to the illustrative embodiment of the present invention includes a substrate 210, a semiconductor chip 230, a heat slug 260, and a heat spreader 270.
  • Here, the substrate 210 has a plurality of solder balls 290 formed on a lower part of the substrate 210. Coupling the solder balls 290 to the substrate 210 can be performed at any stage, regardless of the order of formation of the semiconductor package 200.
  • The semiconductor chip 230 is mounted on an upper surface of the substrate 210 and adhered to the substrate 210 by an adhesive 220. Here, a silver paste is typically used as the adhesive 220. The semiconductor chip 230 is a chip having a high-frequency microprocessor or ASIC product or a high-speed memory device, e.g., a DRAM or SRAM, embodied therein.
  • Bonding pads (not shown) of the semiconductor chip 230 and electrode pads (not shown) of the substrate 210 are electrically connected to each other by bonding means 240. Although the bonding wires are used as the bonding means 240 in the illustrative embodiment of the present invention, the present invention is not limited thereto. That is, the semiconductor chip 230 and the substrate 210 can be electrically connected to each other by flip chip bonding, for example. The bonding wires may be formed of gold, copper, aluminum or a combination thereof.
  • The heat slug 260 is made of a thermally conductive material and adhered to an upper part of the semiconductor chip 230. Here, the heat slug 260 is preferably made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof. Further, the heat slug 260 may be made of one selected from the group consisting of ceramic, an insulator or a semiconductor material. The heat slug 260 may be formed by casting, forging or press-molding.
  • The heat slug 260 can be adhered to the semiconductor chip 230 using an adhesive 250. Here, the adhesive 250 must meet several requirements, including not affecting the surface of the semiconductor chip 230 and properly supporting the heat slug 260. The adhesive 250 is an electric insulator, preferably a heat conductor. Thermally conductive resin is also preferably used as the adhesive 250. More preferably, silicon rubber or a buffer binder consisting of an elastomer material is used as the adhesive 250. The adhesive 250 mitigates the transfer of external impact to the semiconductor chip 230 so that damage of the semiconductor chip 230 due to external impacts is suppressed. Further, the heat slug 260 can be prevented from being peeled off due to a difference in coefficients of thermal expansion between the heat slug 260 and the semiconductor chip 230.
  • Thermo-plastic adhesive epoxy, thermo-setting adhesive epoxy, thermally conductive epoxy, an adhesive tape, or a combination thereof can also be used as the adhesive 250.
  • In the illustrative embodiment of the present invention, the heat slug 260 disposed between the semiconductor chip 230 and the heat spreader 270, which will be described below, preferably has a thickness L2 of about 200-400 μm.
  • FIGS. 3A through 3C are perspective views showing the heat slug 260 according to the illustrative embodiment of the present invention. As shown in FIGS. 3A through 3C, the heat slug 260 may have a planar surface 262. Further, one surface of the heat slug 260 has protrusions 264 or grooves 266 so that the effect of dissipating heat generated by the semiconductor chip 230 can be maximized.
  • As shown in FIG. 2E, the heat spreader 270 is formed on the heat slug 260 to be spaced a buffer gap L3 apart from the heat slug 260. Preferably, the buffer gap L3 is wide enough to serve as a buffer between the heat spreader 270 and the heat slug 260, for example, about 100 μm or less. Here, the buffer gap L3 plays a role as a buffer to absorb a pressure applied during encapsulation of the semiconductor chip 230, and transfers the heat of the heat slug 260 to the heat spreader 270. Damage which may be applied to the semiconductor chip 230 due to a mold pressure applied during encapsulation of elements formed on the substrate 210 using insulating encapsulant resins 280 can be prevented by providing a thin buffer gap L3 between the heat slug 260 and the heat spreader 270. In order for the buffer gap L3 to perform such functions, the buffer gap L3 is more preferably in a range of about 20-30 μm.
  • The heat spreader 270 includes an upper plate portion 272 and a support 274. The upper plate portion 272 is formed on the heat slug 260 and spaced the predetermined buffer gap L3 apart from the heat slug 260. The support 274 is formed on a lower surface of and at an edge of the upper plate portion 272, is adhered to the substrate 210, and supports the upper plate portion 272. Here, the upper plate portion 272 of the heat spreader 270 has a thickness of about 100-200 μm and a flat shape. It is preferable that the heat spreader 270 is made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof. The heat spreader 270 can be manufactured by casting, forging, press-molding, and the like.
  • The insulating encapsulant resin 280 encapsulates the semiconductor chip 230, the heat slug 260 and the heat spreader 270 mounted on the substrate 210 to protect them from external impact. As shown in FIG. 2E, one surface of the upper plate portion 272 of the heat spreader 270 is exposed to effectively dissipate the heat from the heat spreader 270 to the outside of the package 200. Thus, the substrate 210, the semiconductor chip 230, the heat slug 260 and the support 274 of the heat spreader 270 are encapsulated by the insulating encapsulant resin 280. For example, epoxy molding compound (EMC) can be used as the insulating encapsulant resin 280.
  • In the above-described embodiment of the present invention, an electric signal output from an external system board (not shown) is input to the semiconductor chip 230 via the solder balls 290, the substrate 210 and the bonding means 240. Conversely, an electric signal output from the semiconductor chip 230 is input to the external system board via the bonding means 240, the substrate 210 and the solder balls 290. The semiconductor chip 230 may be driven at a high speed through the above-described input and output processes. The amount of heat generated from the semiconductor chip 230 may be proportional to the speed at which the semiconductor chip 230 is driven.
  • In the present invention, as described above, the heat slug 260 and the heat spreader 270 having a high thermal conductivity are disposed on the upper part of the semiconductor chip 230. Thus, although a large amount of heat is generated from the semiconductor chip 230 that may operate at a high speed, the heat can be more easily dissipated using the heat slug 260 and the heat spreader 270. As a result, malfunction of the semiconductor chip 230 due to a hindrance in thermal dissipation can be prevented.
  • Hereinafter, a method of manufacturing the semiconductor package according to the illustrative embodiment of the present invention is explained in reference to FIGS. 2A through 2E.
  • As shown in FIG. 2A, the semiconductor chip 230 is adhered to the substrate 210 using an adhesive 220, e.g., silver paste. Electrode pads (not shown) of the substrate 210 are electrically connected with bonding pads (not shown) of the semiconductor chip 230 by the bonding means 240.
  • As shown in FIG. 2B, the adhesive 250 is applied to the upper surface of the semiconductor chip 230, followed by adhering the heat slug 260 to the semiconductor chip 230, thereby preventing I/O bonding pads (not shown) formed on the upper surface of the semiconductor chip 230 from being damaged.
  • As shown in FIG. 2C, the heat spreader 270 is formed on the heat slug 260 to be spaced the predetermined buffer gap L3 apart from the heat slug 260.
  • As shown in FIG. 2D, the semiconductor chip 230, the bonding means 240, the heat slug 260, and the heat spreader 270 are protected by molding using the insulating encapsulant resin 280, for example, EMC. Here, in order to ensure thermal dissipation efficiency, the upper surface of the heat spreader 270 is not covered by the insulating encapsulant resin 280.
  • As shown in FIG. 2E showing a step of forming external I/O terminals, after completing the encapsulating, the external I/O terminals of the semiconductor package 200, that is, the solder balls 290 shown in FIG. 2E, are formed. It is preferable, but not mandatory, that the forming of the external I/O terminals is performed after the encapsulating. The external I/O terminals can be optionally formed regardless of the order of formation of the semiconductor package 200.
  • While certain exemplary embodiments have been described and shown in the accompanying drawings, it will be appreciated that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims. Therefore, it is to be understood that the above described embodiment is for purposes of illustration only and not to be construed as a limitation of the invention.
  • As described above, in accordance with a semiconductor package with a heat dissipating structure and a method of manufacturing the same according to the present invention, heat generated from a semiconductor chip can be quickly dissipated by a heat slug and a heat spreader made of a highly thermally conductive material.
  • Further, the semiconductor chip can be stably protected in an encapsulating process using insulating encapsulant resin by an adhesive between the heat slug and the semiconductor chip and a gap between the heat slug and the heat spreader. That is, since thermal dissipation function and a protective function of the semiconductor chip can be simultaneously carried out in the semiconductor package, according to the present invention, excellent performance of the semiconductor chip can be maintained for a long time.

Claims (20)

1. A semiconductor package with a heat dissipating structure comprising:
a substrate;
a semiconductor chip which is mounted on the substrate and electrically connected with the substrate by bonding means;
a heat slug which is adhered to the semiconductor chip and formed of a thermally conductive material having a CTE different from that of the semiconductor chip;
a heat spreader partially exposed to the outside of the semiconductor package and which is formed on the heat slug to be spaced a buffer gap apart from the heat slug, and
wherein the heat spreader is spaced apart from the heat slug.
2. The semiconductor package of claim 1, wherein the heat spreader is formed on the heat slug to be spaced a buffer gap of about 20-30 μm and the heat slug has a thickness of about 200-400 μm.
3. The semiconductor package of claim 1, wherein the heat slug is made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof.
4. The semiconductor package of claim 1, wherein the heat slug is made of a thermally conductive material selected from the group consisting of ceramic, an insulator and a semiconductor material.
5. The semiconductor package of claim 1, wherein the heat spreader comprises:
an upper plate portion having one surface exposed to the outside of the semiconductor package and another surface formed on the heat slug to be spaced a predetermined distance apart from the heat slug; and
a support which is formed on a lower surface of an edge of the upper plate portion and supports the upper plate portion on the substrate.
6. The semiconductor package of claim 1, wherein the heat spreader is made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof.
7. The semiconductor package of claim 6, wherein the upper plate portion of the heat spreader has a thickness of about 100-200 μm.
8. The semiconductor package of claim 1, wherein the semiconductor chip and the heat slug are adhered by an adhesive and the adhesive is an electric insulator and a thermal conductor.
9. The semiconductor package of claim 1, wherein the bonding means is a bonding wire.
10. The semiconductor package of claim 1, wherein the heat slug has a CTE smaller than that of the semiconductor chip.
11. A semiconductor package with a heat dissipating structure comprising:
a substrate;
a semiconductor chip which is mounted on the substrate and electrically connected with the substrate by bonding means;
a heat slug which is adhered to the semiconductor chip and formed of a thermally conductive material having a thermal conductivity being higher than the semiconductor chip;
a heat spreader partially exposed to the outside of the semiconductor package and which is formed on the heat slug to be spaced a buffer gap apart from the heat slug, and
wherein the heat spreader is spaced apart from the heat slug.
12. The semiconductor package of claim 11, wherein the heat spreader is formed on the heat slug to be spaced a buffer gap of about 20-30 μm and the heat slug has a thickness of about 200-400 μm.
13. The semiconductor package of claim 11, wherein the heat slug is made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof.
14. The semiconductor package of claim 11, wherein the heat slug is made of a thermally conductive material selected from the group consisting of ceramic, an insulator and a semiconductor material.
15. The semiconductor package of claim 11, wherein the heat spreader comprises:
an upper plate portion having one surface exposed to the outside of the semiconductor package and another surface formed on the heat slug to be spaced a predetermined distance apart from the heat slug; and
a support which is formed on a lower surface of an edge of the upper plate portion and supports the upper plate portion on the substrate.
16. The semiconductor package of claim 11, wherein the heat spreader is made of a highly thermally conductive material selected from the group consisting of copper, a copper alloy, aluminum, an aluminum alloy, steel, stainless steel, and a combination thereof.
17. The semiconductor package of claim 16, wherein the upper plate portion of the heat spreader has a thickness of about 100-200 μm.
18. The semiconductor package of claim 11, wherein the semiconductor chip and the heat slug are adhered by an adhesive and the adhesive is an electric insulator and a thermal conductor.
19. The semiconductor package of claim 18, wherein the adhesive is thermally conductive resin.
20. The semiconductor package of claim 11, wherein the bonding means is a bonding wire.
US11/680,470 2004-01-28 2007-02-28 Semiconductor package with heat dissipating structure and method of manufacturing the same Abandoned US20070138625A1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7999371B1 (en) * 2010-02-09 2011-08-16 Amkor Technology, Inc. Heat spreader package and method
US20130016478A1 (en) * 2011-07-13 2013-01-17 Stmicroelectronics (Grenoble 2) Sas Electronic package with thermal vias, and fabrication process

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070013042A1 (en) * 2005-06-20 2007-01-18 Nokia Corporation Electronic module assembly with heat spreader
DE102006007303A1 (en) * 2006-02-16 2007-08-30 Infineon Technologies Ag Printed circuit board, has grouting cover element, in which multiple chips connected electrically with printed circuit board, are embedded
US9299634B2 (en) 2006-05-16 2016-03-29 Broadcom Corporation Method and apparatus for cooling semiconductor device hot blocks and large scale integrated circuit (IC) using integrated interposer for IC packages
US9013035B2 (en) 2006-06-20 2015-04-21 Broadcom Corporation Thermal improvement for hotspots on dies in integrated circuit packages
US20080042302A1 (en) * 2006-08-16 2008-02-21 Crispell Robert B Plastic overmolded packages with molded lid attachments
JP5259945B2 (en) * 2006-10-30 2013-08-07 スリーエム イノベイティブ プロパティズ カンパニー IC socket with heat dissipation function
JP4861200B2 (en) * 2007-01-15 2012-01-25 シャープ株式会社 Power module
US8013440B2 (en) * 2008-03-28 2011-09-06 Conexant Systems, Inc. Enhanced thermal dissipation ball grid array package
CN101635284B (en) * 2008-07-24 2011-08-03 环旭电子股份有限公司 Wafer packaging structure
WO2010038345A1 (en) * 2008-10-03 2010-04-08 パナソニック株式会社 Wiring board, semiconductor device and method for manufacturing the same
US20110012257A1 (en) * 2009-07-14 2011-01-20 Freescale Semiconductor, Inc Heat spreader for semiconductor package
US8120056B2 (en) * 2009-10-19 2012-02-21 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Light emitting diode assembly
KR101129073B1 (en) * 2009-12-29 2012-03-23 하나 마이크론(주) Heat Radiating Type Semiconductor Package
KR101115714B1 (en) 2009-12-30 2012-03-06 하나 마이크론(주) Method For Fabricating a Heat Radiating Type Semiconductor Package
JP2012033559A (en) 2010-07-28 2012-02-16 J Devices:Kk Semiconductor device
TWI431697B (en) * 2010-11-08 2014-03-21 Advanced Semiconductor Eng Manufacturing method for semiconductor package and packaging mold for manufacturing the same
US8552540B2 (en) 2011-05-10 2013-10-08 Conexant Systems, Inc. Wafer level package with thermal pad for higher power dissipation
KR101992596B1 (en) * 2011-08-16 2019-06-25 삼성전자 주식회사 Memory device
CN202839587U (en) 2012-07-27 2013-03-27 飞思卡尔半导体公司 Surface mounting semiconductor device
KR101463936B1 (en) * 2013-08-19 2014-11-26 주식회사 휘닉스소재 Graphene coating with excellent adhesion to the heat sink for semiconductor package and a method of manufacturing
US20150136357A1 (en) * 2013-11-21 2015-05-21 Honeywell Federal Manufacturing & Technologies, Llc Heat dissipation assembly
KR101640126B1 (en) 2014-06-12 2016-07-15 주식회사 에스에프에이반도체 Semiconductor package manufacturing method
KR101613114B1 (en) 2014-06-12 2016-04-19 주식회사 에스에프에이반도체 Semiconductor package and method for manufacturing the same
KR20150142915A (en) 2014-06-12 2015-12-23 에스티에스반도체통신 주식회사 Semiconductor package and method for manufacturing the same
KR20150142916A (en) 2014-06-12 2015-12-23 에스티에스반도체통신 주식회사 Semiconductor package and method for manufacturing the same
CN109148397B (en) * 2017-06-16 2023-02-28 日月光半导体制造股份有限公司 Semiconductor device package
KR102601150B1 (en) * 2019-08-23 2023-11-09 삼성전자주식회사 Semiconductor package
TWI761864B (en) * 2020-06-19 2022-04-21 海華科技股份有限公司 Chip scale package structure with heat-dissipating type

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5883782A (en) * 1997-03-05 1999-03-16 Intel Corporation Apparatus for attaching a heat sink to a PCB mounted semiconductor package
US5894166A (en) * 1997-09-17 1999-04-13 Northern Telecom Limited Chip mounting scheme
US6236568B1 (en) * 1999-03-20 2001-05-22 Siliconware Precision Industries, Co., Ltd. Heat-dissipating structure for integrated circuit package
US6400014B1 (en) * 2001-01-13 2002-06-04 Siliconware Precision Industries Co., Ltd. Semiconductor package with a heat sink
US6462405B1 (en) * 2000-09-13 2002-10-08 Siliconware Precision Industries Co., Ltd. Semiconductor package
US20030011064A1 (en) * 2001-07-11 2003-01-16 Combs Edward G. Enhanced thermal dissipation integrated circuit package and method of manufacturing enhanced thermal dissipation integrated circuit package
US6593652B2 (en) * 2001-03-12 2003-07-15 Rohm Co., Ltd. Semiconductor device reinforced by a highly elastic member made of a synthetic resin
US6621160B2 (en) * 1995-11-28 2003-09-16 Hitachi, Ltd. Semiconductor device and mounting board
US6882041B1 (en) * 2002-02-05 2005-04-19 Altera Corporation Thermally enhanced metal capped BGA package
US6940161B2 (en) * 2001-05-22 2005-09-06 Hitachi Cable, Ltd. Semiconductor device and process for producing the same
US6952050B2 (en) * 2001-10-05 2005-10-04 Samsung Electronics Co., Ltd. Semiconductor package

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04155853A (en) * 1990-10-19 1992-05-28 Hitachi Ltd Semiconductor integrated circuit device
JP2570605B2 (en) * 1993-11-15 1997-01-08 日本電気株式会社 Semiconductor device
KR970005712B1 (en) * 1994-01-11 1997-04-19 삼성전자 주식회사 High heat sink package
US5610442A (en) * 1995-03-27 1997-03-11 Lsi Logic Corporation Semiconductor device package fabrication method and apparatus
JP3148718B2 (en) * 1998-08-28 2001-03-26 インダストリアル テクノロジー リサーチ インスティチュート Thermally and electrically enhanced semiconductor package
KR20000045081A (en) * 1998-12-30 2000-07-15 마이클 디. 오브라이언 Semiconductor package structure
US6559525B2 (en) * 2000-01-13 2003-05-06 Siliconware Precision Industries Co., Ltd. Semiconductor package having heat sink at the outer surface
JP3768079B2 (en) * 2000-07-25 2006-04-19 シャープ株式会社 Transistor
US20030178719A1 (en) * 2002-03-22 2003-09-25 Combs Edward G. Enhanced thermal dissipation integrated circuit package and method of manufacturing enhanced thermal dissipation integrated circuit package
KR20030082178A (en) * 2002-04-17 2003-10-22 주식회사 칩팩코리아 Tebga package
TW535244B (en) * 2002-04-19 2003-06-01 Advanced Semiconductor Eng Wafer level package method and package structure

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6621160B2 (en) * 1995-11-28 2003-09-16 Hitachi, Ltd. Semiconductor device and mounting board
US5883782A (en) * 1997-03-05 1999-03-16 Intel Corporation Apparatus for attaching a heat sink to a PCB mounted semiconductor package
US5894166A (en) * 1997-09-17 1999-04-13 Northern Telecom Limited Chip mounting scheme
US6236568B1 (en) * 1999-03-20 2001-05-22 Siliconware Precision Industries, Co., Ltd. Heat-dissipating structure for integrated circuit package
US6462405B1 (en) * 2000-09-13 2002-10-08 Siliconware Precision Industries Co., Ltd. Semiconductor package
US6400014B1 (en) * 2001-01-13 2002-06-04 Siliconware Precision Industries Co., Ltd. Semiconductor package with a heat sink
US6593652B2 (en) * 2001-03-12 2003-07-15 Rohm Co., Ltd. Semiconductor device reinforced by a highly elastic member made of a synthetic resin
US6940161B2 (en) * 2001-05-22 2005-09-06 Hitachi Cable, Ltd. Semiconductor device and process for producing the same
US20030011064A1 (en) * 2001-07-11 2003-01-16 Combs Edward G. Enhanced thermal dissipation integrated circuit package and method of manufacturing enhanced thermal dissipation integrated circuit package
US6952050B2 (en) * 2001-10-05 2005-10-04 Samsung Electronics Co., Ltd. Semiconductor package
US6882041B1 (en) * 2002-02-05 2005-04-19 Altera Corporation Thermally enhanced metal capped BGA package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7999371B1 (en) * 2010-02-09 2011-08-16 Amkor Technology, Inc. Heat spreader package and method
US8441120B1 (en) 2010-02-09 2013-05-14 Amkor Technology, Inc. Heat spreader package
US20130016478A1 (en) * 2011-07-13 2013-01-17 Stmicroelectronics (Grenoble 2) Sas Electronic package with thermal vias, and fabrication process

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US7202561B2 (en) 2007-04-10
JP2005217405A (en) 2005-08-11

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