US20060099891A1 - Method of chemical mechanical polishing, and a pad provided therefore - Google Patents
Method of chemical mechanical polishing, and a pad provided therefore Download PDFInfo
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- US20060099891A1 US20060099891A1 US10/924,833 US92483304A US2006099891A1 US 20060099891 A1 US20060099891 A1 US 20060099891A1 US 92483304 A US92483304 A US 92483304A US 2006099891 A1 US2006099891 A1 US 2006099891A1
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- pad
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- copper
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/20—Lapping pads for working plane surfaces
- B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
Definitions
- the present invention relates to a method of chemical mechanical polishing of semiconductor wafers, and to a polishing pad for performing the same.
- Polishing of a semiconductor substrate for the purpose of planarization of the wafer surface is known in the art of semiconductor processing, and is referred to as CMP, or Chemical-Mechanical Planarization.
- CMP chemical-Mechanical Planarization
- a specific application of CMP is known as just “copper CMP”, which entails the polishing of a copper film deposited on the work surface of a semiconductor wafer.
- the copper is typically deposited through the use of electrodeposition, and is typically deposited on a surface in which submicron channels in the underlying oxide layer have been created.
- the copper fills the channels as well as on top of the areas between channels (the “field”).
- the copper above the areas between channels is often called the “overburden”.
- barrier layer Since copper would otherwise diffuse into the oxide layer and potentially reach the sensitive silicon substrate below, destroying the transistors, a “barrier layer” must be made available on the oxide surface before depositing the copper.
- Typical materials for the barrier layer are tantalum (Ta) and tantalum nitride (TaN).
- Ta tantalum
- TaN tantalum nitride
- the objective of the CMP process is to remove all the copper from the field area and leave the copper in the trenches at the level of the oxide.
- the surface of the copper must be left in pristine condition; it must be absolutely flat and without oxidation, contamination or corrosion on its surface. This must be the case for larger areas of copper as well, including areas known as “bond pads”, which are used to allow probes to make contact with the conductor, and are typically 100 um by 50-75 um in dimension.
- the process is usually performed in three steps, involving the three rotating platens normally found on commercially available CMP tools. The steps include: 1) Removal of the bulk copper; 2) Removal of the barrier layer; and 3) A buff of the final surface to remove all residue and passivate the copper surface.
- step 1 the removal of the copper, is divided into two steps. In the first step, half or more of the copper film is removed leaving the surface as planar as possible. In the second step, the remainder of the copper is removed, leaving only barrier material.
- a typical way to carry out process sequence #1 could be to use the following: Platen 1) An IC1000 pad (such as supplied by Rohm and Haas) and a copper slurry such as Cabot 5001; Platen 2) An IC1000 pad and a barrier slurry such as Hitachi T-605; and Platen 3) A Politex pad (such as supplied by Rohm and Haas) and water or water and a passifying chemical such as BTA.
- An IC1000 pad such as supplied by Rohm and Haas
- a copper slurry such as Cabot 5001
- Platen 2 An IC1000 pad and a barrier slurry such as Hitachi T-605
- a Politex pad such as supplied by Rohm and Haas
- water or water and a passifying chemical such as BTA.
- a typical way to carry out process sequence #2 could be to use the following: Platen 1) An IC1000 pad and a copper slurry such as Cabot 5001; Platen 2) An IC1000 pad and a copper slurry such as Cabot 5001; Platen 3) A Politex pad and a barrier slurry such as Hitachi T-605, followed by a rinse with water or water and BTA for passivation.
- Step 3 in the last case could also be done with an IC1000 pad, but is much more typically done with a Politex pad.
- the disadvantage of using the Politex for this purpose is that the pad is basically too soft for the application.
- a typical Politex pad is composed of several layers. The bottom layer is a polyurethane impregnated polyester felt. The next layer is a very porous urethane, and the top layer consists of vertical urethane structures having tapered pores which are wider on the bottom and narrower on top.
- the softness of the pad is advantageous in delivering a very nice final surface (buff), both clean and scratch-free
- the net result of using this pad for the barrier removal step is that the resulting planarity of the wafer is poor.
- the pad As a barrier remover, the pad is exposed initially to both copper and tantalum simultaneously and later when the barrier is cleared, to oxide, copper and tantalum simultaneously. A pad with poor planarizing properties will do a poor job of removing these materials uniformly.
- This nonplanarity can result in bridging (a conductive material remaining where it is supposed to be removed resulting in undesired electrical contact), dishing/erosion (material being removed by the process that should remain in place causing an increase in resistivity if it is copper or shorts if it is oxide), or undesirable surface features which encourage bridging.
- the blown polyurethane material is chemically inert, and is not known to disintegrate in the presence of any of the chemicals it is normally exposed to in CMP.
- sequence #1 would apparently satisfies all requirements. However, it is very slow. It has a much slower throughput (tpt), and thus the polishing equipment is poorly utilized.
- tpt the throughput
- the tpt of a tool is a function of its slowest step. Generally, the robots moving the wafers from station to station on such tools (see, for example, the Mira Mesa, supplied by Applied Materials) are fast. The slowest step is typically the slowest of the platen steps. Since Sequence #1 requires that all of the copper be removed at the first platen, then that platen becomes the tpt limiter. It is not uncommon for that first step to take 3 or 4 minutes, resulting in a maximum tpt of the tool of 15-20 wafers per hour (wph). A higher tpt is generally desired.
- the required planarization is somewhere between that which is offered by the Politex and that which is offered by the IC1000. It would seem as though the ideal pad for this application is one made of blown polyurethane, but such that it is significantly softer than the IC1000.
- a method of chemical mechanical polishing of a copper film deposited on a surface of a semiconductor wafer comprising the steps of removing a bulk copper to a barrier; removing the barrier; and subsequently buffing, wherein said barrier removing and buffing includes using a polyurethane polishing pad at least one layer of which is fabricated from a mix composed of a prepolymer with an isocyanate concentration of between substantially 6.5% and 11.0% or from a monomer and an addition of isocyanate required to achieve a same molal concentration, in which a shore D hardness of the layer is less than substantially 35%.
- the polishing pad for removal of a barrier and subsequent buffing in a chemical mechanical polishing of a copper film deposited on a surface of a semiconductor wafer
- the polishing pad is fabricated from a mix composed of the polymer with an isocyanate concentration of between substantially 6.5% and 11.0% or from a monomer and an addition of isocyanate required to achieve a same molal concentration, and has a shore D hardness less than substantially 35%.
- the inventive method is performed so that the polishing and the inventive polishing pad has such material properties.
- FIG. 1 of the drawings is a view showing a relationship between a hardness of a pad and a number of scratches.
- the present invention resides in a method of chemical mechanical polishing of a copper film deposited on a surface of a semiconductor wafer, comprising the steps of removing the bulk copper to a barrier; removing the barrier; and subsequently buffing, wherein said barrier removal and buffing include using a polyurethane polishing pad fabricated from a mix composed of a prepolymer or a monomer and an addition isocyanate required to achieve a same molal concentration, in which a shore D hardness is less than substantially 35%.
- the isocyanate concentration is between 6.5% and 8.5%, the smaller value generally leading to a softer polishing pad.
- the present invention also relates in a polyurethane polishing pad for removal of a barrier and subsequent buffing in a chemical mechanical polishing process of a copper film deposited on a surface of a semiconductor wafer, the polishing pad fabricated from a mix composed of prepolymer with an isocyanate concentration of between substantially 6.5% and 11.0% or from a monomer and an addition of isocyanate at a concentration required to achieve a same molal concentration, with a shore D hardness less than substantially 35%.
- the pad is made from a polyurethane mix in which the isocyanate concentration is between 6.5% and 8.5%, resulting in pads on the softer side of the hardness spectru.
- the number of scratches comes from a test we developed which was designed to elicit scratches in all cases, even from the softest of pads.
- the test consisted of using a known aggressive barrier slurry, which is virtually incapable of removing copper, and using it to “polish”—at fairly high downforce (4 psi)—a pristine blanket copper film in which the number of pre-polish scratches has already been determined.
- the copper wafer is polished for 1 minute and then remeasured for scratches (using dark-field microscopy at low magnification). The increase in the number of scratches is then plotted:
- the graph indicates the desirable hardness of the pad is approximately under 35 on the Shore D scale.
- the Politex is measured to be 25 on this scale by our measurements (indicated on graph), and for reference, the IC1000 is measured to be 56 by our measurements (indicated on graph) and 55 from information published by Rohm and Haas Corporation.
- GPE Planarization figure of merit
- the above described polyurethane polishing pad is proposed as well as the above described method of removing barrier and buffing.
- the polyurethane polishing pad can have an additive which includes methyl alcohol, or water, or starch of any type including corn starch.
- the pad can have a thickness of between 10 mils and 200 mils, preferably 80 mils.
- the pad in accordance with the present invention can be stacked on a subpad but a preferred embodiment is that the pad is a single-layered pad.
- the pad in accordance with the present invention can be grooved or ungrooved, perforated or unperforated.
- urethanes start with either a prepolymer resin with an NCO concentration of between 6.5% and 11.0%, or a polyol and an amount of isocyanate required to achieve the same molal concentration. Preheat the prepolymer to about 100 deg F., or mix until said temperature is achieved. Start to add additives as desired. These may include initiators such as water, blowing agents such as Vazo, catalysts such as a tertiary amine, and surfactants such as L-6100, a silicone surfactant typically used to regulate cell size supplied by Crompton.
- initiators such as water
- blowing agents such as Vazo
- catalysts such as a tertiary amine
- surfactants such as L-6100
- a silicone surfactant typically used to regulate cell size supplied by Crompton a silicone surfactant typically used to regulate cell size supplied by Crompton.
- An exothermic reaction begins once an accelerant, an example of which accelerant is MOCA (4,4′-Methylenebis-[o-chloroaniline]), also known as a chain extender, is added.
- the pores are created either by the incorporation of air during the mixing or by the intentional addition of pore creators, such as microballoons as taught in Reinhardt, U.S. Pat. No. 5,578,362.
- the mix is then pored into a mold, which may be preheated. While the exothermic reaction is sufficient to bring the temperature of the center of the cake to some 270 degF and thus to a complete reaction, surface cooling would prevent the outside of the cake from reacting in a reasonable period of time. Therefore curing in an oven is required. This is typically done at a temperature of about 240 deg F. for about 6 hours.
- the cake is then cooled and sliced to fabricate the polishing pads.
- the cake After curing, the cake is allowed to cool. Once cool, it can be sliced using equipment consisting of a stationary skiving blade and movable table. Usable slices are then made into pads by applying adhesive to one face, mounting a subpad if desired, grooving the usable surface, finishing with a smoothing process, inspecting and packaging.
- a pad can both planarize and pass the scratch-inducing test, then it can also be used in applications where a buff alone is needed. As such, it might have additional applications such as post-oxide buff. Further, one could conceive of other non-CMP simple cleaning applications commonly carried out in a semiconductor fab environment.
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Abstract
Description
- The present invention relates to a method of chemical mechanical polishing of semiconductor wafers, and to a polishing pad for performing the same.
- Polishing of a semiconductor substrate for the purpose of planarization of the wafer surface is known in the art of semiconductor processing, and is referred to as CMP, or Chemical-Mechanical Planarization. A specific application of CMP is known as just “copper CMP”, which entails the polishing of a copper film deposited on the work surface of a semiconductor wafer. The copper is typically deposited through the use of electrodeposition, and is typically deposited on a surface in which submicron channels in the underlying oxide layer have been created. The copper fills the channels as well as on top of the areas between channels (the “field”). The copper above the areas between channels is often called the “overburden”. Since copper would otherwise diffuse into the oxide layer and potentially reach the sensitive silicon substrate below, destroying the transistors, a “barrier layer” must be made available on the oxide surface before depositing the copper. Typical materials for the barrier layer are tantalum (Ta) and tantalum nitride (TaN). During copper CMP, both the copper overburden and the barrier layer must be polished away, leaving the copper in the channels to act as conducting interconnecting lines. The barrier then clads the copper channels, preventing diffusion of the copper into the oxide.
- The objective of the CMP process is to remove all the copper from the field area and leave the copper in the trenches at the level of the oxide. The surface of the copper must be left in pristine condition; it must be absolutely flat and without oxidation, contamination or corrosion on its surface. This must be the case for larger areas of copper as well, including areas known as “bond pads”, which are used to allow probes to make contact with the conductor, and are typically 100 um by 50-75 um in dimension. The process is usually performed in three steps, involving the three rotating platens normally found on commercially available CMP tools. The steps include: 1) Removal of the bulk copper; 2) Removal of the barrier layer; and 3) A buff of the final surface to remove all residue and passivate the copper surface. After these three steps the wafer is cleaned and dried and is ready for further processing. Often, step 1, the removal of the copper, is divided into two steps. In the first step, half or more of the copper film is removed leaving the surface as planar as possible. In the second step, the remainder of the copper is removed, leaving only barrier material.
- There are, therefore, two primary process sequences used on a three-platen tool during copper CMP. They are either (Sequence #1): Platen 1) bulk copper removal to barrier, Platen 2) barrier removal and Platen #3) buff; or (Sequence #2), Platen 1) incomplete bulk copper removal, Platen 2) final copper removal, and Platen 3) barrier removal and buff. There also exist small variations to these two sequences that could include variations in the chemistries and slurries used, the processing conditions and times, and the exact division of all the required steps. The polishing pads and slurries/chemistries used in these three steps are generally different. At this point, a typical way to carry out process sequence #1 could be to use the following: Platen 1) An IC1000 pad (such as supplied by Rohm and Haas) and a copper slurry such as Cabot 5001; Platen 2) An IC1000 pad and a barrier slurry such as Hitachi T-605; and Platen 3) A Politex pad (such as supplied by Rohm and Haas) and water or water and a passifying chemical such as BTA. Conversely, a typical way to carry out process sequence #2 could be to use the following: Platen 1) An IC1000 pad and a copper slurry such as Cabot 5001; Platen 2) An IC1000 pad and a copper slurry such as Cabot 5001; Platen 3) A Politex pad and a barrier slurry such as Hitachi T-605, followed by a rinse with water or water and BTA for passivation.
- Step 3 in the last case could also be done with an IC1000 pad, but is much more typically done with a Politex pad. The disadvantage of using the Politex for this purpose is that the pad is basically too soft for the application. A typical Politex pad is composed of several layers. The bottom layer is a polyurethane impregnated polyester felt. The next layer is a very porous urethane, and the top layer consists of vertical urethane structures having tapered pores which are wider on the bottom and narrower on top.
- Although the softness of the pad is advantageous in delivering a very nice final surface (buff), both clean and scratch-free, the net result of using this pad for the barrier removal step is that the resulting planarity of the wafer is poor. As a barrier remover, the pad is exposed initially to both copper and tantalum simultaneously and later when the barrier is cleared, to oxide, copper and tantalum simultaneously. A pad with poor planarizing properties will do a poor job of removing these materials uniformly. This nonplanarity can result in bridging (a conductive material remaining where it is supposed to be removed resulting in undesired electrical contact), dishing/erosion (material being removed by the process that should remain in place causing an increase in resistivity if it is copper or shorts if it is oxide), or undesirable surface features which encourage bridging.
- Another issue with the use of the Politex pad is the relatively low lifetime of the pad. In the presence of certain chemicals, the pad will tend to lose integrity, resulting in shortened lifetime. In general, the blown polyurethane material is chemically inert, and is not known to disintegrate in the presence of any of the chemicals it is normally exposed to in CMP.
- The alternative case, using the highly planarizing, highly inert, IC1000 on the third platen will result in a very planar surface without the problems listed above, but with a much higher rate of scratching. Scratching, of course, is unacceptable as it can result in shorts (bridging) and opens (a conductive line interrupted).
- In light of these issues sequence #1 would apparently satisfies all requirements. However, it is very slow. It has a much slower throughput (tpt), and thus the polishing equipment is poorly utilized. Just like any assembly line, the tpt of a tool is a function of its slowest step. Generally, the robots moving the wafers from station to station on such tools (see, for example, the Mira Mesa, supplied by Applied Materials) are fast. The slowest step is typically the slowest of the platen steps. Since Sequence #1 requires that all of the copper be removed at the first platen, then that platen becomes the tpt limiter. It is not uncommon for that first step to take 3 or 4 minutes, resulting in a maximum tpt of the tool of 15-20 wafers per hour (wph). A higher tpt is generally desired.
- The required planarization is somewhere between that which is offered by the Politex and that which is offered by the IC1000. It would seem as though the ideal pad for this application is one made of blown polyurethane, but such that it is significantly softer than the IC1000.
- Accordingly, it is an object of the present invention to provide a method of chemical mechanical polishing and a polishing pad, which are further improvements of the existing methods and polishing pads.
- In keeping with these objects and with others which will become apparent hereinafter, one feature of the present invention resides, briefly stated, in a method of chemical mechanical polishing of a copper film deposited on a surface of a semiconductor wafer, comprising the steps of removing a bulk copper to a barrier; removing the barrier; and subsequently buffing, wherein said barrier removing and buffing includes using a polyurethane polishing pad at least one layer of which is fabricated from a mix composed of a prepolymer with an isocyanate concentration of between substantially 6.5% and 11.0% or from a monomer and an addition of isocyanate required to achieve a same molal concentration, in which a shore D hardness of the layer is less than substantially 35%.
- Another feature of the present invention resides, briefly stated, in a polishing pad for removal of a barrier and subsequent buffing in a chemical mechanical polishing of a copper film deposited on a surface of a semiconductor wafer, the polishing pad is fabricated from a mix composed of the polymer with an isocyanate concentration of between substantially 6.5% and 11.0% or from a monomer and an addition of isocyanate required to achieve a same molal concentration, and has a shore D hardness less than substantially 35%.
- The inventive method is performed so that the polishing and the inventive polishing pad has such material properties.
- The novel features which are considered as characteristic for the present invention are set forth in particular in the appended claims. The invention itself, however, both as to its construction and its method of operation, together with additional objects and advantages thereof, will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
-
FIG. 1 of the drawings is a view showing a relationship between a hardness of a pad and a number of scratches. - The present invention resides in a method of chemical mechanical polishing of a copper film deposited on a surface of a semiconductor wafer, comprising the steps of removing the bulk copper to a barrier; removing the barrier; and subsequently buffing, wherein said barrier removal and buffing include using a polyurethane polishing pad fabricated from a mix composed of a prepolymer or a monomer and an addition isocyanate required to achieve a same molal concentration, in which a shore D hardness is less than substantially 35%. In a preferred embodiment, the isocyanate concentration is between 6.5% and 8.5%, the smaller value generally leading to a softer polishing pad.
- The present invention also relates in a polyurethane polishing pad for removal of a barrier and subsequent buffing in a chemical mechanical polishing process of a copper film deposited on a surface of a semiconductor wafer, the polishing pad fabricated from a mix composed of prepolymer with an isocyanate concentration of between substantially 6.5% and 11.0% or from a monomer and an addition of isocyanate at a concentration required to achieve a same molal concentration, with a shore D hardness less than substantially 35%. In a preferred embodiment, the pad is made from a polyurethane mix in which the isocyanate concentration is between 6.5% and 8.5%, resulting in pads on the softer side of the hardness spectru.
- In developing the inventive method and the inventive pad it was determined that hardness is the best parameter to predict scratching. This is illustrated in
FIG. 1 . - On the y-axis is number of scratches and on the x-axis is Shore D hardness. The number of scratches comes from a test we developed which was designed to elicit scratches in all cases, even from the softest of pads. The test consisted of using a known aggressive barrier slurry, which is virtually incapable of removing copper, and using it to “polish”—at fairly high downforce (4 psi)—a pristine blanket copper film in which the number of pre-polish scratches has already been determined. The copper wafer is polished for 1 minute and then remeasured for scratches (using dark-field microscopy at low magnification). The increase in the number of scratches is then plotted:
- The graph indicates the desirable hardness of the pad is approximately under 35 on the Shore D scale. The Politex is measured to be 25 on this scale by our measurements (indicated on graph), and for reference, the IC1000 is measured to be 56 by our measurements (indicated on graph) and 55 from information published by Rohm and Haas Corporation.
- The next objective to create the material is to determine exactly what material or materials govern planarization. To this end, we develop a planarization figure of merit, called GPE, or General Planarization Efficiency. It was determined that GPE is a function of the NCO (isocyanate) concentration of the base resin. Resins that fell within the 6.5% to 11.0% range delivered high GPE and resins outside that range resulted in low GPE. Therefore, a resin from the range is proposed.
- Finally, since in a blown polyurethane, the chemical inertness property comes inherently with the use of this material, it is selected from the inventive pad.
- Therefore, in accordance with the present invention the above described polyurethane polishing pad is proposed as well as the above described method of removing barrier and buffing.
- The polyurethane polishing pad can have an additive which includes methyl alcohol, or water, or starch of any type including corn starch. The pad can have a thickness of between 10 mils and 200 mils, preferably 80 mils.
- The pad in accordance with the present invention can be stacked on a subpad but a preferred embodiment is that the pad is a single-layered pad.
- The pad in accordance with the present invention can be grooved or ungrooved, perforated or unperforated.
- Herein below an example of how to manufacture the pad in accordance with the present invention is presented.
- First, as with all urethanes, start with either a prepolymer resin with an NCO concentration of between 6.5% and 11.0%, or a polyol and an amount of isocyanate required to achieve the same molal concentration. Preheat the prepolymer to about 100 deg F., or mix until said temperature is achieved. Start to add additives as desired. These may include initiators such as water, blowing agents such as Vazo, catalysts such as a tertiary amine, and surfactants such as L-6100, a silicone surfactant typically used to regulate cell size supplied by Crompton. An exothermic reaction begins once an accelerant, an example of which accelerant is MOCA (4,4′-Methylenebis-[o-chloroaniline]), also known as a chain extender, is added. The pores are created either by the incorporation of air during the mixing or by the intentional addition of pore creators, such as microballoons as taught in Reinhardt, U.S. Pat. No. 5,578,362. The mix is then pored into a mold, which may be preheated. While the exothermic reaction is sufficient to bring the temperature of the center of the cake to some 270 degF and thus to a complete reaction, surface cooling would prevent the outside of the cake from reacting in a reasonable period of time. Therefore curing in an oven is required. This is typically done at a temperature of about 240 deg F. for about 6 hours. The cake is then cooled and sliced to fabricate the polishing pads.
- After curing, the cake is allowed to cool. Once cool, it can be sliced using equipment consisting of a stationary skiving blade and movable table. Usable slices are then made into pads by applying adhesive to one face, mounting a subpad if desired, grooving the usable surface, finishing with a smoothing process, inspecting and packaging.
- If a pad can both planarize and pass the scratch-inducing test, then it can also be used in applications where a buff alone is needed. As such, it might have additional applications such as post-oxide buff. Further, one could conceive of other non-CMP simple cleaning applications commonly carried out in a semiconductor fab environment.
- Also, again since the pad planarizes, one could conceive of using it for 2nd step copper, namely the step where the remaining copper is removed down to the barrier. In this case, since it is softer than the primary pad it won't have the same long range planarization. However, if the first step copper is done with the hard pad, the copper surface should be well planarized, making the use of a slightly softer pad feasible. Another potential application of this pad is therefore also primary copper CMP.
- It will be understood that each of the elements described above, or two or more together, may also find a useful application in other types of constructions differing from the types described above.
- While the invention has been illustrated and described as embodied in a method of chemical mechanical polishing, and a pad provided therefore, it is not intended to be limited to the details shown, since various modifications and structural changes may be made without departing in any way from the spirit of the present invention.
- Without further analysis, the foregoing will so fully reveal the gist of the present invention that others can, by applying current knowledge, readily adapt it for various applications without omitting features that, from the standpoint of prior art, fairly constitute essential characteristics of the generic or specific aspects of this invention.
- What is claimed as new and desired to be protected by Letters Patent is set forth in the appended claims.
Claims (27)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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US10/924,833 US20060099891A1 (en) | 2004-11-09 | 2004-11-09 | Method of chemical mechanical polishing, and a pad provided therefore |
PCT/US2005/030226 WO2006026343A1 (en) | 2004-08-25 | 2005-08-24 | Polishing pad and methods of improving pad removal rates and planarization |
US11/574,188 US20090017729A1 (en) | 2004-08-25 | 2005-08-24 | Polishing pad and methods of improving pad removal rates and planarization |
KR1020077004576A KR20070057157A (en) | 2004-08-25 | 2005-08-24 | How to Improve Polishing Pads and Pad Removal Speed and Flattening |
JP2007530116A JP2008511181A (en) | 2004-08-25 | 2005-08-24 | Polishing pad and method with improved pad removal rate and planarization |
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US10/924,833 US20060099891A1 (en) | 2004-11-09 | 2004-11-09 | Method of chemical mechanical polishing, and a pad provided therefore |
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US10/924,832 Continuation-In-Part US20060046627A1 (en) | 2004-08-25 | 2004-08-25 | Method of improving planarization of urethane polishing pads, and urethane polishing pad produced by the same |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100269416A1 (en) * | 2009-04-27 | 2010-10-28 | Rohm and Haas Electroinic Materials CMP Holidays, Inc. | Method for manufacturing chemical mechanical polishing pad polishing layers having reduced gas inclusion defects |
US10213895B2 (en) | 2013-07-02 | 2019-02-26 | Fujibo Holdings, Inc. | Polishing pad and method for manufacturing same |
Citations (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4374208A (en) * | 1980-02-20 | 1983-02-15 | Dunlop Limited | Polyether-urethane foams |
US4613345A (en) * | 1985-08-12 | 1986-09-23 | International Business Machines Corporation | Fixed abrasive polishing media |
US5578362A (en) * | 1992-08-19 | 1996-11-26 | Rodel, Inc. | Polymeric polishing pad containing hollow polymeric microelements |
US5916011A (en) * | 1996-12-26 | 1999-06-29 | Motorola, Inc. | Process for polishing a semiconductor device substrate |
US6022268A (en) * | 1998-04-03 | 2000-02-08 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
US6328634B1 (en) * | 1999-05-11 | 2001-12-11 | Rodel Holdings Inc. | Method of polishing |
US6337281B1 (en) * | 1992-08-19 | 2002-01-08 | Rodel Holdings Inc. | Fixed abrasive polishing system for the manufacture of semiconductor devices, memory disks and the like |
US6354915B1 (en) * | 1999-01-21 | 2002-03-12 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
US20020077036A1 (en) * | 1997-04-04 | 2002-06-20 | Roberts John V. H. | Polishing pads and methods relating thereto |
US20020098790A1 (en) * | 2001-01-19 | 2002-07-25 | Burke Peter A. | Open structure polishing pad and methods for limiting pore depth |
US20020098789A1 (en) * | 2001-01-19 | 2002-07-25 | Peter A. Burke | Polishing pad and methods for improved pad surface and pad interior characteristics |
US6454634B1 (en) * | 2000-05-27 | 2002-09-24 | Rodel Holdings Inc. | Polishing pads for chemical mechanical planarization |
US20030013387A1 (en) * | 2001-07-13 | 2003-01-16 | Applied Materials, Inc. | Barrier removal at low polish pressure |
US6561891B2 (en) * | 2000-05-23 | 2003-05-13 | Rodel Holdings, Inc. | Eliminating air pockets under a polished pad |
US6572463B1 (en) * | 2000-12-27 | 2003-06-03 | Lam Research Corp. | Methods for making reinforced wafer polishing pads utilizing direct casting and apparatuses implementing the same |
US20030143925A1 (en) * | 2002-01-28 | 2003-07-31 | Yang Charles Chiun-Chieh | Polishing pad window for a chemical-mechanical polishing tool |
US20030165691A1 (en) * | 2001-12-07 | 2003-09-04 | Smith James A. | Cleaning article containing hydrophilic polymers |
US6682402B1 (en) * | 1997-04-04 | 2004-01-27 | Rodel Holdings, Inc. | Polishing pads and methods relating thereto |
US6705927B2 (en) * | 1997-11-17 | 2004-03-16 | Nihon Microcoating Co., Ltd. | Method of producing magnetic hard disk substrate with textured surface |
US20040053007A1 (en) * | 2002-09-17 | 2004-03-18 | Hyun Huh | Polishing pad containing embedded liquid microelements and method of manufacturing the same |
US6712681B1 (en) * | 2000-06-23 | 2004-03-30 | International Business Machines Corporation | Polishing pads with polymer filled fibrous web, and methods for fabricating and using same |
US20040157985A1 (en) * | 2001-04-09 | 2004-08-12 | Takashi Masui | Polyurethane composition and polishing pad |
US6790883B2 (en) * | 2000-05-31 | 2004-09-14 | Jsr Corporation | Composition for polishing pad and polishing pad using the same |
US20040209554A1 (en) * | 2002-06-04 | 2004-10-21 | Akio Tsumagari | Polishing material and method of polishing therewith |
US20050171224A1 (en) * | 2004-02-03 | 2005-08-04 | Kulp Mary J. | Polyurethane polishing pad |
US7005479B2 (en) * | 1997-05-27 | 2006-02-28 | Acushnet Company | Golf ball with rigid intermediate layer |
US7074115B2 (en) * | 2003-10-09 | 2006-07-11 | Rohm And Haas Electronic Materials Cmp Holdings, Inc. | Polishing pad |
-
2004
- 2004-11-09 US US10/924,833 patent/US20060099891A1/en not_active Abandoned
Patent Citations (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4374208A (en) * | 1980-02-20 | 1983-02-15 | Dunlop Limited | Polyether-urethane foams |
US4613345A (en) * | 1985-08-12 | 1986-09-23 | International Business Machines Corporation | Fixed abrasive polishing media |
US20030068960A1 (en) * | 1992-08-19 | 2003-04-10 | Reinhardt Heinz F. | Polymeric polishing pad having continuously regenerated work surface |
US5578362A (en) * | 1992-08-19 | 1996-11-26 | Rodel, Inc. | Polymeric polishing pad containing hollow polymeric microelements |
US6337281B1 (en) * | 1992-08-19 | 2002-01-08 | Rodel Holdings Inc. | Fixed abrasive polishing system for the manufacture of semiconductor devices, memory disks and the like |
US5916011A (en) * | 1996-12-26 | 1999-06-29 | Motorola, Inc. | Process for polishing a semiconductor device substrate |
US6293852B1 (en) * | 1997-04-04 | 2001-09-25 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
US6869350B2 (en) * | 1997-04-04 | 2005-03-22 | Rohm And Haas Electronic Materials Cmp Holdings, Inc. | Polishing pads and methods relating thereto |
US6217434B1 (en) * | 1997-04-04 | 2001-04-17 | Rodel Holdings, Inc. | Polishing pads and methods relating thereto |
US6843712B2 (en) * | 1997-04-04 | 2005-01-18 | Rohm And Haas Electronic Materials Cmp Holdings, Inc. | Polishing pads and methods relating thereto |
US20020077036A1 (en) * | 1997-04-04 | 2002-06-20 | Roberts John V. H. | Polishing pads and methods relating thereto |
US6682402B1 (en) * | 1997-04-04 | 2004-01-27 | Rodel Holdings, Inc. | Polishing pads and methods relating thereto |
US6648733B2 (en) * | 1997-04-04 | 2003-11-18 | Rodel Holdings, Inc. | Polishing pads and methods relating thereto |
US7005479B2 (en) * | 1997-05-27 | 2006-02-28 | Acushnet Company | Golf ball with rigid intermediate layer |
US6705927B2 (en) * | 1997-11-17 | 2004-03-16 | Nihon Microcoating Co., Ltd. | Method of producing magnetic hard disk substrate with textured surface |
US6022268A (en) * | 1998-04-03 | 2000-02-08 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
US6500053B2 (en) * | 1999-01-21 | 2002-12-31 | Rodel Holdings, Inc. | Polishing pads and methods relating thereto |
US6354915B1 (en) * | 1999-01-21 | 2002-03-12 | Rodel Holdings Inc. | Polishing pads and methods relating thereto |
US20020098782A1 (en) * | 1999-01-21 | 2002-07-25 | James David B. | Polishing pads and methods relating thereto |
US6328634B1 (en) * | 1999-05-11 | 2001-12-11 | Rodel Holdings Inc. | Method of polishing |
US6561891B2 (en) * | 2000-05-23 | 2003-05-13 | Rodel Holdings, Inc. | Eliminating air pockets under a polished pad |
US6454634B1 (en) * | 2000-05-27 | 2002-09-24 | Rodel Holdings Inc. | Polishing pads for chemical mechanical planarization |
US6790883B2 (en) * | 2000-05-31 | 2004-09-14 | Jsr Corporation | Composition for polishing pad and polishing pad using the same |
US6712681B1 (en) * | 2000-06-23 | 2004-03-30 | International Business Machines Corporation | Polishing pads with polymer filled fibrous web, and methods for fabricating and using same |
US6572463B1 (en) * | 2000-12-27 | 2003-06-03 | Lam Research Corp. | Methods for making reinforced wafer polishing pads utilizing direct casting and apparatuses implementing the same |
US20020098789A1 (en) * | 2001-01-19 | 2002-07-25 | Peter A. Burke | Polishing pad and methods for improved pad surface and pad interior characteristics |
US20020098790A1 (en) * | 2001-01-19 | 2002-07-25 | Burke Peter A. | Open structure polishing pad and methods for limiting pore depth |
US20040157985A1 (en) * | 2001-04-09 | 2004-08-12 | Takashi Masui | Polyurethane composition and polishing pad |
US20030013387A1 (en) * | 2001-07-13 | 2003-01-16 | Applied Materials, Inc. | Barrier removal at low polish pressure |
US20030165691A1 (en) * | 2001-12-07 | 2003-09-04 | Smith James A. | Cleaning article containing hydrophilic polymers |
US20030143925A1 (en) * | 2002-01-28 | 2003-07-31 | Yang Charles Chiun-Chieh | Polishing pad window for a chemical-mechanical polishing tool |
US20040209554A1 (en) * | 2002-06-04 | 2004-10-21 | Akio Tsumagari | Polishing material and method of polishing therewith |
US20040053007A1 (en) * | 2002-09-17 | 2004-03-18 | Hyun Huh | Polishing pad containing embedded liquid microelements and method of manufacturing the same |
US7074115B2 (en) * | 2003-10-09 | 2006-07-11 | Rohm And Haas Electronic Materials Cmp Holdings, Inc. | Polishing pad |
US20050171224A1 (en) * | 2004-02-03 | 2005-08-04 | Kulp Mary J. | Polyurethane polishing pad |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100269416A1 (en) * | 2009-04-27 | 2010-10-28 | Rohm and Haas Electroinic Materials CMP Holidays, Inc. | Method for manufacturing chemical mechanical polishing pad polishing layers having reduced gas inclusion defects |
US7947098B2 (en) * | 2009-04-27 | 2011-05-24 | Rohm And Haas Electronic Materials Cmp Holdings, Inc. | Method for manufacturing chemical mechanical polishing pad polishing layers having reduced gas inclusion defects |
US20110185967A1 (en) * | 2009-04-27 | 2011-08-04 | Rohm And Haas Electronic Materials Cmp Holding, Inc. | Mix head assembly for forming chemical mechanical polishing pads |
US8118897B2 (en) | 2009-04-27 | 2012-02-21 | Rohm And Haas Electronic Materials Cmp Holdings, Inc. | Mix head assembly for forming chemical mechanical polishing pads |
US10213895B2 (en) | 2013-07-02 | 2019-02-26 | Fujibo Holdings, Inc. | Polishing pad and method for manufacturing same |
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