US20060075086A1 - Method and system between subnetwork operation and full network operation - Google Patents
Method and system between subnetwork operation and full network operation Download PDFInfo
- Publication number
- US20060075086A1 US20060075086A1 US10/517,474 US51747405A US2006075086A1 US 20060075086 A1 US20060075086 A1 US 20060075086A1 US 51747405 A US51747405 A US 51747405A US 2006075086 A1 US2006075086 A1 US 2006075086A1
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- United States
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- unit
- signal level
- users
- transceiver unit
- bus
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- 238000000034 method Methods 0.000 title claims abstract description 17
- 230000008859 change Effects 0.000 claims abstract description 4
- 238000004891 communication Methods 0.000 claims description 8
- 125000004122 cyclic group Chemical group 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 4
- 230000003213 activating effect Effects 0.000 claims description 2
- 230000002618 waking effect Effects 0.000 description 14
- 230000003797 telogen phase Effects 0.000 description 8
- 238000011161 development Methods 0.000 description 5
- 230000018109 developmental process Effects 0.000 description 5
- 230000006855 networking Effects 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- NIXVMBBZNVOBHS-ASRKUVFVSA-N [(8r,9s,10r,13s,14s,17r)-17-acetyl-6,10,13-trimethyl-3-oxo-2,8,9,11,12,14,15,16-octahydro-1h-cyclopenta[a]phenanthren-17-yl] acetate;(8r,9s,13s,14s,17r)-17-ethynyl-13-methyl-7,8,9,11,12,14,15,16-octahydro-6h-cyclopenta[a]phenanthrene-3,17-diol Chemical compound OC1=CC=C2[C@H]3CC[C@](C)([C@](CC4)(O)C#C)[C@@H]4[C@@H]3CCC2=C1.C1=C(C)C2=CC(=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@@](C(C)=O)(OC(=O)C)[C@@]1(C)CC2 NIXVMBBZNVOBHS-ASRKUVFVSA-N 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40039—Details regarding the setting of the power status of a node according to activity on the bus
Definitions
- the present invention relates to a method for changing over a serially networked system, in particular a serial databus system, from subnetwork operation, in which at least one node and/or at least one user of the system is in a state of reduced current consumption and is not addressed and/or not activated by the signal level of the data traffic on the system, to full network operation, in which all the nodes and/or all the users of the system are addressed and/or activated by the signal level of the data traffic on the system.
- the present invention also relates to a serially networked system, which is intended to be changed over from subnetwork operation, in which at least one node and/or at least one user of the system is in a state of reduced current consumption and cannot be addressed and/or activated by the signal level of the data traffic on the system, to full network operation, in which all the nodes and/or all the users of the system may be addressed and/or activated by the signal level of the data traffic on the system.
- a disadvantage of this known principle is that the second level scheme used for waking is associated with markedly increased bus system noise emission; in particular, cyclic wake-up events lead for this reason to undesirable disturbances in the motor vehicle, wherein E[lectro]M[agnetic]C[ompatibility] emissions also play a part; moreover, a second driver stage is necessary, to generate the other level scheme.
- This waking mechanism may be implemented both in system chips and in other networking products, such as for instance in simple transceiver modules.
- the rest phase or critical period should preferably be so set that the normal time gaps between the subnetwork operation messages are insufficient for detecting the end of subnetwork operation.
- the nodes or users in subnetwork operation appropriately send cyclic messages, so as to ensure that the “selectively sleeping” nodes or users are not woken (such cyclic messages are conventionally a constituent of a network management system, as in standard use in automobile technology, and thus require no separate effort).
- This signal level pattern which advantageously does not otherwise occur in the data traffic, may appropriately be detected by at least one node in the reduced current consumption state and/or by at least one user in the reduced current consumption state.
- the present invention further relates to a transceiver unit, in particular for carrying out a method of the type described above and/or in particular associated with at least one system of the type described above; the transceiver unit is connected to at least one serial databus, in particular to at least one C[ontroller]A[rea]N[etwork] bus, and is in communication with at least one microcontroller unit which is provided to carry out at least one application.
- At least one control logic is associated with the transceiver unit and/or at least one control logic is implemented in the transceiver unit.
- the present invention further relates to a voltage regulator which is connected to at least one battery unit, and which is in communication with at least one transceiver unit, in particular of the type described above, which voltage regulator is intended to supply a voltage to at least one microcontroller unit, provided to execute at least one application, if at least one defined, in particular continuous and/or in particular symmetrical signal level pattern is detected by the transceiver unit in at least one incoming message associated with at least one application and occurring on at least one serial databus, in particular on at least one C[ontroller]A[rea]N[etwork] bus.
- the present invention further relates to a chip unit, in particular a system chip unit, for addressing and/or activating at least one microcontroller unit which is provided to carry out at least one application and which is associated with at least one serial databus, in particular at least one C[ontroller]A[rea]N[etwork]bus; which chip unit comprises at least one transceiver unit of the type described above, and at least one voltage regulator of the type described above.
- a chip unit in particular a system chip unit, for addressing and/or activating at least one microcontroller unit which is provided to carry out at least one application and which is associated with at least one serial databus, in particular at least one C[ontroller]A[rea]N[etwork]bus; which chip unit comprises at least one transceiver unit of the type described above, and at least one voltage regulator of the type described above.
- the present invention further relates to a microcontroller unit provided to carry out at least one application and associated with at least one serial data bus, in particular at least one C[ontroller]A[rea]N[etwork] bus, which microcontroller unit is to be supplied with a voltage only if at least one defined, in particular continuous and/or in particular symmetrical signal level pattern is detected in at least one incoming message associated with at least one application and occurring on the databus, by at least one transceiver unit, in particular according to the type described above.
- the microcontroller unit can be activated by the transceiver unit
- the present invention finally relates to the use of
- FIG. 1 is a schematic block diagram of an example of embodiment of a system according to the present invention based on the method of the present invention
- FIG. 2 is a schematic block diagram of a detailed section of the system shown in FIG. 1 .
- FIG. 3 shows, in a schematic time sequence, an example of embodiment of a changeover, according to the method, of the system of FIG. 1 and 2 from subnetwork operation to full network operation;
- FIG. 4 is a schematic representation of an example of embodiment of a defined signal level pattern not otherwise occurring in the ongoing data traffic.
- FIG. 1 shows an exemplary implementation of a serially networked CAN system 100 provided for C[ontroller]A[rea]N[etwork] applications in automobile electronics, namely in motor vehicle electronics.
- This serially networked system 100 comprises five users 30 , 32 , 34 , 36 , 38 , which are connected to a serial C[ontroller]A[rea]N[etwork] databus 10 via respective associated nodes 20 , 22 , 24 , 26 , 28 and which take the form, for example, of a system chip unit (optionally including transceiver unit) and/or of a microcontroller unit, for instance an application controller unit or a protocol controller unit.
- FIG. 2 the build-up, the function and the structure of the users 30 , 32 , 34 , 36 , 38 provided to execute applications are explained in an exemplary manner by means of a detailed description of the first user 30 , which is connected to the node 20 of the CAN databus 10 and which can be addressed and/or activated via this CAN databus 10 .
- the operating principle is as follows:
- the transceiver unit 84 equipped with a control logic and connected to the data bus 10 and/or by a system chip unit 80 which accommodates the transceiver unit 84 and which is permanently supplied from a battery unit 70 , then the transceiver unit 84 switches on a voltage regulator 86 which is connected to the battery unit 70 via a supply line 76 and which is in communication 886 with the transceiver unit 84 .
- connection line 984 in that the voltage regulator 86 supplies a voltage to the application user which takes the form of a microcontroller unit 90 with integrated CAN control unit; as shown in FIG. 2 , between the voltage regulator 86 and the (application) microcontroller unit 90 there is also a reset line 986 (“reset”).
- the pattern detector (or transceiver 84 ) does not detect the presence of any message on the CAN data bus 10 , then the voltage regulator 86 is not switched on.
- the system 100 may be configured and controlled via a mode control interface 982 between the transceiver unit 84 (or the system chip unit 80 ) and the microcontroller unit 90 .
- two users 32 , 38 are in a low current consumption state, in which these two users 32 , 38 are not addressed and thus also not activated by the signal level 40 , 42 , 44 (cf. FIG. 3 ) of the data traffic on the system 100 .
- the remaining three active users 30 , 34 , 36 define subnetwork operation T, i.e. the three users 30 , 34 , 36 communicate with one another (this is symbolized by the double-headed arrow between the active user 30 and the active user 34 and by the double-headed arrow between the active user 34 and the active user 36 ) and are addressed by the signal level 40 , 42 , 44 of the data traffic on the system 100 .
- this critical period ⁇ t k is in turn set to be greater than the interval ⁇ t d between the individual messages and data packets of the data traffic on the system 100 , such that the normal time gaps ⁇ t d between the messages and data packets of subnetwork operation T are insufficient for detecting the end of subnetwork operation T.
- the nodes 20 , 24 , 26 or the users 30 , 34 , 36 send messages and data packets during subnetwork operation T at cyclic intervals which are smaller than the critical value ⁇ t k , so as to ensure that the “selectively sleeping” nodes 22 , 28 or the “selectively sleeping” users 32 , 38 are not woken during subnetwork operation T.
- a special waking data packet (c.f. FIG. 3 ) may be used according to a further development essential to the invention.
- This “global waking message” or “global waking data packet” uses the same nominal level scheme but is distinguished by a special bit sequence, which does not arise in normal communication operation and which may be freely defined in the data field of any desired message or any desired data packet.
- the nodes 22 , 28 in the low current consumption state and/or the users 32 , 38 in the low current consumption state of the serially networked system 100 may examine the ongoing data traffic on the CAN system bus 10 for a continuous symmetrical data pattern and interpret the detection of this data pattern as a waking event.
- a symmetrical data pattern 62 or 64 which is linked to any identifier 60 (address/header), of which there is at least one, and which may be simply detected by simple hardware, specifically without the need for a protocol controller.
- a decisive advantage consists in the fact that the protocol used does not have to be tracked in bit-accurate manner and that, moreover, it is not essential to use a special message identifier (address/header), but rather any desired message identifier 60 (address/header) may be used; all that is needed is detection of a symmetrical pattern which may be repeated appropriately frequently in the data field of the message or of the data packet.
- the data patterns used may be of any desired type and are distinguished merely by the frequent repetition of identical bit phases. To filter such data patterns, it is possible to use both per se known analog circuits and per se known digital circuits.
- the method illustrated in FIG. 3 allows the implementation of subnetwork operation T within a serial bus system 10 .
- a certain time period ⁇ t> ⁇ t k without communication on the databus 10 is used to allow waking of these “sleeping” nodes 22 , 28 or “sleeping” users 32 , 38 by a normal message or data packet; the criterion for addressing all the nodes 20 , 22 , 24 , 26 , 28 or all the users 30 , 32 , 34 , 36 , 38 on the databus 10 is thus that a bus system rest phase ⁇ t was present beforehand which is greater than the settable critical period ⁇ t k .
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
- Power Sources (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2002125776 DE10225776A1 (de) | 2002-06-10 | 2002-06-10 | Verfahren und System zwischen Teilnetzbetrieb und Gesamtnetzbetrieb |
DE10225775A DE10225775A1 (de) | 2002-06-10 | 2002-06-10 | Verfahren und System zwischen Teilnetzbetrieb und Gesamtnetzbetrieb |
DE10225776.0 | 2002-06-10 | ||
DE10225775.2 | 2002-06-10 | ||
PCT/IB2003/002116 WO2003104036A1 (fr) | 2002-06-10 | 2003-06-05 | Procede et systeme pour le passage d'un mode de fonctionnement sous-reseau a un mode de fonctionnement reseau complet |
Publications (1)
Publication Number | Publication Date |
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US20060075086A1 true US20060075086A1 (en) | 2006-04-06 |
Family
ID=29737586
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/517,474 Abandoned US20060075086A1 (en) | 2002-06-10 | 2003-06-05 | Method and system between subnetwork operation and full network operation |
US10/517,246 Active 2028-07-08 US8566466B2 (en) | 2002-06-10 | 2003-06-05 | Method and system for switching between subnetwork operation and full network operation |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/517,246 Active 2028-07-08 US8566466B2 (en) | 2002-06-10 | 2003-06-05 | Method and system for switching between subnetwork operation and full network operation |
Country Status (6)
Country | Link |
---|---|
US (2) | US20060075086A1 (fr) |
EP (2) | EP1515873A1 (fr) |
JP (2) | JP2005529516A (fr) |
CN (2) | CN1659066A (fr) |
AU (2) | AU2003232391A1 (fr) |
WO (2) | WO2003104037A1 (fr) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080276107A1 (en) * | 2004-05-03 | 2008-11-06 | Freescale Semiconductor, Inc. | Method and Device to Wake-Up Nodes in a Serial Data Bus |
US20120210154A1 (en) * | 2009-09-16 | 2012-08-16 | Florian Hartwich | Method and device for waking users of a bus system and corresponding users |
US9260066B2 (en) | 2013-10-23 | 2016-02-16 | Denso Corporation | Vehicle-mounted network system and management apparatus for the same |
US11528163B2 (en) | 2020-02-14 | 2022-12-13 | Denso Corporation | Communication system |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102004026383B4 (de) * | 2004-05-29 | 2006-10-26 | Audi Ag | Kraftfahrzeug mit mindestens einem von einem Prozessor gesteuerten Steuergerät |
WO2006003540A1 (fr) | 2004-06-30 | 2006-01-12 | Philips Intellectual Property & Standards Gmbh | Procede de codage binaire de signaux numeriques independant du debit sur un systeme de bus |
JP5607219B2 (ja) * | 2009-05-20 | 2014-10-15 | ルネサスエレクトロニクス株式会社 | 自動車用通信システム |
DE102009029541A1 (de) * | 2009-09-17 | 2011-03-31 | Robert Bosch Gmbh | Verfahren zum Betreiben einer Anzahl Steuergeräte |
EP2424174A1 (fr) | 2010-08-27 | 2012-02-29 | ELMOS Semiconductor AG | Procédé de fonctionnement d'un système de bus |
JP2013062723A (ja) * | 2011-09-14 | 2013-04-04 | Denso Corp | 通信システム、並びに、当該通信システムを構成するマスタノード及びスレーブノード |
JP2013062722A (ja) * | 2011-09-14 | 2013-04-04 | Denso Corp | 通信システム及び、当該通信システムを構成するスレーブノード |
JP5678849B2 (ja) * | 2011-09-14 | 2015-03-04 | 株式会社デンソー | 通信システム及びトランシーバ |
GB201210600D0 (en) | 2012-06-14 | 2012-08-01 | Microsoft Corp | Call invites |
GB201210598D0 (en) | 2012-06-14 | 2012-08-01 | Microsoft Corp | Notification of communication events |
GB201210596D0 (en) | 2012-06-14 | 2012-08-01 | Microsoft Corp | Notification of communication events |
CN106851029A (zh) * | 2012-06-14 | 2017-06-13 | 微软技术许可有限责任公司 | 通信事件的通知 |
JP6127944B2 (ja) * | 2013-12-03 | 2017-05-17 | 株式会社デンソー | 車載ネットワークシステム |
JP7371589B2 (ja) | 2020-08-27 | 2023-10-31 | 株式会社デンソー | 中継装置 |
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- 2003-06-05 US US10/517,474 patent/US20060075086A1/en not_active Abandoned
- 2003-06-05 CN CN03813383.0A patent/CN1659066A/zh active Pending
- 2003-06-05 WO PCT/IB2003/002117 patent/WO2003104037A1/fr active Application Filing
- 2003-06-05 AU AU2003232391A patent/AU2003232391A1/en not_active Abandoned
- 2003-06-05 US US10/517,246 patent/US8566466B2/en active Active
- 2003-06-05 JP JP2004511126A patent/JP2005529516A/ja not_active Withdrawn
- 2003-06-05 WO PCT/IB2003/002116 patent/WO2003104036A1/fr not_active Application Discontinuation
- 2003-06-05 AU AU2003232392A patent/AU2003232392A1/en not_active Abandoned
- 2003-06-05 JP JP2004511127A patent/JP2005529517A/ja active Pending
- 2003-06-05 EP EP03757155A patent/EP1515873A1/fr not_active Withdrawn
- 2003-06-05 EP EP03757156A patent/EP1517813A1/fr not_active Ceased
- 2003-06-05 CN CNB038133768A patent/CN100414915C/zh not_active Expired - Fee Related
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US20080276107A1 (en) * | 2004-05-03 | 2008-11-06 | Freescale Semiconductor, Inc. | Method and Device to Wake-Up Nodes in a Serial Data Bus |
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US9260066B2 (en) | 2013-10-23 | 2016-02-16 | Denso Corporation | Vehicle-mounted network system and management apparatus for the same |
US11528163B2 (en) | 2020-02-14 | 2022-12-13 | Denso Corporation | Communication system |
Also Published As
Publication number | Publication date |
---|---|
JP2005529517A (ja) | 2005-09-29 |
US8566466B2 (en) | 2013-10-22 |
US20050204204A1 (en) | 2005-09-15 |
WO2003104037A1 (fr) | 2003-12-18 |
JP2005529516A (ja) | 2005-09-29 |
WO2003104036A1 (fr) | 2003-12-18 |
EP1515873A1 (fr) | 2005-03-23 |
CN1659066A (zh) | 2005-08-24 |
AU2003232392A1 (en) | 2003-12-22 |
CN1659065A (zh) | 2005-08-24 |
EP1517813A1 (fr) | 2005-03-30 |
AU2003232391A1 (en) | 2003-12-22 |
CN100414915C (zh) | 2008-08-27 |
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