US20030106832A1

US20030106832A1 - Carrier tape for an integrated circuit device

Info

Publication number: US20030106832A1
Application number: US10/058,282
Authority: US
Inventors: Hunter Chen; Wood Chiu; Chin Chang
Original assignee: Macronix International Co Ltd
Current assignee: Macronix International Co Ltd
Priority date: 2001-12-11
Filing date: 2002-01-30
Publication date: 2003-06-12

Abstract

A carrier tape for an IC device includes a slot for receiving the IC device. The slot is defined by a bottom wall and two pairs of opposite sidewalls. The sidewalls are substantially vertical to the bottom wall. A bevel wall located between the bottom wall and one of the sidewalls.

Description

BACKGROUND OF THE INVENTION

1. Field of the invention

The invention relates to a carrier tape, in particular, to a carrier tape for packing an integrated circuit (IC) device.

2. Description of the related art

In general, the usual integrated circuit (IC) devices are of the small outline timid package type, and a tape-packing machine is used to pack the IC devices. The outline qualities of the IC devices are usually inspected while the IC devices are packed.

There are two ways for inspecting the outline quality of an IC device. The first way is to place an

IC device

60 into a carrier tape 10 and then to detect the IC device 60, as shown in FIG. 1. The other way is to inspect the IC device 60 and then to place the IC device 60 into the carrier tape 10.

As shown in FIG. 2, in the first inspecting method, when the

IC device

60 is placed into the IC device carrier tape 10 by the tape-packing machine for outline inspection, an image detection system 50 is used to inspect the outline quality of the IC device 60. During the inspection process, an image acquisition device 51 is used to acquire the image. It is necessary to use an illumination device 52 to provide auxiliary illumination so that the image acquisition device 51 can acquire a clear image. However, since a pin 61 of the IC device 60 is made of metal, the pin 61 reflects the light from the illumination device 52 onto the inner sidewall of a slot 101 of the IC device carrier tape 10, which generates a pin image 61′. Therefore, the image of the pin acquired by the image acquisition device 51 is lengthened. That is, the acquired length is the length of the pin 61 plus that of the pin image 61′. Thus, the length judged by the image detection system 50 (i.e. the length of the pin 61 plus that of the pin image 61′) is longer than the actual length of the pin 61. In this case, the product is judged defective in the image detection process. FIG. 3 shows the image acquired during the conventional process for inspecting the outline of the IC device 60, wherein the measured length 61B of the pin is longer than the actual length 61A of the pin.

In addition, when the IC device is not regularly placed into the slot of the carrier tape, that is, when the pin of the IC device is not perpendicular to the inner wall of the slot, the pin image reflected onto the inner sidewall of the slot is not aligned with the actual pin. Thus, the image detection system judges the pin as curved and the product as defective during the image inspection process.

As described above, once the IC device is judged defective, it is time-consuming to repeat the inspection process for the IC device, thereby decreasing the yield and increasing the manufacturing costs.

Therefore, it is an important subject matter to avoid misjudgment during the image detection process for the IC device in the carrier tape.

SUMMARY OF THE INVENTION

In view of the above-mentioned problems, it is therefore an objective of the invention to provide an IC device carrier tape capable of avoiding misjudging the IC device as a defective during the image detection for the IC device.

To achieve to above-mentioned objective, a carrier tape for an IC device according to the invention includes a slot for receiving the IC device and at least one bevel wall. The slot is defined by a bottom wall and two pairs of opposite sidewalls substantially vertical to the bottom wall. The bevel wall is located between the bottom wall and one of the sidewalls.

In the invention, the IC device includes a plurality of pins with an extension direction, and the bevel wall is perpendicular to the extension direction of pins of the IC device received in the slot.

In addition, a projection can be provided at the bottom of the slot for supporting the IC device at a pertinent height, so as to prevent the pins from contacting the inner wall of the slot, thereby avoiding the pins from being damaged.

As described above, the bevel wall in the IC device carrier tape according to the invention is capable of effectively preventing the image of the pin projected onto the inner wall (sidewalls) of the slot from being acquired by the image detection system. Therefore, the situation in which the IC device is misjudged defective during inspection can be avoided. The time consumption for repeatedly inspecting the IC device can be decreased. It is also possible to avoid the decreased yield and to save manufacturing costs.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic illustration showing the state in which the IC device is packed using the conventional carrier tape. [0015]
FIG. 2 is a schematic illustration showing the image detection process in which the IC device is detected using the conventional carrier tape. [0016]
FIG. 3 is a schematic illustration showing the condition in which the pin is misjudged as too long during the image detection process. [0017]
FIG. 4A is a schematic top view showing the IC device carrier tape in accordance with a preferred embodiment of the invention. in FIG. 4B is a schematic side view showing the IC device carrier tape in accordance with the preferred embodiment of the invention. [0018]
FIG. 5 is a schematic illustration showing the image detection process in which the IC device is detected using the carrier tape in accordance with the preferred embodiment of the invention. [0019]
FIG. 6 is a schematic illustration showing the image acquired during the image detection process for the IC device using the carrier tape in accordance with the preferred embodiment of the invention.[0020]

DETAIL DESCRIPTION OF THE INVENTION

The IC device carrier tape in accordance with the preferred embodiment of the invention will be described with reference to the accompanying drawings, wherein the same reference numbers denote the same elements. [0021]
As shown in FIGS. 4A and 4B, an IC [0022] device carrier tape 30 in accordance with a preferred embodiment of the invention is formed with a plurality of slots 301. A bevel wall 302 is located between each of the two opposite sidewalls and the bottom wall of each slot 301. A projection 303 is also formed at the bottom of each slot 301.
As shown in these figures, the [0023] slots 301 are arranged along the IC device carrier tape 30 for receiving each of IC devices 60.
As well known, the [0024] IC device 60 includes a plurality of pins 61 with an extension direction. The bevel wall 302 is further perpendicular to the extension direction of each pin 61 of the IC device 60.
The [0025] projection 303 is formed at the bottom of the slot 301 for supporting the IC device 60 at a pertinent height and preventing the pins 61 from contacting the bottom wall of the slot 301. Since the contact between the pins 61 and the bottom wall of the slot 301 may damage the pins 61, the provision of the projection 303 is capable of preventing the pins 61 from being damaged.
As shown in FIG. 5, when the [0026] IC device 60 is placed into the IC device carrier tape 30 for outline inspection, the image detection system 50 is used for outline quality inspection of the IC device 60. That is, when the image acquisition device 51 is used to acquire the image, it is necessary to use the illumination device 52 to provide auxiliary illumination so that the image acquisition device 51 can acquire a clear image. At this time, the light from the illumination device 52 is reflected by the pin 61 of the IC device 60 and is projected onto the bevel wall 302 of the carrier tape 30. Due to the design of the bevel wall 302, the pin image 61′ is reflected under the pin 61. Thus, the pin image acquired by the image acquisition device 51 is not lengthened, and the pin length judged by the image detection system 50 is the actual length of the pin 61.
FIG. 6 shows the image acquired during the outline inspection of the [0027] IC device 60 of the embodiment, wherein the measured pin length 61B is the actual length 61A of the pin 61. Compared to FIG. 3, it can be clearly understood that the bevel wall 302 in the IC device carrier tape 30 in accordance with the preferred embodiment of the invention is capable of effectively preventing the image of the pin 61 projected onto the walls of the slot 301 from being acquired by the image detection system 50. Therefore, the situation in which the IC device 60 is misjudged as defective during inspection can be avoided. The time consumption for repeatedly inspecting the IC device 60 can be decreased. It is also possible to avoid the decreased yield and to save manufacturing costs.
While the invention has been described by way of an example and in terms of a preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiment. To the contrary, it is intended to cover various modifications. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications. [0028]

Claims

What is claimed is:

1. A carrier tape for an integrated circuit (IC) device, comprising:

a slot for receiving the IC device, the slot being defined by a bottom wall, and two pairs of opposite sidewalls substantially vertical to the bottom wall; and

at least one bevel wall located between the bottom wall and one of the sidewalls.

2. The carrier tape for the IC device according to claim 1, wherein the IC device comprises a plurality of pins with an extension direction, and the bevel wall is perpendicular to the extension direction of the pins.

3. The carrier tape for the IC device according to claim 1, further comprising:

a projection at the bottom of the slot for supporting the IC device at a pertinent height.