US20020068451A1 - Semiconductor device production method - Google Patents
Semiconductor device production method Download PDFInfo
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- US20020068451A1 US20020068451A1 US09/447,216 US44721699A US2002068451A1 US 20020068451 A1 US20020068451 A1 US 20020068451A1 US 44721699 A US44721699 A US 44721699A US 2002068451 A1 US2002068451 A1 US 2002068451A1
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- production method
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/32115—Planarisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Definitions
- the present invention relates to a semiconductor device production method and in particular, to a semiconductor device production method capable of reducing a latent period immediately after a polishing start when polishing a metal film formed on a semiconductor wafer.
- FIG. 4 is a cross sectional view of a basic configuration of a conventional polishing apparatus.
- a polishing pad 2 is mounted on a rotary platen 1 .
- a carrier 3 is arranged to hold and pressurize a semiconductor wafer.
- This carrier 3 is connected directly to a spindle 4 and is rotatable.
- the spindle 4 is supported by a polishing arm 5 in such a manner that the spindle 4 can move up and down.
- a semiconductor wafer is mounted on the carrier 3 with its polishing surface facing the polishing pad 2 .
- the platen 1 is rotated and the carrier 3 is lowered and pressurizes the semiconductor wafer.
- abrasive is supplied to the polishing pad 2 , the carrier 3 is rotated in the same direction as the platen 1 . Thus, polishing is performed.
- a dressing mechanism for performing dressing during a polishing operation or between polishing operations.
- the abrasive normally contains oxidant and alumina particles or silica particles.
- the metal film to be polished in the semiconductor device production procedure may be tungsten (W), aluminium (Al), copper (Cu) or the like. Moreover, considering the EM resistance and sufficient attachment of the wiring, the metal film has an undercoat made from Ti, TiN, TiW or the like.
- FIG. 5 shows a polishing amount changing according to the time when polishing a wafer. Two curves are shown, corresponding two different positions on the wafer.
- This example is polishing behavior when polishing tungsten (W).
- W tungsten
- the polishing speed is very slow for 10 to 30 seconds immediately after the polishing start, and after this period, the polishing speed is abruptly increased.
- this polishing is characterized by a latent period To when polishing hardly advances immediately after the polishing start.
- the aforementioned relationship between the polishing amount and time may deteriorate the uniformity on the wafer surface.
- the polishing amount also differs within the wafer surface. For example, in 50 seconds after polishing start, the polishing amount differs by as much as 150 nm. If the polishing amount differs extremely, then at the rapidly polished portion, the polishing advances more than necessary, causing configuration problems called dishing and erosion. Thus, it becomes impossible to satisfy the product specifications. Moreover, in the later step, sufficient flattening cannot be obtained, requiring a complicated additional step.
- the second problem is that the polishing rate is not stable. If the latent time changes by several seconds, the polishing amount, for example, for 1 minute immediately after the polishing start is remarkably changed. The entire polishing time is as short as 1 or 2 minutes. Accordingly, the irregularities in the latent time T 0 affect much.
- Japanese Patent Publication A8-339982 [1] discloses a semiconductor device production method, in which infrared rays are used to detect an end of an appropriate polishing.
- Japanese Patent Publication A9-55361 discloses a semiconductor device production method in which a temperature regulator controls the temperature of the polishing surface via a semiconductor substrate, so as to control chemical polishing function of the slurry.
- Japanese Patent Publication A8-339982 [3] discloses a semiconductor device production method, in order to effectively polish the insulation layer, Mn 2 O 3 or Mn 3 O 4 is used as an abrasive grain to be mixed with a solvent to constitute the abrasive.
- this invention of citation [3] has no technical concept to solve the problem of the latent period of time when polishing is hardly performed.
- the present invention has an object to provide a semiconductor device production method capable of improving the aforementioned conventional techniques so as to increase the uniformity on the surface and obtain stable polishing.
- a first embodiment of the present invention provides a semiconductor device production method in which the metal film polishing includes an oxide removal step for removing oxide from the surface to be polished, so as to reduce the latent time immediately after polishing start when the polishing speed is extremely low.
- a second embodiment provides a semiconductor device production method in which the polishing step is preceded by a flattening step to flatten irregularities of the surface of the object to be polished, i.e., the metal film.
- FIG. 1 shows a production procedure of the semiconductor device production method according to a first embodiment of the present invention.
- FIG. 2 shows a production procedure of the semiconductor device production method according to a second embodiment of the present invention.
- FIG. 3(A) is a side view
- FIG. 3(B) is a bottom view of a carrier used in the semiconductor device production method according to the present invention.
- FIG. 4 is a cross sectional view of a basic configuration of a conventional polishing apparatus.
- FIG. 5 is a graph showing the polishing amount change along the time axis in polishing one wafer.
- FIG. 6 is an enlarged cross section view of a tungsten film surface before polishing.
- the semiconductor device production method includes an oxide removal step for removing oxide from a surface of the object to be polished, i.e., a metal film, so as to reduce the latent time immediately after the polishing start in which the polishing speed is extremely slow.
- the polishing step is preceded by a surface flattening step for flattening a surface of the object to be polished. This enables to obtain a stable polishing amount.
- FIG. 1 shows a semiconductor device production procedure as a first example (Example 1) of the present invention.
- patterning 15 is performed to form a pattern on a semiconductor wafer.
- metal film generation step 16 generates a metal film.
- a special polishing is performed. More specifically, the polishing step is divided into at least two steps.
- the first polishing step uses an alkali or neutral slurry and the second polishing step uses an acid slurry.
- a wafer surface is coated, for example, by a tungsten film of 400 to 800 nm thickness formed by the CVD method.
- the slurry used for the first polishing step may be, for example, prepared to have pH 10 to 12 using ammonia and contain 10% of silica as an abrasive grain.
- the pH can also be used in the neutral region.
- the polishing condition may be as follows: pressure applied to the wafer is 500 g/cm 2 , the platen rotates at 25 rpm and the carrier rotates also at 25 rpm.
- the polishing time may be 10 to 20 seconds.
- the polishing pad may be a foam polyurethane. If the surface roughness is large and the oxide in concave cannot be removed effectively, the hardness of the polishing pad can be lowered to follow the convex and concave on the surface. This first polishing exposes a bulk W but the W polishing will not advance so much.
- the slurry used for the second polishing step contains an oxidant such as hydrogen peroxide to obtain pH to 2 to 4 m and contains about 5% of silica as abrasive grain.
- the polishing condition may be, for example, as follows: pressure applied to the wafer is 300 g/cm2, platen rotation is 100 rpm, and carrier rotation is also 100 rpm.
- the polishing time should be such that an unnecessary portion of the tungsten W is sufficiently removed, i.e., about 1 to 3 minutes.
- the polishing pad may be foam polyurethane.
- the apparatus includes a platen 1 which can be rotated by a motor or the like.
- a polishing pad 2 mounted on the upper surface of the platen 1 .
- the apparatus further includes a carrier 3 above the platen 1 for holding and pressurizing a semiconductor wafer.
- This carrier 3 is connected to a spindle 4 .
- the spindle 4 is connected to a motor or the like and can be rotated.
- These units are connected to a polishing arm 5 and can rotate and apply a weight.
- the apparatus includes a dressing mechanism which can be rotated by a drive arm.
- a special polishing is performed in at least two steps.
- the first polishing step uses alkali or neutral slurry
- the second polishing step uses acid slurry. Because the surface layer is thus removed in this example, a uniform surface can be obtained. That is, after the oxide is removed from the surface, the polishing reaction starts immediately after the polishing start and there is no conventional problem of latent time. As a result, it becomes possible to suppress deterioration of uniform surface due to irregularities caused by the latent time difference throughout the surface.
- polishing step 18 performs finish polishing.
- polishing is performed at least in two steps.
- the first polishing step employs abrasive containing no oxidant
- the second polishing step employs abrasive containing oxidant. Because in the first polishing step, the abrasive does not contain oxidant and accordingly, even if oxide is removed, bulk tungsten will not be polished away. Consequently, if sufficient polishing is performed without oxidant, it is possible to obtain the surface from which oxide is removed. Since no oxidant is contained, the tungsten bulk is exposed and maintained as such.
- polishing is performed by supplying abrasive containing oxidant. The polishing condition is identical as in Example 1.
- the wet etching method is used to process the surface before polishing the tungsten (W).
- tungsten oxide can be solved in an alkali solution, it is immersed in an alkali aqueous solution such as an aqueous solution of sodium hydroxide or potassium hydroxide for about 10 minutes. After that, polishing is performed. Since tungsten bulk crystal is exposed, it is possible to promote reaction between the tungsten and the oxidant.
- sputter etching is used to remove oxide from a surface before performing the tungsten (W) polishing.
- the putter etching is performed, for example, under the conditions of Ar flow rate 200 scc, RF output 400 W, and pressure 0.15 Pa for 30 seconds.
- FIG. 2 shows the semiconductor device production procedure according to a second embodiment.
- the flattening step 19 employs sputter etching for etching the metal film on the surface to flatten the surface, for example, tungsten surface.
- the temperature starts to increase immediately after the polishing start, which enables to reduce the latent period of time.
- the sputter etching condition may be, for example, Ar flow rate 200 sccm, RF output 800 W, pressure 0.15 Pa, and 120 seconds.
- Still yet another example is characterized in that the polishing consists of at least two steps.
- the first polishing step requires a polishing condition or abrasive that a difference between the polishing rate of tungsten and that of oxide is small.
- the second polishing step is identical to the conventional method.
- the first polishing step employ abrasive containing about 10% of colloidal silica and having pH 2 to 4 adjusted by hydrogen peroxide or the like.
- the polishing condition is, for example, as follows: weight 300 g/cm 2 , the platen and carrier rotation at 100 rpm.
- the polishing time is set to 10 to 60 seconds. In this case, a difference between the polishing rate of tungsten and that of oxide is small, and polishing rate can be seen immediately after the polishing start.
- Yet another example (Example 7) of the present invention includes a temperature adjustment step for heating at the initial stage of the polishing. That is, immediately after the polishing start, the polishing pad surface is heated for 10 to 30 seconds while polishing is in progress.
- the heating means may be, for example, abrasive heated to 40 degrees C is applied at the initial stage.
- a lamp is arranged above the polishing pad to radiate immediately after the polishing start to heat the polishing pad surface.
- the surface removal step 17 includes at least two polishing steps.
- the first polishing step is performed with a high weight
- the second polishing step is performed with a lower weight.
- the polishing condition may be, for example, as follows.
- the first polishing step is set to pressure 500 g/cm 2 , polishing table rotation at 100 rpm, abrasive flow rate 200 cc/min, and polishing time 20 sec.
- the second polishing step is set to pressure 300 g/cm2, polishing table rotation at 100 rpm, abrasive flow rate 200 cc/min, and the polishing time is arbitrary.
- the surface removal step 17 for removing oxide includes at least two steps.
- the first step is performed with a wafer guide ring pressed with a high pressure and the second step is performed with the wafer guide ring pressed with a lower pressure.
- FIG. 3( a ) is a side view and FIG. 3( b ) is a bottom view of the carrier portion.
- the carrier 3 has a guide ring 9 to hold the semiconductor wafer 8 during polishing. If this guide ring 9 is brought into contact with the polishing pad during polishing operation, the pad surface temperature tends to increase.
- the pressure and the contact area of this guide ring has a proportional relationship with the heat. Utilizing this tendency, it is possible to accelerate the rise of the polishing pad surface temperature at an initial stage of polishing.
- the polishing condition may be, for example, as follows.
- the first step is set to: guide ring pressure 500 g/cm 2 ; wafer pressure 300 g/cm 2 ; polishing table rotation at 100 rpm; abrasive flow rate 200 cc/min; and the polishing time 20 seconds.
- the second step is set to: guide ring pressure 300 g/cm 2 ; wafer pressure 300 g/cm 2 ; polishing table rotation 100 rpm; abrasive flow rate 200 cc/min; and the polishing time is arbitrary.
- the guide ring outer and inner diameters are assumed to be 10 to 30 mm.
- the preset invention provides a production method to eliminate the latent time immediately after a polishing start.
- FIG. 6 shows a tungsten film surface state before being polished.
- the latent time is caused by presence of oxide 6 on the metal film surface, which shows a strong passivation, suppressing a chemical reaction at the initial stage of polishing.
- the latent time is caused by the convex and concave on the metal film surface, which results in a small contact area, causing little friction heat, i.e., the polishing pad surface temperature cannot increase rapidly, thus indirectly suppressing the chemical reaction.
- the present invention includes an oxide removal step before the polishing step for polishing a metal film.
- the present invention enables to reduce the latent period of time T 0 immediately after a polishing start, which in turn brings about a uniform surface and improves the polishing stability. This enables to obtain a metal film of uniform thickness after metal CMP, and to improve flatness. This results in increase of yield.
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Abstract
Description
- 1. Field of the Invention
- The present invention relates to a semiconductor device production method and in particular, to a semiconductor device production method capable of reducing a latent period immediately after a polishing start when polishing a metal film formed on a semiconductor wafer.
- 2. Description of the Related Art
- These years, with reduction in wiring pitch, it has become difficult to perform a direct patterning of a metal wiring by the dry etching method, and the damascene method has begun to be used for metal wiring formation. That is, a groove is formed in the insulation film and a metal film is buried in this groove by way of CVD (chemical vapor deposition), sputtering, plating and the like. Then, an unnecessary metal film on the insulation film is polished away by chemical-mechanical polishing method (hereinafter, referred to as CMP). Thus a metal film is buried in the groove. Here, the polishing rate of the insulation film is set lower than the polishing rate of the metal film. Thus, the insulation film serves as a stopper so as to suppress the polishing of the metal film in the groove. However, various problems are involved in this polishing of the metal film. This will be explained with the polishing apparatus configuration and polishing procedure.
- FIG. 4 is a cross sectional view of a basic configuration of a conventional polishing apparatus. A
polishing pad 2 is mounted on a rotary platen 1. Moreover, above the platen 1, acarrier 3 is arranged to hold and pressurize a semiconductor wafer. Thiscarrier 3 is connected directly to aspindle 4 and is rotatable. Moreover, thespindle 4 is supported by apolishing arm 5 in such a manner that thespindle 4 can move up and down. A semiconductor wafer is mounted on thecarrier 3 with its polishing surface facing thepolishing pad 2. The platen 1 is rotated and thecarrier 3 is lowered and pressurizes the semiconductor wafer. While abrasive is supplied to thepolishing pad 2, thecarrier 3 is rotated in the same direction as the platen 1. Thus, polishing is performed. Although not depicted, at the polishing pad side, there is provided a dressing mechanism for performing dressing during a polishing operation or between polishing operations. The abrasive normally contains oxidant and alumina particles or silica particles. - The metal film to be polished in the semiconductor device production procedure may be tungsten (W), aluminium (Al), copper (Cu) or the like. Moreover, considering the EM resistance and sufficient attachment of the wiring, the metal film has an undercoat made from Ti, TiN, TiW or the like.
- FIG. 5 shows a polishing amount changing according to the time when polishing a wafer. Two curves are shown, corresponding two different positions on the wafer. This example is polishing behavior when polishing tungsten (W). As is clear from the figure, the polishing speed is very slow for 10 to 30 seconds immediately after the polishing start, and after this period, the polishing speed is abruptly increased. Thus, this polishing is characterized by a latent period To when polishing hardly advances immediately after the polishing start.
- Because of the aforementioned relationship between the polishing amount and time, the conventional semiconductor device production method has following problems.
- Firstly, the aforementioned relationship between the polishing amount and time may deteriorate the uniformity on the wafer surface. As shown in FIG. 5, if the latent time differs within the wafer surface, the polishing amount also differs within the wafer surface. For example, in 50 seconds after polishing start, the polishing amount differs by as much as 150 nm. If the polishing amount differs extremely, then at the rapidly polished portion, the polishing advances more than necessary, causing configuration problems called dishing and erosion. Thus, it becomes impossible to satisfy the product specifications. Moreover, in the later step, sufficient flattening cannot be obtained, requiring a complicated additional step.
- The second problem is that the polishing rate is not stable. If the latent time changes by several seconds, the polishing amount, for example, for 1 minute immediately after the polishing start is remarkably changed. The entire polishing time is as short as 1 or 2 minutes. Accordingly, the irregularities in the latent time T0 affect much.
- Moreover, Japanese Patent Publication A8-339982 [1] discloses a semiconductor device production method, in which infrared rays are used to detect an end of an appropriate polishing.
- That is, in this invention of Citation [1], there is no technical concept of solving the problem of the latent period of time when polishing is hardly performed.
- Furthermore, Japanese Patent Publication A9-55361 [2] discloses a semiconductor device production method in which a temperature regulator controls the temperature of the polishing surface via a semiconductor substrate, so as to control chemical polishing function of the slurry.
- In the invention of Citation [2], temperature control is simply performed and there is no technical concept to suppress dishing using the oxide removal step and the flattening step.
- Moreover, Japanese Patent Publication A8-339982 [3] discloses a semiconductor device production method, in order to effectively polish the insulation layer, Mn2O3 or Mn3O4 is used as an abrasive grain to be mixed with a solvent to constitute the abrasive.
- Thus, this invention of citation [3] has no technical concept to solve the problem of the latent period of time when polishing is hardly performed.
- The present invention has an object to provide a semiconductor device production method capable of improving the aforementioned conventional techniques so as to increase the uniformity on the surface and obtain stable polishing.
- In order to attain the aforementioned object, the present invention employs the following basic techniques. That is, a first embodiment of the present invention provides a semiconductor device production method in which the metal film polishing includes an oxide removal step for removing oxide from the surface to be polished, so as to reduce the latent time immediately after polishing start when the polishing speed is extremely low. A second embodiment provides a semiconductor device production method in which the polishing step is preceded by a flattening step to flatten irregularities of the surface of the object to be polished, i.e., the metal film.
- FIG. 1 shows a production procedure of the semiconductor device production method according to a first embodiment of the present invention.
- FIG. 2 shows a production procedure of the semiconductor device production method according to a second embodiment of the present invention.
- FIG. 3(A) is a side view and
- FIG. 3(B) is a bottom view of a carrier used in the semiconductor device production method according to the present invention.
- FIG. 4 is a cross sectional view of a basic configuration of a conventional polishing apparatus.
- FIG. 5 is a graph showing the polishing amount change along the time axis in polishing one wafer.
- FIG. 6 is an enlarged cross section view of a tungsten film surface before polishing.
- In order to solve the aforementioned problems in the conventional techniques, the semiconductor device production method according to a first embodiment of the present invention includes an oxide removal step for removing oxide from a surface of the object to be polished, i.e., a metal film, so as to reduce the latent time immediately after the polishing start in which the polishing speed is extremely slow. Moreover, in another embodiment of the present invention, in order to reduce the latent time immediately after the polishing start in which the polishing speed is extremely slow, the polishing step is preceded by a surface flattening step for flattening a surface of the object to be polished. This enables to obtain a stable polishing amount.
- Hereinafter, explanation will be given on a specific configuration of the semiconductor device production method according to the present invention with reference to the attached drawings. FIG. 1 shows a semiconductor device production procedure as a first example (Example 1) of the present invention. Firstly, patterning15 is performed to form a pattern on a semiconductor wafer. Next, metal
film generation step 16 generates a metal film. Here, in Example 1, as a surfacelayer removal step 17, a special polishing is performed. More specifically, the polishing step is divided into at least two steps. The first polishing step uses an alkali or neutral slurry and the second polishing step uses an acid slurry. A wafer surface is coated, for example, by a tungsten film of 400 to 800 nm thickness formed by the CVD method. The slurry used for the first polishing step may be, for example, prepared to havepH 10 to 12 using ammonia and contain 10% of silica as an abrasive grain. The pH can also be used in the neutral region. The polishing condition may be as follows: pressure applied to the wafer is 500 g/cm2, the platen rotates at 25 rpm and the carrier rotates also at 25 rpm. The polishing time may be 10 to 20 seconds. It should be noted that the polishing pad may be a foam polyurethane. If the surface roughness is large and the oxide in concave cannot be removed effectively, the hardness of the polishing pad can be lowered to follow the convex and concave on the surface. This first polishing exposes a bulk W but the W polishing will not advance so much. - The slurry used for the second polishing step contains an oxidant such as hydrogen peroxide to obtain pH to 2 to 4 m and contains about 5% of silica as abrasive grain. The polishing condition may be, for example, as follows: pressure applied to the wafer is 300 g/cm2, platen rotation is 100 rpm, and carrier rotation is also 100 rpm. The polishing time should be such that an unnecessary portion of the tungsten W is sufficiently removed, i.e., about 1 to 3 minutes. The polishing pad may be foam polyurethane.
- It should be noted that the basic configuration of the polishing apparatus used in this example is identical to that of the conventional method shown in FIG. 4. The apparatus includes a platen1 which can be rotated by a motor or the like. A
polishing pad 2 mounted on the upper surface of the platen 1. The apparatus further includes acarrier 3 above the platen 1 for holding and pressurizing a semiconductor wafer. Thiscarrier 3 is connected to aspindle 4. Thespindle 4 is connected to a motor or the like and can be rotated. These units are connected to apolishing arm 5 and can rotate and apply a weight. Moreover, through not depicted, the apparatus includes a dressing mechanism which can be rotated by a drive arm. - According to the semiconductor device production method including the aforementioned steps, as a surface portion removal step, a special polishing is performed in at least two steps. The first polishing step uses alkali or neutral slurry, and the second polishing step uses acid slurry. Because the surface layer is thus removed in this example, a uniform surface can be obtained. That is, after the oxide is removed from the surface, the polishing reaction starts immediately after the polishing start and there is no conventional problem of latent time. As a result, it becomes possible to suppress deterioration of uniform surface due to irregularities caused by the latent time difference throughout the surface. As the last step, polishing
step 18 performs finish polishing. - Moreover, in another example (Example 2), polishing is performed at least in two steps. The first polishing step employs abrasive containing no oxidant, and the second polishing step employs abrasive containing oxidant. Because in the first polishing step, the abrasive does not contain oxidant and accordingly, even if oxide is removed, bulk tungsten will not be polished away. Consequently, if sufficient polishing is performed without oxidant, it is possible to obtain the surface from which oxide is removed. Since no oxidant is contained, the tungsten bulk is exposed and maintained as such. Next, polishing is performed by supplying abrasive containing oxidant. The polishing condition is identical as in Example 1.
- In this example, although a latent period of time T0 is caused, but it is possible to obtain a uniformity and stability. Moreover, it is possible to simplify the abrasive type.
- In still another example (Example 3), the wet etching method is used to process the surface before polishing the tungsten (W). Here, tungsten oxide can be solved in an alkali solution, it is immersed in an alkali aqueous solution such as an aqueous solution of sodium hydroxide or potassium hydroxide for about 10 minutes. After that, polishing is performed. Since tungsten bulk crystal is exposed, it is possible to promote reaction between the tungsten and the oxidant.
- In yet another example (Example 4) of the present invention, sputter etching is used to remove oxide from a surface before performing the tungsten (W) polishing. The putter etching is performed, for example, under the conditions of
Ar flow rate 200 scc, RF output 400 W, and pressure 0.15 Pa for 30 seconds. - Yet still another example (Example 5) of the semiconductor device production method includes a flattening step for flatten the semiconductor surface. FIG. 2 shows the semiconductor device production procedure according to a second embodiment. Here, explanation on the same steps as the first embodiment will be omitted. In the second embodiment, the flattening
step 19 employs sputter etching for etching the metal film on the surface to flatten the surface, for example, tungsten surface. In this example, the temperature starts to increase immediately after the polishing start, which enables to reduce the latent period of time. The sputter etching condition may be, for example,Ar flow rate 200 sccm, RF output 800 W, pressure 0.15 Pa, and 120 seconds. - Still yet another example (Example 6) is characterized in that the polishing consists of at least two steps. The first polishing step requires a polishing condition or abrasive that a difference between the polishing rate of tungsten and that of oxide is small. The second polishing step is identical to the conventional method.
- More specifically, the first polishing step employ abrasive containing about 10% of colloidal silica and having
pH 2 to 4 adjusted by hydrogen peroxide or the like. The polishing condition is, for example, as follows: weight 300 g/cm2, the platen and carrier rotation at 100 rpm. The polishing time is set to 10 to 60 seconds. In this case, a difference between the polishing rate of tungsten and that of oxide is small, and polishing rate can be seen immediately after the polishing start. - Yet another example (Example 7) of the present invention includes a temperature adjustment step for heating at the initial stage of the polishing. That is, immediately after the polishing start, the polishing pad surface is heated for 10 to 30 seconds while polishing is in progress. The heating means may be, for example, abrasive heated to 40 degrees C is applied at the initial stage. Alternatively, a lamp is arranged above the polishing pad to radiate immediately after the polishing start to heat the polishing pad surface. Moreover, as another means, it is also possible to provide a built-in
heater 10 in the polishing table. - In still another example (Example 8) of the present invention, the
surface removal step 17 includes at least two polishing steps. The first polishing step is performed with a high weight, and the second polishing step is performed with a lower weight. - The polishing condition may be, for example, as follows. The first polishing step is set to pressure 500 g/cm2, polishing table rotation at 100 rpm,
abrasive flow rate 200 cc/min, and polishingtime 20 sec. The second polishing step is set to pressure 300 g/cm2, polishing table rotation at 100 rpm,abrasive flow rate 200 cc/min, and the polishing time is arbitrary. - In yet another example (Example 9), the
surface removal step 17 for removing oxide includes at least two steps. The first step is performed with a wafer guide ring pressed with a high pressure and the second step is performed with the wafer guide ring pressed with a lower pressure. FIG. 3(a) is a side view and FIG. 3(b) is a bottom view of the carrier portion. Thecarrier 3 has aguide ring 9 to hold the semiconductor wafer 8 during polishing. If thisguide ring 9 is brought into contact with the polishing pad during polishing operation, the pad surface temperature tends to increase. The pressure and the contact area of this guide ring has a proportional relationship with the heat. Utilizing this tendency, it is possible to accelerate the rise of the polishing pad surface temperature at an initial stage of polishing. - The polishing condition may be, for example, as follows. The first step is set to: guide ring pressure 500 g/cm2; wafer pressure 300 g/cm2; polishing table rotation at 100 rpm;
abrasive flow rate 200 cc/min; and thepolishing time 20 seconds. The second step is set to: guide ring pressure 300 g/cm2; wafer pressure 300 g/cm2; polishing table rotation 100 rpm;abrasive flow rate 200 cc/min; and the polishing time is arbitrary. It should be noted that the guide ring outer and inner diameters are assumed to be 10 to 30 mm. - As has been described above, the preset invention provides a production method to eliminate the latent time immediately after a polishing start. FIG. 6 shows a tungsten film surface state before being polished. The latent time is caused by presence of
oxide 6 on the metal film surface, which shows a strong passivation, suppressing a chemical reaction at the initial stage of polishing. Also, the latent time is caused by the convex and concave on the metal film surface, which results in a small contact area, causing little friction heat, i.e., the polishing pad surface temperature cannot increase rapidly, thus indirectly suppressing the chemical reaction. - It should be noted that the present invention is not to be limited to the aforementioned Examples, and various modifications can be performed within the scope ot the present invention.
- In order to reduce the latent period of time at which the polishing speed is extremely low, the present invention includes an oxide removal step before the polishing step for polishing a metal film. Thus, the present invention enables to reduce the latent period of time T0 immediately after a polishing start, which in turn brings about a uniform surface and improves the polishing stability. This enables to obtain a metal film of uniform thickness after metal CMP, and to improve flatness. This results in increase of yield.
- The invention may be embodied in other specific forms without departing from the spirit or essential characteristic thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
- The entire disclosure of Japanese Patent Application No. A10-343885 (Filed on Dec. 3, 1998) including specification, claims, drawings and summary are incorporated herein by reference in its entirety.
Claims (11)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP34388598A JP3206654B2 (en) | 1998-12-03 | 1998-12-03 | Method for manufacturing semiconductor device |
JP10-343885 | 1998-12-03 |
Publications (2)
Publication Number | Publication Date |
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US20020068451A1 true US20020068451A1 (en) | 2002-06-06 |
US6432825B1 US6432825B1 (en) | 2002-08-13 |
Family
ID=18364999
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US09/447,216 Expired - Fee Related US6432825B1 (en) | 1998-12-03 | 1999-11-23 | Semiconductor device production method |
Country Status (5)
Country | Link |
---|---|
US (1) | US6432825B1 (en) |
JP (1) | JP3206654B2 (en) |
KR (1) | KR100356125B1 (en) |
CN (1) | CN1256508A (en) |
GB (1) | GB2344459A (en) |
Cited By (3)
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WO2004013242A2 (en) * | 2002-08-05 | 2004-02-12 | Ppg Industries Ohio, Inc. | Polishing slurry system and metal poslishing and removal process |
US20050148292A1 (en) * | 2001-09-21 | 2005-07-07 | Samsung Electronics, Co., Ltd. | Method and apparatus for polishing a copper layer and method for forming a wiring structure using copper |
CN102672598A (en) * | 2012-05-22 | 2012-09-19 | 上海宏力半导体制造有限公司 | Grinding pad using method and wafer grinding method |
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US20030199238A1 (en) * | 2000-01-18 | 2003-10-23 | Shigeo Moriyama | Polishing apparatus and method for producing semiconductors using the apparatus |
KR100437455B1 (en) * | 2001-12-10 | 2004-06-23 | 삼성전자주식회사 | Method of forming semiconductor device |
US20060089095A1 (en) | 2004-10-27 | 2006-04-27 | Swisher Robert G | Polyurethane urea polishing pad |
JP2006286766A (en) * | 2005-03-31 | 2006-10-19 | Nec Electronics Corp | Chemical mechanical polishing method and chemical mechanical polishing system |
KR100781079B1 (en) * | 2006-05-18 | 2007-11-30 | (주)이씨테크 | Etching method of aluminum metal plate |
JP5015696B2 (en) | 2006-09-04 | 2012-08-29 | ルネサスエレクトロニクス株式会社 | Semiconductor device manufacturing method and manufacturing apparatus |
JP5343008B2 (en) * | 2007-01-29 | 2013-11-13 | トーソー エスエムディー,インク. | Ultra-smooth surface sputtering target and method of manufacturing the same |
KR100873235B1 (en) * | 2007-07-12 | 2008-12-10 | 주식회사 실트론 | Wafer Polishing Method |
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US8518817B2 (en) | 2010-09-22 | 2013-08-27 | International Business Machines Corporation | Method of electrolytic plating and semiconductor device fabrication |
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KR101409889B1 (en) | 2013-12-27 | 2014-06-19 | 유비머트리얼즈주식회사 | Polishing slurry and substrate polishing method using the same |
CN105983898A (en) * | 2015-02-13 | 2016-10-05 | 中芯国际集成电路制造(上海)有限公司 | Grinding method for oxide layer on surface of wafer |
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JPH084105B2 (en) * | 1987-06-19 | 1996-01-17 | 株式会社エンヤシステム | Wafer bonding method |
US4879258A (en) | 1988-08-31 | 1989-11-07 | Texas Instruments Incorporated | Integrated circuit planarization by mechanical polishing |
US5196353A (en) * | 1992-01-03 | 1993-03-23 | Micron Technology, Inc. | Method for controlling a semiconductor (CMP) process by measuring a surface temperature and developing a thermal image of the wafer |
US5514245A (en) | 1992-01-27 | 1996-05-07 | Micron Technology, Inc. | Method for chemical planarization (CMP) of a semiconductor wafer to provide a planar surface free of microscratches |
US5314843A (en) | 1992-03-27 | 1994-05-24 | Micron Technology, Inc. | Integrated circuit polishing method |
US5607718A (en) * | 1993-03-26 | 1997-03-04 | Kabushiki Kaisha Toshiba | Polishing method and polishing apparatus |
US5658183A (en) * | 1993-08-25 | 1997-08-19 | Micron Technology, Inc. | System for real-time control of semiconductor wafer polishing including optical monitoring |
US5700180A (en) * | 1993-08-25 | 1997-12-23 | Micron Technology, Inc. | System for real-time control of semiconductor wafer polishing |
JP3680343B2 (en) | 1995-03-13 | 2005-08-10 | ソニー株式会社 | Chemical mechanical polishing apparatus and semiconductor device manufacturing method |
US5859466A (en) * | 1995-06-07 | 1999-01-12 | Nippon Steel Semiconductor Corporation | Semiconductor device having a field-shield device isolation structure and method for making thereof |
JP3076244B2 (en) | 1996-06-04 | 2000-08-14 | 日本電気株式会社 | Polishing method of multilayer wiring |
JPH10189597A (en) | 1996-12-25 | 1998-07-21 | Toshiba Corp | Manufacture of semiconductor device |
US5837557A (en) * | 1997-03-14 | 1998-11-17 | Advanced Micro Devices, Inc. | Semiconductor fabrication method of forming a master layer to combine individually printed blocks of a circuit pattern |
US5934980A (en) * | 1997-06-09 | 1999-08-10 | Micron Technology, Inc. | Method of chemical mechanical polishing |
US5957750A (en) * | 1997-12-18 | 1999-09-28 | Micron Technology, Inc. | Method and apparatus for controlling a temperature of a polishing pad used in planarizing substrates |
US6020262A (en) * | 1998-03-06 | 2000-02-01 | Siemens Aktiengesellschaft | Methods and apparatus for chemical mechanical planarization (CMP) of a semiconductor wafer |
US6150271A (en) * | 1998-09-10 | 2000-11-21 | Lucent Technologies Inc. | Differential temperature control in chemical mechanical polishing processes |
-
1998
- 1998-12-03 JP JP34388598A patent/JP3206654B2/en not_active Expired - Fee Related
-
1999
- 1999-11-23 GB GB9927693A patent/GB2344459A/en not_active Withdrawn
- 1999-11-23 US US09/447,216 patent/US6432825B1/en not_active Expired - Fee Related
- 1999-11-29 KR KR1019990053389A patent/KR100356125B1/en not_active IP Right Cessation
- 1999-12-02 CN CN99125528A patent/CN1256508A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050148292A1 (en) * | 2001-09-21 | 2005-07-07 | Samsung Electronics, Co., Ltd. | Method and apparatus for polishing a copper layer and method for forming a wiring structure using copper |
WO2004013242A2 (en) * | 2002-08-05 | 2004-02-12 | Ppg Industries Ohio, Inc. | Polishing slurry system and metal poslishing and removal process |
WO2004013242A3 (en) * | 2002-08-05 | 2004-06-03 | Ppg Ind Ohio Inc | Polishing slurry system and metal poslishing and removal process |
CN102672598A (en) * | 2012-05-22 | 2012-09-19 | 上海宏力半导体制造有限公司 | Grinding pad using method and wafer grinding method |
Also Published As
Publication number | Publication date |
---|---|
GB2344459A (en) | 2000-06-07 |
KR100356125B1 (en) | 2002-10-19 |
JP3206654B2 (en) | 2001-09-10 |
JP2000173959A (en) | 2000-06-23 |
CN1256508A (en) | 2000-06-14 |
GB9927693D0 (en) | 2000-01-19 |
KR20000047755A (en) | 2000-07-25 |
US6432825B1 (en) | 2002-08-13 |
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