+

US20020031859A1 - Microwave semiconductor device and the manufacturing method thereof for improve heat discharge and electric property - Google Patents

Microwave semiconductor device and the manufacturing method thereof for improve heat discharge and electric property Download PDF

Info

Publication number
US20020031859A1
US20020031859A1 US09/804,239 US80423901A US2002031859A1 US 20020031859 A1 US20020031859 A1 US 20020031859A1 US 80423901 A US80423901 A US 80423901A US 2002031859 A1 US2002031859 A1 US 2002031859A1
Authority
US
United States
Prior art keywords
semiconductor
substrate
chip
semiconductor device
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US09/804,239
Other versions
US6400035B1 (en
Inventor
Seiichi Hirata
Kazutaka Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Assigned to KABUSHIKI KAISHA TOSHIBA reassignment KABUSHIKI KAISHA TOSHIBA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HIRATA, SEIICHI, TAKAGI, KAZUTAKA
Priority to US10/094,651 priority Critical patent/US6528347B2/en
Publication of US20020031859A1 publication Critical patent/US20020031859A1/en
Application granted granted Critical
Publication of US6400035B1 publication Critical patent/US6400035B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to a microwave semiconductor device in which a semiconductor chip, whose amplifying element for a microwave circuit or the like is formed on the semiconductor substrate, is mounted on a substrate plate such as a package and a method thereof.
  • a microwave semiconductor device is, for example, consisted of a device in which semiconductor chip, whose amplifying element such as a field effect transistor, a microstrip line, a resistor and the like are formed on a GaAs semiconductor substrate, is mounted on a substrate plate of a package.
  • a flip-chip connection by which a bump projecting on a semiconductor chip is formed by electro-plating or the like and the semiconductor chip and the substrate plate are connected by the bump, is employed.
  • a heat sink is provided on the reverse face of a semiconductor chip, or a heat-discharging fan is provided directly or via a metal plate.
  • An object of the present invention is to solve the defects described above and provide a microwave semiconductor device which is excellent in a heat discharge property and an electric property.
  • Another object of the present invention is to solve the defects described above and provide a method of fabricating a microwave semiconductor device which is excellent in a heat discharge property and an electric property.
  • a microwave semiconductor device of the present invention has a semiconductor chip in which an active element flip-chip connected with the other circuit elements is formed on the surface side of a semiconductor substrate and a substrate plate on which the reverse face side of a semiconductor substrate of this semiconductor chip is joined.
  • a method of fabricating a microwave semiconductor device of the present invention comprises the first step of fabricating a semiconductor chip forming an active element on a semiconductor substrate, the second step of forming a bump on this semiconductor chip, the third step of flip-chip connecting a semiconductor chip and a circuit part in which a circuit element is formed on the predetermined circuit substrate by utilizing a bump, and the fourth step of the semiconductor chip and the circuit part flip-chip connected are joined to a substrate plate, provided that the side of semiconductor chip should be joined to the substrate plate.
  • FIG. 1 is a flow chart for illustrating the embodiment of the present invention, showing a step through the step of flip-chip connecting a semiconductor chip and a circuit element on a dielectric substrate:
  • FIG. 2 is a flow chart for illustrating the embodiment of the present invention, showing a step of mounting a semiconductor part in which a semiconductor chip and a circuit element on a dielectric substrate are flip-chip connected within a package;
  • FIG. 3 is a flow chart for illustrating the embodiment of the present invention, showing a step of sealing a region where a semiconductor chip and a circuit element on a dielectric substrate are flip-chip connected.
  • the semiconductor chip 11 has a configuration in which, as shown in FIG. 1( a ), an active element such as a field effect transistor and the like are formed on the substrate 12 such as GaAs and the like. Moreover, on an electrode surface on the semiconductor chip 11 , the plural number of bumps 13 projecting to an information is formed by electroplating and the like.
  • FIG. 1( b ) When a microwave semiconductor device is fabricated by utilizing the above-described semiconductor chip 11 , first, as shown in FIG. 1( b ). after the semiconductor chips 11 are removed one by one, as shown in FIG. 1( c ), these are divided into, for example, groups A-C of the semiconductor chips 11 which are consisted of 3 pieces of the semiconductor chips and configures a common microwave.
  • the respective groups of A-C consisted of three pieces of the semiconductor chips 11 are in turn connected by the bump 13 at the predetermined positions in the plural number of regions 141 on the dielectric substrate 14 where a microstrip line, a passive element such as a resistor and the like are formed.
  • FIG. 1( e ) shows a drawing of depicting one region extracted from the dielectric substrate 34 .
  • the microstrip line 15 , the resistor 16 and the like are formed on the dielectric substrate 14 , for example, three pieces of the semiconductor chips 11 are connected to the microstrip line 15 .
  • FIG. 1( f ) shows a sectional view of FIG. 1( e ).
  • the semiconductor chips 11 are connected by the bumps 13 .
  • the package 21 is consisted of Metallic substrate plate 22 , the side wall 23 and the like, on the side wall 23 portion, the lead terminal for input 24 and the lead terminal for output 25 which electrically connect the inside and outside of the side wall 23 are provided. Moreover, the semiconductor parts 26 which connects the semiconductor chip 11 on the dielectric substrate 14 is placed upward the substrate plate 22 so that the semiconductor chip 11 side faces toward the substrate plate 22 side. Moreover, on the substrate plate 22 , the silver paste 22 is disposed.
  • the semiconductor parts 26 and the substrate plate 22 are fixed and adhered by silver paste 27 .
  • a solder can be used Instead of the silver paste 27 .
  • the cover 29 consisted of ceramic and the like Is disposed on the open portion of the side wall 23 , a space within the package 21 which has accommodated the semiconductor parts 26 is sealed.
  • the semiconductor chips are directly mounted on the substrate plate of the package.
  • the heat generated by the semiconductor chips is directly discharged, an excellent heat discharge property is obtained. Therefore, a semiconductor chip having a higher heating value can be mounted on.
  • the semiconductor chip and the substrate plate are directly contacted with each other, the circuit is securely grounded and an excellent electric property is realized.
  • a microstrip line and a passive element such as a resistor can be formed on a lower cost dielectric substrate, and a low priced microwave semiconductor device can be realized.
  • FIG. 3( a ) shows the state where the respective semiconductor chips 11 are connected by the bumps 13 in the plural number of regions 141 on the dielectric substrate 14 on which a microstrip line and a passive element such as a resistor in the steps from the first step to the step of FIG. 1( d ) described in the embodiment of FIG. 1.
  • the region where the semiconductor chips 11 and a circuit element on the dielectric substrate 14 are flip-chip connected is sealed by the insulating material 31 such as a resin using the potting technology .
  • the mechanical strength of the region where the semiconductor chips and the dielectric substrate are flip-chip connected is reinforced by the sealing with the insulating material 31 . Therefore, after the dielectric substrate, the semiconductor chip and the package are joined each other, a crack or the like of the semiconductor chip due to the stress generated at joining portion by the difference of thermal expansion of respective these members is prevented.
  • GaAs substrate As a semiconductor substrate, GaAs substrate is used. Moreover, a field effect transistor is formed on the semiconductor substrate, and a microstrip line and a resistor and the like are formed on the dielectric substrate.
  • a semiconductor substrate GaAs substrate is used as a semiconductor substrate.
  • a field effect transistor is formed on the semiconductor substrate, and a microstrip line and a resistor and the like are formed on the dielectric substrate.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

In this disclosure, the semiconductor is directly mounted on the substrate plate of a package. According to this configuration, heat generated by the semiconductor chip is directly discharged, an excellent heat discharge property is realized. Moreover, the circuit is securely grounded and an excellent electric property is obtained.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • The subject application is related to subject matter disclosed in the Japanese Patent Application No.Tokugan2000-086847 filed in Mar. 27, 2000 in Japan, to which the subject application claims priority under the Paris Convention and which is incorporated by reference herein. [0001]
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0002]
  • The present invention relates to a microwave semiconductor device in which a semiconductor chip, whose amplifying element for a microwave circuit or the like is formed on the semiconductor substrate, is mounted on a substrate plate such as a package and a method thereof. [0003]
  • 2. Description of the Related Art [0004]
  • A microwave semiconductor device is, for example, consisted of a device in which semiconductor chip, whose amplifying element such as a field effect transistor, a microstrip line, a resistor and the like are formed on a GaAs semiconductor substrate, is mounted on a substrate plate of a package. [0005]
  • When a semiconductor chip is mounted on a substrate plate, for example, what is called a flip-chip connection, by which a bump projecting on a semiconductor chip is formed by electro-plating or the like and the semiconductor chip and the substrate plate are connected by the bump, is employed. [0006]
  • Now, as for a conventional microwave semiconductor device, in order to discharge heat that a semiconductor chip generates, a heat sink is provided on the reverse face of a semiconductor chip, or a heat-discharging fan is provided directly or via a metal plate. [0007]
  • According to such a structure, if it is a low heating value, heat discharging can be performed using a wind fan and the like. However, if it is a high heating value, there exists a problem that sufficient heat discharging is not performed. Moreover, there exists another problem that grounding of a circuit is not sufficiently performed and electric properties are deteriorated. [0008]
    • SUMMARY OF THE INVENTION
  • An object of the present invention is to solve the defects described above and provide a microwave semiconductor device which is excellent in a heat discharge property and an electric property. [0009]
  • Moreover, another object of the present invention is to solve the defects described above and provide a method of fabricating a microwave semiconductor device which is excellent in a heat discharge property and an electric property. [0010]
  • A microwave semiconductor device of the present invention has a semiconductor chip in which an active element flip-chip connected with the other circuit elements is formed on the surface side of a semiconductor substrate and a substrate plate on which the reverse face side of a semiconductor substrate of this semiconductor chip is joined. [0011]
  • Moreover, a method of fabricating a microwave semiconductor device of the present invention comprises the first step of fabricating a semiconductor chip forming an active element on a semiconductor substrate, the second step of forming a bump on this semiconductor chip, the third step of flip-chip connecting a semiconductor chip and a circuit part in which a circuit element is formed on the predetermined circuit substrate by utilizing a bump, and the fourth step of the semiconductor chip and the circuit part flip-chip connected are joined to a substrate plate, provided that the side of semiconductor chip should be joined to the substrate plate. [0012]
  • Other and further objects and features of the present invention will become obvious upon understanding of the Illustrative embodiments about to be described in connection with the accompanying drawings or will be Indicated in the appended claims, and various advantages not referred to herein will occur to one skilled in the art upon employing of the invention in practice.[0013]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a flow chart for illustrating the embodiment of the present invention, showing a step through the step of flip-chip connecting a semiconductor chip and a circuit element on a dielectric substrate: [0014]
  • FIG. 2 is a flow chart for illustrating the embodiment of the present invention, showing a step of mounting a semiconductor part in which a semiconductor chip and a circuit element on a dielectric substrate are flip-chip connected within a package; and [0015]
  • FIG. 3 is a flow chart for illustrating the embodiment of the present invention, showing a step of sealing a region where a semiconductor chip and a circuit element on a dielectric substrate are flip-chip connected.[0016]
    • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Various embodiments of the present invention will be described with reference to the accompanying drawings. It is to be noted that the same or similar reference numerals are applied to the same or similar parts and elements throughout the drawings, and the description of the same or similar parts and elements will be omitted or simplified. [0017]
  • Hereinafter, a method of fabricating a microwave semiconductor device of the embodiment of the present invention will be described in reference to FIG. 1 [0018]
  • In the embodiment of the present invention, the [0019] semiconductor chip 11 has a configuration in which, as shown in FIG. 1(a), an active element such as a field effect transistor and the like are formed on the substrate 12 such as GaAs and the like. Moreover, on an electrode surface on the semiconductor chip 11, the plural number of bumps 13 projecting to an information is formed by electroplating and the like.
  • When a microwave semiconductor device is fabricated by utilizing the above-described [0020] semiconductor chip 11, first, as shown in FIG. 1(b). after the semiconductor chips 11 are removed one by one, as shown in FIG. 1(c), these are divided into, for example, groups A-C of the semiconductor chips 11 which are consisted of 3 pieces of the semiconductor chips and configures a common microwave.
  • Next, as shown in FIG. 1([0021] d), the respective groups of A-C consisted of three pieces of the semiconductor chips 11 are in turn connected by the bump 13 at the predetermined positions in the plural number of regions 141 on the dielectric substrate 14 where a microstrip line, a passive element such as a resistor and the like are formed.
  • Now, FIG. 1([0022] e) shows a drawing of depicting one region extracted from the dielectric substrate 34. As apparent from FIG. 1(e), it is understood that the microstrip line 15, the resistor 16 and the like are formed on the dielectric substrate 14, for example, three pieces of the semiconductor chips 11 are connected to the microstrip line 15. Moreover, FIG. 1(f) shows a sectional view of FIG. 1(e). As apparent from FIG. 1(f), the semiconductor chips 11 are connected by the bumps 13.
  • Next, referring to FIG. 2, a method of mounting semiconductor parts, which connect the [0023] semiconductor chip 11 on the dielectric substrate 14, on a substrate plate of a package will be described below.
  • As shown in FIG. 2([0024] a), the package 21 is consisted of Metallic substrate plate 22, the side wall 23 and the like, on the side wall 23 portion, the lead terminal for input 24 and the lead terminal for output 25 which electrically connect the inside and outside of the side wall 23 are provided. Moreover, the semiconductor parts 26 which connects the semiconductor chip 11 on the dielectric substrate 14 is placed upward the substrate plate 22 so that the semiconductor chip 11 side faces toward the substrate plate 22 side. Moreover, on the substrate plate 22, the silver paste 22 is disposed.
  • Next, as shown in FIG. 2([0025] b), the semiconductor parts 26 and the substrate plate 22 are fixed and adhered by silver paste 27. In this case, a solder can be used Instead of the silver paste 27.
  • Next, as shown in FIG. 2([0026] c) , a bonding between the semiconductor parts 26 and the lead terminal for input 24, and a bonding between the semiconductor parts 26 and the lead terminal for output 25 are performed. At this moment, the wire 28 Is electrically connected to a circuit formed on the semiconductor chip 11 through a through hole (not shown) or a terminal end-via hole, provided on the dielectric substrate 14.
  • Next, as shown in FIG. 2([0027] d), the cover 29 consisted of ceramic and the like Is disposed on the open portion of the side wall 23, a space within the package 21 which has accommodated the semiconductor parts 26 is sealed.
  • According to the semiconductor chips are directly mounted on the substrate plate of the package. In this case, since the heat generated by the semiconductor chips is directly discharged, an excellent heat discharge property is obtained. Therefore, a semiconductor chip having a higher heating value can be mounted on. Moreover, since the semiconductor chip and the substrate plate are directly contacted with each other, the circuit is securely grounded and an excellent electric property is realized. [0028]
  • Moreover, since it is configured so that the semiconductor chips are connected to the dielectric substrate on which a microstrip line and a passive element such as a resistor are formed, a microstrip line and a passive element such as a resistor can be formed on a lower cost dielectric substrate, and a low priced microwave semiconductor device can be realized. [0029]
    • OTHER EMBODIMENTS
  • Although the invention achieved by the inventors has been described through the above embodiments, it should not be understood that a description and drawings which are part of this disclosure restrict the present invention. That is, various modified embodiments thereof and operating technologies will be evident to those skilled in the art from this disclosure. [0030]
  • For example, FIG. 3([0031] a) shows the state where the respective semiconductor chips 11 are connected by the bumps 13 in the plural number of regions 141 on the dielectric substrate 14 on which a microstrip line and a passive element such as a resistor in the steps from the first step to the step of FIG. 1(d) described in the embodiment of FIG. 1.
  • In the embodiment of the present invention, as shown in FIG. 3([0032] b), subsequently, the region where the semiconductor chips 11 and a circuit element on the dielectric substrate 14 are flip-chip connected is sealed by the insulating material 31 such as a resin using the potting technology . According to this configuration, the mechanical strength of the region where the semiconductor chips and the dielectric substrate are flip-chip connected is reinforced by the sealing with the insulating material 31. Therefore, after the dielectric substrate, the semiconductor chip and the package are joined each other, a crack or the like of the semiconductor chip due to the stress generated at joining portion by the difference of thermal expansion of respective these members is prevented.
  • It should be noted that in the case of the above-described embodiment of the present invention, as materials used for the dielectric substrate on which a microstrip line and such as a resistor and the like are formed, alumina, glass ceramics and the like are used. However, in the case where the frequency to be dealt with is high, glass ceramics obtains more excellent properties than those of the others. [0033]
  • Moreover, in the above-described embodiment of the present invention, as a semiconductor substrate, GaAs substrate is used. Moreover, a field effect transistor is formed on the semiconductor substrate, and a microstrip line and a resistor and the like are formed on the dielectric substrate. However, these are only examples, and the other semiconductor elements and circuit elements can be also formed on dielectric substrates employing the semiconductor substrate of other materials. [0034]
  • Moreover, as materials for a substrate plate in the above-described embodiment of the present invention, it is preferable to employ Cu, CuMo, CuTn and the like . thereby being capable of realizing a more excellent heat discharge effect. [0035]
  • As described above, it should be understood that the present Invention includes various embodiments not described in this specification. Therefore, the present invention is limited by only specific matters relating to claims of the invention, which are introduced appropriately from the disclosure of the invention. [0036]

Claims (9)

What is claimed is;
1. A microwave semiconductor device comprising;
a semiconductor chip in which an active element flip-chip connected to other circuit elements was formed on the surface side of a semiconductor substrate; and
a substrate plate to which the reverse face side of said semiconductor substrate of said semiconductor chip was joined.
2. A microwave semiconductor device comprising;
a semiconductor chip in which an active element was formed on the surface side of a semiconductor substrate;
circuit parts in which a circuit element electrically connected to said active element by flip-chip connection was formed on a predetermined circuit substrate; and
a substrate plate to which the reverse face side of said semiconductor substrate of said semiconductor chip was joined.
3. The microwave semiconductor device according to claim 1, wherein a region where an active element and a circuit element are flip-chip connected is sealed with an insulating material.
4. The microwave semiconductor device according to claim 2, wherein a region where an active element and a circuit element are flip-chip connected is sealed with an insulating material.
5. The microwave semiconductor device according to claim 1, wherein a circuit element is a passive element.
6. The microwave semiconductor device according to claim 2, wherein a circuit element is a passive element.
7. The microwave semiconductor device according to claim 2, wherein a predetermined circuit substrate is a dielectric substrate.
8. The microwave semiconductor device according to claim 2, wherein a predetermined circuit substrate is consisted of alumina or glass ceramics.
9. A method for manufacturing microwave semiconductor device comprising the steps of:
fabricating a semiconductor chip forming an active element on a semiconductor substrate;
forming a bump on said semiconductor chip;
flip-chip connecting said semiconductor chip and circuit parts forming a circuit element on a predetermined substrate by utilizing said bump; and
joining said semiconductor chip and said circuit parts which are flip-chip connected to a substrate plate, provided that a side of said semiconductor chip should be joined to a substrate plate.
US09/804,239 2000-03-27 2001-03-13 Microwave semiconductor device with improved heat discharge and electrical properties and manufacturing method thereof Expired - Fee Related US6400035B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/094,651 US6528347B2 (en) 2000-03-27 2002-03-12 Manufacturing method for making a microwave semiconductor device with improved heat discharge and electric properties

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000086847A JP2001274278A (en) 2000-03-27 2000-03-27 Microwave semiconductor device and its manufacturing method
JP2000-086847 2000-03-27
JP2000-86847 2000-03-27

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US10/094,651 Division US6528347B2 (en) 2000-03-27 2002-03-12 Manufacturing method for making a microwave semiconductor device with improved heat discharge and electric properties

Publications (2)

Publication Number Publication Date
US20020031859A1 true US20020031859A1 (en) 2002-03-14
US6400035B1 US6400035B1 (en) 2002-06-04

Family

ID=18602949

Family Applications (2)

Application Number Title Priority Date Filing Date
US09/804,239 Expired - Fee Related US6400035B1 (en) 2000-03-27 2001-03-13 Microwave semiconductor device with improved heat discharge and electrical properties and manufacturing method thereof
US10/094,651 Expired - Fee Related US6528347B2 (en) 2000-03-27 2002-03-12 Manufacturing method for making a microwave semiconductor device with improved heat discharge and electric properties

Family Applications After (1)

Application Number Title Priority Date Filing Date
US10/094,651 Expired - Fee Related US6528347B2 (en) 2000-03-27 2002-03-12 Manufacturing method for making a microwave semiconductor device with improved heat discharge and electric properties

Country Status (2)

Country Link
US (2) US6400035B1 (en)
JP (1) JP2001274278A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10201781B4 (en) * 2002-01-17 2007-06-06 Infineon Technologies Ag High frequency power device and high frequency power module and method of making the same
JP3938742B2 (en) 2002-11-18 2007-06-27 Ｎｅｃエレクトロニクス株式会社 Electronic component device and manufacturing method thereof
EP1627428B1 (en) * 2003-05-28 2011-11-02 Infineon Technologies AG An integrated circuit package employing a head-spreader member
JP4575247B2 (en) * 2005-07-11 2010-11-04 株式会社東芝 High frequency packaging equipment
JP5631607B2 (en) * 2009-08-21 2014-11-26 株式会社東芝 High frequency circuit having multi-chip module structure
US7990223B1 (en) 2010-05-31 2011-08-02 Kabushiki Kaisha Toshiba High frequency module and operating method of the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6319810B1 (en) * 1994-01-20 2001-11-20 Fujitsu Limited Method for forming solder bumps
US5629241A (en) * 1995-07-07 1997-05-13 Hughes Aircraft Company Microwave/millimeter wave circuit structure with discrete flip-chip mounted elements, and method of fabricating the same
US6184463B1 (en) * 1998-04-13 2001-02-06 Harris Corporation Integrated circuit package for flip chip
US6189208B1 (en) * 1998-09-11 2001-02-20 Polymer Flip Chip Corp. Flip chip mounting technique

Also Published As

Publication number Publication date
US6528347B2 (en) 2003-03-04
US20020089068A1 (en) 2002-07-11
JP2001274278A (en) 2001-10-05
US6400035B1 (en) 2002-06-04

Similar Documents

Publication Publication Date Title
US6261868B1 (en) Semiconductor component and method for manufacturing the semiconductor component
US6828663B2 (en) Method of packaging a device with a lead frame, and an apparatus formed therefrom
KR100403608B1 (en) Stacked intelligent power module package and manufacturing method thereof
US5075759A (en) Surface mounting semiconductor device and method
JP3013831B2 (en) MMIC package
US5157588A (en) Semiconductor package and manufacture thereof
US7554188B2 (en) Low inductance bond-wireless co-package for high power density devices, especially for IGBTs and diodes
US20020163070A1 (en) High frequency power device with a plastic molded package and direct bonded substrate
JP2009513026A (en) Semiconductor structure and assembly method
US5814890A (en) Thin-type semiconductor package
KR960012647B1 (en) Semiconductor device and manufacture method
JP3816821B2 (en) High frequency power module substrate and manufacturing method thereof
US6528347B2 (en) Manufacturing method for making a microwave semiconductor device with improved heat discharge and electric properties
US5736786A (en) Power module with silicon dice oriented for improved reliability
US5309016A (en) Semiconductor integrated circuit device having terminal members provided between semiconductor element and leads
CN117882187A (en) Semiconductor device and method for manufacturing the same
JPH09307020A (en) Ceramic package
US20050082658A1 (en) Simplified stacked chip assemblies
JP2531125B2 (en) IC chip carrier module
US20240162110A1 (en) Semiconductor device package assemblies and methods of manufacture
JP2669310B2 (en) Semiconductor integrated circuit device and mounting method thereof
JP2583507B2 (en) Semiconductor mounting circuit device
KR100264644B1 (en) Module package
JP2006128534A (en) Package for storing high heat radiation type electronic component
JPH01272140A (en) semiconductor equipment

Legal Events

Date Code Title Description
AS Assignment

Owner name: KABUSHIKI KAISHA TOSHIBA, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:HIRATA, SEIICHI;TAKAGI, KAZUTAKA;REEL/FRAME:011765/0027

Effective date: 20010307

CC Certificate of correction
FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20140604

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载