TWI847869B - Light-emitting device - Google Patents

Abstract

A light-emitting device includes a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a plurality of recesses penetrating through the second semiconductor layer and the active layer to expose the first semiconductor layer and being separated from each other; a contact electrode formed on the second semiconductor layer; a first electrode covering the plurality of recesses and the contact electrode; a second electrode formed on the contact electrode, wherein the first electrode comprises a plurality of first electrode extensions respectively extending from a plurality of sides of the second electrode to an inside of the second electrode to cover the plurality of recesses; a first electrode pad formed on the first electrode; and a second electrode pad formed on the second electrode.

Description

Light-emitting element

The present invention relates to a light-emitting element, and in particular to a flip-chip light-emitting element including a reflector structure.

Light-Emitting Diode (LED) is a solid-state semiconductor light-emitting element. Its advantages are low power consumption, low heat generation, long service life, shock resistance, small size, fast response speed and good photoelectric properties, such as stable luminous wavelength. Therefore, LEDs are widely used in household appliances, equipment indicator lights, and optoelectronic products.

According to an embodiment of the present invention, a light-emitting element is disclosed, comprising a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; a plurality of recesses pass through the second semiconductor layer and the active layer to expose the first semiconductor layer and are separated from each other; a contact electrode is located on the second semiconductor layer; layer; a first electrode covers a plurality of recesses and a contact electrode; a second electrode is located on the contact electrode, wherein the first electrode comprises a plurality of first electrode extensions extending from a plurality of sides of the second electrode to an inner side of the second electrode to cover a plurality of recesses; a first electrode pad is located on the first electrode; and a second electrode pad is located on the second electrode.

1, 2: Light-emitting element

10: Substrate

10d: Cutting road

d1: District 1

d2: District 2

10S: Side

100: Upper surface

11: convex part

111: First level

112: Second level

20: Semiconductor stacking

20m: Semiconductor table

200: Concave

201: First semiconductor layer

202: Second semiconductor layer

203: Active layer

200: Concave

206: Depression

207: protrusion

210: Surrounding contact area

30: Passivation layer

301: First passivation layer opening

302: Second passivation layer opening

320: Side wall

40: Contact electrode

401: Transparent conductive layer

402:Reflection layer

403: Barrier layer

50: Insulation layer

501: First insulation layer opening

502: Second insulation layer opening

510: Side wall

520: Side wall

60: Top needle area

61: First electrode

610: first electrode extension

62: Second electrode

620: Second electrode opening

621, 622, 623, 624: Edge

70: Protective layer

700: Protective layer retention part

701: Opening of the first protective layer

702: Second protective layer opening

81: First electrode pad

810: First electrode pad opening

82: Second electrode pad

820: Second electrode pad opening

3, 4: Light-emitting device

51:Packaging substrate

53: Insulation Department

54: Reflection structure

511: First gasket

512: Second gasket

602: Lampshade

604: Reflector

606: Carrying unit

608: Light-emitting unit

611: Light-emitting module

612: Lamp holder

614: Heat sink

616:Connection part

618:Electrical connection element

Figure 1 is a top view of a light-emitting element 1 disclosed in an embodiment of the present invention.

Figure 2 is a cross-sectional view of the light-emitting element 1 along the tangent line X-X’ of Figure 1.

Figure 3 is a top view of a light-emitting element 2 disclosed in another embodiment of the present invention.

Figure 4 is a cross-sectional view of the light-emitting element 2 along the tangent line Y-Y’ of Figure 3.

Figure 5 is a partial top view of position II of light-emitting element 1 in Figure 1 or position I 2 of light-emitting element 2 in Figure 3.

Figure 6 is a partial cross-sectional view along the tangent line I-I’ of Figure 5.

Figure 7 is a partial top view of position II of the light-emitting element 1 in Figure 1.

Figure 8A is a partial cross-sectional view along the tangent line Ⅱ 1-Ⅱ 1’ of Figure 7.

Figure 8B is a partial cross-sectional view along the tangent line Ⅱ 2-Ⅱ 2’ of Figure 7.

Figure 9 is a schematic diagram of a light-emitting device 3 according to an embodiment of the present invention.

Figure 10 is a schematic diagram of a light-emitting device 4 according to an embodiment of the present invention.

In order to make the description of the present invention more detailed and complete, please refer to the description of the following embodiments and the related figures. However, the embodiments shown below are used to illustrate the light-emitting element of the present invention, and the present invention is not limited to the following embodiments. In addition, the size, material, shape, relative configuration, etc. of the components recorded in the embodiments in this specification are not limited to this without any limitation, but are simply described. And the size or position relationship of the components shown in each figure will be exaggerated for the purpose of clear description. Moreover, in the following description, in order to appropriately omit detailed description, the same name or symbol is used to display the same or homogeneous components.

One purpose of the present invention is to provide a light-emitting element to improve the light extraction efficiency of the light-emitting element.

Another object of the present invention is to provide a light-emitting element to eliminate the phenomenon of concentrated current flow inside the semiconductor layer and improve current diffusion.

FIG. 1 is a top view of a light-emitting element 1 disclosed in an embodiment of the present invention. FIG. 2 is a cross-sectional view of the light-emitting element 1 along the tangent line X-X' of FIG. 1. FIG. 3 is a top view of a light-emitting element 2 disclosed in another embodiment of the present invention. FIG. 4 is a cross-sectional view of the light-emitting element 2 along the tangent line Y-Y' of FIG. 3.

As shown in FIG. 1, FIG. 2, FIG. 3 and FIG. 4, a light-emitting element 1 or 2 includes a substrate 10; a semiconductor stack 20 includes a first semiconductor layer 201, a second semiconductor layer 202, and an active layer 203 located between the first semiconductor layer 201 and the second semiconductor layer 202; a plurality of recesses 200 pass through the second semiconductor layer 202 and the active layer 203 to expose the first semiconductor layer 201, and are separated from each other, that is, a portion of the first semiconductor layer 201 is not covered by the second semiconductor layer 202 and the active layer 203, and is exposed in the plurality of recesses 200. The semiconductor layer 201 can be covered by other layers that follow; a contact electrode 40 is located on the second semiconductor layer 202; a first electrode 61 covers a plurality of recesses 200 and the contact electrode 40; a second electrode 62 is located on the contact electrode 40, wherein the first electrode 61 includes a plurality of first electrode extensions 610 extending from a plurality of sides 621, 622, 623, or 624 of the second electrode 62 to an inner side of the second electrode 62 to cover a plurality of recesses 200; a first electrode pad 81 is located on the first electrode 61; and a second electrode pad 82 is located on the second electrode 62.

The substrate 10 may be a growth substrate for epitaxially growing the semiconductor stack 20. The substrate 10 includes a gallium arsenide (GaAs) wafer for epitaxially growing aluminum gallium indium phosphide (AlGaInP), or a sapphire ( _Al2O3 ) wafer, a gallium nitride ( _GaN ) wafer, a silicon carbide (SiC) wafer, or an aluminum nitride (AlN) wafer for growing gallium nitride (GaN), indium gallium nitride (InGaN), or aluminum gallium nitride (AlGaN).

The surface where the substrate 10 and the semiconductor stack 20 meet can be a roughened surface. The roughened surface can be a surface with an irregular shape or a surface with a regular shape. For example, as shown in FIG. 6, FIG. 8A and FIG. 8B, relative to the upper surface 100 of the substrate 10, the substrate 10 includes one or more protrusions 11 protruding from the upper surface 100, or includes one or more concave portions (not shown) recessed in the upper surface 100. In a cross-sectional view, the protrusion 11 or the concave portion (not shown) can be hemispherical or polygonal.

In one embodiment of the present invention, a semiconductor stack 20 having photoelectric properties, such as a light-emitting stack, is formed on a substrate 10 by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD) or ion plating, wherein the physical vapor deposition method includes sputtering or evaporation.

The semiconductor stack 20 includes a first semiconductor layer 201, a second semiconductor layer 202, and an active layer 203 formed between the first semiconductor layer 201 and the second semiconductor layer 202. The wavelength of light emitted by the light-emitting element 1 or 2 is adjusted by changing the physical and chemical composition of one or more layers in the semiconductor stack 20. The material of the semiconductor stack 20 includes III-V _{semiconductor} materials, such as _{AlxInyGa (1-xy)} N or _{AlxInyGa (1-xy) P} , where 0≦x, y≦1; (x+y)≦1. When the material of the semiconductor stack 20 is AlInGaP series material, red light with a wavelength between 610nm and 650nm can be emitted. When the semiconductor stack 20 is made of InGaN series materials, it can emit blue light with a wavelength between 400nm and 490nm, or green light with a wavelength between 500nm and 570nm. When the semiconductor stack 20 is made of AlGaN series or AlInGaN series materials, it can emit ultraviolet light with a wavelength between 250nm and 400nm.

The first semiconductor layer 201 and the second semiconductor layer 202 may be cladding layers or confinement layers, and the two have different conductivity types, electrical properties, polarities, or provide electrons or holes by doping elements. For example, the first semiconductor layer 201 is an n-type semiconductor, and the second semiconductor layer 202 is a p-type semiconductor. The active layer 203 is formed between the first semiconductor layer 201 and the second semiconductor layer 202. The electrons and holes are combined in the active layer 203 under the driving of a current, and the electrical energy is converted into light energy to emit a light. The active layer 203 may be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW). The material of the active layer 203 may be a semiconductor of neutral, p-type, or n-type electrical properties. The first semiconductor layer 201, the second semiconductor layer 202, or the active layer 203 may be a single layer or a structure including multiple sublayers.

In one embodiment of the present invention, the semiconductor stack 20 may further include a buffer layer (not shown) between the first semiconductor layer 201 and the substrate 10 to release the stress generated by the material lattice mismatch between the substrate 10 and the semiconductor stack 20, so as to reduce dislocation and lattice defects, thereby improving the epitaxial quality. The buffer layer may be a single layer or a structure including multiple sublayers. In one embodiment, PVD aluminum nitride (AlN) may be selected as the buffer layer, formed between the semiconductor stack 20 and the substrate 10, to improve the epitaxial quality of the semiconductor stack 20. In one embodiment, the target material used to form PVD aluminum nitride (AlN) is composed of aluminum nitride. In another embodiment, a target material composed of aluminum can be used to reactively form aluminum nitride with an aluminum target material in a nitrogen source environment.

In one embodiment of the present invention, the first electrode pad 81 and the second electrode pad 82 of the light-emitting element 1 or 2 are formed on the same side of the semiconductor stack 20. The light-emitting element 1 or 2 can be a flip chip structure or a lateral chip structure.

The present invention provides a large-sized light-emitting element to improve the brightness of the light-emitting element. One side of the light-emitting element 1 or 2 includes a size greater than 1200μm and a thickness between 100μm and 200μm.

In this embodiment, the semiconductor stack 20 is patterned by an etching process, and a portion of the second semiconductor layer 202 and the active layer 203 are removed to expose the first semiconductor layer 201, thereby forming a semiconductor mesa 20m, a plurality of recesses 200, and a peripheral contact region 210. Accordingly, the second semiconductor layer 202 and the active layer 203 each have an upper surface area smaller than that of the first semiconductor layer 201. The semiconductor mesa 20m is located on the first semiconductor layer 201 and includes the second semiconductor layer 202 and the active layer 203. The peripheral contact region 210 and the plurality of recesses 200 expose the first semiconductor layer 201. The peripheral contact region 210 surrounds the semiconductor mesa 20m. A plurality of recesses 200 are formed in the inner region of the semiconductor mesa 20m and are arranged in an array at a fixed distance from each other.

According to one embodiment of the present invention, as shown in FIG. 1, a recessed portion 206 can be formed on each side of the semiconductor table 20m, and a protruding portion 207 can be formed on each corner of the semiconductor table 20m. The recessed portion 206 exposes the first semiconductor layer 201, and the recessed portions 206 on multiple sides constitute a peripheral contact area 210 to surround the semiconductor table 20m. The protruding portion 207 retains the second semiconductor layer 202 and the active layer 203.

According to another embodiment of the light-emitting element 2 of the present invention, as shown in FIG. 3, a plurality of recessed portions 206 and a plurality of protruding portions 207 arranged alternately with each other can be formed on each side of the semiconductor table 20m. The plurality of recessed portions 206 expose the first semiconductor layer 201, and the protruding portions 207 retain the second semiconductor layer 202 and the active layer 203. The recessed portions 206 on the plurality of sides constitute a peripheral contact area 210 to surround the semiconductor table 20m.

From the top view or cross-sectional view of the self-luminous element 1 or 2, one of the plurality of recesses 200 includes a width between 30μm and 60μm. The top view of the recess 200 includes a circular, elliptical, semicircular, rectangular, or long strip shape.

The passivation layer 30 covers the semiconductor table 20m, and includes one or more first passivation layer openings 301 and one or more second passivation layer openings 302. From the top view of the light-emitting element 1, the first passivation layer opening 301 is disposed on the recessed portion 206 of the cavity 200 and the surrounding contact area 210 to expose the first semiconductor layer 201. The second passivation layer opening 302 is disposed on the semiconductor table 20m and exposes the second semiconductor layer 202.

Figure 5 is a partial top view of position I1 of light-emitting element 1 in Figure 1 or position I2 of light-emitting element 2 in Figure 3. Figure 6 is a partial cross-sectional view along the tangent line I-I’ of Figure 5.

As shown in FIG. 1, FIG. 2, FIG. 3, FIG. 4, FIG. 5 and FIG. 6, the contact electrode 40 is disposed in the second passivation layer opening 302 and contacts the second semiconductor layer 202. The contact electrode 40 substantially covers the upper surface of the semiconductor table 20m. For example, the contact electrode 40 may cover more than 80% of the semiconductor table 20m, and more preferably more than 90%. In one embodiment of the present invention, the contact electrode 40 may include any one or more layers of a transparent conductive layer 401, a reflective layer 402 and a barrier layer 403. In one embodiment of the present invention, the contact electrode 40 is disposed in the second passivation layer opening 302 and extends onto the passivation layer 30 to increase the electrical contact area with the second semiconductor layer 202 and to increase the reflection area of the light emitted by the reflective semiconductor stack 20.

In order to reduce the contact resistance and improve the efficiency of current diffusion, the material of the transparent conductive layer 401 includes a material that is transparent to the light emitted by the active layer 203, such as a transparent conductive oxide. The transparent conductive oxide includes indium tin oxide (ITO) or indium zinc oxide (IZO). In one embodiment of the present invention, the transparent conductive layer 401 may be a metal layer having a thickness of less than 500 angstroms.

The material of the reflective layer 402 includes a reflective metal, such as aluminum (Al), silver (Ag), rhodium (Rh) or platinum (Pt) or an alloy of the above materials. The reflective layer 402 is used to reflect the light emitted by the active layer 203 and emit the reflected light toward the substrate 10.

The barrier layer 403 can cover the reflective layer 402 to prevent the reflective layer 402 from being oxidized and deteriorating its reflectivity. The material of the barrier layer 403 includes metal materials, such as titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), chromium (Cr), platinum (Pt) and other metals or alloys of the above materials.

The insulating layer 50 covers the semiconductor table 20m and includes one or more first insulating layer openings 501 and one or more second insulating layer openings 502. From the top view of the light-emitting element 1 or 2, the first insulating layer opening 501 is disposed in the recessed portion 206 on the cavity 200 and the surrounding contact area 210 to expose the first semiconductor layer 201. The second insulating layer opening 502 is disposed on the contact electrode 40 and exposes any one or more layers of the transparent conductive layer 401 of the contact electrode 40, a reflective layer 402 and/or a barrier layer 403.

As shown in FIG. 6 , the first electrode 61 is located in the first insulating layer opening 501 of the insulating layer 50 and contacts the first semiconductor layer 201. The second electrode 62 is located in the second insulating layer opening 502 of the insulating layer 50 and contacts the contact electrode 40 or is electrically connected to the second semiconductor layer 202. A side wall 320 of the passivation layer 30 and a side wall 520 of the insulating layer 50 are located on the same inclined plane. A portion of the insulating layer 50 is located between the passivation layer 30 and the contact electrode 40 and contacts the second semiconductor layer 202. A portion of the protective layer 70 is located between the insulating layer 50 and the second electrode 62. The insulating layer 50 includes another sidewall 510 located between the first electrode 61 and the second electrode 62.

FIG. 7 is a partial top view of position II of the light-emitting element 1 in FIG. 1. FIG. 8A is a partial cross-sectional view along the tangent line II 1-II 1’ of FIG. 7. FIG. 8B is a partial cross-sectional view along the tangent line II 2-II 2’ of FIG. 7.

As shown in FIG. 8A and FIG. 8B, in order to increase the light extraction efficiency of the light-emitting element 1 or 2, the protrusion 11 of the substrate 10 includes a first layer 111 and a second layer 112. The first layer 111 includes the same material as that constituting the substrate 10, such as gallium arsenide (GaAs), sapphire (Al ₂ O ₃ ), gallium nitride (GaN), silicon carbide (SiC), or aluminum nitride (AlN). The second layer 112 includes a material different from that constituting the first layer 111 and the substrate 10. The material of the second layer 112 includes an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. Viewed from the side of the light-emitting element 1 or 2, the protrusion 11 includes a hemispherical shape, a cannonball shape, or a pyramidal shape. The top of the protrusion 11 can be a curved surface or a sharp point. In one embodiment, the second layer 112 is made of a material having a refractive index between the refractive indexes of the substrate 10 and the semiconductor stack 20.

The light-emitting element 1 includes a cutting line 10d located between the side 10S of the substrate 10 and one side 20S of the semiconductor stack 20, and the cutting line 10d includes a width between 5μm and 50μm, preferably less than 30μm, and more preferably less than 15μm. The cutting line 10d exposes the upper surface 100 of the substrate 10 and is located around the light-emitting element 1 to surround the semiconductor stack 20.

As shown in FIG. 8A and FIG. 8B , the cutting path 10d includes a first area d1 covered by the protective layer 70 and a second area d2 not covered by the protective layer 70. The protrusion 11 located in the second area d2 is not covered by the protective layer 70. In the process of etching and removing the protective layer 70, the second layer 112 of the protrusion 11 not covered by the protective layer 70 is partially or completely removed, while the first layer 111 is retained. The protrusion 11 located in the first area d1 is covered by the protective layer 70, and the first layer 111 and the second layer 112 of the protrusion 11 are retained together. Viewed from the side of the light-emitting element 1 or 2, the first layer 111 of the protrusion 11 includes a platform. The top of the second layer 112 of the protrusion 11 can be a curved surface or a sharp point. The maximum width of the bottom of the first layer 111 may be greater than the height of the first layer 111.

From the top view of the light-emitting element 1 or 2, the top view shape or pattern density of the protrusion 11 located in the first area d1 is different from that of the protrusion 11 located in the second area d2. From the side view of the light-emitting element 1 or 2, the first area d1 of the cutting path 10d has a width that is smaller or larger than the width of the second area d2 of the cutting path 10d. In one embodiment, the width of the second area d2 is between 8μm and 20μm, preferably between 10μm and 15μm.

As shown in FIG. 1 and FIG. 3, the light-emitting element 1 or 2 may be a rectangular shape with four sides. The position and/or shape of the first passivation layer opening 301 and/or the first insulating layer opening 501 correspond to the position of the cavity 200 and the recessed portion 206 to expose the first semiconductor layer 201 together.

As shown in FIG. 1, the first passivation layer opening 301 and/or the first insulating layer opening 501 disposed on the peripheral contact area 210 on each side of the light-emitting element 1 may be in the shape of a long strip. The first passivation layer opening 301 and/or the first insulating layer opening 501 includes a length greater than 1/2 of the length L of one side of the light-emitting element 1, but less than 9/10 of the length L of one side of the light-emitting element 1.

As shown in FIG. 3, a plurality of first passivation layer openings 301 and/or first insulating layer openings 501 are disposed on the peripheral contact area 210 of the light-emitting element 2, and are arranged at equal or unequal intervals on each side of the light-emitting element 2. The first passivation layer openings 301 and/or the first insulating layer openings 501 include circular, semicircular, elliptical, rectangular or other arbitrary shapes.

The first electrode 61 covers the semiconductor mesa 20m, the peripheral contact area 210 and the plurality of recesses 200, and surrounds the semiconductor mesa 20m along the peripheral contact area 210 of the light-emitting element 1 or 2. The first electrode 61 contacts the first semiconductor layer 201 through the first passivation layer opening 301 and/or the first insulating layer opening 501, and forms an electrical connection with the first semiconductor layer 201. The first electrode 61 covers the side of the semiconductor mesa 20m, and can reflect the light incident on the side of the semiconductor mesa 20m, and then re-enter the interior of the semiconductor mesa 20m. Due to the height difference between the semiconductor mesa 20m and the surrounding contact area 210 and the plurality of recesses 200, the surface of the first electrode 61 is uneven.

In one embodiment of the present invention, from the top view of the light-emitting element 1 or 2, the second electrode 62 includes one or more second electrode openings 620 located on one side 621, 622, 623, or 624 of the second electrode, so that one or more first electrode extensions 610 of the first electrode 61 are respectively located in one or more second electrode openings 620. As shown in FIG. 1, the multiple sides 621, 622, 623, or 624 of the second electrode each include one or more second electrode openings 620. In order to shorten the path of current injection into the first semiconductor layer 201 and increase the recombination efficiency of electrons and holes, at least one of the multiple sides 621, 622, 623, or 624 of the second electrode 62 does not include one or more second electrode openings 620 and/or first electrode extensions 610.

In another embodiment of the present invention, as shown in FIG. 3, from the top view of the light-emitting element 2, in order to increase the upper surface area of the second electrode 62, the second electrode 62 includes one or more second electrode openings 620 located on each side 621, 622, 623, or 624 of the second electrode 62, so that one or more first electrode extensions 610 of the first electrode 61 are respectively located in one or more second electrode openings 620, through the first passivation layer opening 301 and/or the first insulating layer opening 501 to contact the first semiconductor layer 201 located in the cavity 200.

In one embodiment of the present invention, as shown in FIG. 1 , the plurality of first electrode extensions 610 of the first electrode 61 include different lengths. One of the plurality of first electrode extensions 610 of the first electrode 61 covers one of the plurality of recesses 200 , and another of the plurality of first electrode extensions 610 covers a plurality of the plurality of recesses 200 .

In another embodiment of the present invention, as shown in FIG. 3 , the plurality of first electrode extensions 610 of the first electrode 61 include the same or different lengths. One of the plurality of first electrode extensions 610 of the first electrode 61 covers one of the plurality of recesses 200 to form a one-to-one configuration.

In order to cover the cavity 200, the shape of the end of part of the first electrode extension 610 is different from that of the starting end. For example, part of the first electrode extension 610 is widened at the end, or the width of the end and the starting end of part of the first electrode extension 610 is widened, and the part connecting the end and the starting end has a narrower width. In one embodiment, the first electrode extension 610 has a circular shape at the widened end, or the widened end and the widened starting end have a circular shape.

From the top view of the light-emitting element 1 or 2, as shown in FIG. 1 and FIG. 3, the second electrode 62 is surrounded by the first electrode 61. The first electrode 61 covers the surrounding contact area 210 and the plurality of recesses 200. Through the first passivation layer opening 301 and/or the first insulating layer opening 501, the first electrode 61 contacts the first semiconductor layer 201 exposed to the surrounding contact area 210 and the plurality of recesses 200, and forms an electrical connection with the first semiconductor layer 201. The second electrode 62 covers the second semiconductor layer 202 of the semiconductor table 20m, and can directly or indirectly contact the second semiconductor layer 202, and form an electrical connection with the second semiconductor layer 202 through the second passivation layer opening 302 and/or the second insulation layer opening 502.

As shown in FIG. 1 or FIG. 3, the light-emitting element 1 or 2 includes a pin region 60 located at the geometric center of the semiconductor stack 20. The pin region 60 does not contact the first electrode 61 and the second electrode 62, and is electrically isolated from the first electrode 61 and the second electrode 62. The pin region 60 is used as a structure to protect the epitaxial layer to prevent the epitaxial layer from being damaged by the probe during the subsequent processes, such as die separation, die testing, and packaging.

The protective layer 70 is located on the first electrode 61 and the second electrode 62. The protective layer 70 is located between the first electrode 61 and the first electrode pad 81, and/or between the second electrode 62 and the second electrode pad 82. The protective layer 70 includes a first protective layer opening 701 and a second protective layer opening 702. The first protective layer opening 701 and the second protective layer opening 702 are located on the semiconductor table 20m and expose the first electrode 61 and the second electrode 62 respectively.

As shown in FIG. 1, FIG. 2, FIG. 3, and FIG. 4, the protective layer 70 includes a protective layer reserved portion 700 located on the cavity 200, and a plurality of protective layer reserved portions 700 are separated from each other and respectively located on a plurality of cavities 200. As shown in FIG. 1 and FIG. 3, from the top view of the light-emitting element 1 or 2, the protective layer reserved portion 700 is surrounded by the first protective layer opening 701.

The first electrode pad 81 and the second electrode pad 82 have different conductivities, for example, the first electrode pad 81 may be an N-type electrode pad, and the second electrode pad 82 may be a P-type electrode pad. The first electrode pad 81 and the second electrode pad 82 are located on the semiconductor table 20m, respectively located on the first protective layer opening 701 and the second protective layer opening 702 to contact the first electrode 61 and the second electrode 62, and are respectively electrically connected to the first semiconductor layer 201 and the second semiconductor layer 202.

The first electrode pad 81 includes a plurality of first electrode pad openings 810 located on the protective layer reserved portion 700 and exposing the protective layer 70, so as to prevent the externally injected current from being concentrated on a part of the first semiconductor layer 201, and thereby uniformly diffuse the externally injected current to the entire first semiconductor layer 201. The second electrode pad 82 includes a plurality of second electrode pad openings 820 exposing the protective layer 70, wherein the positions of the plurality of recesses 200 overlap with the plurality of first electrode pad openings 810 and the plurality of second electrode pad openings 820, and the first electrode pad 81 and the second electrode pad 82 do not cover the plurality of recesses 200. One or more second electrode pad openings 820 of the second electrode pad 82 correspond to one or more second electrode openings 620 of the second electrode 62. As shown in FIG. 1, one second electrode pad opening 820 of the second electrode pad 82 corresponds to one second electrode opening 620 of the second electrode 62 to expose a plurality of recesses 200. As shown in FIG. 1 and FIG. 3, one second electrode pad opening 820 of the second electrode pad 82 corresponds to one second electrode opening 620 of the second electrode 62 to expose a recess 200.

Since the first electrode pad 81 and the second electrode pad 82 are both disposed on the semiconductor table 20m, the upper surfaces of the first electrode pad 81 and the second electrode pad 82 are flat.

The pin region 60, the first electrode 61, the second electrode 62, the first electrode pad 81 and the second electrode pad 82 include metal materials, such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag) or alloys thereof. The first electrode 61, the second electrode 62, the first electrode pad 81 and the second electrode pad 82 may be composed of a single layer or multiple layers. For example, the first electrode 61, the second electrode 62, the first electrode pad 81 and the second electrode pad 82 may include a Ti/Au layer, a Ti/Pt/Au layer, a Cr/Au layer, a Cr/Pt/Au layer, a Ni/Au layer, a Ni/Pt/Au layer, a Cr/Al/Cr/Ni/Au layer or an Ag/NiTi/TiW/Pt layer. The first electrode pad 81 and the second electrode pad 82 may serve as a current path for an external power source to supply power to the first semiconductor layer 201 and the second semiconductor layer 202. The first electrode 61, the second electrode 62, the first electrode pad 81 or the second electrode pad 82 comprises a thickness between 1μm and 100μm, preferably between 1.2μm and 60μm, and more preferably between 1.5μm and 6μm.

The first electrode pad 81 includes a first metal upper pad and a first metal lower pad (not shown), and/or the second electrode pad 82 includes a second metal upper pad and a second metal lower pad (not shown). The first metal lower pad and the second metal lower pad are closer to the second semiconductor layer 202 than the first metal upper pad and the second metal upper pad. The first metal lower pad or the second metal lower pad includes a thickness between 0.3μm and 0.9μm. The first metal upper pad or the second metal upper pad includes a thickness between 2μm and 4μm. The first metal lower pad or the second metal lower pad includes gold (Au), and the first metal upper pad or the second metal upper pad includes AuSn.

The pin region 60, the first electrode 61 and the second electrode 62 can be formed together in the same process to have the same metal stack. The first electrode pad 81 and the second electrode pad 82 can be formed together in the same process to have the same metal stack.

The passivation layer 30, the insulating layer 50, and/or the protective layer 70 may be a single layer structure, composed of silicon oxide, silicon nitride, or silicon oxynitride. The passivation layer 30, the insulating layer 50, and/or the protective layer 70 may also include two or more materials with different refractive indices stacked alternately to form a distributed Bragg reflector (DBR) structure, which selectively reflects light of a specific wavelength. For example, a high reflectivity insulating reflective structure may be formed by stacking layers of _SiO2 / _TiO2 or _{SiO2 / Nb2O5} . When SiO ₂ /TiO ₂ or SiO ₂ /Nb ₂ O ₅ forms a distributed Bragg reflector (DBR) structure, each layer of the distributed Bragg reflector (DBR) structure is designed to have an optical thickness of one or an integer multiple of one quarter of the wavelength of light emitted by the active layer 203. The optical thickness of each layer of the distributed Bragg reflector (DBR) structure may have a deviation of ±30% based on one or an integer multiple of λ/4. Since the optical thickness of each layer of the distributed Bragg reflector (DBR) structure affects the reflectivity, it is preferably formed by electron beam evaporation (E-beam evaporation) to stably control the thickness of each layer of the distributed Bragg reflector (DBR) structure.

FIG. 9 is a schematic diagram of a light-emitting device 3 according to an embodiment of the present invention. The light-emitting elements 1 and 2 in the aforementioned embodiment are mounted on the first pad 511 and the second pad 512 of the package substrate 51 in the form of a flip chip. The first pad 511 and the second pad 512 are electrically insulated by an insulating portion 53 containing an insulating material. The flip chip mounting is to set the side of the growth substrate opposite to the electrode pad forming surface as the main light extraction surface. In order to increase the light extraction efficiency of the light-emitting device 3, a reflective structure 54 can be set around the light-emitting elements 1 and 2. Since the first electrode pad 81 and the second electrode pad 82 have a flat upper surface, the bonding reliability between the first electrode pad 81, the second electrode pad 82 and the first gasket 511, the second gasket 512 can be improved.

FIG. 10 is a schematic diagram of a light-emitting device 4 according to an embodiment of the present invention. The light-emitting device 4 is a bulb lamp including a lampshade 602, a reflector 604, a light-emitting module 611, a lamp holder 612, a heat sink 614, a connecting portion 616 and an electrical connecting element 618. The light-emitting module 611 includes a supporting portion 606, and a plurality of light-emitting units 608 are located on the supporting portion 606, wherein the plurality of light-emitting bodies 608 can be the light-emitting elements 1, 2 or the light-emitting device 3 in the aforementioned embodiments.

The various embodiments listed in this invention are only used to illustrate this invention and are not used to limit the scope of this invention. Any obvious modifications or changes made by anyone to this invention do not deviate from the spirit and scope of this invention.

1: Light-emitting element

10: Substrate

10d: Cutting road

10S: Side

100: Upper surface

20: Semiconductor stacking

20m: Semiconductor table

200: Concave

201: First semiconductor layer

202: Second semiconductor layer

203: Active layer

206: Depression

210: Surrounding contact area

30: Passivation layer

301: First passivation layer opening

302: Second passivation layer opening

40: Contact electrode

50: Insulation layer

501: First insulation layer opening

502: Second insulation layer opening

61: First electrode

62: Second electrode

70: Protective layer

700: Protective layer retention part

701: Opening of the first protective layer

702: Second protective layer opening

81: First electrode pad

810: First electrode pad opening

82: Second electrode pad

820: Second electrode pad opening

Claims (10)

A light-emitting element comprises: a substrate comprising an upper surface; a cutting path exposing the upper surface of the substrate and being located around the light-emitting element; a first semiconductor layer being located on the upper surface of the substrate; a semiconductor table being located on the first semiconductor layer and comprising a second semiconductor layer, and an active layer being located between the first semiconductor layer and the second semiconductor layer; a plurality of recesses passing through the second semiconductor layer and the active layer to expose the first semiconductor layer, and the plurality of recesses being separated from each other; a contact electrode being located on the second semiconductor layer; A first electrode covers the plurality of recesses and the contact electrode; and a second electrode is located on the contact electrode; wherein the substrate includes a plurality of protrusions protruding from the upper surface, the plurality of protrusions include a first portion located between the semiconductor table and the substrate, the first portion includes a first layer and a second layer, the plurality of protrusions include a second portion located on the cutting path, the second portion includes the first layer but does not include the second layer, the first layer includes the same material as the substrate, and the second layer includes a different material from the substrate. As described in item 1 of the patent application scope, the light-emitting element, wherein from a top view of the light-emitting element, the first electrode includes a plurality of first electrode extensions extending from a plurality of sides of the second electrode to an inner side of the second electrode to cover the plurality of recesses. As described in item 1 of the patent application scope, the second electrode is surrounded by the first electrode. As described in item 2 of the patent application scope, the second electrode comprises one or more second electrode openings located on the multiple sides of the second electrode, and the multiple first electrode extensions of the first electrode are located at the one or more second electrode openings. As described in item 2 of the patent application scope, the second electrode includes one or more second electrode openings located on the multiple sides of the second electrode, the multiple first electrode extensions of the first electrode are located at the one or more second electrode openings, and at least one of the multiple sides of the second electrode does not include the one or more second electrode openings. A light-emitting element as described in item 2 of the patent application, wherein the plurality of first electrode extensions of the first electrode have different lengths. As described in item 2 of the patent application scope, the light-emitting element, wherein one of the plurality of first electrode extensions of the first electrode covers one of the plurality of recesses. As described in item 2 of the patent application scope, a light-emitting element, wherein one of the plurality of first electrode extensions of the first electrode covers a plurality of the plurality of recesses. The light-emitting element as described in item 1 of the patent application scope further includes a peripheral contact area surrounding the semiconductor table, the peripheral contact area passes through the second semiconductor layer and the active layer and exposes the first semiconductor layer, wherein the first electrode includes a portion contacting the peripheral contact area having a length greater than 1/2 of a side length of the light-emitting element. The light-emitting element as described in item 1 of the patent application scope further comprises a plurality of recessed portions and a plurality of protruding portions arranged alternately, wherein the plurality of protruding portions comprise the second semiconductor layer and the active layer, and the plurality of recessed portions expose the first semiconductor layer to surround the semiconductor table.