TWI367565B - Double-layered active area structure with a polysilicon layer and a microcrystalline silicon layer, method for manufactruing the same and its application - Google Patents
Double-layered active area structure with a polysilicon layer and a microcrystalline silicon layer, method for manufactruing the same and its applicationInfo
- Publication number
- TWI367565B TWI367565B TW097104490A TW97104490A TWI367565B TW I367565 B TWI367565 B TW I367565B TW 097104490 A TW097104490 A TW 097104490A TW 97104490 A TW97104490 A TW 97104490A TW I367565 B TWI367565 B TW I367565B
- Authority
- TW
- Taiwan
- Prior art keywords
- manufactruing
- double
- application
- active area
- same
- Prior art date
Links
- 229910021424 microcrystalline silicon Inorganic materials 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title 1
- 229920005591 polysilicon Polymers 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0251—Manufacture or treatment of multiple TFTs characterised by increasing the uniformity of device parameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
- H10D86/425—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer having different crystal properties in different TFTs or within an individual TFT
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/431—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
- H10D30/6739—Conductor-insulator-semiconductor electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Electroluminescent Light Sources (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW097104490A TWI367565B (en) | 2008-02-05 | 2008-02-05 | Double-layered active area structure with a polysilicon layer and a microcrystalline silicon layer, method for manufactruing the same and its application |
JP2008297033A JP2009188381A (ja) | 2008-02-05 | 2008-11-20 | ポリシリコン層及び微細結晶シリコン層を有する2重活性層構造、その製造方法及びこれを使用する装置 |
US12/336,093 US20090194770A1 (en) | 2008-02-05 | 2008-12-16 | Double-active-layer structure with a polysilicon layer and a microcrystalline silicon layer, method for manufacturing the same and its application |
US14/297,366 US20140287571A1 (en) | 2008-02-05 | 2014-06-05 | Double-active-layer structure with a polysilicon layer and a microcrystalline silicon layer, method for manufacturing the same and its application |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW097104490A TWI367565B (en) | 2008-02-05 | 2008-02-05 | Double-layered active area structure with a polysilicon layer and a microcrystalline silicon layer, method for manufactruing the same and its application |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200935605A TW200935605A (en) | 2009-08-16 |
TWI367565B true TWI367565B (en) | 2012-07-01 |
Family
ID=40930788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW097104490A TWI367565B (en) | 2008-02-05 | 2008-02-05 | Double-layered active area structure with a polysilicon layer and a microcrystalline silicon layer, method for manufactruing the same and its application |
Country Status (3)
Country | Link |
---|---|
US (2) | US20090194770A1 (zh) |
JP (1) | JP2009188381A (zh) |
TW (1) | TWI367565B (zh) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104538429B (zh) * | 2014-12-26 | 2019-07-02 | 深圳市华星光电技术有限公司 | Amoled背板的制作方法及其结构 |
CN104538352A (zh) * | 2014-12-31 | 2015-04-22 | 京东方科技集团股份有限公司 | 阵列基板及其制造方法、显示装置 |
JP2017143135A (ja) * | 2016-02-09 | 2017-08-17 | 株式会社ジャパンディスプレイ | 薄膜トランジスタ |
CN108598040B (zh) | 2017-03-10 | 2021-03-16 | 京东方科技集团股份有限公司 | 阵列基板及其制造方法、驱动晶体管、显示面板 |
CN110349974A (zh) * | 2019-06-25 | 2019-10-18 | 武汉华星光电半导体显示技术有限公司 | 一种阵列基板及其制备方法、显示装置 |
CN111916462B (zh) * | 2020-07-30 | 2022-12-23 | 北海惠科光电技术有限公司 | 一种基板、制备基板的方法和显示面板 |
KR20230140658A (ko) * | 2022-03-29 | 2023-10-10 | 삼성디스플레이 주식회사 | 표시 장치, 이의 제조 방법 및 이를 포함하는 타일형 표시 장치 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07209672A (ja) * | 1993-12-03 | 1995-08-11 | Semiconductor Energy Lab Co Ltd | 非発光型ディスプレーを有する電子装置 |
US7081938B1 (en) * | 1993-12-03 | 2006-07-25 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method for manufacturing the same |
GB9520888D0 (en) * | 1995-10-12 | 1995-12-13 | Philips Electronics Nv | Electronic devices comprising thin-film circuitry |
JP3503427B2 (ja) * | 1997-06-19 | 2004-03-08 | ソニー株式会社 | 薄膜トランジスタの製造方法 |
JP4588833B2 (ja) * | 1999-04-07 | 2010-12-01 | 株式会社半導体エネルギー研究所 | 電気光学装置および電子機器 |
GB0210065D0 (en) * | 2002-05-02 | 2002-06-12 | Koninkl Philips Electronics Nv | Electronic devices comprising bottom gate tft's and their manufacture |
JP4116465B2 (ja) * | 2003-02-20 | 2008-07-09 | 株式会社日立製作所 | パネル型表示装置とその製造方法および製造装置 |
JP4406540B2 (ja) * | 2003-03-28 | 2010-01-27 | シャープ株式会社 | 薄膜トランジスタ基板およびその製造方法 |
US7928654B2 (en) * | 2003-08-29 | 2011-04-19 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
JP2005123571A (ja) * | 2003-09-22 | 2005-05-12 | Sanyo Electric Co Ltd | トランジスタ基板、表示装置及びそれらの製造方法 |
JP2006049646A (ja) * | 2004-08-05 | 2006-02-16 | Seiko Epson Corp | アクティブマトリクス基板、電気光学装置、電子デバイス及びアクティブマトリクス基板の製造方法 |
JP2006086434A (ja) * | 2004-09-17 | 2006-03-30 | Seiko Epson Corp | 多層配線基板、半導体装置、半導体基板、半導体装置の製造方法、電気光学装置及び電子デバイス |
JP4597730B2 (ja) * | 2005-03-22 | 2010-12-15 | シャープ株式会社 | 薄膜トランジスタ基板およびその製造方法 |
JP5211294B2 (ja) * | 2006-03-20 | 2013-06-12 | 国立大学法人 奈良先端科学技術大学院大学 | 半導体素子,薄膜トランジスタ,レーザーアニール装置,並びに半導体素子の製造方法 |
JP2007288121A (ja) * | 2006-03-22 | 2007-11-01 | Seiko Epson Corp | アクティブマトリクス基板の製造方法、アクティブマトリクス基板、電気光学装置及び電子機器 |
US20070236428A1 (en) * | 2006-03-28 | 2007-10-11 | Toppoly Optoelectronics Corp. | Organic electroluminescent device and fabrication methods thereof |
JP2008124408A (ja) * | 2006-11-16 | 2008-05-29 | Sony Corp | 薄膜半導体装置の製造方法 |
-
2008
- 2008-02-05 TW TW097104490A patent/TWI367565B/zh not_active IP Right Cessation
- 2008-11-20 JP JP2008297033A patent/JP2009188381A/ja active Pending
- 2008-12-16 US US12/336,093 patent/US20090194770A1/en not_active Abandoned
-
2014
- 2014-06-05 US US14/297,366 patent/US20140287571A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20140287571A1 (en) | 2014-09-25 |
TW200935605A (en) | 2009-08-16 |
US20090194770A1 (en) | 2009-08-06 |
JP2009188381A (ja) | 2009-08-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |