TWI361985B - System of monitor design and method thereof - Google Patents

Description

1361985 IX. INSTRUCTIONS: TECHNICAL FIELD OF THE INVENTION The present invention relates to a design system and method thereof, and more particularly to a liquid crystal display pixel circuit design system and method therefor. [Prior Art] Color Filter Liquid Crystal Display (Spatial C() lc)r Filter

LiquidCrystal Display, SCF_LCD) uses a white backlight source module, such as a cold cathode fluorescent lamp (CCFL), to provide a continuous light source of each wavelength, and to pass the continuous wavelength light source through the display panel昼素. In general, each element is composed of three sub-small elements, and each sub-pixel is controlled by a Field Effect Transistor (TFT) to control the electric field strength of the sub-element. The light intensity of the sub-halogens; through the continuous wavelength source of each sub-halogen, and then through the primary color (red, green or blue) filter corresponding to each sub-salm filter to obtain the sub-pixels required Each primary color light; after each primary color # light is injected into the human eye, and according to the role of human visual imaging, the primary colors of each sub-salm are mixed into the color of the desired color. The %-Sequential Liquid Crystal Display (FS-LCD) directly modifies the light source state of the backlight module, and the white backlight source module used in the SCF-LCD is changed to three primary color light sources, so it must be removed. Color filters, and each element also needs to be separated into sub-parins. In view of the above, the color formation of the field sequential liquid crystal display is to adjust the light-emitting timing of the two primary color light sources in the moonlight module, and to coordinate the electric fields of the various field-effect transistors to control the electric field of the element by the corresponding timing. The intensity, in order to determine the pass 5 110586 1361985. The light intensity of the light is obtained in the display time of each color light source with the synchronous control of the liquid crystal halogen transmittance to adjust the relative light amount of each primary color; injection into the human eye: According to the integral action of the human visual system on the light stimulation, the primary colors are mixed into the color to be expressed by the halogen to form a predetermined color. In fact, the field-Sequential imaging technology already exists, and existing products, digital light processing (Digital Ught ^ cessive ng, DLP) projector can fully verify its feasibility and performance 'only if you want to The application of sequential imaging technology to LCDs is still different from the bottleneck of DLp projection machines. In the field of display technology, because the kneading variation must be higher than the k-motion frequency above 6 Hz, it is necessary to satisfy the minimum variation frequency required by the human visual system to integrate the integral into a complete image. The SCF_LCD is modulated by the white backlight source 杈 group and the two primary color sub-halogen filters, so that a primary color source is provided at the same time, so that the operating frequency of the SCF-LCD system is the lowest acceptable to the human eye. Operating at a varying frequency (6 Hz); however, since fs_lcd replaces the continuous wavelength source with a _ three primary color backlight time-varying module, the conversion frequency of the three primary colors must be at least three times the conversion frequency of the continuous wavelength source, in other words, FS-LCD The lowest variation frequency of the system needs to be 6 〇 multiplied by 3, which is 180 Hz, which starts to meet the minimum variation frequency required by the human visual system to integrate into a complete image. In this case, if the system synchronization of the FS-LCD is poor, the system's inverse μ ^ rate (or the response rate of the die can not meet the minimum fluctuation frequency requirement) will result in color breakup (CBU). Effect, the shirt sounds the user's visual effect. It can be seen that field sequential imaging technology 6 110586 1361985 One of the biggest challenges of application to _LCD is how to increase the frequency of variation to meet the minimum frequency of variation. In order to increase the frequency of the LCD system, in addition to the minimum frequency of the background light source, the response of the display pixel circuit must meet the threshold of the lowest frequency of change. In 1996, Tsukada proposed the theory of liquid crystal halogen circuit design in "TFT/LCD Liquid-crystal Displays by Thin-Flim Transporters" 2nd ed·, Taylor & Francis, 2000. The charging and discharging behavior should be considered when designing a halogen circuit. Three design concepts of tantalum-capacitance coupling effect and signal delay; in 2006, YHTai, in "Design and Operation of TFT-LCD Panels''WuNan, 2006, further proposed the design limit of potential retention. The design concept of the reaction rate of the pixel circuit. In addition, the design of the LCD pixel circuit is designed to meet the minimum fluctuation frequency. Considering the transmittance ratio of the pixel circuit is also a design concept; Because the operation of the LCD is controlled by the voltage of the pixel circuit to penetrate the radiation source of the pixel circuit, if the pixel circuit has a large light transmission area, the halogen can achieve a higher transmittance to achieve a higher transmittance. Good display results can also achieve specific color and brightness levels with low energy and low cost. Since 1989, Y. Kaneko, A· Sasano, and T. Tsukada, "Analysis and design of a-Si TFT/LCD panels with a pixel model,'' IEEE Trans. Electron Dev., vol. 36, no. 12, pp. 2953-295.8, Dec. 1989. After the equivalent circuit model of the circuit design, the design model of the LCD design field is 7110586 1361985. This equivalent circuit is developed. Referring to Fig. 1, it is known to those skilled in the art that in addition to the basic structure of the pixel circuit, the equivalent circuit can also find that the pixel circuit has a considerable proportion of opaque area. However, when designing a product, both design conditions and design constraints must be considered. For example, considering the design conditions and design constraints of the charging, discharging behavior, potential holding, capacitive coupling effect and signal delay term of the pixel circuit, it is an important part of the practical design of the circuit. However, there is currently no design system that can simultaneously consider the design parameters of the above-mentioned display pixel circuit, and the calculation and comparison design parameters correspond to the effect changes of the complex design to screen out the ideal design parameters and display the display elements. Circuit design. Therefore, how to provide a display design system, which can make the calculation and comparison design parameters correspond to the effect change of the complex design, and screen out the ideal design parameters to facilitate the display of the circuit design, which is currently urgently solved by the industry. problem. SUMMARY OF THE INVENTION In view of the above-discussed shortcomings of the prior art, it is a primary object of the present invention to provide a display design system that computes, compares, and displays design parameters in response to changes in the effects of the complex design. It is still another object of the present invention to provide a display design system that screens out ideal design parameters for display pixel circuit design. In order to achieve the above object, the present invention provides a display design system for a data processing device having an input die 8 110586 1361985 group for inputting initial parameters, selecting operation category parameters, and selecting output mode parameters. And an output module for displaying an output result, the display design system includes at least: a capacitor charging operation module, which is configured to perform an operation according to an operation rule after receiving the initial parameter input from the input module to generate The operation result of the capacitor charging; the potential holding operation module is implemented according to the operation rule after receiving the initial parameter input from the input module to generate the operation balance of the potential holding; the capacitive coupling computing module is received from the After inputting the initial parameters of the module input, the operation is performed according to the operation rule, and the operation result of the capacitive coupling is generated; the signal delay operation module is operated according to the operation rule after receiving the initial parameters of the input module and the input. Generating a signal delay operation result; and integrating the module for receiving the capacitor charging operation The operation result transmitted by the module, the potential holding operation module, the capacitive coupling operation module and the signal delay operation module, and the input operation result is compared with the output mode parameter according to the selected operation type parameter to generate an operation The corresponding relationship of the results, and further the correspondence between the operation result and the operation result is transmitted to the output module. The present invention provides a display design method for a data processing device, the data processing device having an input module for inputting a start parameter, selecting a calculation type parameter, selecting an output mode parameter, and a display module An output module of the output result, the display design method includes at least: input start parameter, operation category parameter, output mode parameter to the input module; and transmitting the start parameter to the capacitor charging operation module through the input module a potential holding operation module, a capacitive coupling computing module and a signal delay computing module, and transmitting the output state parameter and the operation type parameter to the unified module; according to the capacitor charging computing module, the potential maintaining computing module, Electric 9 110586 1361985 . The operation rules built into the light and the operation module and the signal delay operation module, and the operation of the initial parameter is performed to generate an operation balance corresponding to each operation module, and each operation module After generating the operation result, each operation result is transmitted to the integration module, and the operation module receives the operation 纟After the result, the operation result is compared with the output mode parameter and the output result is compared, and the corresponding relationship between the operation result is generated, and then the operation result and the corresponding relationship are transmitted to the output module; The output module displays the corresponding operation result and the corresponding relationship. Compared with the shortcomings of the prior art, the display design system of the present invention generates the operation result through the operation of each operation module after inputting the parameter to be tested and selecting the operation type parameter, and then transmits the operation result of each category to the system. The whole model-group; the complex module integrates the calculation results and outputs such as: OPertation Window, enumeration of soil comparison table (c〇mpare_T^^~ program, etc.) The operation result I 1 is transmitted to the output module, and the output module displays the design parameter (4) ^ # complex number effect change. The ton supply material - (10) ^ type obtains the ideal design parameters, and the display pixel circuit design. [Embodiment] Hereinafter, embodiments of the present invention will be described by way of specific examples. Those who are familiar with the art can easily understand other advantages of the present invention from the contents of the text of the sentence.盥 a idiot and effect. The invention may also be implemented or applied by other different specific examples, and the details in the specification may also be based on different viewpoints and applications. 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 Referring to FIG. 2, the display design system of the present invention is applied to a data processing device, and the data processing device includes at least one input module for inputting a starting parameter, selecting a operation type parameter, and selecting an output mode parameter. 1. The output module 3 for displaying the output result. The display design system of the present invention comprises a capacitor charging operation module 21, a potential holding operation module 22, a capacitive coupling operation module 23, and a signal. The delay calculation module 24 and the integration module 25. The capacitance charging operation module 21 is received after receiving the input parameters from the input module 1

(r\ V ^ / cliarge.PSC

{Λ . ^insu^LOr \ 1 + -tVFSC *insu ^LC_ '-.€;nsti^LC τ 1 + ----tlCF

(K) V ^ / charge, CP

£LC

The operation rule of I performs the operation, and the operation result of the capacitor charging is generated, and the operation result is transmitted to the integrated module 25 in the stomach; wherein W is the channel width of the halogen crystal, and L is the halogen crystal. The length of the channel, £ insu and tinsu are the dielectric constant and thickness of the field-effect transistor insulating layer, respectively, d and ε lx are the thickness and dielectric constant of the liquid crystal layer, respectively, h = A cs / pixel for storing electricity valley and painting Area ratio, (W" / Z/ )chage, CF is the field-effect transistor channel width-to-length ratio of the filter-type display, (W/L)Charge, FSC is the same resolution, same-size field-sequence display The field effect transistor channel width to length ratio. 11 110586

m . \ / hoid, FSC

m. J holdtCF 1361985 - The potential hold operation module 22 is based on 起始, ein5u^X>Ct after receiving the input parameters input from the input module 1

1 + 7-^FSC

Wnsu ^LC Ί . ^ineu^LC t

The operation rule of 丄+x-ft〇F ^insu^LC ^ is performed, and the operation result of the potential holding is generated, and after the operation result is generated, the operation result is transmitted to the integration module 25; wherein, the gray is a halogen The channel width of the transistor, L is the channel length Lu of the pixel transistor ' £ insu and iinsu are the dielectric constant and thickness of the field effect transistor insulating layer, respectively, Cf IX and ε LC are the thickness and the dielectric layer respectively. Electric coefficient, h = •Acs/Apixel is the area ratio of storage capacitor to halogen, (WVL)hold, CF is the field-effect transistor channel width-to-length ratio of filter-type display, (gray/L)hc)1d , FSC is the field-effect transistor channel width-to-length ratio of the same resolution and the same size field sequential display. The capacitive coupling computing module 23 is configured to receive the initial parameters input from the input module 1, according to

Wkb.PSC /, , eiftsu^LC , ’ 1 + 7--- Nine FSC ^insu^LC^in_ ί , ^insu^LC ί 11 + τ-^c? \ Mnsu〇LCtmiT) i

X fcFSG' _^inau^LCamax .,Cinsu^LC * 1 + --ft〇p . wnsu^LC,max ‘

The operation rule of i^kb^CP is performed, and the operation result of the capacitive coupling is generated, and after the operation result is generated, the operation result is transmitted to the integrated module 25, and ε insu and iinsu are respectively the field effect transistor insulating layers. Dielectric coefficient and thickness, Cf LC and ε IX are the thickness and dielectric constant of the liquid crystal layer, respectively, h = Λ cs / pixel is the area ratio of storage electricity valley to halogen [W"kb, CF is filter, light film 12 110586 丄 ,

,:: The field effect transistor channel width, the bFSC inch field 2 display field effect transistor channel width. The door ruler-## delay-transport module 24 is received after receiving the number of inputs from the input module 1

.CP > id(scan,PSC > -«d,«can,CP i<3,data?PSC ^ tdtdU^CF = Calculate the job operation and generate the result of the signal delay, and generate the operation After the result, the operation result is transmitted to the integration module 25; wherein, the signal delay on the scan line of the optical display, and "TM is the signal delay on the scan line of the field sequential display; The signal on the data line of the display is delayed, and the signal delay on the data line of the sequence display is used. ^ The integrated module 25 is used to receive the operation of the input module from the input module. Sample parameters, and received from the operation results generated by each operation module, according to the selected operation category parameters and output state parameters, the results of the different results 'output including the operation area map (7) attached (10) (10) in Qw gtl: w ( (:c)mpare_Tabie) or the corresponding relationship of the equation '', and the corresponding relationship is transmitted to the output module 3. - Where 'the correspondence between the results of the operation is in the form of the operation area map from time to time Group 25 extracts the operation based on the selected operation category parameter. The result of the operation is drawn in the appropriate coordinate system diagram, and the domain is 'transferred to the output module 3' so that the user can filter out the ideal design parameters in the most appropriate way. For example, the third item is used by the indicator. The basic architecture of the method of the present invention is shown in Fig. 3. Referring to Fig. 3, the method of the present invention includes at least the following steps: First, step S1 is performed to input a starting parameter, an operation type parameter, and an output mode parameter to an input mode. Group 1; then step S2 is performed. • In step S2, the input module 1 transmits the starting parameters to the capacitor charging operation module 21, the potential holding operation module 22, the capacitive coupling computing module 23, and the signal delay computing module 24 And selecting the selection of the operation type parameter and the selection of the output mode parameter to the integration module 25; then proceeding to step S3. • In step S3, the capacitance charging operation module 21, the potential holding operation module 22, and the capacitive coupling operation The module 23 and the signal delay calculation module 24 perform operations according to the initial parameters and the operation rules of the respective operation modules, and generate operation results of the respective operation modules, and each operation After generating the operation result, the operation result is transmitted to the integration module 25; then, step S4 is performed. In step S4, the integration module 25 is to receive each operation result, according to the selected operation category parameter and output category. Corresponding relationship between the operation result and the result of the operation I is generated, and then the correspondence between the operation result and the output state parameter are transmitted to the output module 3; then, step S5 is performed. In step S5, the output module 3 displays the operation result. Corresponding relationship and output aspect. Compared with the shortcomings of the prior art, the display design system of the present invention is configured to input the parameters to be tested and select the operation category parameters, and then generate the operation result through the operation of each operation module, and then each category The operation result transmission integration module 25; the integration module 25 integrates the operation results and outputs such as: Operation Window, enumeration comparison table 14 110586 1361985 (Comparte-Table) or equation, etc. In the aspect, the operation knot and the corresponding relationship are transmitted to the wheel-out module: and 3 3 is taken out, and the module 3 displays the design parameters corresponding to the effect change of the complex design. = For the user - easy way to get the ideal design parameters, enter = 昼 circuit design. The above embodiments are merely illustrative of the principles of the invention and are not intended to limit the invention. Any person skilled in the art can modify the above embodiments with the following:

Therefore, the scope of protection of the present invention should be as set forth in the scope of the patent application to be described later.寻J [Simplified description of the drawing], 1 is a schematic diagram of the equivalent circuit of the LCD element; 2 is a block diagram of the display design system of the present invention; and FIG. 3 is a block diagram showing the steps of the display design method of the present invention . [Main component symbol description] 1 Input module 21 22 23 24 Capacitor charging computing module Potential holding computing module Capacitive coupling computing module Signal delay computing module . 25 3 Integration module Output module S1-S5 Step 15 110586

Claims (1)

1361985. __ Patent Application No. 9614 824 t. September 14, 2014 Revision Replacement Page 10, Application for Patent Park: -- 1 · A display design system applied to a data processing device, the data processing device has one available Input start parameter, select operation type. Parameter, input module for selecting output mode parameter, and an output module for displaying and not outputting the result, the display design system includes at least: a capacitor charging operation module After receiving the initial parameter input from the input module, performing an operation according to the operation rule to generate a capacitance charging operation result, wherein the operation rule of the capacitance charging operation module includes at least an operation formula: © diarge, PSC n , ^insu^LC i , 1 ten: —_»—/tFSC sentence nau ^LC__ 1 ( QnstidLCi. 1 ten Z*CF ^insutLC <*arge,〇P and where 'W is the channel width of the pixel transistor' z is the channel length of the pixel crystal, ε insu* iinsu is the dielectric constant and thickness of the field effect transistor insulating layer, respectively, J LC and eu are the thickness of the liquid crystal layer respectively; I electric coefficient is = es / ZPixel is the area ratio of the storage capacitor to the book element. (bad) chage CF is the field-effect power channel width-to-length ratio of the filter-type display, (bad T/L) charge, Fsc is the same resolution and the same The field-effect transistor of the size of the field-type display has a width-to-length ratio; the potential-maintaining operation module performs the operation according to the operation rule after receiving the initial parameter input from the wheel-in module, and generates the operation result of the potential holding, Wherein, the operation rule of the potential holding operation module includes at least an arithmetic expression: , 110586 (revision) 16 1361985 - () hold, FSC 9 1 + --/IFSC tinsu^LC -i ^infiU^LC t \ iinsuCLC 〇 P; (f) Patent Application No. 9614 824, September 2014, pp. 替换 替换 ho ho 且 且 ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho ho The dielectric constant and thickness of the field effect transistor insulating layer, respectively, J LC and £ LC are the thickness and dielectric constant of the liquid crystal layer, respectively, Λ = Z cs / Z pixd is the area ratio of the storage capacitor to the pixel, (PT /ZOhdd.CF is the field effect transistor of the filter type display The aspect ratio, (ΡΓ/L) hold, FSC is the field-effect transistor channel width-to-length ratio of the same resolution and the same size of the field-sequence display; the capacitive coupling operation module is received from the input of the input module After the initial parameter is executed according to the operation rule, the operation result of the capacitive coupling is generated, wherein the operation rule of the capacitive coupling operation module includes at least an arithmetic expression: 1 + ^insu^LC iinsu^LC1rnin "FSC, 14-AtFSC Λ , ^insu^LC » 1+ 7-Λ〇Ρ iin3u^LC>min x % t ^insu^LC * 1 + j--ft〇P ^iz)9u^LCfmax and where 'insu and iinsu are field effects respectively The dielectric constant and thickness of the transistor insulating layer, ¢/LC and ε LC are the thickness and dielectric constant of the liquid crystal layer, respectively, Λ = Z cs / Z pixel is the area ratio of the storage capacitor to the halogen * Wkb, C卩 is Twilight slice type field effect transistor channel width, PTkb, FSC is the field effect transistor channel width of the same resolution and the same size of the field sequential display; Signal delay operation module is received from the input mode Group input 17 110586 (revision) 丄 985. Patent application No. 9614 824 100 years 9 14曰 Correcting the replacement page start parameter and performing an operation according to the operation rule thereof, and generating a signal delay operation result, wherein the operation rule of the signal delay operation module includes at least an operation formula: ^<1,:,, CP > ^|,Kan,pSC > is called CF and id,data,PSC 2 <a,d4ta,CP and its t,td, scan, CF is the apostrophe delay on the scan line of the Twilight chip display, and td, Scan, FSC is the nickname delay on the scan line of the field sequential display; td, data, CF is the L delay of the data line of the filter display, and td, data, FSC is the data line of the field sequential display The signal delay; and the integrated module is configured to receive the operation result transmitted by the capacitor charging operation module, the potential holding operation module, the capacitive coupling computing module, and the signal delay computing module, and according to the selected operation category The parameter and the output state sample parameter are compared with each of the input operation results to generate a correspondence relationship between the operation results, and then the correspondence between the operation result and the operation result is transmitted to the output module. 2. The display design system according to the scope of the patent application, wherein the integration module integrates the operation results, and the output includes a correspondence between an operation window (Operation Window), an enumeration comparison table (Compare_Table), or an equation. . 3. The display design system of claim 2, wherein when the corresponding relationship of the operation result is displayed in the state of the operation area map, the integrated module is selected according to the selected operation category parameter. The result of the operation is required, and the result of the operation is in an appropriate coordinate system diagram. 18 110586 (Revised Edition) 1361985 ·. - Patent No. 9614,024 Patent Application No. 4. A display design method for a data processing device, the data processing device having an input module for inputting a start parameter, selecting a calculation type* parameter, selecting an output mode parameter, and a display device The output module of the output result, the display design method comprises at least: (1) inputting a starting parameter, an operation type parameter, and an output mode parameter to the input module; (2) transmitting the starting parameter through the input module a capacitor charging operation module, a potential holding operation module, a capacitive coupling computing module, and a signal delay computing module, and transmitting the output state parameter and the operation class-specific parameter to the unified module, wherein the capacitor charging operation Module operation. The calculation rule contains at least the expression: charge, CF \ L /charge.PSC f Λ . ^insu^LC » 1+ J-*FSC ^insu^LC_ -,^jnsti^LCT 1 + "7 -Λ〇Ρ The operation rule of the potential hold operation module contains at least the expression: \ L / h〇ld, FSC ^insu^LO ^LC , Qnfiu ^insu nsu^LC / (f) \ ^ / hold^CF The operation rules of the capacitive coupling computing module include at least Equation: 19 110586 (Revised Edition) 1361985 . W^kb, PSC Λ j giasu^LC ί ^naugLG.tnin Qing 1 + 1 1 ^insu^LC L \ iinsueLO,min 〇P 1 + Patent No. 9614 824 Patent Application 100 September 14曰Revised replacement page €jnsu<^LC^inswgLC,max Cjnsu^LC iin3ufLC,ma ^FSC Seven CP W^kb.CP The algorithm of the signal delay calculation module contains at least the expression: Ι,Λ ^ vCi 1 id.scan.CP > id, scantPSC > ^td, $csm, CF _ id, deta, FSC and where ' ΡΓ is the channel width of the pixel transistor, 厶 is the channel of the pixel The length, £ insu and iinsu are the dielectric constant and thickness of the field-effect transistor insulating layer, respectively, Jlc and · eLC are the thickness and dielectric constant of the liquid crystal layer, respectively, /2 = ZCS/Z pixel is the storage capacitor and the halogen Area ratio, (PT/L) chage, CF is the field-effect transistor channel width-to-length ratio of the filter-type display, (PT/Z) charge, FSC is the field effect of the same resolution and the same size of the field-sequence display Transistor channel width to length ratio, kb CF is the field effect transistor channel width of the filter type display, which is the same resolution and the same size field sequential display Field effect transistor channel width, td, scan' CF is the signal delay on the scan line of the filter-type display, and td, SC; an, FS (: signal delay on the scan line of the field sequential display; and td 'data'CF is the delay of the data line of the filter type display, and td'data, FSC is the delay of the data line of the field sequential display; ° (3) charging module and potential according to the capacitance The calculation rules built in the operation module, the capacitive coupling operation module and the signal delay operation module are maintained, and the initial parameters are calculated to generate corresponding patents for the operation of the 110586 (revision) 20 U61985. Patent No. 96104824 100 9 100 100 100 • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • After receiving the operation result, the integration module compares the operation result parameter with the output mode parameter and compares the operation result, and generates a correspondence relationship between the operation results, and then transmits each operation result. Relation to the module corresponds to the output; and (5) display each of the corresponding relationship between the calculation result is transmitted through the output module. 5. The display design method of claim 4, wherein the integration module integrates the operation results, and the output includes an operation window (Operation Window), a comparison table (Compare-Table), or an equation. Correspondence. 6. The display design method of claim 5, wherein when the correspondence relationship of the operation result is displayed in the state of the operation area map, the complex includes: the operation selected according to the integration module The class parameter takes the desired operation result and draws an operation area in the appropriate coordinate system diagram. 21 110586 (Revised Edition >