TWI361645B - Process of fabricating circuit board - Google Patents
Process of fabricating circuit board Download PDFInfo
- Publication number
- TWI361645B TWI361645B TW97144964A TW97144964A TWI361645B TW I361645 B TWI361645 B TW I361645B TW 97144964 A TW97144964 A TW 97144964A TW 97144964 A TW97144964 A TW 97144964A TW I361645 B TWI361645 B TW I361645B
- Authority
- TW
- Taiwan
- Prior art keywords
- circuit board
- layer
- conductive
- dielectric layer
- board process
- Prior art date
Links
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- Manufacturing Of Printed Wiring (AREA)
Description
0809003 29453twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種線路板製程,且特別是有關於一 種具有高密度内連線(High Density Interconnection,HDI) 之線路板製程。 【先前技術】 在目前的半導體封裝製程中,由於線路板具有佈線細 密、組裝緊湊及性能良好等優點,使得線路板已成為經常 使用的構裝元件之一。線路板能與多個電子元件(electronic component)組裝,而這些電子元件例如是晶片(Chip)與 被動元件(passive component)。透過線路板,這些電子 元件得以彼此電性連接,而訊號才能在這些電子元件之間 傳遞。 一般而言,線路板主要是由多層圖案化線路層 (patterned circuit layer )及多層介電層(dielectric layer ) 父替宜合而成’並藉由導電盲孔(c〇n(juctive via )以達成 •圖案化線路層彼此之間的電性連接。由於近年來電子產品 走向小型、輕量、薄型、高速、高機能、高密度、低成本 化,以及電子元件封裝技術亦朝向高腳數、精細化與集積 化發展,因此線路板亦走向高密度佈線、細線小孔化、複 合多層化、薄板化發展。 问在度内連線(HDI)之線路板是指利用導電盲孔搭 配線路層無間距(fme piteh)以達到高度互聯的一種技 1361645 0809003 29453twf.doc/n 單位面積中能_載更多電子元件或是容納 夕门”路。由於⑤密度内連線之線路板包含多層線路 ^綠^ f各層線路層間良好之連通成為高密度内連線 之線路板的關鍵之一。 【發明内容】 本發明提供-種線路板製程,用以製 内連線之線路板。 材ίΓΓ提出—種線路板製程。首先,提供—線路基 線路基材具有-上表面與一第 線路圖案位於上表面上。接著,形士日=木八中弟 荦介電層覆蓋上表面與第—線路圖 案導電結誠人介電射且電时接至第—祕圖举。 電層的表面上,其中凹刻圖案與導電 -第二線路圖案,其中第刻圖案内’以形成 接至第-線路圖案。線路圖案猎由導電結構電性連 包括之吉:施例中’上述之形成凹刻圖案的方法 —田射燒# '電_刻或機械加工製程。 在本發明之一實施例中,上^ 刀切割、噴砂或外㈣割。权機械加二製程包括水 源包,上述使用雷射触之雷射光 ^括㈣線雷射、準分子祕或遠紅外線 1361645 0809003 29453twf.doc/n 在本發明之一實施例中,上述之介電層的材質包括高 分子聚合物。 在本發明之一實施例中,上述之高分子聚合物為選自 由壞乳樹月曰、改質之壤乳樹脂、聚脂(polyester)、丙婦 酸酯、氟素聚合物(fluoro-po丨ymer)、聚亞苯基氧化物 (polyphenylene oxide)、聚醯亞胺(p〇丨yimide)、酚醛樹 月旨(phenolicresin)、聚颯(polysulfone )、石夕素聚合物(silicone polymer )、BT 樹月旨(bismaleimide triazine modified epoxy (BT Resin))、氰酸聚酯(cyanate ester )、聚乙稀 (polyethylene)、聚碳酸酯樹脂(p〇lyCarb〇nate,PC)、 丙烯-丁二烯-苯乙烯共聚合物 ( acrylonitrile-butadiene-styrene copolymer, ABS copolymer )、聚對苯二甲酸乙二酯(polyethylene terephthalate,PET )樹脂、聚對苯二曱酸丁二g旨 (polybutylene terephthalate,PBT)樹脂、液晶高分子(liquid crystal polymers,LCP )、聚酷胺 6 ( polyamide 6, PA 6 )、 尼龍(Nylon )、共聚聚甲酸 ( polyoxymethylene,POM )、 聚苯硫驗(polyphenylene sulfide, PPS)及環狀烯烴共聚高 分子(cyclic olefin copolymer, COC )所組成的群組。 在本發明之一實施例中’上述之介電層包括多顆觸媒 顆粒。 在本發明之一實施例中’上述之這些觸媒顆粒包括多 個奈米金屬顆粒。 在本發明之一實施例中,上述之這些觸媒顆粒的材質 1361645, 0809003 29453twf.doc/n 包括多個過渡金屬配位化合物。 在本發明之一實施例中,上述之這些過渡金屬配位化 合物的材質包括過渡金屬氧化物、過渡金屬氮化物、過渡 金屬錯合物或過渡金屬螯合物。 在本發明之一實施例中,上述之這些過渡金屬配位化 合物的材質為選自於由辞、鋼、銀、金、鎳、鈀、鉑、鈷、BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a circuit board process, and more particularly to a circuit board having a high density interconnect (HDI). Process. [Prior Art] In the current semiconductor packaging process, since the wiring board has the advantages of fine wiring, compact assembly, and good performance, the wiring board has become one of the frequently used components. The circuit board can be assembled with a plurality of electronic components such as a chip and a passive component. Through the circuit board, these electronic components are electrically connected to each other, and signals can be transmitted between these electronic components. In general, the circuit board is mainly composed of a plurality of patterned circuit layers and a plurality of dielectric layers, and is formed by a conductive via hole (c〇n (juctive via) Achieved • Electrical connection between patterned circuit layers. In recent years, electronic products have become smaller, lighter, thinner, high-speed, high-performance, high-density, low-cost, and electronic component packaging technology is also facing a high number of With the development of refinement and accumulation, the circuit board is also moving toward high-density wiring, thin-line small holes, composite multi-layering, and thin-plate development. The problem of the inner wiring (HDI) circuit board is to use the conductive blind hole to match the circuit layer. Fme piteh to achieve a highly interconnected technology 1361645 0809003 29453twf.doc / n unit area can carry more electronic components or accommodate Ximen Road. Because the 5 density interconnect circuit board contains multi-layer lines ^ Green ^ f The good connection between the layers of the layers becomes one of the keys of the circuit board of the high-density interconnect. [Invention] The present invention provides a circuit board process for making interconnects The circuit board is made of a circuit board process. First, the line-based circuit substrate has an upper surface and a first line pattern on the upper surface. Then, the shape of the line is a dielectric layer of the wood Covering the upper surface and the first-line pattern conductive junction is taken by the human body and electrically connected to the first-figure diagram. On the surface of the electric layer, the indented pattern and the conductive-second line pattern, wherein the first pattern is Forming the connection to the first-line pattern. The circuit pattern is electrically connected by the conductive structure: in the embodiment, the method for forming the intaglio pattern described above - the field shot # 'Electronic_etching or machining process. In one embodiment, the upper knife cutting, sand blasting or outer (four) cutting. The weighting machine plus two processes include a water source package, the above-mentioned laser light using a laser touch (four) line laser, excimer secret or far infrared light 1361645 0809003 29453twf In an embodiment of the invention, the material of the dielectric layer comprises a high molecular polymer. In an embodiment of the invention, the high molecular polymer is selected from the group consisting of bad milk tree, Modified soil latex, Polyester, propyl fumarate, fluoro-po丨ymer, polyphenylene oxide, p〇丨yimide, phenolic resin ), polysulfone, silicone polymer, bismaleimide triazine modified epoxy (BT Resin), cyanate ester, polyethylene, poly Carbonate resin (PC), acrylonitrile-butadiene-styrene copolymer (ABS copolymer), polyethylene terephthalate (PET) Resin, polybutylene terephthalate (PBT) resin, liquid crystal polymer (LCP), polyamine 6 (polyamide 6, PA 6 ), nylon (Nylon), copolymerization A group consisting of polyoxymethylene (POM), polyphenylene sulfide (PPS), and cyclic olefin copolymer (COC). In one embodiment of the invention, the dielectric layer described above comprises a plurality of catalyst particles. In an embodiment of the invention, the above-mentioned catalyst particles comprise a plurality of nano metal particles. In one embodiment of the invention, the materials of the catalyst particles 1361645, 0809003 29453twf.doc/n include a plurality of transition metal coordination compounds. In one embodiment of the invention, the materials of the transition metal complex compounds described above include transition metal oxides, transition metal nitrides, transition metal complexes or transition metal chelates. In one embodiment of the present invention, the transition metal complex compound is selected from the group consisting of: rhetoric, steel, silver, gold, nickel, palladium, platinum, cobalt,
姥、銀、鐵、Μ、鉻、钥、鶴、叙、組以及欽所組成的群 組。 在本發明之-實施例十,上述之在介電層的表面上形 成凹刻圖案的同時,更包括活化部份的這些觸媒顆粒,以 形成一活化層於凹刻圖案的内面。 在本發明之一實施例中,上述之形成第 凹刻圖案内的方法包括化學沉積法。Groups of 姥, silver, iron, Μ, chrome, key, crane, Syrian, group, and Qin. In the tenth embodiment of the present invention, the above-mentioned forming an intaglio pattern on the surface of the dielectric layer further includes activating the portion of the catalyst particles to form an active layer on the inner surface of the intaglio pattern. In one embodiment of the invention, the method of forming the first indentation pattern comprises a chemical deposition process.
在本發明之-實施例中’上述之形成具有導電結構 介電層的步驟,首先,形成—銅箔層於介電層的表面上 接著,對形成有銅箔層的介電層照射一雷射,以形成至 一從銅箔層延伸至第一線路圖案的盲孔結構。形^一電 種子層於盲孔結構内與銅箔層的表面。透過電 電鑛形成-導電層。最後,移除部份導電層、^份二 子層及_層,以形成導電結構並暴露出介電層的表= 在本發明之-實施例中,上述之導電層^質 銅、銀、鎳、錫或鋁。 、部 在本發明之-實施例中,上述之移除部 份電鍍種子層及銅箔層的方法包括蝕刻或研磨。电曰 8 1361645, 0809003 29453twf.doc/i 在本發狀-實施射,上叙形献有導電 ^層:步驟,首先’形成〜銅箱層於介電層 】的 接著’對形成有銅㈣的介電層照射—雷射, ^。 -從銅箱層延伸至第一線路圖案的盲孔結構。填=少 枓::孔結構中,以形成導電結構。Μ,移除銅 以暴露出介電層的表面。 运’In the embodiment of the present invention, the above-described step of forming a dielectric layer having a conductive structure, first, forming a copper foil layer on the surface of the dielectric layer, and subsequently irradiating a dielectric layer on the copper foil layer Shot to form a blind via structure extending from the copper foil layer to the first line pattern. The electric seed layer is in the blind hole structure and the surface of the copper foil layer. A conductive layer is formed through the electric ore. Finally, a portion of the conductive layer, the second sub-layer and the _ layer are removed to form a conductive structure and expose the dielectric layer. In the embodiment of the present invention, the conductive layer is copper, silver, and nickel. , tin or aluminum. In the embodiment of the present invention, the above method of removing portions of the plating seed layer and the copper foil layer includes etching or grinding. Electric 曰 8 1361645, 0809003 29453twf.doc/i In this hair-effect, the upper layer is provided with a conductive layer: the step, first 'formation ~ copper box layer on the dielectric layer' followed by 'the formation of copper (four) Dielectric layer illumination - laser, ^. a blind hole structure extending from the copper box layer to the first line pattern. Fill = less 枓:: In the pore structure, to form a conductive structure. Oh, remove the copper to expose the surface of the dielectric layer. Yun’
在本發明之-實施例中,上述之雷射之光源包括 線雷射、紫外線雷射、準分子雷射或遠紅外線雷射。、卜 在本發明之一實施例中,上述之導電 電膏或高好導電㈣。 金屬導 勝=發t —實施射,上述之金屬導電膏包括銅 膠、銀膠、奴膠、銅貧、銀膏或錫膏。 在,發明之—實施例中,上述之高分子導電材料包括 複合型兩分子導電材料或結構型高分子導電材料。 在本發明之-實施例中,上述之複合型高分In an embodiment of the invention, the laser source described above comprises a line laser, an ultraviolet laser, a quasi-molecular laser or a far-infrared laser. In one embodiment of the invention, the conductive paste is preferably electrically conductive (four). The metal conductive = t-implementation, the above metal conductive paste includes copper glue, silver glue, smuggling, copper poor, silver paste or solder paste. In the invention, the above-mentioned polymer conductive material comprises a composite two-molecule conductive material or a structural type polymer conductive material. In the embodiment of the present invention, the above composite type high score
料是將導電填料以填充複合、表面複合或層積複合等方式 複合尚分子材料而製得。 在本發明之—實施例中,上述之複合型高分子導電材 料之材質種類包括塑料、橡膠、樹脂塗料或膠黏劑。 在本發明之—實施例中’上述之導電填料包括碳黑、 金屬粉、金屬箔片、金屬纖維或碳纖維。 在本發明之一實施例中,上述之結構型高分子導電材 料之材貝包括聚乙炔材料、聚氣化硫、聚。比。各、聚苯硫鱗、 聚酞腈類化合物或聚苯胺或聚噻吩。 1361645 0809003 29453twf.doc/n 一……良砸例f,上述之形忐目士,曾 介電層的步驟,首先,形成―導^具㈣電結構的 接著,壓合介電層於線路基材上^案上’ 以構成導電結構。 等電錐貝牙介電層, 在本發明之一實施例中 括印刷或打線。 上述之形成導電錐的方法包The material is prepared by compounding a conductive material into a composite material, a surface composite or a laminate compound. In the embodiment of the present invention, the material type of the above-mentioned composite polymer conductive material includes plastic, rubber, resin paint or adhesive. In the present invention - the conductive filler described above includes carbon black, metal powder, metal foil, metal fiber or carbon fiber. In an embodiment of the invention, the material of the structural type polymer conductive material comprises a polyacetylene material, a gasified sulfur, and a poly. ratio. Each, polyphenylene sulfide scale, polyphthalonitrile compound or polyaniline or polythiophene. 1361645 0809003 29453twf.doc/n a good example f, the above-mentioned shape, the step of the dielectric layer, first, the formation of the "four" electrical structure, followed by pressing the dielectric layer on the line base The material is on the case to form a conductive structure. An isoelectric cone dielectric layer, in one embodiment of the invention, includes printing or wire bonding. The above method for forming a conductive cone
在本發明之一實施例中 膠或銀膠。 综上所述,本發明先於介電層形成連接線路基材之第 '線路圖案料電結構,然後,以雷射於介電層的表面形 成可埋入第二線路圖案的凹刻_,其中第二線路圖案藉 由導電結構·連接至第—料騎,喊成具有高密度 内連線之線路板。因此,本發明之線路板製程,可以避免 受限分別於凹刻圖案内與盲孔結構中同時形成第二線路圖In one embodiment of the invention, a glue or silver paste. In summary, the present invention forms a first line pattern material electrical structure of the connection line substrate prior to the dielectric layer, and then forms an intaglio _ which can be buried in the second line pattern by laser exposure on the surface of the dielectric layer. The second line pattern is connected to the first material ride by the conductive structure, and is called a circuit board having a high density interconnection. Therefore, the circuit board process of the present invention can avoid the limitation that the second circuit pattern is formed simultaneously with the blind hole structure in the intaglio pattern.
上述之導電錐的材質包括銅 案與導電結構時之填孔能力的限制與製程時間長等問題, 可有效縮短線路板的生產流程,進而擴充了具有高密度内 連線之線路板的應用範圍。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 【實施方式】 圖1A至圖II繪示本發明之一實施例之一種線路板製 程。請先參考圖1A,依照本實施例的線路板製程’首先, 提供一線路基材110。線路基材U〇具有一上表面112與 1361645. 0809003 29453twf.doc/n 一弟一線路圖案114,其中第一線路圖案114位於上表面 112上,也就是說,第一線路圖案114可算是一種一般線 路(即非内埋式線路)。 值得一提的是’線路基材11〇的結構可以僅具有單一 線路層,或是具有多層線路層。也就是說,線路基材u〇 可以疋單層線路基材(single layer circuit substrate )、雙層 線路基材(double layer circuit substrate)或多層線路基材 (multi-layer circuit substrate)。在本實施例中,圖 1八之 線路基材110是以多個介電層(未繪示)以及多個圖案化 線路層(未繪示)交互堆疊所形成的多層線路基材來進行 說明。 請參考圖1B,接著,形成一介電層12〇於線路基材 110上’其中介電層120覆蓋線路基材no的上表面U2 與第一線圖案114。詳細而言,在本實施例中,介電層 包括多顆觸媒顆粒122,而這些觸媒顆粒122包括多個奈 米金屬顆粒。這些觸媒顆粒122的材質包括過渡金屬配位 化合物,其中過渡金屬配位化合物的材質可以包括過渡金 屬氧化物、過渡金屬氮化物、過渡金屬錯合物或過渡金屬 螯合物,且這些過渡金屬配位化合物的材質為選自於由 鋅、銅、銀、金、鎳、鈀、鉑、鈷、鍺、銥、鐵、錳、鉻、 錮、鶴、飢、組以及鈦所組成的群組中的一種材質。 • 進一步而言,這些觸媒顆粒122例如是多個金屬氧化 物顆粒、多個金屬氮化物顆粒、多個金屬錯合物顆粒、多 個金屬螯合物顆粒或多個金屬顆粒,且這些觸媒顆粒m 1361645, 0809003 29453twf.doc/n 的材質可以包括辞、銅、銀、金、錄、绝、銘、始、錢、 銥、鐵、錳、鉻、鉬、鎢、釩、鈕或鈦,或是這些金屬的 任忌組合。也就是說,這些觸媒顆粗122内的金屬原子可 以是鋅、銅、銀、金、鎳、鈀、鉑、鈷、鍺、銥、鐵、錳、 鉻、鉬、鎢、釩、鈕或鈦,且這些觸媒顆粒122可以包括 這些金屬原子的任意結合。舉例而言,這些觸媒顆粒122The above-mentioned conductive cone material includes the limitation of the hole filling ability and the long processing time in the case of the copper case and the conductive structure, and can effectively shorten the production process of the circuit board, thereby expanding the application range of the circuit board having the high density interconnection. . The above and other objects, features, and advantages of the present invention will become more apparent from the understanding of the appended claims. [Embodiment] FIG. 1A to FIG. 1 are diagrams showing a circuit board process according to an embodiment of the present invention. Referring first to FIG. 1A, a circuit board process in accordance with the present embodiment' first provides a wiring substrate 110. The circuit substrate U has an upper surface 112 and 1361645. 0809003 29453twf.doc/n a line pattern 114, wherein the first line pattern 114 is located on the upper surface 112, that is, the first line pattern 114 can be regarded as a kind General line (ie non-embedded line). It is worth mentioning that the structure of the wiring substrate 11 can have only a single wiring layer or a multilayer wiring layer. That is, the wiring substrate u can be a single layer circuit substrate, a double layer circuit substrate, or a multi-layer circuit substrate. In the present embodiment, the circuit substrate 110 of FIG. 18 is illustrated by a plurality of dielectric layers (not shown) and a plurality of patterned circuit layers (not shown) alternately stacked. . Referring to FIG. 1B, a dielectric layer 12 is formed on the wiring substrate 110, wherein the dielectric layer 120 covers the upper surface U2 of the wiring substrate no and the first line pattern 114. In detail, in the present embodiment, the dielectric layer includes a plurality of catalyst particles 122, and these catalyst particles 122 include a plurality of nano metal particles. The material of the catalyst particles 122 includes a transition metal complex compound, and the material of the transition metal complex compound may include a transition metal oxide, a transition metal nitride, a transition metal complex or a transition metal chelate, and these transition metals The material of the coordination compound is selected from the group consisting of zinc, copper, silver, gold, nickel, palladium, platinum, cobalt, rhodium, ruthenium, iron, manganese, chromium, ruthenium, crane, hunger, group and titanium. One of the materials. Further, these catalyst particles 122 are, for example, a plurality of metal oxide particles, a plurality of metal nitride particles, a plurality of metal complex particles, a plurality of metal chelate particles or a plurality of metal particles, and these contacts The material of the media particles m 1361645, 0809003 29453twf.doc/n may include words, copper, silver, gold, record, eternal, Ming, beginning, money, bismuth, iron, manganese, chromium, molybdenum, tungsten, vanadium, button or titanium. Or a combination of these metals. That is, the metal atoms in the catalyst particles 122 may be zinc, copper, silver, gold, nickel, palladium, platinum, cobalt, rhodium, ruthenium, iron, manganese, chromium, molybdenum, tungsten, vanadium, or Titanium, and these catalyst particles 122 may comprise any combination of these metal atoms. For example, these catalyst particles 122
例如是氧化銅、録鉬雙金屬氮化物(c〇2M〇3Nx)顆粒或纪 金屬顆粒。For example, copper oxide, molybdenum bimetallic nitride (c〇2M〇3Nx) particles or metal particles.
值得一提的是,本發明並不限定介電層12〇的材質盘 型態’雖然此處所提及之介電層120具體化為包括多顆觸 媒顆粒122,但其他實施例中,介電層12()的材質亦可為 高分^聚合物’其中高分子聚合物為選自由環氧樹脂改 質之魏樹脂、聚脂、丙烯酸g!、氟素聚合物、聚亞苯基 氧化物:聚g!亞胺、祕樹脂、聚硬、♦素聚合物、bt ^月曰氰1水酉曰、聚乙烯、聚碳酸酉旨樹脂、丙烯-丁二稀_ ^乙稀共聚合物、聚對苯二甲酸乙二_脂、聚對苯二甲 脂、液晶高分子、聚_ 6、尼龍、共聚聚甲 躲環狀稀烴共聚高分子所組成的群組,此仍 範圍。Χ Ρ 1的技财案’不麟本剌所欲保護的 形成—鋼箔層140於介電層120 ’鋼洛層140覆蓋介電層120, 請參考圖1C,接著, 的表面上。在本實施例中 可視為一保護層。 請參考圖1D,接著 對开>成有鋼箔層140的介電層 0809003 29453twf.d〇c/n 120照射一第一恭 至第 '線路圖案:的1盲::少-從_層⑽延伸 示一個),其t盲孔(圖1D中僅示意地繪 上表面112的部份dUf位於線路基材⑽之 一雷射L1為紅外線•射”。在本實施例中,第 雷射L1亦可為紫外在;、他的實施例,,第-外線雷射光源。、田光源、準分子雷射光源或遠紅 構種子層15°於盲孔結 的方式可為騎,而電形成―電鍍種子層150 或辞。 又θ的材料例如是銅、錄 清參考圖1F,技装 ^ 'Η ^ -導電層160,子層150而電鍍形成 140的表面完全_ 將目孔結構B1與銅荡層 包括銅、銀、鎳、锡或銘。 河負 藉尽^ ^圖1G ’接著’移除部份導電層160、部份電鍍 ==如4〇,以形成導電結構13〇並暴露出 2實施例中,導電結構 ^ ^ ^ 中且導电結構130電性連接至 線路圖案112。特別是,導電結構130的表面與介電 層120的表面貫質上切齊。此外,本實施例之移除部份導 電層160、部份電鍍種子層15〇及銅箔層14〇的方法包括 餘刻或研磨。 請參考圖1H,接著,以一第二雷射[2在介電層12〇 136.1643 0809003 29453twf.doc/n 的表面形成一凹刻圖案126,其中凹刻圖案126與導電結 • 構130相連接。特別是,在本實施例中,當第二雷射L2 燒蝕具有這些觸媒顆粒122的介電層120時,在介電層12〇 的表面上形成凹刻圖案丨26的同時,一些觸媒顆粒122會 活化並裸露於凹刻圖案126的内面,而形成一活化層124。 圖1H中的這些觸媒顆粒122會以黑色或白色來表示觸媒 顆粒122是否被活化。黑色的觸媒顆粒122代表已活化的 • 觸媒顆粒122 (即活化層124),而白色的觸媒顆粒122則 代表未活化的觸媒顆粒122。在本實施例中,第二雷射L2 為紫外線雷射光源。在其他實施例中,第二雷射亦可 為紅外線雷射光源、準分子雷射光源或遠紅外線雷射光源。 值得一提的是,本發明並不限定形成凹刻圖案126的 方法,雖然此處所提及之凹刻圖案丨26的形成方法具體化 為雷射燒蝕,於其他實施例中,亦可以藉由電漿蝕刻或機 械加工製程的方式來形成凹刻圖案126,其中機械加工製 • 程更包括以水刀切割、喷砂或外型切割,此仍屬於本發明 可採用的技術方案,不脫離本發明所欲保護的範圍。 請參考圖II,最後,配置導電材料於凹刻圖案126内, 以形成一第二線路圖案170 ’其中第二線路圖案170藉由 導電結構130電性連接至第一線路圖案114。在本實施例 中,形成第二線路圖案170於凹刻圖案126内的方法包括 化學沉積法。進一步而言,第二線路圖案170是藉由化學 〉儿積法形成於凹刻圖案126内的活化層124上,且這些第 —線路圖案170與介電層120的表面實質上切齊,換言之, IS] 14 1361645 0809003 29453twf.doc/n 這些第二線路圖案170基本上可算是—種内埋式線路。至 此,線路板100已大致完成。 簡言之’本實施例之線路板製程’是先利用電鍍填孔 的方式於介電層120形成連接線路基材U0之第一線路圖 案114的導電結構130,接著,以第二雷射L2於介電^ 120的表面形成凹刻圖案126,之後’在利用化學沉積法來 形成埋入凹刻圖案126内的第二線路圖案17〇,其中第二 線路圖案170藉由導電結構130電性連接至第一線路圖案 114’而完成具有高密度内連線之線路板丨〇〇。 本貫施例之線路板製程的步驟,可以避免受限分別於 凹刻圖案126内與盲孔結構B1中同時形成第二線路圖案 170與導電結構130時之填孔能力的限制與製程時間長等 問題。 此外,本實施例之介電層120具有多個觸媒顆粒122, 當照射第二雷射L2於介電層120表面的同時,部份的觸 媒顆粒122會被活化而形成活化層124,因此可直接藉由 化學沉積法於凹刻圖案126内的活化層124上形成第二線 路圖案170’進而也擴充了具有觸媒顆粒122之介電層120 於高密度内連線之線路板100上的應用範圍。 圖2A至圖2H繪示本發明之另一實施例之一種線路 板製程。請先參考圖2A,依照本實施例的線路板製程,首 先’提供一線路基材210。線路基材210具有一上表面212 與一第一線路圖案214 ’其中第一線路圖案214位於上表 面212上,也就是說,第一線路圖案214可算是一種一般 [ 15 1361645. 0809003 29453twf.doc/n 線路(即非内埋式線路)。 值得一提的是,線路基材210的結構可以僅具有單一 線路層’或是具有多層線路層。也就是說,線路基材210 可以是單層線路基材、雙層線路基材或多層線路基材。在 本實施例中’圖2A之線路基材210是以多個介電層(未 繪示)以及多個圖案化線路層(未繪示)交互堆疊所形成 的多層線路基材來進行說明。It is worth mentioning that the present invention does not limit the material disk type of the dielectric layer 12A. Although the dielectric layer 120 mentioned herein is embodied to include a plurality of catalyst particles 122, in other embodiments, The material of the dielectric layer 12() may also be a high-component polymer, wherein the high-molecular polymer is selected from the group consisting of Wei resin modified with epoxy resin, polyester, acrylic acid, fluoropolymer, polyphenylene Oxide: polyg! imine, secret resin, polyhard, ♦ polymer, bt ^ 曰 cyanide 1 酉曰, polyethylene, polycarbonate 树脂 resin, propylene-butadiene _ ^ ethylene copolymerization A group consisting of polyethylene terephthalate, polyparaphenylene terephthalate, liquid crystal polymer, poly-6, nylon, and copolymerized polystyrene ring copolymer. The technical solution of Χ ’ 1 is not formed by the formation of the steel foil layer 140 over the dielectric layer 120 ′ steel layer 140 covering the dielectric layer 120, please refer to Figure 1C, then, on the surface. In this embodiment, it can be regarded as a protective layer. Referring to FIG. 1D, then the dielectric layer 0908003 29453twf.d〇c/n 120 having the steel foil layer 140 is irradiated with a first tribute to the 'line pattern: 1 blind:: less-from _ layer (10) extending a), the t-blind hole (only the portion dUf of the surface 112 is schematically shown in FIG. 1D is located at one of the line substrates (10), and the laser beam L1 is infrared rays." In the present embodiment, the first laser L1 can also be ultraviolet; in his embodiment, the first-outline laser source, the field source, the excimer laser source or the far red seed layer 15° in the blind hole junction can be riding, and electricity Forming a "plating seed layer 150 or a word. The material of θ is, for example, copper, recording with reference to FIG. 1F, and the conductive layer 160, the sub-layer 150 is plated to form the surface of the surface 140 completely. And the copper layer includes copper, silver, nickel, tin or Ming. The river is borrowed ^ ^ Figure 1G 'then' remove some of the conductive layer 160, part of the plating == such as 4 〇 to form a conductive structure 13 〇 In the exposed embodiment, the conductive structure is electrically connected to the circuit pattern 112. In particular, the surface of the conductive structure 130 and the dielectric layer 1 The surface of the layer 20 is cut in. Further, the method of removing a portion of the conductive layer 160, the portion of the plating seed layer 15 and the copper foil layer 14 of the present embodiment includes a residue or a grinding. Please refer to FIG. 1H, followed by A recessed pattern 126 is formed on the surface of the dielectric layer 12 136.1643 0809003 29453 twf.doc/n by a second laser [2], wherein the recessed pattern 126 is connected to the conductive structure 130. In particular, In an embodiment, when the second laser L2 ablates the dielectric layer 120 having the catalyst particles 122, some of the catalyst particles 122 are activated while forming the intaglio pattern 丨26 on the surface of the dielectric layer 12A. And exposed to the inner surface of the intaglio pattern 126, an active layer 124 is formed. The catalyst particles 122 in Fig. 1H will indicate whether the catalyst particles 122 are activated in black or white. The black catalyst particles 122 represent activated. • Catalyst particles 122 (i.e., activation layer 124), while white catalyst particles 122 represent unactivated catalyst particles 122. In this embodiment, second laser L2 is an ultraviolet laser source. In the example, the second laser can also be an infrared laser source, and the standard laser A sub-laser source or a far-infrared laser source. It is worth mentioning that the present invention does not limit the method of forming the intaglio pattern 126, although the method of forming the intaglio pattern 26 referred to herein is embodied as a laser. Ablation, in other embodiments, the intaglio pattern 126 may also be formed by a plasma etching or machining process, wherein the machining process further includes waterjet cutting, sand blasting or profile cutting. The technical solutions that can be employed in the present invention are still within the scope of the present invention. Referring to FIG. II, finally, a conductive material is disposed in the recess pattern 126 to form a second line pattern 170' wherein the second line pattern 170 is electrically connected to the first line pattern 114 by the conductive structure 130. In the present embodiment, the method of forming the second wiring pattern 170 in the intaglio pattern 126 includes a chemical deposition method. Further, the second line pattern 170 is formed on the active layer 124 in the recess pattern 126 by a chemical method, and the first line patterns 170 are substantially aligned with the surface of the dielectric layer 120, in other words, , IS] 14 1361645 0809003 29453twf.doc/n These second line patterns 170 can basically be regarded as a buried line. Thus, the circuit board 100 has been substantially completed. In short, the circuit board process of the present embodiment first forms a conductive structure 130 connecting the first line pattern 114 of the wiring substrate U0 to the dielectric layer 120 by means of electroplating, and then, with the second laser L2. An intaglio pattern 126 is formed on the surface of the dielectric 120, and then a second line pattern 17A embedded in the recess pattern 126 is formed by chemical deposition, wherein the second line pattern 170 is electrically connected by the conductive structure 130. The wiring board 具有 having a high-density interconnection is completed by being connected to the first line pattern 114'. The steps of the circuit board process of the present embodiment can avoid the limitation of the hole filling ability and the long process time when the second line pattern 170 and the conductive structure 130 are simultaneously formed in the recessed pattern 126 and the blind hole structure B1. And other issues. In addition, the dielectric layer 120 of the present embodiment has a plurality of catalyst particles 122. When the second laser light L2 is irradiated on the surface of the dielectric layer 120, part of the catalyst particles 122 are activated to form the active layer 124. Therefore, the second line pattern 170' can be formed directly on the active layer 124 in the recess pattern 126 by chemical deposition, thereby further expanding the dielectric layer 120 having the catalyst particles 122 to the high density interconnect line. The scope of application. 2A to 2H illustrate a circuit board process according to another embodiment of the present invention. Referring first to FIG. 2A, in accordance with the circuit board process of the present embodiment, a line substrate 210 is first provided. The circuit substrate 210 has an upper surface 212 and a first line pattern 214' wherein the first line pattern 214 is located on the upper surface 212, that is, the first line pattern 214 can be regarded as a general [15 1361645. 0809003 29453twf.doc /n line (ie non-embedded line). It is worth mentioning that the structure of the wiring substrate 210 may have only a single wiring layer ' or a multilayer wiring layer. That is, the wiring substrate 210 may be a single-layer wiring substrate, a two-layer wiring substrate, or a multilayer wiring substrate. In the present embodiment, the wiring substrate 210 of FIG. 2A is described as a multilayer wiring substrate formed by alternately stacking a plurality of dielectric layers (not shown) and a plurality of patterned wiring layers (not shown).
請參考圖2B,接著,形成一介電層22〇於線路基材 上,其中介電層220覆蓋線路基材210的上表面212 第一線圖案214。詳細而言,在本實施例中,介電層22〇 匕括多顆觸媒顆粒您,而這些觸媒顆粒奶與前述實施 ^中,觸媒雜丨22相同,在此不重複贅述之。當然,於 ,、他=施例中’介電層212的材質亦可為高分子聚合物。 的凊參考圖2C ’接著,形成—鋼紐24G於介電層220 可視^保實施例中,鋼箱層24g覆蓋介電層,, 220心一笫圖,,接著,對形成有銅箱層240的介電 至第射U,以形成至少—從銅紐240延 之個rc盲孔結構—示』 上表面m2盲孔結構B2暴露出位於線路基材2Κ» ^面212的部份第一線路圖案2M。在太w 雷射L1亦可4 = : ;他的實施例中,第 外線雷射光源、。' " ’、準分子雷射光源或遠 1361645 0809003 29453twf.d〇c/n 晴參考® 2E’接著’填入一導電材料25〇於盲孔結構 B2中,以形成導電結構no,其中導電結構no的表面與 銅落層240的表面實質上切齊。在本實施例中,填入導電 材料250於目孔結構B2的方式包括印刷,而導電材料 ,括金屬導電膏或高分子導電材料,其中金屬導電膏可以 =二、碳膠、銅膏、銀膏、錫膏、或其他適合用 以導電的金屬材料。 雷材ϋΐΐ例中’高分子導電材料包括複合型高分子導 曰^^:魏尚分子導電材料。複合型高分子導電材料 子材料與各剩性物質通過填充複合、表 料合等方式而製得’而複合型高分子導電材 叙卞丨使匕括有導電塑料、導電橡夥、導電塗料或導電膠 黏劑,甚至也可以製成透明導電薄膜二 == 電材料的性能與所選用導雷埴⑯口型同/刀子導 態以及1在:填科的種類、用量、粒度、狀 較常用的導電有很大的關係’其中 碳纖維等。另‘二A屬粉、金屬箱片' 金屬纖維、 本身或分子導賴料是指高分子結構 之後具有導電功能的高分子材料,盆中: 聚笨硫包括:聚乙块材料、聚氮化硫、 為電子導電理雜結構型高分子導電材㈣ 導電高分子㈣的結構子㈣,其f電子 系’在熱或先的作用下通過 [S] 17 1361645 0809003 29453twf.doc/n 電,電導率一般在半 ^ 類材料的導電性能明_古& ’而採用摻雜技術可使這 碘,電導率可提高12個=绍例如在聚乙块中摻雜少量 化硫,在超低溫下可轉里丄又例如’赵摻雜後的聚氮 層咖的表面,其中露出介電 的表面。 的表面回於介電層220 的圖’接著以一第二雷射L2在介電声220 w凹㈣案226,其中_ _挪“ t ^ ,230相連接1別是,在本實施例中,當第二雷 埏蝕具有廷些觸媒顆粒222的介 成 的表面上形成凹刻圖荦226 :;層::在介電層220 口本226的冋時,一些觸媒顆粒222會 活化亚稞露於凹刻圖案226的内面,而形成—活化層從。 圖2G中的這些觸媒顆粒奶會以黑色或白色來表示觸媒 顆粒222是否被活化。黑色的觸媒顆粒222代表已活化的 觸媒顆粒222 (即活化層224),而白色的觸媒顆粒您則 代表未活化的觸媒顆粒222。在本實施例中’第二雷射L2 為紫外線雷射光源。在其他實施例中,第二雷射L2亦可 為紅外線雷射光源、準分子雷射光源或遠紅外線雷射光源。 請參考圖2H,最後,配置導電材料於凹刻圖案226 内,以形成一第二線路圖案260,其中第二線路圖案26〇 藉由導電結構230電性連接至第一線路圖案214。在本實 施例中,形成第二線路圖案260於凹刻圖案226内的方法 包括化學沉積法。進一步而言,第二線路圖案260是藉由 1361645. 0809003 29453twf.doc/n 化學沉積法形成於凹刻圖案226内的活化層224上,且這 . 些第二線路圖案260與介電層220的表面實質上切齊,換 言之,這些第二線路圖案260基本上可算是一種内埋式線 路。至此’線路板200已大致完成。 簡言之’本實施例之線路板製程’是先利用印刷的方 式於介電層220形成連接線路基材210之第一線路圖案 214的導電結構230,接著’以第二雷射於介電層22〇 • 的表面形成凹刻圖案226,之後,在利用化學沉積法來形. 成埋入凹刻圖案226内的第二線路圖案260,其中第二線 路圖案260藉由導電結構230電性連接至第一線路圖案 214 ’而完成具有高密度内連線之線路板2〇〇。 本實施例之線路板製程的步驟,可以避免受限分別於 凹刻圖案226内與盲孔結構B2中同時形成第二線路圖案 260與導電結構230 4之填孔能力的限制與製程時間長等 問題。 、 此外’本實施例之介電層220具有多個觸媒顆粒222, 萬照射第一雷射L2於介電層220表面的同時,部份的觸 媒顆粒222會被活化而形成活化層224,因此可直接藉由 化學沉積法於凹刻圖案226内的活化層224上形成第二線 路圖案260,進而也擴充了具有觸媒顆粒222之介電層220 於高密度内連線之線路板200上的應用範圍。 圖3A至圖3E繪示本發明之另一實施例之一種線路板 製程。請先參考圖3A’依照本實施例的線路板製程,首先, 提供一線路基材310。線路基材310具有—上表面μ〕與 1361645 0S09003 29453twf.doc/n 一第一線路圖案314 ’其中第一線路圖案314位於上表面 312上,也就是說,第一線路圖案314可算是一種一般線 路(即非内埋式線路)。 值得一提的是’線路基材310的結構可以僅具有單一 線路層’或是具有多層線路層。也就是說,線路基材31〇 可以是單層線路基材、雙層線路基材或多層線路基材。在 本實施例中,圖3A之線路基材310是以多個介電層(未 繪示)以及多個圖案化線路層(未繪示)交互堆疊所形成 的多層線路基材來進行說明。 請參考圖3B,接著’形成一導電錐330,於第一線路 圖案314上。在本實施例中,形成導電錐330,的方法包括 印刷或打線,而導電錐330’的材質包括銅膠或銀膠。 請參考圖3C ’接著’壓合一介電層320於線路基材 310上,其中導電錐330’貫穿介電層320,以構成導電結 構330。詳細而言,由於導電錐330,具有相當硬度,因此 壓合介電層320於線路基材310上時,導電錐330,的炎端 會貫穿介電層320,且導電錐3.30’的尖端會因壓合而變為 平的’即構成内埋於介電層320内的導電結構330。 在本實施例中,介電層320包括多顆觸媒顆粒322, 而這些觸媒顆粒322與前述實施例中的觸媒顆粒122或觸 媒顆粒222相同,在此不重複贅述之。當然,於其他實施 例中,介電層320的材質亦可為高分子聚合物。 請參考圖3D,接著’以一第二雷射L2在介電層320 的表面形成一凹刻圖案326 ’其中凹刻圖案326與導電結 [ si 20 1361645 0809003 29453tNvf.d〇c/n • 構330相連接。特別是,在本實施例中,當第二雷射L2 ‘ 燒蝕具有這些觸媒顆粒322的介電層32〇時,在介電層32〇 的表面上形成凹刻圖案326的同時,一些觸媒顆粒合 活化並裸露於凹刻圖案326的内面,而形成一活化層324曰。 圖3D令的這些觸媒顆粒322會以黑色或白色來表示觸媒 • 齡322是否被活化。黑色的觸媒顆粒322代表已活化的 觸媒顆粒322 (即活化層324),而白色的觸媒顆粒322則 • 代表未活化的觸媒顆粒322。在本實施例中’第二雷射£2 為紫外線雷射光源。在其他實施例中,第二雷射L2亦可 為紅外線雷射光源、準分子雷射光源或遠紅外線雷射光源。 請參考圖3E,最後,配置導電材料於凹刻圖案326 内,以形成一第一線路圖案340,其中第二線路圖案 藉由導電結構330電性連接至第一線路圖案314。在本實 施例中’形成第二線路圖案340於凹刻圖案326内的方法 包括化學沉積法。進一步而言,第二線路圖案34〇是藉由 化學沉積法形成於凹刻圖案326内的活化層324上,且這 > 些第二線路圖案340與介電層320的表面實質上切齊,換 言之,這些第二線路圖案340基本上可算是一種内埋式線 路。至此,線路板300已大致完成。 簡言之’本實施例之線路板製程,是先利用印刷或打 線的方式於線路基材310之第一線路圖案314上形成導電 錐330’,接著’壓合介電層320於線路基材31〇上以構成 導電結構330 ’之後’以第_一雷射L2於介電層320的表面 形成凹刻圖案326,最後,在利用化學沉積法來形成埋入 21 1361645 » » 0809003 29453twf.doc/n - 凹刻圖案326内的第二線路圖案340,其中第二線路圖案 . 340藉由導電結構330電性連接至第一線路圖案314,而完 成具有高密度内連線之線路板3〇〇。 本實施例之線路板製程的步驟,可以避免受限於盲孔 填孔能力的限制與製程時間長等問題。此外,本實施例之 介電層320具有多個觸媒顆粒322,當照射第二雷射L2於 介電層320表面的同時,部份的觸媒顆粒322會被活化而 • 形成活化層324,因此可直接藉由化學沉積法於凹刻圖案 326内的活化層324上形成第二線路圖案34〇,進而也擴充 了具有觸媒顆粒322之介電層32G於高密度内連線之線路 板300上的應用範圍。 綜上所述,本發明先於介電層形成連接線路基材之第 *7線路圖案的導電結構,紐,以雷射於介電層的表面形 成可埋入第二線路圖案的凹刻圖案,其中第二線路圖案藉 由導電結構電性連接至第一線路圖案,而完成具有高密度 7連線之、魏板。因此,本發a狀線路板製程,可以避免 又限分另1j於凹刻圖案内與盲孔結構中同時形成第二線路圖 案與導電結構時之填孔能力的限制與製程時間長等問題, 進而擴充了具有高密度内連線之線路板的應用範圍。 雖…;本發明已以實施例揭露如上,然其並非用以限定 本=明,任何所屬技術領域中具有通常知識者,在不脫離 t《明之精神和範圍内’當可作些許之更動與ί⑽,故本 發明之保護範圍當視後附之申請專利範圍所界定者為準。 1361645 0809003 29453twf.doc/n 【圖式簡單說明】 圖1A至圖II繪示本發明之一實施例之一種線路板製 程。 圖2A至圖2H繪示本發明之另一實施例之一種線路 板製程。 圖3A至圖3E繪示本發明之另一實施例之一種線路板 製程。 - 【主要元件符號說明】 100、200、300 :線路板 110、210、310 :線路基材 112、212、312 :上表面 114、214、314 :第一線路圖案 120、220、320 :介電層 122、222、322 :觸媒顆粒 124、224、324 :活化層 126、226、326 :凹刻圖案 130、230、330 ··導電結構 140、240 :銅箔層 150 :電鑛種子層 160 :導電層 170、260、340 :第二線路圖案 250 :導電材料 330’ :導電錐Referring to FIG. 2B, a dielectric layer 22 is formed over the wiring substrate, wherein the dielectric layer 220 covers the first surface pattern 214 of the upper surface 212 of the wiring substrate 210. In detail, in the present embodiment, the dielectric layer 22 includes a plurality of catalyst particles, and the catalyst particles are the same as those in the foregoing embodiment, and the details are not repeated herein. Of course, the material of the dielectric layer 212 may be a high molecular polymer. Referring to FIG. 2C 'then, forming a steel bar 24G in the dielectric layer 220, in the embodiment, the steel box layer 24g covers the dielectric layer, and the core is formed, and then the copper box layer is formed. Dielectric of 240 to the first shot U to form at least - an rc blind hole structure extending from the copper button 240 - the upper surface m2 blind hole structure B2 is exposed to the portion of the line substrate 2 Line pattern 2M. In the too w laser L1 can also be 4 = : ; in his embodiment, the first line of laser light source. ' " ', excimer laser source or far 1361645 0809003 29453twf.d〇c / n clear reference ® 2E ' then 'filled in a conductive material 25 〇 in the blind hole structure B2 to form a conductive structure no, which is conductive The surface of the structure no is substantially aligned with the surface of the copper falling layer 240. In this embodiment, the manner of filling the conductive material 250 in the mesh structure B2 includes printing, and the conductive material includes a metal conductive paste or a polymer conductive material, wherein the metal conductive paste can be 2, carbon glue, copper paste, silver. A paste, solder paste, or other metal material suitable for conducting electricity. In the case of Lei materials, the polymer conductive material includes a composite polymer 曰^^: Weishang molecular conductive material. The composite polymer conductive material sub-material and each residual material are obtained by filling, compounding, and the like, and the composite polymer conductive material is described as including conductive plastic, conductive rubber, conductive paint or Conductive adhesive can even be made into a transparent conductive film. The performance of the second material is the same as that of the selected lead-type 口 埴 同 / 刀 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及The conductivity has a great relationship 'where carbon fiber etc. The other 'two A powder, metal box sheet' metal fiber, itself or molecular guide material refers to the polymer material with conductive function after the polymer structure, in the pot: polystyrene includes: poly-b-block material, polynitridation Sulfur, an electronically conductive structure-structured polymer conductive material (4) The structure of the conductive polymer (4) (4), whose f-electron system passes under the action of heat or first [S] 17 1361645 0809003 29453twf.doc/n Electricity, conductance The rate is generally in the conductivity of the semi-materials _ ancient & 'and doping technology can make this iodine, the conductivity can be increased by 12 = for example, doping a small amount of sulphur in the poly-b-block, at ultra-low temperature In turn, for example, the surface of the polysilicon layer after the doping of the Zhao, which exposes the dielectric surface. The surface of the surface returning to the dielectric layer 220 is followed by a second laser L2 at a dielectric sound 220 w concave (four) case 226, where _ _ move "t ^ , 230 phase connection 1 is, in this embodiment When the second Thunder erosion has a recessed pattern formed on the interfacial surface of the catalyst particles 222: 层:: When the dielectric layer 220 is 冋, some of the catalyst particles 222 are activated. The agarite is exposed on the inner surface of the intaglio pattern 226 to form an activating layer. The catalyst particles in Fig. 2G will indicate whether the catalyst particles 222 are activated in black or white. The black catalyst particles 222 represent Activated catalyst particles 222 (ie, activation layer 224), while white catalyst particles represent unactivated catalyst particles 222. In this embodiment 'second laser L2 is an ultraviolet laser source. In other implementations For example, the second laser L2 may also be an infrared laser light source, a quasi-molecular laser light source or a far-infrared laser light source. Referring to FIG. 2H, finally, a conductive material is disposed in the concave pattern 226 to form a second a line pattern 260, wherein the second line pattern 26 is electrically connected to the first through the conductive structure 230 The line pattern 214. In the present embodiment, the method of forming the second line pattern 260 in the recess pattern 226 includes a chemical deposition method. Further, the second line pattern 260 is by 1361645. 0809003 29453twf.doc/n chemistry A deposition method is formed on the active layer 224 in the recessed pattern 226, and the second line patterns 260 are substantially aligned with the surface of the dielectric layer 220. In other words, the second line patterns 260 are substantially internal. The buried circuit 200 has been substantially completed. In short, the circuit board process of the present embodiment is to first form a conductive connection of the first line pattern 214 of the connection line substrate 210 to the dielectric layer 220 by means of printing. Structure 230, then forming a recessed pattern 226 with a second laser on the surface of the dielectric layer 22, and then forming a second line pattern 260 embedded in the recessed pattern 226 by chemical deposition. The second circuit pattern 260 is electrically connected to the first line pattern 214 ′ by the conductive structure 230 to complete the circuit board 2 具有 having a high density interconnection. The circuit board process of the embodiment can be avoided. The limitation of the hole filling capability of the second line pattern 260 and the conductive structure 2304 and the long processing time are simultaneously formed in the recessed pattern 226 and the blind via structure B2. Further, the dielectric layer of the embodiment 220 has a plurality of catalyst particles 222, and while the first laser L2 is irradiated on the surface of the dielectric layer 220, part of the catalyst particles 222 are activated to form the active layer 224, so that the chemical deposition method can be directly used. The second line pattern 260 is formed on the active layer 224 in the recess pattern 226, which in turn expands the range of applications of the dielectric layer 220 having the catalyst particles 222 on the high density interconnect wiring board 200. 3A to 3E illustrate a circuit board process according to another embodiment of the present invention. Referring first to FIG. 3A', in accordance with the circuit board process of the present embodiment, first, a wiring substrate 310 is provided. The wiring substrate 310 has an upper surface μ and a 1361645 0S09003 29453 twf.doc/n a first line pattern 314 'where the first line pattern 314 is located on the upper surface 312, that is, the first line pattern 314 can be regarded as a general Line (ie non-embedded line). It is worth mentioning that the structure of the wiring substrate 310 may have only a single wiring layer or a multilayer wiring layer. That is, the wiring substrate 31〇 may be a single-layer wiring substrate, a two-layer wiring substrate, or a multilayer wiring substrate. In the present embodiment, the wiring substrate 310 of FIG. 3A is described by a plurality of dielectric layers (not shown) and a plurality of patterned wiring layers (not shown) alternately stacked to form a multilayer wiring substrate. Referring to FIG. 3B, a conductive cone 330 is formed on the first line pattern 314. In this embodiment, the method of forming the conductive cone 330 includes printing or wire bonding, and the material of the conductive cone 330' includes copper or silver glue. Referring to FIG. 3C', a dielectric layer 320 is then pressed onto the wiring substrate 310, wherein the conductive cone 330' extends through the dielectric layer 320 to form the conductive structure 330. In detail, since the conductive cone 330 has a relatively high hardness, when the dielectric layer 320 is pressed onto the circuit substrate 310, the luminescent end of the conductive cone 330 penetrates through the dielectric layer 320, and the tip of the conductive cone 3.30' The flat structure formed by the press-forming constitutes the conductive structure 330 buried in the dielectric layer 320. In this embodiment, the dielectric layer 320 includes a plurality of catalyst particles 322, and the catalyst particles 322 are the same as the catalyst particles 122 or the catalyst particles 222 in the foregoing embodiment, and the details are not described herein. Of course, in other embodiments, the material of the dielectric layer 320 may also be a high molecular polymer. Referring to FIG. 3D, then a recessed pattern 326 ' is formed on the surface of the dielectric layer 320 by a second laser L2. The recessed pattern 326 and the conductive junction [ si 20 1361645 0809003 29453tNvf.d〇c/n • 330 connected. In particular, in the present embodiment, when the second laser L2' ablates the dielectric layer 32B having the catalyst particles 322, while forming the intaglio pattern 326 on the surface of the dielectric layer 32A, some The catalyst particles are activated and exposed to the inner face of the intaglio pattern 326 to form an active layer 324A. These catalyst particles 322 of Figure 3D indicate the catalyst in black or white. • Age 322 is activated. The black catalyst particles 322 represent the activated catalyst particles 322 (i.e., the activation layer 324), while the white catalyst particles 322 represent the unactivated catalyst particles 322. In the present embodiment, the second laser £2 is an ultraviolet laser light source. In other embodiments, the second laser L2 may also be an infrared laser source, a quasi-molecular laser source, or a far-infrared laser source. Referring to FIG. 3E, finally, a conductive material is disposed in the recess pattern 326 to form a first line pattern 340, wherein the second line pattern is electrically connected to the first line pattern 314 by the conductive structure 330. The method of forming the second line pattern 340 in the intaglio pattern 326 in the present embodiment includes a chemical deposition method. Further, the second line pattern 34 is formed on the active layer 324 in the recess pattern 326 by a chemical deposition method, and the second line pattern 340 is substantially aligned with the surface of the dielectric layer 320. In other words, these second line patterns 340 can basically be regarded as a buried line. At this point, the circuit board 300 has been substantially completed. In short, the circuit board process of the present embodiment first forms a conductive cone 330' on the first line pattern 314 of the circuit substrate 310 by means of printing or wire bonding, and then 'presss the dielectric layer 320 on the circuit substrate. After forming the conductive structure 330', the recessed pattern 326 is formed on the surface of the dielectric layer 320 by the first laser L2, and finally, the buried layer is formed by chemical deposition. 21 1361645 » » 0809003 29453twf.doc /n - a second line pattern 340 in the recess pattern 326, wherein the second line pattern 340 is electrically connected to the first line pattern 314 by the conductive structure 330 to complete the wiring board 3 having the high density interconnection. Hey. The circuit board process of the embodiment can avoid the limitation of the blind hole filling ability and the long process time. In addition, the dielectric layer 320 of the present embodiment has a plurality of catalyst particles 322. When the second laser L2 is irradiated on the surface of the dielectric layer 320, part of the catalyst particles 322 are activated to form the active layer 324. Therefore, the second line pattern 34〇 can be formed directly on the active layer 324 in the recess pattern 326 by chemical deposition, thereby further expanding the line of the dielectric layer 32G having the catalyst particles 322 in the high-density interconnect. The range of applications on the board 300. In summary, the present invention forms a conductive structure of a *7 line pattern connecting the wiring substrate prior to the dielectric layer, and forms an intaglio pattern embedding the second line pattern on the surface of the dielectric layer by laser. The second line pattern is electrically connected to the first line pattern by the conductive structure, and the Wei board having the high density of 7 lines is completed. Therefore, the a-type circuit board process of the present invention can avoid the problem of limiting the hole filling ability and the long processing time when the second line pattern and the conductive structure are simultaneously formed in the recessed pattern and the blind hole structure. This further expands the range of applications for circuit boards with high-density interconnects. The present invention has been disclosed in the above embodiments, but it is not intended to limit the scope of the present invention. Anyone having ordinary knowledge in the art can make a few changes without departing from the spirit and scope of the present invention. ί (10), the scope of protection of the present invention is defined by the scope of the appended claims. 1361645 0809003 29453twf.doc/n [Simplified Schematic] FIG. 1A to FIG. II illustrate a circuit board process according to an embodiment of the present invention. 2A to 2H illustrate a circuit board process according to another embodiment of the present invention. 3A to 3E illustrate a circuit board process according to another embodiment of the present invention. - [Major component symbol description] 100, 200, 300: circuit board 110, 210, 310: wiring substrate 112, 212, 312: upper surface 114, 214, 314: first wiring pattern 120, 220, 320: dielectric Layers 122, 222, 322: catalyst particles 124, 224, 324: activation layers 126, 226, 326: intaglio patterns 130, 230, 330 · conductive structures 140, 240: copper foil layer 150: electric ore seed layer 160 : Conductive layer 170, 260, 340: second line pattern 250: conductive material 330': conductive cone
Bl、B2 :盲子U吉構 L1 :第一雷射 L2 :第二雷射 [S] 23Bl, B2: blind U-shaped L1: first laser L2: second laser [S] 23
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TW97144964A TWI361645B (en) | 2008-11-20 | 2008-11-20 | Process of fabricating circuit board |
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TW97144964A TWI361645B (en) | 2008-11-20 | 2008-11-20 | Process of fabricating circuit board |
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TWI361645B true TWI361645B (en) | 2012-04-01 |
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TWI392430B (en) * | 2010-10-20 | 2013-04-01 | Unimicron Technology Corp | Method for fabricating wiring bord |
TWI494037B (en) * | 2010-11-26 | 2015-07-21 | 欣興電子股份有限公司 | Wiring bord and method for fabricating the same |
TW201352095A (en) | 2012-06-11 | 2013-12-16 | Unimicron Technology Corp | Circuit board and manufacturing method thereof |
TWI607678B (en) * | 2015-01-06 | 2017-12-01 | 欣興電子股份有限公司 | Interconnection structure and method of manufacturing the same |
US9859159B2 (en) | 2015-03-10 | 2018-01-02 | Unimicron Technology Corp. | Interconnection structure and manufacturing method thereof |
CN112449497B (en) * | 2019-08-28 | 2022-04-12 | 深南电路股份有限公司 | Method for processing carbide of printed circuit board and water jet device |
CN112449512A (en) * | 2019-08-30 | 2021-03-05 | 嘉联益电子(昆山)有限公司 | Multi-layer flexible circuit board and manufacturing method thereof |
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