200813826 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種硬碟啟動時序控制電路，特別是 指一種SATAII硬碟啟動時序控制電路。 【先前技術】 為滿足大量資料儲存的應用需求，由多個硬碟組成的 磁碟陣列（DISK ARRAY)因應而生。因此，在磁碟陣列中， 若沒有做任何硬碟開機時序控制，且電源供應器提供的功率 不足時，當全部硬碟同時被啟動時，則容易導致電源供應器 因瞬間負載過大而跳機。 因此，新一代的SATAII硬碟即支援交錯啟動模式 (STAGGERED SPIN UP)功能，其作用為當電腦系統同時使 用複數SATAII硬碟10，如圖1所示，在電腦系統啟動後， 電源供應器11會分別送電給該等SATAII硬碟10，此時 SATAII硬碟10被供電後並不會立刻啟動，而是等待來自中 央處理器12之指令，因此，中央處理器12需執行一軟體驅 動程式（圖未示）並透過南/北橋13對該等SATAII硬碟10下 指令，控制該等SATAII硬碟10交錯啟動，使其啟動時間 相互錯開，而避免電源供應器不致承受硬碟同時啟動之過大 電流。200813826 IX. Description of the Invention: [Technical Field] The present invention relates to a hard disk boot timing control circuit, and more particularly to a SATAII hard disk boot timing control circuit. [Prior Art] In order to meet the application requirements of a large amount of data storage, a disk array composed of a plurality of hard disks (DISK ARRAY) was born. Therefore, in the disk array, if there is no hard disk boot timing control and the power provided by the power supply is insufficient, when all the hard disks are simultaneously activated, it is easy to cause the power supply to trip due to excessive transient load. . Therefore, the new generation of SATAII hard disk supports the STAGGERED SPIN UP function, which is used when the computer system uses multiple SATAII hard disks 10 at the same time, as shown in Figure 1, after the computer system is started, the power supply 11 The SATAII hard disk 10 is separately powered. When the SATAII hard disk 10 is powered, it does not start immediately, but waits for an instruction from the central processing unit 12. Therefore, the central processing unit 12 needs to execute a software driver ( The figure is not shown) and the SATAII hard disk 10 commands are controlled by the south/north bridge 13 to control the staggered startup of the SATAII hard disks 10, so that the startup time is staggered from each other, and the power supply is prevented from being overwhelmed by the hard disk at the same time. Current.
然而，上述之軟體驅動程式目前只支援X86電腦系統 ，並沒有支援嵌入式系統。因此，當SATAII硬碟應用在嵌 入式系統（例如MIP64)時，現行有兩種方法控制複數 SATAII硬碟啟動：（1)另行開發適用於嵌式入系統之SATAII 200813826 ^ 硬碟驅動軟體；（2)選擇能夠承受多個硬碟同時啟動之大功 率電源供應器。其中，採用第（1)種方式需要研發人員投入 _ 長時間開發驅動軟體，採用第（2)種方式雖能節省開發驅動 軟體的時間，卻相對增加產品的成本。 【發明内容】 本發明之目的，係在提供一種以硬體線路控制複數 SATAII硬碟錯開啟動，以避免電源供應器過負載並進而降 低電源供應器成本之SATAII硬碟啟動時序控制電路。 _ 於是，本發明SATAII硬碟啟動時序控制電路，與複數 硬碟連接器電連接，用以控制插接在該等硬碟連接器之複 數SATAII硬碟的啟動時序，且SATAII硬碟具有一由驅動 軟體控制啟動之交錯啟動模式；該電路包括複數電源控制 單元、複數開關元件及一硬碟控制器。該等電源控制單元 ，與該等硬碟連接器一對一電連接，用以控制電源是否輸 出給插接在各該硬碟連接器之SATAII硬碟。該等開關元件 與該等硬碟連接器一對一電連接。該等硬碟控制器與該等 φ 電源控制單元、該等硬碟連接器及該等開關元件電連接， 用以偵測該等硬碟連接器是否插接SATAII硬碟，並於測得 複數硬碟連接器插接SATAII硬碟時，透過相對應之開關元 件將該等SATAII硬碟之交錯啟動模式禁能後，令相對應之 電源控制單元錯開供電給該等STATII硬碟。藉此，避免電 ^ 源供應器因多個SATAII硬碟同時啟動而過負載，並降低電 源供應器之成本。 【實施方式】 6 200813826 有關本發明之前述及其他技術内容、特點與功效，在 以下配合參考圖式之一個較佳實施例的詳細說明中，將可 清楚的呈現。 參閱圖2所示，是本發明SATAII硬碟啟動時序控制電 路的一較佳實施例，其設在例如一般X86系統或嵌入式系 統等電腦系統之主機板上，用以控制與複數硬碟連接器20 電連接（插接）之複數SATAII硬碟21的啟動時序，使該等 SATAII;.硬碟21 :可以錯開啟動。其中SATAII硬碟:2U的、特性， 之一為具有一可被一驅動軟體控制啟動的交錯啟動模式 (STAGGERED SPIN UP)，亦即，——般當 SATAII 硬碟 21 被 供電後，並不會立即啟動，而是會等到收到驅動軟體的控 制訊號後才會啟動。且該交錯啟動模式是由SATAII硬碟21 内部的一特定接腳（SATAII硬碟21的第11隻接腳，以下以 P11表示）決定，且該接腳P11 —開始（出廠時）即被預設為致 能交錯啟動模式。 本實施例之SATAII硬碟啟動時序控制電路3包括複數 電源控制單元31、複數開關元件32以及一硬碟控制器33 〇 •該等電源控制單元31的數目與硬碟連接器20數目相 同，並一對一地電連接，亦即一顆SATAII硬碟21要搭配 一個電源控制單元31，且電源控制單元31的一端電連接硬 碟控制器33，以受硬碟控制器33控制，其另一端連接硬碟 連接器20，以根據硬碟控制器33之命令決定是否供電給插 置在硬碟連接器20之SATAII硬碟21。 7 200813826 各電源控制單元3i包括—電源控制器3 挪、期。開關元件SWy的〜二=、 源供應器22,以取得電源供應器22提供之+ 電 似v電源’其另一端連接硬碟連接器、2〇，以八及 控制器34控制而適時將電源透過硬碟連接Γ0原、 SATAII 硬碟 21。 20 送至 該等開關元件32的數且與硬碟連接器2However, the above software driver currently only supports X86 computer systems and does not support embedded systems. Therefore, when SATAII hard disk is used in an embedded system (such as MIP64), there are two ways to control multiple SATAII hard disk boot: (1) separately develop SATAII 200813826 ^ hard disk drive software for embedded system; 2) Select a high-power power supply that can withstand multiple hard disks simultaneously. Among them, adopting the (1) method requires R&D personnel to invest _ long-term development of driver software. Although the second method can save time in developing driver software, it increases the cost of the product. SUMMARY OF THE INVENTION The object of the present invention is to provide a SATAII hard disk boot timing control circuit that controls a plurality of SATAII hard disk staggered start-ups by hardware lines to avoid overloading the power supply and thereby reducing the cost of the power supply. _ Thus, the SATAII hard disk boot timing control circuit of the present invention is electrically connected to a plurality of hard disk connectors for controlling the boot timing of the plurality of SATAII hard disks inserted in the hard disk connectors, and the SATAII hard disk has a The staggered startup mode of the driver software control startup; the circuit includes a plurality of power supply control units, a plurality of switching elements, and a hard disk controller. The power control units are electrically connected one-to-one with the hard disk connectors for controlling whether the power is output to the SATAII hard disk plugged into each of the hard disk connectors. The switching elements are electrically connected one to one to the hard disk connectors. The hard disk controllers are electrically connected to the φ power control unit, the hard disk connectors and the switching elements for detecting whether the hard disk connectors are connected to the SATAII hard disk, and the plurality of hard disks are measured. When the hard disk connector is plugged into the SATAII hard disk, the corresponding power supply control unit is staggered to supply the STATII hard disk after the SATAII hard disk interleaving activation mode is disabled through the corresponding switching element. In this way, the power supply is prevented from being overloaded due to simultaneous startup of multiple SATAII hard disks, and the cost of the power supply is reduced. [Embodiment] 6 200813826 The foregoing and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments. Referring to FIG. 2, a preferred embodiment of the SATAII hard disk boot timing control circuit of the present invention is provided on a motherboard of a computer system such as a general X86 system or an embedded system for controlling connection with a plurality of hard disks. The boot timing of the plurality of SATAII hard disks 21 electrically connected (plugged) to enable the SATA II; hard disk 21: can be turned on and started. One of the SATAII hard disks: 2U, one of which has a STAGGERED SPIN UP that can be activated by a driver software, that is, when the SATAII hard disk 21 is powered, it will not Start immediately, but will wait until the control signal of the driver software is received. And the interleaved startup mode is determined by a specific pin inside the SATAII hard disk 21 (the 11th pin of the SATAII hard disk 21, the following is indicated by P11), and the pin P11 is started (when shipped). Set to enable interlaced start mode. The SATAII hard disk boot timing control circuit 3 of the present embodiment includes a plurality of power supply control units 31, a plurality of switching elements 32, and a hard disk controller 33. The number of the power control units 31 is the same as the number of the hard disk connectors 20, and One-to-one electrical connection, that is, a SATAII hard disk 21 is matched with a power control unit 31, and one end of the power control unit 31 is electrically connected to the hard disk controller 33 to be controlled by the hard disk controller 33, and the other end thereof The hard disk connector 20 is connected to determine whether or not power is supplied to the SATAII hard disk 21 inserted in the hard disk connector 20 in accordance with a command from the hard disk controller 33. 7 200813826 Each power control unit 3i includes - the power controller 3 is moved. 〜2= of the switching element SWy, the source supplier 22, to obtain the power supply provided by the power supply 22, and the other end is connected to the hard disk connector, 2〇, and controlled by the controller 34 and timely Connect the original 0, SATAII hard disk 21 through the hard disk. 20 to the number of the switching elements 32 and to the hard disk connector 2
2對i也電連接’各開關元件32的一端分別電連接： 碟連接器20的-接腳P11，，該接腳pu，會與插 ^ 接=〇之SATAn硬確的接腳pu電連接，開關元件= 另念而接地。各開關讀32之開（〇n)/關（卿)動作受硬碟 控制器33控制’且開關元件”未受硬碟控制器33控制前 ，其初始㈣（預設狀態）為關（卿），巾插接在硬碟連接哭 20上之SATAII硬碟的接腳m維持在致能交錯啟動模式之 預設狀態。 硬碟控制器33與料電源控制單元31、該等硬碟連接 益20及5亥等關兀件32 f：連接，以才空制複數SATAn硬碟 20啟動。因此，以控制N (N=12、24或更多）ΜΑΤΑπ硬 碟為例’硬碟控制器33至少需包含Ν個控制接腳 CTRL一ΕΝ一 1 〜CTRL一ΕΝ—Ν，Ν 個 貞測接腳 SATA一DET一 1 〜 SATA—DET一N，以及N個關閉交錯啟動功能接腳 STAGGERED一OFF—1 〜STAGGERED一〇FF__N 〇 其中，N 個控 制接腳CTRL—EN-1〜CTRL JEN 一N分別一對一連接至N個 8 200813826 電源控制單元31，用以控制電源控制單元31供電與否。N 個偵測接腳SΑΤΑ一DET-1〜SΑΤΑ—DET—N分別一對一連接至 Ν個硬碟連接器20，用以偵測該等硬碟連接器20是否有插 接SATAII硬碟21。Ν個關閉交錯啟動功能接腳 STAGGERED一OFF一 1 〜STAGGERED一OFF一Ν 與 Ν 個開關元 件32 —對一連接，用以透過該等開關元件32將SATAII硬 碟21之交錯啟動模式（STAGGERED SPIN UP)禁能。 以硬碟連接器、20的數目為N=12且皆插接有S ATAII硬 碟21為例，當電腦系統（例如嵌入式系統)啟動後，硬碟控 制器33透過N個偵測接腳SATA—DET一 1〜SATA—DET—N分 別偵測N個硬碟連接器20，並於發現該等硬碟連接器20皆 插接SATAII硬碟21時，其透過N個關閉交錯啟動功能接2 pairs of i are also electrically connected to one end of each of the switching elements 32 are electrically connected: the pin P11 of the disk connector 20, the pin pu, which is electrically connected with the SATAn hard pin pu of the plug==〇 , switching element = another way to ground. The opening (〇n)/off (clear) action of each switch read 32 is controlled by the hard disk controller 33 and the switching element is not controlled by the hard disk controller 33, and its initial (four) (preset state) is off (clear) ), the pin m of the SATAII hard disk inserted into the hard disk connection crying 20 is maintained in the preset state of enabling the staggered start mode. The hard disk controller 33 and the material power control unit 31, the hard disk connection benefits 20 and 5 hai and other related parts 32 f: connection, to start the SATAn hard disk 20 to start. Therefore, to control N (N = 12, 24 or more) ΜΑΤΑ π hard disk as an example 'hard disk controller 33 At least one control pin CTRL1ΕΝ1~CTRL一ΕΝ—Ν, 贞 贞 接 SATA D D SATA SATA SATA SATA SATA SATA SATA SATA SATA 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 , , , S S S S S S S S S —1 〜STAGGERED一〇FF__N 〇 Among them, N control pins CTRL_EN-1 CTRLJEN-N are respectively connected one-to-one to N 8 200813826 power control unit 31 for controlling power supply control unit 31 to supply power or not N detection pins SΑΤΑ-DET-1~SΑΤΑ-DET-N are connected one to one to one hard disk connector 2 0, for detecting whether the hard disk connector 20 is plugged into the SATAII hard disk 21. One of the closed interleaving function pins STAGGERED - OFF - 1 ~ STAGGERED - OFF - Ν and 开关 one switching element 32 - one The connection is for disabling the STAGGERED SPIN UP mode of the SATAII hard disk 21 through the switching elements 32. The number of the hard disk connectors, 20 is N=12, and the S ATAII hard disk 21 is plugged in. For example, after the computer system (for example, the embedded system) is started, the hard disk controller 33 detects the N hard disk connectors 20 through the N detection pins SATA-DET-1 to SATA-DET-N, respectively. When it is found that the hard disk connectors 20 are all connected to the SATAII hard disk 21, they are connected through N closed interleaving functions.
腳 STAGGERED一OFF一 1 〜STAGGERED一0FF—N 分別控制 N 個開關元件32開（ON)，使將N個SATAII硬碟21之接腳 P11接地，而將N個SATAII硬碟21之交錯啟身模式 (STAGGERED SPIN UP)同時禁能，使該N個SATAII硬碟 21不需再等待驅動程式的啟動控制。 然後，硬碟控制器33透過N個控制接腳CTRLJN J〜 CTRL-ΕΝ一N分別控制N個電源控制單元31，使N ·個電源 控制單元31相錯開地（依序或不依序）供電給ν個SATAII硬 碟20，而將N個SATAII硬碟20錯開啟動。例如，硬碟控 制器33可令控制接腳CTRL—EN-1〜CTRL—EN一6先送出訊 號控制第1〜N個電源控制單元31送電給第〗〜N個SATAII 硬碟 20 ，然後再令控制接腳 CTRL_en_7〜 200813826 CTRL_EN—N(N=12)送出訊號控制第7〜N(N=12)個電源控制 單元31送電給第7〜N(N=12)個SATAII硬碟20，而分批將 N個SATAII硬碟21啟動，且由圖3顯示之實測結果可知 ，電源供應器22供應12V電源時，分兩次啟動最高電流為 10A，穩定後為5A ;由圖4顯示之實測結果可知，電源供 應器22供應5V電源時，分兩次啟動最高電流為8A，穩定 後為6.2A。如此，電源供應器22即不需負載12顆SATAII 硬碟21同時啟動時造成之高電流負載（即圖·3及圖4之前後 兩次啟動電流相加），確實能有效避免電源供應器22過負載 之情況發生。 當然，依照上述方式，硬碟控制器33亦可根據採用之 電源供應器22的功率大小，將SATAII硬碟21分更多次錯 開啟動，甚至單次僅啟動單一 SATAII硬碟。 此外，為易於查覺SATAII硬碟21啟動與否，本實施 例更包括N個點燈單元35，其一端分別連接一電源（+5V)， 另一端一對一地連接N個硬碟連接器20之接腳Ρ1Γ。各點 燈單元35是一發光二極體電路，其包括一延遲元件351、 一發光二極體352、一第一電阻R1及一第二電阻R2 ;延遲 元件351的一第一端連接硬碟連接器21，發光二極體352 的N極與延遲元件351的一第二端連接，其P極與第一電 阻R1 —端連接，第一電阻R1另一端連接電源(+5V)，第二 電阻R2的一端連接電源（+5V)，另一端連接延遲元件351 的第一端。 當N個SATAII硬碟21被啟動後，硬碟控制器33會透 10 200813826 過N個關閉交錯啟動功能接腳STAGGERED—OFF—1〜 STAGGERED—OFF_N控制1^個開關元件32關（0??)，使 SATAII硬碟21之接腳P11回復至致能交錯啟動模式之預設 狀態，同時將點燈單元35之發光二極體352點亮。因此， 藉由觀查發光二極體352點亮與否，即可輕易得知SATAII 硬碟啟動與否。 由上述說明可知，本發明藉由硬體線路控制複數 SATAII硬碟錯開啟動，.不但可防止電源供應器因全部: B SATAII硬碟同時啟動而過負載，而且對於嵌入式系統而言 ，節省另外開發控制SATAII硬碟交錯啟動之驅動程式的時 間及人力，並且藉由適當控制分批啟動的次數，可使用較 低功專的電源供應器即可，而相對降低產品之成本。 惟以上所述者，僅為本發明之較佳實施例而已，當不 能以此限定本發明實施之範圍，即大凡依本發明申請專利 範圍及發明說明内容所作之簡單的等效變化與修飾，皆仍 屬本發明專利涵蓋之範圍内。 • 【圖式簡單說明】 圖1是習知以驅動軟體驅動SATAII硬碟交錯啟動的硬 體線路示意圖； 圖2是本發明SATAII硬碟啟動時序控制電路的一較佳 實施例之電路不意圖； 圖3是本實施例分兩批錯開啟動SATAII硬碟時，電源 供應器供應12V電源時測得之啟動電流示意圖；及 圖4是本實施例分兩批錯開啟動SATAII硬碟時，電源 200813826 供應器供應5V電源時測得之啟動電流示意圖。The foot STAGGERED_OFF-1~STAGGERED_0FF-N respectively controls the N switching elements 32 to be turned ON, so that the pins P11 of the N SATAII hard disks 21 are grounded, and the N SATAII hard disks 21 are staggered. The mode (STAGGERED SPIN UP) is disabled at the same time, so that the N SATAII hard disks 21 do not need to wait for the startup control of the driver. Then, the hard disk controller 33 controls the N power supply control units 31 through the N control pins CTRLJN J~ CTRL-ΕΝN, respectively, so that the N power control units 31 are staggered (sequentially or not sequentially) to supply power to the N power control units 31. ν SATAII hard disk 20, and the N SATAII hard disk 20 is staggered to start. For example, the hard disk controller 33 can cause the control pins CTRL_EN-1~CTRL-EN-6 to send the signal first to control the 1st to Nth power control units 31 to send power to the first to N SATAII hard disks 20, and then Let the control pins CTRL_en_7~200813826 CTRL_EN_N (N=12) send the signal control 7th to Nth (N=12) power supply control units 31 to send power to the 7th to Nth (N=12) SATAII hard disks 20, and The N SATAII hard disks 21 are started in batches, and the measured results shown in FIG. 3 show that when the power supply 22 supplies 12V power, the maximum current is 10A in two starts and 5A after stabilization; the actual measurement is shown in FIG. As a result, it can be seen that when the power supply 22 supplies the 5V power supply, the maximum current is 8 A in two starts and 6.2 A after stabilization. In this way, the power supply 22 does not need to load a load of 12 SATAII hard disks 21 at the same time, and the high current load (ie, the sum of the two start currents before and after FIG. 3 and FIG. 4) can effectively avoid the power supply 22 Overloading occurs. Of course, in the above manner, the hard disk controller 33 can also start the SATAII hard disk 21 more times depending on the power level of the power supply 22 used, and even start a single SATAII hard disk in a single operation. In addition, in order to easily detect whether the SATAII hard disk 21 is activated or not, the embodiment further includes N lighting units 35, one end of which is respectively connected to a power supply (+5V), and the other end is connected to the N hard disk connectors one-to-one. 20 pin Ρ 1 Γ. Each of the lighting units 35 is a light emitting diode circuit including a delay element 351, a light emitting diode 352, a first resistor R1 and a second resistor R2; a first end of the delay element 351 is connected to the hard disk. The connector 21, the N pole of the LED 352 is connected to a second end of the delay element 351, the P pole is connected to the first resistor R1, and the other end of the first resistor R1 is connected to the power supply (+5V), the second One end of the resistor R2 is connected to the power source (+5V), and the other end is connected to the first end of the delay element 351. When N SATAII hard disks 21 are booted, the hard disk controller 33 will pass through 10 200813826 through N closed interleaving function pins STAGGERED-OFF-1 to STAGGERED-OFF_N control 1^ switching elements 32 off (0?? ), the pin P11 of the SATAII hard disk 21 is returned to the preset state of the enable staggered start mode, and the light emitting diode 352 of the lighting unit 35 is illuminated. Therefore, by checking whether the LED 352 is lit or not, it is easy to know whether the SATAII hard disk is activated or not. It can be seen from the above description that the present invention controls multiple SATAII hard disk staggered startups by hardware lines, which not only prevents the power supply from being overloaded due to all: B SATAII hard disk is simultaneously activated, and saves another for embedded systems. Develop the time and labor to control the SATAII hard drive interleaved driver, and by properly controlling the number of batch startups, you can use a lower power supply to reduce the cost of the product. The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a hardware circuit for driving a software-driven SATAII hard disk interleaved boot; FIG. 2 is a circuit diagram of a preferred embodiment of the SATAII hard disk boot timing control circuit of the present invention; 3 is a schematic diagram of the startup current measured when the power supply is supplied with a 12V power supply when the SATAII hard disk is started by two batches in this embodiment; and FIG. 4 is a power supply 200813826 supply when the SATAII hard disk is started by two batches in this embodiment. Schematic diagram of the starting current measured when the 5V power supply is supplied.
12 200813826 【主要元件符號說明】 20硬碟連接器 22電源供應器 21 SATAII 硬碟 3 SATAII硬碟啟動時序控制電路 31電源控制單元 32開關元件 33硬碟控制器 35點燈單元 34電源控制器 351延遲元件 352發光二極體 R1第一電阻 R2第二電阻 P11、Ρ1Γ 接腳 SW1、SW2、SW3開關元件 CTRL_EN_1〜N控制接腳 SATA—DET—1〜N偵測接腳 STAGGERED_OFF—1〜N關閉交錯啟動功能接腳 1312 200813826 [Main component symbol description] 20 hard disk connector 22 power supply 21 SATAII hard disk 3 SATAII hard disk boot timing control circuit 31 power supply control unit 32 switching element 33 hard disk controller 35 lighting unit 34 power supply controller 351 Delay element 352 light-emitting diode R1 first resistor R2 second resistor P11, Ρ1Γ pin SW1, SW2, SW3 switching element CTRL_EN_1~N control pin SATA_DET-1~N detection pin STAGGERED_OFF-1~N off Interleaved start function pin 13