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TW200701303A - A substrate and a method for polishing a substrate - Google Patents

A substrate and a method for polishing a substrate

Info

Publication number
TW200701303A
TW200701303A TW095110977A TW95110977A TW200701303A TW 200701303 A TW200701303 A TW 200701303A TW 095110977 A TW095110977 A TW 095110977A TW 95110977 A TW95110977 A TW 95110977A TW 200701303 A TW200701303 A TW 200701303A
Authority
TW
Taiwan
Prior art keywords
substrate
polishing
less
polishing pad
layer
Prior art date
Application number
TW095110977A
Other languages
English (en)
Other versions
TWI315886B (en
Inventor
Kazuyoshi Nakamura
Toshihide Nakajima
Kousuke Nakajima
Takahisa Oonami
Original Assignee
Ohara Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ohara Kk filed Critical Ohara Kk
Publication of TW200701303A publication Critical patent/TW200701303A/zh
Application granted granted Critical
Publication of TWI315886B publication Critical patent/TWI315886B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • B24B37/24—Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Polishing Bodies And Polishing Tools (AREA)
TW095110977A 2005-04-08 2006-03-29 A substrate and a method for polishing a substrate TWI315886B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005112070 2005-04-08

Publications (2)

Publication Number Publication Date
TW200701303A true TW200701303A (en) 2007-01-01
TWI315886B TWI315886B (en) 2009-10-11

Family

ID=36645621

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095110977A TWI315886B (en) 2005-04-08 2006-03-29 A substrate and a method for polishing a substrate

Country Status (7)

Country Link
US (1) US7553768B2 (zh)
EP (1) EP1710045B1 (zh)
KR (1) KR100850732B1 (zh)
CN (1) CN1845007B (zh)
AT (1) ATE417700T1 (zh)
DE (1) DE602006004241D1 (zh)
TW (1) TWI315886B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI396003B (zh) * 2009-07-30 2013-05-11 Au Optronics Corp 顯示面板及其邊框窄化、邊緣強度提昇方法

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5065574B2 (ja) * 2005-01-12 2012-11-07 住友電気工業株式会社 ＧａＮ基板の研磨方法
US20080318066A1 (en) * 2007-05-11 2008-12-25 Asml Holding N.V. Optical Component Fabrication Using Coated Substrates
US20080280539A1 (en) * 2007-05-11 2008-11-13 Asml Holding N.V. Optical component fabrication using amorphous oxide coated substrates
JP2008293552A (ja) * 2007-05-22 2008-12-04 Fujitsu Ltd 基板、磁気記録媒体及びその製造方法、並びに磁気記憶装置
JP5073835B2 (ja) 2008-11-26 2012-11-14 Ｈｏｙａ株式会社 マスクブランク用基板
US8772817B2 (en) 2010-12-22 2014-07-08 Cree, Inc. Electronic device submounts including substrates with thermally conductive vias
CN107428599B (zh) * 2015-02-02 2020-10-27 康宁股份有限公司 强化层压玻璃制品边缘的方法及由此形成的层压玻璃制品
CN105842898B (zh) * 2016-05-30 2023-06-02 京东方科技集团股份有限公司 显示面板的制造方法和装置
JP7219009B2 (ja) * 2018-03-27 2023-02-07 株式会社荏原製作所 基板保持装置およびドライブリングの製造方法
CN114527592A (zh) * 2020-11-23 2022-05-24 群创光电股份有限公司 电子装置及其制造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6648733B2 (en) * 1997-04-04 2003-11-18 Rodel Holdings, Inc. Polishing pads and methods relating thereto
GB2334205B (en) * 1998-02-12 2001-11-28 Shinetsu Handotai Kk Polishing method for semiconductor wafer and polishing pad used therein
US6159643A (en) * 1999-03-01 2000-12-12 Advanced Micro Devices, Inc. Extreme ultraviolet lithography reflective mask
ATE360051T1 (de) * 1999-08-13 2007-05-15 Cabot Microelectronics Corp Poliersystem und verfahren zu seiner verwendung
JP3664676B2 (ja) * 2001-10-30 2005-06-29 信越半導体株式会社 ウェーハの研磨方法及びウェーハ研磨用研磨パッド
JP2003257910A (ja) * 2001-12-28 2003-09-12 Fujikoshi Mach Corp 基板における銅層の研磨方法
AU2003272674A1 (en) * 2002-09-25 2004-04-19 Ppg Industries Ohio, Inc. Polishing pad for planarization
JP4234991B2 (ja) * 2002-12-26 2009-03-04 Ｈｏｙａ株式会社 情報記録媒体用ガラス基板の製造方法及びその製造方法によって製造される情報記録媒体用ガラス基板
DE10302342A1 (de) * 2003-01-17 2004-08-05 Schott Glas Substrat für die EUV-Mikrolithographie und Herstellverfahren hierfür
JP4790973B2 (ja) * 2003-03-28 2011-10-12 Ｈｏｙａ株式会社 研磨パッドを使用した情報記録媒体用ガラス基板の製造方法及びその方法で得られた情報記録媒体用ガラス基板
US7654885B2 (en) * 2003-10-03 2010-02-02 Applied Materials, Inc. Multi-layer polishing pad

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI396003B (zh) * 2009-07-30 2013-05-11 Au Optronics Corp 顯示面板及其邊框窄化、邊緣強度提昇方法
US8854591B2 (en) 2009-07-30 2014-10-07 Au Optronics Corporation Display panel and method for narrowing edges and increasing edge strength thereof

Also Published As

Publication number Publication date
DE602006004241D1 (de) 2009-01-29
ATE417700T1 (de) 2009-01-15
TWI315886B (en) 2009-10-11
CN1845007B (zh) 2011-04-13
US7553768B2 (en) 2009-06-30
EP1710045A1 (en) 2006-10-11
KR100850732B1 (ko) 2008-08-06
US20060226124A1 (en) 2006-10-12
KR20060107319A (ko) 2006-10-13
CN1845007A (zh) 2006-10-11
EP1710045B1 (en) 2008-12-17

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees
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