KR100728982B1 - Phase change memory device and manufacturing method thereof - Google Patents

Abstract

The present invention discloses a phase change memory device and a method of manufacturing the same. A phase change memory device according to the present invention includes a semiconductor substrate having a lower pattern and having a first interlayer insulating film formed to cover the lower pattern; A contact plug formed in the first interlayer insulating film; A lower electrode formed in the form of a pattern on the first interlayer insulating film including the contact plug; A second interlayer insulating film formed on the first interlayer insulating film to cover the lower electrode; A phase conversion film formed in the form of a plug in contact with the edge of the lower electrode in the second interlayer insulating film; And an upper electrode formed on the second interlayer insulating film including the phase conversion film.

Description

Phase change RAM device and method of manufacturing the same

1 and 2 are cross-sectional views showing conventional phase change memory elements.

3 is a cross-sectional view showing a phase change memory device of the present invention.

4A through 4D are cross-sectional views illustrating processes of manufacturing a phase change memory device according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

31 semiconductor substrate 40 interlayer insulating film

41a: contact plug 41: lower electrode

42: phase conversion film 43: upper electrode

44: insulating film 45: metal wiring

50: protective insulating film

The present invention relates to a phase change memory device, and more particularly, to a phase that can easily secure stable contact between a phase change film and an electrode while reducing current required for phase change by suppressing thermal diffusion from the phase change film. A conversion memory element and a method of manufacturing the same.

The memory device is a volatile random access memory (RAM) device that loses input information when the power is cut off, and a read only memory (ROM) device that maintains the storage state of the input information even when the power is cut off. It is largely divided. The volatile RAM devices may include DRAM and SRAM, and the nonvolatile ROM devices may include flash memory devices such as EEPROM (Elecrtically Erasable and Programmable ROM). have.

However, although the DRAM has a very good memory device as is well known, high charge storage capability is required, and for this purpose, it is difficult to achieve high integration since the electrode surface area must be increased. In addition, the flash memory device requires a high operating voltage compared to a power supply voltage in connection with a structure in which two gates are stacked, and thus requires a separate boost circuit to form a voltage required for write and erase operations. Therefore, there is a difficulty in high integration.

Accordingly, many studies are being conducted to develop new memory devices having characteristics of the nonvolatile memory device and having a simple structure. For example, recently, a phase change RAM device has been developed. Was proposed.

The phase change memory device utilizes a difference in resistance between crystalline and amorphous phases due to the phase change of the phase conversion film interposed between the electrodes from the crystal state to the amorphous state through the current flow between the lower electrode and the upper electrode. It is a memory device that determines the stored information. In other words, the phase-conversion memory device uses a chalcogenide film as a phase conversion film. The chalcogenide film is a compound film made of germanium (Ge), stevidium (Sb), and tellurium (Te). The phase change occurs between the amorphous state and the crystalline state by heat generated by the generated current, that is, Joule heat, and at this time, the resistivity of the phase change film having the amorphous state is determined by the crystalline state. Since it is higher than the specific resistance of the phase change film, the current flowing through the phase change film is sensed in the read mode to determine whether the information stored in the phase change memory cell is logic '1' or logic '0'.

On the other hand, in such a phase conversion memory device, the phase conversion film is in a crystalline state to an amorphous state, and a reset is called. In contrast, in the amorphous state to a crystalline state, a set is called. The lower the magnitude of the current for the / set (programming), the better. Therefore, the contact area between the phase change film and the electrode must be reduced and heat dissipation must be suppressed to reduce the current required for phase change.

Thus, in order to reduce the contact area between the lower electrode and the phase conversion film, the lower electrode is formed in a plug type. Hereinafter, a conventional phase change memory device will be described with reference to FIG. 1.

1 is a cross-sectional view showing a general phase change memory device.

As shown, gates 3 are formed on the active region of the semiconductor substrate 1 defined by the isolation layer 2, and source / drain regions 4a are formed in the substrate surface on both sides of the gate 3. , 4b) is formed. A first interlayer insulating film 5 is formed on the entire surface of the substrate to cover the gates 3, and a region where a phase change cell is to be formed and a line to which a ground voltage is applied (hereinafter, referred to as a "Vss line"). The first tungsten plug 6a and the second tungsten plug 6b are formed in the first interlayer insulating film portions in the region where the " referred to "

A second interlayer insulating film 7 is formed on the first interlayer insulating film 5 including the first and second tungsten plugs 6a and 6b. The phase conversion cell forming region is formed by a damascene process. A dot-shaped metal pad 8 is formed to contact the first tungsten plug 6a, and a bar to contact the second tungsten plug 6b in a region to which a ground voltage is to be applied. Formed ground line 9 is formed.

Subsequently, a third interlayer insulating film 10 is formed on the second interlayer insulating film 7 including the metal pad 8 and the ground line 9, and the third interlayer insulating film in the region where the phase change cell is to be formed. A bottom electrode contact 11 in the form of a plug is formed in the portion 10 so as to be in contact with the metal pad 8. In addition, a phase conversion film 12 and an upper electrode 13 are sequentially stacked on the lower electrode contact 11 and a portion of the third interlayer insulating layer adjacent thereto, and as a result, a lower electrode of a plug shape, That is, the phase change cell including the lower electrode contact 11, the phase change film 12 and the upper electrode 13 formed in this order is comprised.

In addition, a fourth interlayer insulating film 14 is formed on the third interlayer insulating film 10 to cover the phase conversion cell, and a metal wiring (not shown) on the fourth interlayer insulating film 14 to contact the upper electrode 13. 15) is formed.

However, in the above-described conventional phase change memory device, the contact area between the phase change film 12 and the upper electrode 13 is relatively wider than the contact area between the phase change film 12 and the lower electrode and the phase change film 12 There is a problem that the current required for programming is still high because the heat dissipation from the?

Accordingly, in order to reduce the contact area between the phase change film 12 and the upper electrode 13, a phase change memory device as shown in FIG. 2 has been proposed.

In the phase change memory device shown in FIG. 2, the phase change material film and the upper electrode conductive film are patterned in succession, and at the edge of the upper electrode conductive film, that is, at the edge of the upper electrode 13, patterned when the phase change material film is patterned. After the phase change material film is under-cut, the fourth interlayer insulating film 14 is formed by a process having poor step coverage such as physical vapor deposition deposition (PVD). The contact area between the 13 and the phase change film 12 is reduced and heat diffusion is suppressed through the under-cut space.

As shown in the figure, before forming the fourth interlayer insulating film 14, an ALD (Atomic Layer Deposition) and the surface of the third interlayer insulating film 10 including the phase change film 12 and the upper electrode 13 and It is preferable that a protective insulating film 20 having a uniform thickness is additionally formed through a process having excellent step coverage. Meanwhile, reference numerals overlapping with those of FIG. 1 are the same as the components of FIG. 1 and will not be described.

When the phase change memory device having the structure as shown in FIG. 2 is manufactured, the size of the phase change film 12 is reduced while the size of the upper electrode 13 remains the same as in the related art. Since the contact area of the phase conversion film 12 can be reduced and a void space is formed around the phase conversion film 12 to secure a heat dissipation path of the phase conversion film 12, the current required for programming can be reduced.

However, in the manufacture of the phase change memory device having the structure as shown in FIG. 2, the phase change material remaining when the etching rate of the phase change material film is not uniform even in the direction in etching the phase change material film to create the under-cut space. Since the position of the film 12 is out of the plug-type lower electrode, that is, the lower electrode contact 11, there is a problem in that it is not easy to secure stable contact between the lower electrode and the phase change layer 12.

In particular, when mis-alignment occurs due to the inaccuracy of the exposure process during the patterning of the phase change material film and the conductive film for the upper electrode, the probability of occurrence of the above problem becomes higher.

Accordingly, the present invention has been made to solve the above-mentioned conventional problems, and reduces the contact area between the phase conversion film and the electrode and suppresses the thermal diffusion to reduce the current required for the phase change of the phase conversion film and It is an object of the present invention to provide a phase change memory device capable of easily securing stable contact with an electrode, and a method of manufacturing the same.

In order to achieve the above object, the present invention, a semiconductor substrate provided with a lower pattern; A lower electrode having a pattern shape formed to contact the lower pattern on the substrate; A phase conversion film formed on the lower electrode in a smaller size than the lower electrode; An upper electrode of a pattern shape formed on the phase change film to have a size larger than that of the phase change film; And an insulating film formed on the substrate so as to cover the stacked structure of the lower electrode, the phase conversion film, and the upper electrode without filling the empty space between the lower electrode and the upper electrode. do.

And the lower electrode and the upper electrode have the same size.

And an insulating protective film formed on the surface of the stacked structure of the lower electrode, the phase conversion film and the upper electrode with a uniform thickness.

And the insulating protective film is formed of any one film selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx.

And the insulating protective film has a thickness of 10 to 200 Å.

In addition, a method of manufacturing a phase change memory device of the present invention for achieving the above object comprises the steps of: preparing a semiconductor substrate having a lower pattern; Sequentially forming a first conductive film, a phase change material film, and a second conductive film on the substrate; Etching the second conductive film, the phase change material film, and the first conductive film in order to form a lower electrode and an upper electrode having a pattern shape interposed with a phase change film; Etching the edge portion of the phase conversion film to form a stacked structure having a void space between a lower electrode and an upper electrode; And forming an insulating film on the substrate to cover the stacked structure without filling the empty space between the lower electrode and the upper electrode.

The etching of the second conductive film, the phase change material film, and the first conductive film in turn may be performed using an etching gas including CF 4, Ar, and Cl 2. A method of manufacturing a phase change memory device, characterized in that the etching proceeds by relatively reducing the content of CF4 compared to Ar and Cl2 at the time of etching the film.

After etching the edge portion of the phase conversion film to form a stacked structure having an empty space between the lower electrode and the upper electrode, and before forming the insulating film, a protective insulating film having a uniform thickness on the surface of the laminated structure And forming a phase change memory device.

And the insulating protective film is formed of any one film selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx.

And the insulating protective film is formed to a thickness of 10 to 200 mW.

And the insulating protective film is formed by an ALD or CVD process.

And the insulating film is formed by a PVD or PE-CVD process.

In addition, the manufacturing method of the phase change memory device of the present invention for achieving the above object comprises the steps of preparing a semiconductor substrate having a lower pattern; Sequentially forming a first conductive film, a phase change material film, and a second conductive film on the substrate; The second conductive film, the phase change material film, and the first conductive film are sequentially etched to form a stacked structure of a lower electrode, a phase change film, and an upper electrode, and the phase change film is etched to have a smaller size than the lower electrode and the upper electrode. Forming a stacked structure having an empty space between the lower electrode and the upper electrode; And forming an insulating film on the substrate to cover the stacked structure without filling the empty space between the lower electrode and the upper electrode.

Etching the second conductive film, the phase change material film, and the first conductive film in turn may be performed using an etching gas including CF 4, Ar, and Cl 2, and the second and first conductive film may be etched when the phase change material film is etched. A method of manufacturing a phase change memory device, characterized in that the etching is performed by relatively reducing the content of CF4 compared to Ar and Cl2.

Etching the second conductive film, the phase change material film and the first conductive film in sequence

Etching the second conductive layer using an etching gas including CF 4, Ar, and Cl 2; Etching the phase conversion material film by using an etching gas including Ar and Cl 2; And a third step of etching the first conductive film by using an etching gas including CF 4, Ar, and Cl 2.

And the insulating protective film is formed of any one film selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx.

And the insulating protective film is formed to a thickness of 10 to 200 mW.

And the insulating protective film is formed by an ALD or CVD process.

And the insulating film is formed by a PVD or PE-CVD process.

(Example)

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view of a phase change memory device according to an embodiment of the present invention. Referring to this, the phase change memory device of the present invention is a predetermined substructure (not shown) such as a gate and a junction region (source / drain region). Is formed, an interlayer insulating film 40 is formed to cover the lower structure (not shown), and the semiconductor substrate 31 is provided with a lower pattern such as a contact plug 41a in the interlayer insulating film 40; A patterned lower electrode 41 formed on the substrate product (interlayer insulating film and contact plug) to contact the contact plug 41a, and a phase change film 42 formed on the lower electrode 41 to be smaller than the lower electrode; ), An upper electrode 43 having a pattern shape formed on the phase change layer 42 to be larger than the phase change layer 42, and an empty space between the lower electrode 41 and the upper electrode 43 Stacking holes of the lower electrode 41, the phase change film 42 and the upper electrode 43 without being buried It includes an insulating film 44 formed on the interlayer insulating film 40 to cover the water. Unexplained reference numeral 45 denotes a metal wiring formed on the insulating film 44 to contact the upper electrode 43.

Here, the lower electrode 41 and the upper electrode 43 are preferably formed in the same size.

In addition, the phase change memory device of the present invention has an insulating protective film formed in a uniform thickness on the interlayer insulating film 40 including the surface of the laminated structure consisting of the lower electrode 41, the phase change film 42, and the upper electrode 43. It may further include (50).

At this time, the insulating protective film is any one selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx, preferably a SiNx film, is formed to a thickness of 10 ~ 200Å.

Hereinafter, a method of manufacturing the phase change memory device of the present invention will be described with reference to FIGS. 4A to 4D.

4A through 4D are plan views illustrating processes of manufacturing a phase change memory device according to an exemplary embodiment of the present invention.

Referring to FIG. 4A, a predetermined substructure (not shown) such as a gate and a junction region (source / drain region) is formed, and an interlayer insulating film 40 is formed to cover the substructure (not shown). A semiconductor substrate 31 having a lower pattern such as a contact plug 41a is provided in the interlayer insulating film 40.

Thereafter, a first conductive film, a phase change material film, and a second conductive film are sequentially formed on the substrate resultant (interlayer insulating film and contact plug), and the second conductive film, the phase change material film, and the second conductive film are sequentially etched. Thus, the lower electrode 41 and the upper electrode 43 having a pattern shape having the phase change layer 42 interposed therebetween are formed.

Here, the step of sequentially etching the second conductive film, the phase change material film, and the first conductive film is performed using an etching gas including CF4, Ar, and Cl2, and the second and first phases during the phase change material film etching. It is preferable to proceed with etching by reducing the content of CF4 relative to Ar and Cl2 relative to the etching of the conductive film. This is because the smaller the content of CF4, the easier the phase-change material film is etched.

Referring to FIG. 4B, an edge portion of the phase change film 42 is selectively etched, for example, a wet etching method using a cleaning solution having a very high speed of etching the phase change film 42 to lower the electrode 41. ) And a stacked structure having an empty space between the upper electrode 43 and the upper electrode 43.

Then, SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx or ZrOx in a process having excellent step coverage such as ALD or CVD on the interlayer insulating film 40 including the surface of the laminated structure, preferably A protective insulating film 50 having a uniform thickness made of a SiNx film is formed. In this case, the protective insulating film 50 may not be formed. However, the protective insulating film 50 may be formed so as to protect the interface between the phase change film 42 and the upper and lower electrodes 41 and 43. It is formed to a thickness of so as not to fill the empty space between the lower electrode 41 and the upper electrode 43.

Referring to FIG. 4C, step coverage such as PVD and PE-CVD (Plasma enhanced CVD) is not good so as to cover the stacked structure without filling the empty space between the lower electrode 41 and the upper electrode 43. The process forms an insulating film 44 on the substrate product. At this time, the insulating film 44 is formed of any one of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx or ZrOx, preferably SiO2.

Referring to FIG. 4D, after forming the contact hole H exposing the upper electrode 43 by etching the insulating film 44 and the protective insulating film 50, the insulating film 44 to fill the contact hole H. ) To form a metal wiring 45.

After that, although not shown in the drawing, a subsequent known process is sequentially performed to manufacture the phase change memory device of the present invention.

As described above, according to the present invention, after forming the lower electrode 41 and the upper electrode 43 in a pattern form with the phase change layer 42 interposed on the contact plug 41a, the edge of the phase change layer 42 is formed. Is selectively etched to form an empty space between the lower electrode 41 and the upper electrode 43, and then an insulating film 44 is formed on the substrate product so that the empty space is not buried.

In this case, since the electrodes having a relatively wide pattern shape are formed above and below the phase change film 42 before the edge is etched, the etching speed along the direction is not uniform when the edges of the phase change film 42 are etched. Even if the phase conversion film 42 is separated from the lower electrode 41 and the upper electrode 43 does not occur.

In addition, the present invention forms a stacked structure of the lower electrode 41, the phase change film 42, and the upper electrode 42 in the form of a pattern on the contact plug 41a, so that even if the stacked structure is misaligned, the lower electrode ( There is no problem in ensuring stable contact between the 41 and the phase change film 42.

Although not shown, in another embodiment of the present invention, the first conductive film, the phase change material film, and the second conductive film are sequentially formed on the interlayer insulating film 40 including the contact plug 41a, and then the second conductive film is formed. When etching the conductive film, the phase change material film, and the first conductive film, the etch conditions may be adjusted so that the phase change film has a smaller size than the lower electrode and the upper electrode, thereby creating an empty space between the lower electrode and the upper electrode. . In this case, when the phase change material film is etched, the content of CF4 is '0' or less than that in the above-described embodiment, and a separate wet etching process for etching a subsequent phase change film edge is not required. Meanwhile, the remaining process conditions associated with the formation of the protective insulating film 50 are the same.

Hereinbefore, the present invention has been described with reference to some examples, but the present invention is not limited thereto, and those skilled in the art to which the present invention pertains have many modifications and variations without departing from the spirit of the present invention. It will be appreciated that it can be added.

As described above, according to the present invention, a phase change film having a smaller size than the electrodes is interposed between the lower electrode and the upper electrode in the form of a pattern, thereby manufacturing a phase change memory device having an empty space between the lower electrode and the upper electrode. The contact area between the electrode and the phase change film can be stably reduced, and heat release from the phase change film can be effectively suppressed.

Accordingly, the present invention can prevent the poor contact between the electrodes and the phase change film to achieve a stable contact, and at the same time improve the Joule heat efficiency during phase change of the phase change film. Can be lowered.

Claims (19)

A semiconductor substrate having a lower pattern; A lower electrode having a pattern shape formed to contact the lower pattern on the substrate; A phase conversion film formed on the lower electrode in a smaller size than the lower electrode; An upper electrode of a pattern shape formed on the phase change film to have a size larger than that of the phase change film; And An insulating film formed on the substrate so as to cover the stacked structure of the lower electrode, the phase change film, and the upper electrode without filling the empty space between the lower electrode and the upper electrode; Phase change memory device comprising a. The method of claim 1, And the lower electrode and the upper electrode have the same size. The method of claim 1, And an insulating protective film formed on the surface of the stacked structure of the lower electrode, the phase conversion film and the upper electrode with a uniform thickness. The method of claim 3, wherein And the insulating protective film is formed of any one film selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx. The method of claim 3, wherein And the insulating protective film has a thickness of 10 to 200 Å. Providing a semiconductor substrate having a lower pattern formed thereon; Sequentially forming a first conductive film, a phase change material film, and a second conductive film on the substrate; Etching the second conductive film, the phase change material film, and the first conductive film in order to form a lower electrode and an upper electrode having a pattern shape interposed with a phase change film; Etching the edge portion of the phase conversion film to form a stacked structure having a void space between a lower electrode and an upper electrode; Forming an insulating film on the substrate to cover the stacked structure without filling the empty space between the lower electrode and the upper electrode; A method for manufacturing a phase change memory device comprising a. The method of claim 6, Etching the second conductive film, the phase change material film, and the first conductive film in turn may be performed using an etching gas including CF 4, Ar, and Cl 2, but the second and first conductive film may be etched when the phase change material film is etched. A method of manufacturing a phase change memory device, characterized in that the etching is performed by relatively reducing the content of CF4 compared to Ar and Cl2. The method of claim 6, After etching the edge portion of the phase conversion film to form a stacked structure having an empty space between the lower electrode and the upper electrode, and before forming the insulating film, a protective insulating film having a uniform thickness on the surface of the laminated structure And forming a phase change memory device. The method of claim 8, And the insulating protective film is formed of any one film selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx. The method of claim 8, And the insulating protective film is formed to a thickness of 10 to 200 mW. The method of claim 8, And the insulating protective film is formed by an ALD or CVD process. The method of claim 6, And the insulating film is formed by a PVD or PE-CVD process. Providing a semiconductor substrate having a lower pattern formed thereon; Sequentially forming a first conductive film, a phase change material film, and a second conductive film on the substrate; The second conductive film, the phase change material film, and the first conductive film are sequentially etched to form a stacked structure of a lower electrode, a phase change film, and an upper electrode, and the phase change film is etched to have a smaller size than the lower electrode and the upper electrode. Forming a stacked structure having an empty space between the lower electrode and the upper electrode; And Forming an insulating film on the substrate to cover the stacked structure without filling the empty space between the lower electrode and the upper electrode; A method for manufacturing a phase change memory device comprising a. The method of claim 13, Etching the second conductive film, the phase change material film, and the first conductive film in turn may be performed using an etching gas including CF 4, Ar, and Cl 2, and the second and first conductive film may be etched when the phase change material film is etched. A method of manufacturing a phase change memory device, characterized in that the etching is performed by relatively reducing the content of CF4 compared to Ar and Cl2. The method of claim 13, Etching the second conductive film, the phase change material film and the first conductive film in sequence Etching the second conductive layer using an etching gas including CF 4, Ar, and Cl 2; Etching the phase conversion material film by using an etching gas including Ar and Cl 2; And A third step of etching the first conductive film using an etching gas containing CF 4, Ar, and Cl 2; A method for manufacturing a phase change memory device comprising a. The method of claim 13, And the insulating protective film is formed of any one film selected from the group consisting of SiO2, SiNx, SiON, AlOx, Ta2O5, HfO2, NiOx and ZrOx. The method of claim 16, And the insulating protective film is formed to a thickness of 10 to 200 mW. The method of claim 16, And the insulating protective film is formed by an ALD or CVD process. The method of claim 13, And the insulating film is formed by a PVD or PE-CVD process.

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