JPS62151234U - - Google Patents
Info
- Publication number
- JPS62151234U JPS62151234U JP3952286U JP3952286U JPS62151234U JP S62151234 U JPS62151234 U JP S62151234U JP 3952286 U JP3952286 U JP 3952286U JP 3952286 U JP3952286 U JP 3952286U JP S62151234 U JPS62151234 U JP S62151234U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- resistor
- output terminal
- capacitor
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
Description
第１図はこの考案の実施例を示す構成図、第２
図はこの考案の各部の電圧波形を示す図、第３図
は従来のパルス発振器の構成を示す図、第４図は
従来のパルス発振器の各部の電圧波形を示す図で
ある。
各図において、１は否定回路、２は否定回路、
３は抵抗、４は抵抗、５はコンデンサ、６は抵抗
である。なお、各図中同一符号は同一または相当
部分を示す。
Figure 1 is a configuration diagram showing an embodiment of this invention, Figure 2
3 is a diagram showing the voltage waveforms of various parts of this invention, FIG. 3 is a diagram showing the configuration of a conventional pulse oscillator, and FIG. 4 is a diagram showing voltage waveforms of various parts of the conventional pulse oscillator. In each figure, 1 is a NOT circuit, 2 is a NOT circuit,
3 is a resistor, 4 is a resistor, 5 is a capacitor, and 6 is a resistor. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
力端を接続し、第１の否定回路の入力端に抵抗、
第１の否定回路の出力端には別の抵抗、そして第
２の否定回路の出力端にはコンデンサを接続し、
それぞれの抵抗及びコンデンサの他端を接続した
パルス発振器において、第１の否定回路の入力端
とグランド間に上記二つの抵抗とは別の抵抗を接
続したことを特徴とするパルス発振器。 The output terminal of the first NOT circuit and the input terminal of the second NOT circuit are connected, and a resistor is connected to the input terminal of the first NOT circuit.
Another resistor is connected to the output terminal of the first inverting circuit, and a capacitor is connected to the output terminal of the second inverting circuit,
1. A pulse oscillator in which the other end of each resistor and capacitor are connected, characterized in that a resistor other than the above two resistors is connected between the input end of the first negative circuit and ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3952286U JPS62151234U (en) | 1986-03-18 | 1986-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3952286U JPS62151234U (en) | 1986-03-18 | 1986-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62151234U true JPS62151234U (en) | 1987-09-25 |
Family
ID=30852767
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3952286U Pending JPS62151234U (en) | 1986-03-18 | 1986-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62151234U (en) |
-
1986
- 1986-03-18 JP JP3952286U patent/JPS62151234U/ja active Pending