JPS62135984A - IC card - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an IC cart for loading and reading information.

Conventional technology Conventionally, when this Fli (7) IC cart is used as a payment card for shopping, for example, a certain amount of money is written in advance, and each time a payment is made, the balance is stored in a specific memory. It is designed to be written to the address. In this way, execution including ♀1 to the same memory address was repeated many times.

2...- Problems to be solved by the invention However, the memory is good and electrical, 1: Erasable EEP
When using ll, M (Electrically Erasable Programmable Read Only Memory), this EET'+? , OM has the problem that the number of writes to the same area can only be guaranteed to be approximately several thousand to 10,000 times, and that an A14 write take that attempts to write more than this number of times is not guaranteed. Also, the memory capacity of an IC car is 16I (beep!) or 64I.

Although memory of the size of :1: As a result, as mentioned above, the writing life limit of several thousand to 10,000 f + j + ゛, ゛ degrees was exceeded.For example, when using an IC card as a payment card for shopping, If you are writing the latest balance i (l'r) of the amount in a specific memory area while repeatedly updating it, the writing limit lifespan may be exceeded, and in this case, the new balance 7: Even if you try to input the correct balance, you will not be able to write the correct balance, and the next time you read the IC card balance, incorrect data will be read, which may cause an accident with the IC card device. was.

The present invention solves these conventional problems and provides an IC card that can prevent take errors caused by the write life limit.

Means for Solving the Problems and Technical Means of the present invention for solving the above problems is to record the number of writes that are sequentially counted in the repetitive write memory address area, and the number of writes that are determined by a predetermined number of writes. It is configured such that a write limit code for opening a new memory address for repeated writing is written when the number of times of writing has been reached.

For production The effects of the above technical means are as follows.

That is, when repeatedly writing to the same specific memory address, the number of writes is counted, and the number of writes is simultaneously recorded in the memory address area each time. And this C Chang Zhanshi Kaih, 1.1141, 1. -, l: 4-Compare with i times l and its ・1-11 attached' month: ・CJ
(Noro; 1-4-detected 1.I: The number of crossings is less than the limit number of writes l↓2'A dent is the memory address area 1. :If the number of writes is j plus 2 to the limit number of writes, (, tl, write to that memory address is 1) = - and set the limit code to open a new unused memory address for repeated writing to A1. : Crowded.

Even if the store loading process 111 is performed repeatedly in this way, as described above, the loading frequency dividing function, write limit W life detection function, and area management J111 function can be combined with 4.1j and memory storage. The address area does not lose its life.Therefore, among all the memory areas, the streetcar area has reached its write limit life, so 1, all ((, or jl/111 is defective). can be avoided, and as a whole, it is possible to save +11 on the long-term writing process (1, tens of thousands of times or more) of PII.

EXAMPLE Hereinafter, an example of Mli of the present invention will be described with reference to the drawings.

In FIG. 1, tsu' i:t h: return 11) is the first repetitive write memory address, and a is the 10th) Ft.
″・Return) 1!′5 be.

This is the second repeated write memory address that is opened when write memory address A reaches the write limit. 1 is the number of writes to the first repeated write memory address A, d is the write limit code written when the first repeated write memory address A reaches the write limit life, and 0 is the write limit code written when the first repeat write memory address A reaches the write limit life. This is the write address of information to be written each time it occurs. The power is this I
This is balance amount information that changes each time a transaction occurs with the C card. K is the transaction information write memory address displayed in the information write address, RI is the date in the transaction information, K1O is the supplier code also in the transaction information, and C is the transaction amount also in the transaction information. . Further, a memory address is provided following the transaction information write memory address.

Next, the operation of the above embodiment will be explained. When a transaction occurs using this IC cart, the transaction information is transferred to the IC card using the following steps.
Write on the card.

■ Read the first repeat write memory address A (representing physical address 1 in this example).

In this case, the amount of information at one address is 32 bytes, 6-8 I will express it.

■ Check whether the write limit number of times is set.

When the write limit number is not set to -91, it indicates that this first repetitive write memory address A is still capable of being repeatedly written.

■ Check the information writing address O and look for the memo 11 where the previous transaction information was written.

■ Write the current +1'y, transaction information (11i, 1kichi client court and transaction amount) to the memory address following J4B IJ address 4-, including transaction information Kensho 11.

■ Information (1: including address) - 1 for the current transaction information above
1 memo number 11 1 [IL 1F.

■ Subtract the current transaction amount from the remaining balance from the previous transaction and write the new balance.

■ Add 1 to the write count and update the write count. At the same time, compare the write limit number N with a certain margin for the world life (1: including β1) and the number of writes after 14 days above. If N, then the first repetition This indicates that write memory address A can still be repeatedly damaged.

7-=-,,.

8. Write the above-mentioned updated number, information write address O, and balance in the first Q/return write memo at address 11-T'.

Through the above procedure, the current transaction information is stored in the IC card. If the number of writes becomes equal to the limit number of writes N, the following procedure is followed.

(2) In the procedure (2) above, if t==-N, it indicates that the first repeated write memory address A should not be repeatedly written any more. Therefore, the write limit code is updated and the number of writes after the update, the write limit code, the information write address O, and the balance are written in the first repetitive write memory address A.

a Also, open the unused second repeated write memory address A (in this example, it represents physical address 2), and write the new write count and information write address (in this case, the information indicated by ■ above). write address) and balance (also in this case, the information write address indicated by ■ above). The write limit code is set to a blank value to indicate that this second repetitive write memory address A can be repeatedly written.

The above procedure 1.1: The first repetition when the writing limit has been reached. If the write limit is already 1;include;[tl when reading the address 11:included, then the following procedure will be used.

0 In the procedure of Q) above, if the store limit '/+'f1 crab has already been written, then read the repeat write memory address A of Ar1.

◎ Descend, perform the same process as above ■.

If the write limit code at the second repetition 11F memory address A has already been written, the next memory address can be used to control the number of times 11F is written. . At the second repeated write memory address, insert the TL of this IC cart. I can even finish 1. How to use memory addresses can be determined depending on the purpose of using this IC cart.

Effects of the Invention As is clear from the above explanation, according to the present invention, the number of times of writing is counted in the l1r fourth order in the repetitive write memory address area, and the number of times of writing reaches a predetermined number of times of writing. In this case, a write limit number for opening a new write memory address is written. In this way, since the write count function, the write limit life detection function, and the area management function for writing the write count are taken into consideration, the overall write life can be extended. Furthermore, by providing an area management function, it is possible to terminate the writing process FI+ after an arbitrary number of failures, and the number of times of writing can be controlled according to the purpose of use.

[Brief explanation of drawings]

The figure shows an embodiment of the IC cart according to the present invention.
It is a diagram. A. First repeat write memory address, B... Second repeat write memory address, T... Number of writes, E... (
1: Including limit code, O... Information writing address, Power balance, main transaction information, R... Date of transaction information, K... Supplier code of transaction information, C... Transaction of transaction information amount.

Claims (1)

[Claims] The number of writes that are counted sequentially and a write limit code for opening a new repeat write memory address when the number of writes reaches a predetermined number of writes are written in the repeat write memory address area. An IC characterized by being configured as follows.
card.