JPH02251137A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent deterioration of electric characteristics in a semiconductor device by performing ion implantation in a state that a silicon substrate is exposed and then, depositing polysilicon with a CVD process. CONSTITUTION:A process where impurity diffusion layer is formed by the use of ion implantation in a silicon substrate 11 includes: the step with which ion implantation is performed in a state that a silicon substrate is exposed on the silicon substrate 11; the step with which polysilicon is deposited by CVD on the silicon substrate; and an annealing step. In the case of the annealing step, if it is performed in an inactive atmosphere which does not contain oxygen at all, the surface of polysilicon 15 becomes rough. Then, first of all, the silicon substrate 11 is not oxidized in an atmosphere which contains oxygen and a part of an upper layer of polysilicon 15 is converted to a silicon oxide film 12 on condition that a part of polysilicon 15 is oxidized. Subsequently, annealing is performed in a completely inactive atmosphere. Deterioration of characteristics in a semiconductor device is thus prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to recovery of tampering by ion implantation after ion implantation.

Conventional technology The conventional method for manufacturing this type of semiconductor device is to perform ion implantation with the silicon substrate exposed, followed by inert gas atmosphere containing several percentage points of oxygen (e.g. nitrogen).
A known method is to perform annealing inside. Also known is a method in which ions are implanted through a silicon oxide film formed on a silicon substrate by, for example, a thermal oxidation process, and then annealing is performed in an inert gas atmosphere that does not contain any oxygen.

Problems to be Solved by the Invention As the size of semiconductor devices becomes smaller, for example, Cl
In the case of a semiconductor device made of 403I, the concentration of a well formed in a semiconductor substrate must be increased in order to increase the resistance to etchant loss.

If boron (l]B+) is ion-implanted to form the P-well, or if the boron implantation dose is increased,
The following issues arise.

When annealing is performed after ion implantation with the silicon substrate exposed, if annealing is performed at a high temperature (1+)+-u)°C or higher in an inert gas atmosphere that does not contain any oxygen, the silicon substrate Addition of oxygen is necessary because the surface is attacked by trace impurities contained in the inert gas and becomes rough. Here, if the amount of boron implanted is increased, the damage density due to ion implantation increases, and the silicon substrate is exposed to oxygen in the atmosphere during the annealing process, resulting in oxidation-induced defects (hereinafter referred to as O3F). This O8F remains in the final step of the semiconductor device manufacturing process, captures contamination during the manufacturing process, forms impurity levels, and, for example, causes reverse leakage current in the diffusion layer. This causes an increase in the amount of heat and leads to deterioration of the characteristics of semiconductor devices.

Further, when ion implantation is performed through a silicon oxide film, the silicon substrate does not become rough even if it is annealed at high temperature in an inert atmosphere that does not contain oxygen because the surface of the silicon substrate is protected by the silicon oxide film. Therefore, by performing annealing after ion implantation in an inert atmosphere that does not contain oxygen, it is possible to suppress the growth of O8F due to ion implantation damage. As a result, oxygen in the silicon oxide film is trapped in the silicon substrate and is not recovered even in the annealing process, remaining as dislocations. This dislocation is also associated with contamination during the semiconductor device manufacturing process, causing deterioration of the characteristics of the semiconductor device.

The present invention has been made in view of the above-mentioned conventional situation,
Therefore, an object of the present invention is to provide a novel method for manufacturing a semiconductor device, which makes it possible to eliminate the above-mentioned disadvantages inherent in the conventional techniques.

Differences between the invention and the prior art In contrast to the conventional semiconductor device manufacturing method described above, the present invention performs ion implantation with the silicon substrate exposed, and then deposits polysilicon using the C\Ip method. Since the silicon substrate does not come into direct contact with oxygen during the subsequent high-temperature annealing process, the growth of O8F can be suppressed, and since the silicon substrate is exposed during ion implantation, oxygen is not knocked into the silicon substrate. The difference is that there is no.

Here, instead of depositing polysilicon by the CDV method, a method of depositing a silicon oxide film by the CVD method may be considered, but O3F will grow due to oxygen or the like used as a reactive gas when depositing the silicon oxide film. Therefore, polysilicon, which is in a non-oxidizing atmosphere during deposition, is most suitable.Means for Solving the 7 ProblemsTo achieve the above objects, a method for manufacturing a semiconductor device according to one aspect of the present invention includes a method for manufacturing a semiconductor device in which a silicon substrate is The method includes a step of implanting ions in an exposed state, a step of depositing polysilicon on the silicon substrate by CVD, and an annealing step.

If the annealing process is performed in an inert atmosphere that does not contain any oxygen, the polysilicon surface will become rough, so first, the silicon substrate is not oxidized in an oxygen-containing atmosphere, but the polysilicon is heated in an inert atmosphere that does not contain any oxygen. A portion of the upper layer is changed to a silicon oxide film, and then annealing is performed in a completely inert atmosphere.

Embodiments Next, preferred embodiments of the present invention will be explained with reference to the drawings.

FIGS. 1(a) and 1(b) are sectional views sequentially showing steps for forming a P-well of a CMO9 structure semiconductor device showing a first embodiment of the present invention.

Referring to FIGS. 1(a) to 1(d), a silicon substrate 11
A silicon oxide film 12 of 51)I) nm is formed thereon by a thermal acidification method. A photoresist 13 is applied on the silicon oxide film 12, and the silicon oxide film 12 in the P-well formation region is etched and removed by photolithography. Using the photoresist 13 and silicon oxide film 12 as a mask, boron ions ("B") are applied to the P well formation region.
) woVi+J ;t if acceleration energy 100Ke
V, ion implantation with an implantation amount of 3 x IQ”cm-2, P
+ region 14 is formed (FIG. 1(a)).

Next, 31) nm of polysilicon 15 is accumulated by the CVD method using thermal decomposition of 5it14 (Fig. 1 (h
)). A part of the surface of this polysilicon 15 is changed into a 21) nm thick polysilicon oxide film 16 using a thermal acid atomization method, and then annealing is performed in an inert atmosphere to remove damage caused by ion implantation in the P4 region 14. At the same time, the P+ region 14 is diffused into the silicon substrate 11 in order to set the depth of the P well to a predetermined depth (FIG. 1(C)). At this time, if the annealing process is performed at a high temperature exceeding 1001")°C, if the polysilicon oxide film 16 is not formed, a small amount of impurity in the inert atmosphere will react with the polysilicon 15, causing the polysilicon 15 to deteriorate. To prevent the surface from becoming rough, it is necessary to form a polysilicon oxide film 111i16, but if the annealing process is performed at a temperature below 1o00'c, the annealing process is performed without forming this polysilicon oxide film 16. It's okay.

When the P+ region 14 reaches a predetermined depth, the polysilicon 15 and the silicon substrate 11 are thermally oxidized through the polysilicon oxide film 16 in an oxidizing atmosphere (see FIG. 1).
d)). By etching and removing this silicon oxide film 12 with hydrofluoric acid, a silicon substrate surface on which no polysilicon 15 remains is obtained.

Through the above steps, the P-well region of the CMO8tll semiconductor device can be formed without leaving any damage caused by ion implantation in the silicon substrate 11.

FIGS. 2(a) to 2(e) are cross-sectional views sequentially showing steps for forming a buried layer of a bipolar transistor according to a second embodiment of the present invention.

Referring to FIGS. 2(a) to 2(e), the silicon substrate 21
An N+ buried layer 22 is formed on the top using diffusion from silica containing arsenic or antimony by photolithography.
form. Next, a silicon oxide film 23 of 3 (IQ nm) is formed by a thermal oxidation method, a photoresist 24 is applied on the silicon oxide film 23, and a silicon oxide film 23 in a region where a P+ buried layer 25 is to be formed is formed by a photolithography method.
Remove by etching. Using the photoresist 24 and the silicon oxide film 23 as a mask, boron ions are applied to the region where the P+ buried layer 25 is to be formed using, for example, accelerated energy IC++-.
, + KeV and an implantation dose of lXl0"cm-" to form a P+ buried layer 25 (FIG. 2(a)). Next, polysilicon 26 is deposited to a thickness of 3 Q nm by the CVD method (FIG. 2(b)). This polysilicon 2
6 is thermally oxidized to form a polysilicon oxide film 27 of 21:I nm, and then annealed in an inert atmosphere (FIG. 2(C)). At this time, as in the first embodiment, if the annealing temperature is 1001)'C or less, the step of forming a polysilicon oxide film can be omitted. Then, the polysilicon oxide film 27 and the silicon oxide film are completely removed using a solution containing hydrofluoric acid (FIG. 2(d)). If the polysilicon 26 remains on the silicon substrate 21 at this time, abnormal growth may occur in the subsequent epitaxial silicon growth, the crystal quality of the epitaxial layer may deteriorate, and the electrical characteristics of the semiconductor device may be significantly affected. Therefore, it is necessary to completely oxidize and remove polysilicon 26. Next, silicon is epitaxially grown on the silicon substrate to form an epitaxial layer 28.

Through the above steps, it is possible to form a buried layer of a bipolar transistor without damage caused by ion implantation.

Examples have been given of the ion implantation process of boron ions ("B+"), but other ion species such as arsenic ions (75As") and phosphorus ions (3IP") are also used.

The present invention is also effective in ion implantation.

Although the polysilicon was finally removed in the first and second embodiments, it is possible to remove the polysilicon in any process in which there is no problem even if the polysilicon remains, for example, in a field formation process or a source train formation process of a 140s L-transistor. In this case, the step of removing polysilicon can be omitted.

As described in detail, according to the present invention, ion implantation is performed with the silicon substrate exposed, and then polysilicon is deposited by CVD to suppress the growth of O8F in the subsequent high-temperature annealing process. As a result, it is possible to eliminate deterioration of the electrical characteristics of the semiconductor device due to contamination captured by O8F during the manufacturing process of the semiconductor device.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are cross-sectional views showing the first embodiment of the present invention in the order of steps, and FIGS. 2(a) to (e) are cross-sectional views showing the second embodiment of the present invention in the order of steps. It is a diagram. . 11.21...Silicon substrate, 12.23...Silicon oxide film, ], 3.24...Full resist, 14.
・・P4 area, 15°20 ・・Polysilicon, 16.
27...Polysilicon oxide film, 22...N''' buried layer, 25...P+ buried layer, 28...To epitaxial layer Scale &

Claims (1)

[Claims] In the process of forming an impurity diffusion layer in a silicon substrate using ion implantation, there are two steps: ion implantation with the silicon substrate exposed, followed by a step of depositing polysilicon on the silicon substrate by CVD, and annealing. A method for manufacturing a semiconductor device, comprising the steps of: