JPH01270308A - Semiconductor chip - Google Patents

Abstract

PURPOSE:To improve the yield rate per wafer and to make it possible to conduct a dicing operation without disturbance in the arrangement of semiconductor chips by a method wherein a metal layer having the prescribed thickness or above is provided to the rear surface of a semiconductor, a notched part is formed at a part of the surface of the substrate, and the notched part is exposed. CONSTITUTION:In order to facilitate the handling after dividing into chips, a metal layer 2 of 20mum or more in thickness is formed on the rear side using a gold-plating method and the like. Subsequently, slits 5 are provided on the metal layer 2 by the method such as etching and the like. Then, a semiconductor layer 1 is removed from a surface 3 using the method such as etching and the like, and holes 4 are formed. Subsequently, gooves 6 are formed using a diamond cutter or a dicing saw, then pressure is added from outside, and the metal layer 2 is divided into semiconductors chips 7 by applying pressure from outside. When the divided chips are handled with a pincette and the like, the cracks of the semiconductor chips can be prevented by picking up the metal layer of the part 4 having separability without contacting a GaAs layer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor chip used in a semiconductor device.

[Conventional technology]

@Figures 3 to 5 are schematic diagrams showing conventional semiconductor chips,
In the figure, (l) is a GaAs semiconductor layer, (2) is a GaAs semiconductor layer, and (2) is a GaAs semiconductor layer.
A metal layer is formed on the back surface of the GaAs semiconductor layer of As semiconductor layer +11, and (3) shows the surface on which a source electrode, drain electrode, gate electrode, etc. are formed.

@Figure 6 is an explanatory diagram showing a process of separating semiconductor chips from a semiconductor wafer, and a method for forming semiconductor chips will be explained with reference to this diagram.

Source and drain are placed on the surface (3) of the semiconductor wafer.

After forming electrodes such as gates, the surface (3
) is polished to a wafer thickness of about 20 to 50) 1 m. In particular, GaA@ has poor thermal conductivity compared to 51, so it is necessary to reduce the wafer thickness. In order to facilitate handling after dividing into chips, a metal layer (2) of 20 to 100 μm is entirely formed on the back surface by a method such as gold plating.

Thereafter, slits (6) are formed in the metal layer (2) by etching or the like (b). Furthermore, in order to separate the semiconductor wafer into desired sizes on the surface (3), grooves (6) are made along the dicing lines using a diamond cutter or a dicing saw (C). Next, apply pressure from the outside,
@ (Divide the wafer along line 61 to obtain the desired semiconductor chip (7). This semiconductor chip (7) f's, gS3
It has the structure shown in Figure 4 or Figure 4.

[Problem to be solved by the invention]

According to the conventional method of forming a semiconductor chip, FIG.
@4 As shown in Figure 4, the semiconductor part (11) protrudes from the metal layer (2) or becomes as large as the metal layer (2). Compound semiconductors such as GsAa are fragile, so when handling the semiconductor chip with a bottle set, etc. The bottle set came into contact with No. 11 and stress was applied to it, causing it to crack.

Therefore, as shown in FIG. 4, a structure in which the metal layer (2) is larger than the semiconductor portion +11 may be adopted. However, in the case of this structure, after the step (b) in FIG. 6 is completed, the metal layer of the semiconductor wafer is attached to a glass plate, etc., and the semiconductor part (1) is etched from the surface (3) along the dicing line. Then, it is widely removed through the slit (6) and separated into semiconductor chips. Thereafter, the entire semiconductor chip was removed from the glass plate to obtain a semiconductor chip having a structure as shown in FIG. 4, in which the metal layer (2) is larger than the semiconductor portion (3). However, in this structure and manufacturing method, since the semiconductor chips are separated by a method such as il+ etching, it is necessary to form a wide dicing line, and the number of semiconductor chips obtained per wafer is reduced.

(21 After etching, when separating the semiconductor chips from the glass plate, the arrangement of the semiconductor chips ( ) becomes disorganized, which impairs the workability of the die bonding process in the next process. Also, the adhesive used to bond the semiconductor chips to the glass plate When removing from the back side of the chip, an organic solvent is usually used.

At this time, there were problems such as the surface being sometimes damaged due to contact between the half-24 chips.

This invention (1) was made by VC in order to solve the above-mentioned problems, and to obtain semiconductor chips that improve the yield rate per wafer and enable dicing without disturbing the arrangement of semiconductor chips. purpose.

[Means to resolve imposition]

This invention removes the semiconductor layer in the peripheral area of the semiconductor chip in the area where the semiconductor chip is handled in a wafer state, exposes the metal layer on the back side, and then separates the semiconductor wafer into semiconductor chips by a method such as scribing. It is characterized by:

[Effect]

By adopting this structure, it becomes possible to separate semiconductor chips by a scribing method using a diamond cutter or a dicing saw as described above. or,
After separating the semiconductor chips, when handling the semiconductor chips, by grasping the +a metal layer formed around the semiconductor chips, cracking or chipping of the semiconductor chips due to external stress during handling is prevented.

〔Example〕

An embodiment of the present invention will be described as the first factor.

In the figure, the portion (4) of the semiconductor layer (1) is removed by etching or the like to expose the metal layer +21 frd. @2
The forming method of the present invention will be explained with reference to the drawings.

In FIG. 2, similar to (,) and () as in FIG.
b) After the completion of the process, the surface (3) is etched etc.
The semiconductor layer (1) is completely removed, and a hole (4) f is formed. Thereafter, grooves (6) are formed using a diamond cutter or a dicing saw, and pressure is applied from the outside in the same manner as described above to divide the semiconductor chips (7). When handling the separated semiconductor chip with a bin set or the like, cracking of the semiconductor chip can be prevented by pinching the malleable metal layer (41 parts) without touching the fragile GaAv layer.

In addition, semiconductor chips can be separated by a scribing method using a diamond cutter or dicing saw similar to that explained in Fig. 6 without using etching, eliminating the need for wide dicing lines and increasing the yield rate of chips per wafer. Although the description is made for semiconductor chip FETs without disturbing the arrangement of the semiconductor chip, it can also be applied to other semiconductor materials or other transistors, thyristors, and ICs.
] It is Noh.

〔Effect of the invention〕

As described above, according to the present invention, the semiconductor from a part of the peripheral area of the semiconductor chip is completely removed and the metal formed on the back surface is removed.
' is exposed, and the other parts are semiconductor layers and metal I! By adopting a structure in which i is the same or the semiconductor layer is larger, the yield rate of dice per wafer is improved,
Moreover, dicing without disturbing the arrangement of semiconductor chips has become possible.

Furthermore, by handling the entire semiconductor chip using the exposed metal layer portion, cracking of the semiconductor chip can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing an embodiment of a semiconductor chip using the present invention, FIGS. 3 to 5 are schematic diagrams showing an example of a conventional semiconductor chip, and FIG. 6 is a process of separating a semiconductor chip from a semiconductor wafer. FIG. 2 is a diagram illustrating a process of separating semiconductor chips from a semiconductor wafer to which the present invention is applied. In the figure, (1) is the semiconductor layer, (2) is the metal layer, (3) is the surface on which the pattern is formed, (4) is the notch of the semiconductor layer using this invention, and (6) is the metal layer. Groove formed (6
) is a scribe line, and (71id) is a semiconductor chip separated from a semiconductor wafer. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A semiconductor chip, characterized in that the semiconductor chip has a metal layer of 20 μm or more on the back surface of the semiconductor, a cutout is formed in a part of the semiconductor surface, and the metal layer in the cutout is exposed.