JPH0528849Y2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field] This invention relates to a vertical synchronization signal sampling device,
For example, it relates to a device used for extracting equalization pulses in a horizontal AFC circuit of a television receiver.

[Conventional technology]

FIG. 2 shows a conventional horizontal
The AFC circuit is shown in FIG. 1. In the figure, reference numeral 1 denotes a horizontal oscillator circuit, 2 denotes a horizontal output circuit, 3 denotes a horizontal output terminal, and 4 denotes a phase comparator.

The phase comparator 4 has a flyback pulse input terminal 5.
The vertical synchronizing signal extraction circuit 7 removes the vertical synchronizing signal from among the synchronizing signals including the flyback pulse from the synchronizing signal input terminal 6 and at least the horizontal synchronizing signal from the synchronizing signal input terminal 6.

The horizontal oscillation circuit 1 is composed of a voltage controlled oscillator (VCO), which drives a horizontal output transistor 10 with a pulse from a horizontal output terminal 3, and compares the phase of the flyback pulse obtained thereby with a synchronization signal to detect an error. By feeding back the voltage to the VCO of the horizontal oscillation circuit 1, a kind of PLL is constructed and the screen is made to match the synchronization signal. In the figure, 11 is a flyback transformer.

Here, the vertical synchronization extraction circuit 7 extracts the vertical synchronization signal included in the synchronization signal and the equalization pulse (see FIG. 3a).
The synchronization signal is extracted during this period so that the above PLL is not disturbed by the vertical period.
The provision of such sampling circuits is becoming more common, especially in integrated circuits. Furthermore, when the vertical period is created by dividing the horizontal synchronizing signal as in the countdown method, it is easily possible to extract it from the equalization pulse before the vertical synchronizing signal as shown in Figure 3b. . In this way, 3H minutes before the vertical synchronization signal,
If the remaining 6H are extracted, the horizontal synchronization will hardly be disturbed by the vertical synchronization signal. Note that FIG. 4a is a compressed view of FIG. 3b on the time axis.

[Problem that the invention attempts to solve]

By the way, in the case of a vertical synchronization signal sampling circuit with such a configuration, if a signal without vertical synchronization, such as a test signal for checking a VTR channel, is received, a free-running oscillation will be output as the vertical synchronization signal. As a result, as shown in Figure 4b, the trailing edge of the extraction extends to the rear, and horizontal synchronization signals other than the original vertical synchronization signal and equalization pulse are also extracted, making it difficult to receive such signals. In this case, the sampling width becomes long and the screen becomes distorted.

In addition, a synchronization signal detection circuit that detects that the horizontal synchronization signal and flyback pulse match,
When the synchronization signal is inputted through the sampling circuit, there is a drawback that a large sag occurs in the detected voltage at a timing corresponding to the vertical synchronization signal.

This invention was made in order to eliminate the above-mentioned drawbacks, and the object is to obtain a vertical synchronizing signal extracting device that can stably extract only the vertical synchronizing signal and equalization pulse.

[Means for solving problems]

The vertical synchronization signal extraction device according to this invention includes a vertical synchronization detector which receives a synchronization signal including at least a horizontal synchronization signal and detects whether or not this synchronization signal includes a vertical synchronization signal; Based on the detection of the input synchronization signal, if the input synchronization signal contains a vertical synchronization signal, the vertical synchronization signal and all equalization pulses before and after it are extracted from the input synchronization signal, and a synchronization signal is output. A signal sampling circuit is provided for outputting the input synchronization signal as it is when the vertical synchronization signal is not included in the input synchronization signal.

[Effect]

In this device, the presence or absence of the vertical synchronization signal is detected by the vertical synchronization detector, and only when the vertical synchronization signal is present, the vertical synchronization signal and all equalization pulses before and after it are extracted, so the vertical synchronization signal can be extracted stably. be able to.

〔Example〕

An embodiment of this invention will be described below with reference to the drawings. FIG. 1 shows a vertical synchronization signal extraction device according to an embodiment of the present invention. In the figure, 1 to 7 are the second
It is similar to the figure. 8 is synchronization signal input terminal 6
9 is a vertical synchronization detector that detects the presence or absence of a vertical synchronization signal. A signal sampling circuit 12 extracts a vertical synchronization signal and equalization pulses before and after the vertical synchronization signal according to the detection result of the vertical synchronization detector 9 using the vertical synchronization sampling circuit 7 and the switch 8.

The following operation will be explained. Switch 8 inputs the vertical synchronization signal to the phase comparator 4 through the sampling circuit 2 when it is input normally, but when there is no vertical synchronization signal, the vertical synchronization detector 9 controls switch 8 to output the synchronization signal. 6 is input to the phase comparator 4 as is.

By doing this, when there is a vertical synchronization signal, the vertical synchronization signal and the equalization pulses before and after it are completely extracted, while when there is no vertical synchronization signal, the vertical This eliminates the problem that the horizontal sync signal is extracted up to the point determined by the free run frequency, so the screen will not be distorted even when a signal without a vertical sync signal is received, such as when receiving a VTR test signal. Stable horizontal AFC will be applied.

Here, the vertical synchronization detector 9 can be realized relatively easily if the vertical synchronization signal is obtained by dividing the frequency of the horizontal synchronization signal.

In the above embodiment, only the one applied to horizontal AFC was explained, but it can be applied not only to horizontal AFC, but also to horizontal AFC.
It can be applied to all synchronization signal detectors and those that handle horizontal synchronization signals.

[Effect of idea]

As described above, according to the vertical synchronization signal extraction device according to the invention, a synchronization signal including at least a horizontal synchronization signal is input, and vertical synchronization detection detects whether or not this synchronization signal includes a vertical synchronization signal. Based on the detection of the vertical synchronization detector and the vertical synchronization detector, if the input synchronization signal contains a vertical synchronization signal, the vertical synchronization signal and all equalization pulses before and after it are extracted from the input synchronization signal. Since a signal extraction circuit is provided that outputs a synchronization signal and outputs the input synchronization signal as it is when the input synchronization signal does not include a vertical synchronization signal, the vertical synchronization signal can be stably extracted. There is an effect that can be done.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a vertical synchronizing signal extracting device according to an embodiment of the present invention, FIG. 2 is a diagram showing a conventional vertical synchronizing signal extracting device, and FIG. 3 is a diagram for explaining the operation of the device shown in FIG. 2. FIG. 4 is a waveform diagram for explaining the problem of the device shown in FIG. 2. In the figure, 1 is a horizontal oscillation circuit, 2 is a horizontal output circuit, 3 is a horizontal output terminal, 4 is a phase comparator, 5 is a flyback pulse input terminal, 6 is a synchronization signal input terminal, 7 is a vertical synchronization extraction circuit, and 8 is a switch,
9 is a vertical synchronization detector, 10 is a horizontal output transformer,
11 is a flyback transformer, and 12 is a signal extraction circuit.

Claims (1)

[Claims for Utility Model Registration] A vertical synchronization detector to which a synchronization signal including at least a horizontal synchronization signal is input and detects whether or not this synchronization signal includes a vertical synchronization signal; Based on this, when the input synchronization signal includes a vertical synchronization signal, a synchronization signal is output by extracting the vertical synchronization signal and all equalization pulses before and after it from the input synchronization signal, and the input synchronization signal is output. A vertical synchronizing signal extracting device comprising: a signal extracting circuit that outputs an input synchronizing signal as it is when the signal does not include a vertical synchronizing signal.