JP2012078941A - Information processor and cache control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an information processor capable of writing dirty data onto an external storage even when abnormal termination due to a power failure or the like occurs, and to provide a cache control method.SOLUTION: According to one embodiment of the present invention, an information processor accessible to a first external storage includes a host system, a second external storage, a volatile memory, first cache control means, termination processing means, and initialization means. The second external storage serves as a secondary cache for the first external storage. The volatile memory serves as a primary cache for the first external storage, and is supplied with power by battery at the time of a power failure. The first cache control means stores write data to be written onto the first external storage in a cache area in the volatile memory. When the information processor is terminated abnormally and then started up, the initialization means writes dirty data stored in the cache area in the volatile memory onto the first external storage.

Description

  Embodiments described herein relate generally to an information processing apparatus that controls a cache operation according to an access request to an external storage device and a cache control method applied to the apparatus.

  In disk cache processing using a semiconductor memory, when the host system requests writing of data from the main memory to the hard disk, for example, the data is temporarily stored in the semiconductor memory (also called a cache memory) before the data is written to the hard disk. A write-back process for storing and temporarily storing the data stored in the hard disk at a predetermined timing is executed. In the write back process, in response to the temporary storage of data in the cache memory, the host system is notified of the completion of the data writing. Therefore, the apparent access speed of the hard disk to the host system can be improved.

  However, the write-back process has a problem that data temporarily stored in the cache memory is lost when a power failure or the like occurs during operation. Therefore, in the write-back processing using a volatile cache memory, when an abnormality is detected in the power supplied using the external power supply, the cache memory is stored while the power is supplied by the backup battery. A technique for saving stored data in a nonvolatile memory is used.

JP 2008-192028 A

  In the above write-back process, a backup battery needs to be connected to the host system. However, providing an uninterruptible power supply connected to the host system is expensive.

  Incidentally, a RAID controller or the like connected to the host system may be provided with a volatile memory that is backed up by a battery. A processor in the RAID controller can use this volatile memory as a working memory. In the RAID controller, when power is not supplied from an external power source due to a power failure or the like, data stored in the volatile memory is held by supplying power to the volatile memory using a battery. Therefore, when the power supply from the external power source is recovered within the time that can be backed up by the battery, for example, data stored in the volatile memory can be written to the external storage device.

  However, a volatile memory provided in the RAID controller (a volatile memory backed up by a battery) is used as a working memory of the RAID controller and cannot be used as a cache of the host system.

  An object of the present invention is to provide an information processing apparatus and a cache control method capable of writing cached dirty data to an external storage device even when an abnormal end such as a power failure occurs.

  According to the embodiment, the information processing apparatus that can access the first external storage device includes a host system, a second external storage device, a volatile memory, a first cache control unit, a termination processing unit, and an initialization unit. . The second external storage device functions as a secondary cache for the first external storage device, and temporarily stores read data read from the first external storage device and write data to be written to the first external storage device . The volatile memory functions as a primary cache for the first external storage device, and power is supplied using a battery during a power failure. The first cache control means stores write data to be written to the first external storage device in response to a write request from the host system in a cache area in the volatile memory, and is stored in the volatile memory. Update cache management information. When the information processing apparatus is normally terminated, an end processing unit is configured to transfer the dirty data stored in the cache area in the volatile memory based on the cache management information stored in the volatile memory. Write to the storage device or the second external storage device. When the information processing apparatus is started after the information processing apparatus is abnormally terminated due to a power failure, the dirty data stored in the cache area in the volatile memory is based on the cache management information stored in the volatile memory. Are written into the first external storage device or the second external storage device.

1 is a block diagram showing a configuration of an information processing apparatus according to a first embodiment. 4 is an exemplary view showing an example in which a memory provided in a RAID controller is projected onto a main memory provided in the information processing apparatus of the embodiment. The conceptual diagram which shows the software structure of the information processing apparatus of the embodiment. 2 is an exemplary block diagram showing the configuration of a cache driver program executed by the information processing apparatus of the embodiment. FIG. 2 is an exemplary diagram showing a configuration example of an address table used by the information processing apparatus of the embodiment. FIG. 6 is an exemplary flowchart illustrating an example of a procedure of an initialization process which is executed by the information processing apparatus of the embodiment. 6 is an exemplary flowchart illustrating an example of the procedure of a read process which is executed by the information processing apparatus of the embodiment. 6 is an exemplary flowchart illustrating an example of a procedure of a write process which is executed by the information processing apparatus of the embodiment. The block diagram which shows the structure of the information processing apparatus which concerns on 2nd Embodiment. 6 is an exemplary flowchart illustrating an example of a procedure of an initialization process which is executed by the information processing apparatus of the embodiment.

Hereinafter, a first embodiment will be described with reference to FIGS. 1 to 8.
First, the configuration of the information processing apparatus according to the first embodiment will be described with reference to FIG. This information processing apparatus can be realized as a computer 1 such as a server computer or a personal computer, for example.

  The computer 1 includes a host system 10, a RAID controller 20, and an external storage device 30. The host system 10 is connected to the RAID controller 20 and accesses the external storage device 30 via the RAID controller 20. The RAID controller 20 is connected to the external storage device 30. The RAID controller 20 reads data from the external storage device 30 and writes data to the external storage device 30 based on the RAID technology. The external storage device 30 includes a nonvolatile storage device. The external storage device 30 includes, for example, an SSD 31 and three HDDs 32, 33, and 34.

  The host system 10 includes a processor 11, a PCH (Platform Controller Hub) 12, and a main memory 13. The processor 11 controls the operation of each unit in the host system 10. The processor 11 executes, for example, an operating system (OS), a cache driver program 54, a service 43, various application programs, and the like loaded from the external storage device 30 onto the main memory 13. Further, the processor 11 can output a command to the RAID controller 20 connected to the host system 10. This command is, for example, a read command for reading data from the external storage device 30 and a write command for writing data to the external storage device 30.

  The PCH 12 controls each device on a PCI (Peripheral Component Interconnect) bus. The PCH 12 has a built-in USB controller that controls a USB device that is detachably connected to the USB port.

  The RAID controller 20 includes a processor 21, a memory 22, a battery 23, a battery circuit 24, a PCI Express connector 26, a SAS connector 27, and a DMA controller 28.

  The processor 21 controls the operation of each unit in the RAID controller 20. The processor 21 receives a command output by the processor 11 (host system 10) via the PCI Express bus and the PCI Express connector 26. Then, the processor 21 executes processing according to the received command.

  The processor 21 is connected to a memory 22 that is backed up by a battery 23. The memory 22 is a volatile memory including a work area used for processing by the processor 21 and a cache area used for a disk cache. Electric power can be supplied to the memory 22 even during a power failure using the battery 23. Therefore, the memory 22 can be used for a cache operation in the write back mode.

  That is, the memory 22 is a cache memory in which read data read from the external storage device 30 and write data written to the external storage device 30 are temporarily stored in response to a request from the processor 11 (host system 10). Used. That is, the memory 22 functions as a primary cache for the external storage device 30 (HDD 32, 33, 34). The host system 10 is provided with an interface for using the memory 22 in the RAID controller 20. In order to function as a cache memory (primary cache) of the host system 10, the memory 22 includes an area for storing the cache management information 221 and a temporary cache area 222. That is, the area where the cache management information 221 is stored and the temporary cache area 222 are arranged not in the main memory 13 of the host system 10 but in the memory 22 of the RAID controller 20. Since the memory 22 is backed up by the battery 23 as described above, the cache management information 221 and the data stored in the temporary cache area 222 can be retained even during a power failure. The processor 11 of the host system 10 uses the memory 22 as the main memory 13 so that the area in which the cache management information 221 is stored and the temporary cache area 222 can be logically used as a part of the main memory 13. May be projected onto the screen.

  In the cache operation in the write back mode, for example, in response to a write request issued by the host system 10 to write data to the external storage device 30, the data designated by the write request is transferred to the cache area 222 in the memory 22. Is written to. Then, the host system 10 is notified that the data writing has been completed. The data written in the cache area 222 is written into the external storage device 30 at a predetermined timing. In the write-back mode, in response to the data (write data) being stored in the cache area 222, the host system 10 is notified of the completion of the data writing, so the external storage device 30 appears to the host system 10. The above writing speed can be improved.

  In the case where the write back mode has been used in the system so far, since the RAID card (RAID controller 20) is not used, primary data (referred to as dirty data) to be written to the external storage device 30 exists in the memory 13 in the host system 10. To do. For this reason, when an unexpected power failure occurs due to a power failure or the like, the dirty data cannot be written to the external storage device 30. That is, since the data stored in the volatile memory 13 is volatilized, dirty data to be written to the external storage device 30 is lost. In addition, cache management information including information indicating the correspondence between the address (area) of the volatile memory 13 in which data is stored and the address (area) in the external storage device 30 in which the data is stored is also lost.

  For this reason, in this embodiment, paying attention to the fact that the memory 22 in the RAID card is backed up by the battery 23, as the storage destination of the primary cache of data when the processor 11 of the host system 10 receives a write request. By using the memory 22 in the RAID card, the data stored in the memory 22 can be retained even during a power failure. Therefore, when the computer 1 recovers from a power failure, dirty data can be written to the external storage device 30 using the data held in the memory 22.

  FIG. 2 shows an example in which the memory 22 provided in the RAID controller 20 is projected onto the main memory 13. The memory 22 provided in the RAID controller 20 includes a work area used by the RAID controller 20 (processor 21), an area for storing cache management information 221 used by the host system 10 (processor 11), and a temporary area. Cache area 222. The work area, the area for storing the cache management information 221 used by the host system 10 and the temporary cache area 222 are used exclusively. The area for storing the cache management information 221 used by the host system 10 and the temporary cache area 222 can be projected onto the main memory 13 by, for example, BIOS settings. Thereby, the host system 10 can use the memory 22 in the RAID controller 20 as if it is a part of the main memory 13.

  The battery 23 in the RAID controller 20 backs up the memory 22 and the battery circuit 24. That is, power is supplied to the memory 22 and the battery circuit 24 using the battery 23 at the time of a power failure. For the battery 23, for example, a nickel metal hydride battery or a lithium secondary battery is used. The backup time by the battery 23 is, for example, 72 hours.

  The battery circuit 24 supplies power to the memory 22 at a predetermined timing such as when a power failure is detected. Specifically, the battery circuit 24 controls power supply to the memory 22 based on a BBU (Battery Backup Unit) option 25. The BBU option 25 includes, for example, a parameter that defines the timing for supplying power to the memory 22.

  The battery circuit 24 controls power supply to the memory 22 at the time of a power failure, for example, using a hardware flag (not shown) provided in the RAID controller 20. This flag is set when data exists in the memory 22 and is reset when the computer 1 is normally terminated (for example, when the shutdown process is normally completed). When a power failure occurs, the computer 1 ends abnormally and the flag remains set. The battery circuit 24 supplies power to the memory 22 using the battery 23 when the occurrence of a power failure is detected and this flag is set. In response to the detection of a power failure, the memory controller that controls the memory 22 is set to, for example, a self-refresh mode that performs a refresh operation on the memory 22. Data in the memory 22 can be held by a refresh operation by the memory controller.

  As described above, the external storage device 30 includes, for example, the SSD 31 and the three HDDs 32, 33, and 34. The SSD 31 functions as a secondary cache for the HDDs 32, 33, 34 and temporarily stores read data read from the HDDs 32, 33, 34 and write data to be written to the HDDs 32, 33, 34. The SSD 31 includes a cache area 31A and an area for storing cache management information 31B. That is, a part of the SSD 31 is used as a cache device.

  The HDDs 32, 33, and 34 include cache corresponding areas 32A, 33A, and 34A, respectively. That is, the HDDs 32, 33, and 34 are cache target devices, and read data read from the HDDs 32, 33, and 34 and write data to be written to the HDDs 32, 33, and 34 are cache areas 31A (secondary caches) provided in the SSD 31. ) And a temporary cache area 222 (primary cache) provided in the memory 22 in the RAID controller 20.

  The SSD 31 generally has a larger capacity than a semiconductor memory such as an SDRAM, and can be accessed at a higher speed than the HDDs 32, 33, and 34. Therefore, by using the SSD 31 as a secondary cache for the HDDs 32, 33, and 34, cache control with fewer cache misses than the semiconductor memory and accessible at a higher speed than the HDDs 32, 33, and 34 can be realized.

  Cache control for the processor 11 of the host system 10 to use the memory 22 in the RAID controller 20 as a primary cache and the SSD 31 as a secondary cache is performed by software, for example. FIG. 3 shows an example of the software configuration of the computer 1. The computer 1 controls the operation of the hardware 60 belonging to the lower layer (physical layer) using a layered software group belonging to the user space 40 and the kernel space 50. As shown in FIG. 3, the user space 40 includes, for example, an application program 41, a GUI 42, a service 43, a cache API 44, and the like. The kernel space 50 includes, for example, an OS 51, a file system 52, a disk class driver 53, a cache driver (filter) 54, a storage driver 55, an iSCSI 56, and a TCP / IP 57.

  As shown in the hierarchy of FIG. 3, the cache driver 54 issues a write command issued by the OS 51 for writing data to the HDDs 32, 33, 34 and a read command for reading data from the HDDs 32, 33, 34. These commands are received before being output to the RAID controller 20 (ie, hardware 60). Then, the cache driver 54 uses the memory 22 (primary cache) and the SSD 31 (secondary cache) to execute processing according to the received command. As shown in FIG. 3, instead of the HDDs 32, 33, and 34 provided in the computer 1, an HDD (iSCSI target) 66 connected via the network 65 may be used as a cache target device.

  FIG. 4 shows an example of the configuration of the cache driver program 54. The cache driver 54 performs control for using the memory 22 as a primary cache of the host system 10 and using the SSD 31 as a secondary cache of the host system 10. The cache driver 54 includes an initialization unit 71, a cache control unit 72, and an end processing unit 73.

  In response to the activation of the computer 1 (host system 10), the initialization unit 71 initializes a portion corresponding to the area where the cache management information 221 is stored and the temporary cache area 222. Apply. Normally, when the computer 1 is turned on, the memory 22 is cleared by the RAID controller 20 for initialization. However, when the computer 1 is started after abnormal termination due to a power failure or the like, the memory 22 may hold the cache management information 221 and the data in the temporary cache area 222. In order to prevent these data from being erased, for example, the RAID controller 20 performs a clear process for clearing data on the work area portion of the RAID controller 20 to temporarily store the cache management information 221 and the area where the cache management information 221 is stored. A part corresponding to the cache area 222 is set to execute a scrubbing process for checking consistency using a parity bit. The initialization unit 71 performs initialization processing on the memory 22 that has been subjected to the above-described processing (clear processing and scrubbing processing) by the RAID controller 20.

The initialization unit 71 includes a power failure determination unit 711, a first initialization unit 712, and a second initialization unit 713.
The power failure determination unit 711 determines whether the computer 1 ended normally or abnormally when the computer 1 ended last time. The header information of the cache management information 221 stored in the memory 22 is cleared when the computer 1 is normally terminated (for example, when the shutdown process is normally completed). Using the presence / absence of the header information as a flag, the power failure determination unit 711 determines that the computer 1 ended normally last time, for example, when the header information of the cache management information 221 does not exist at a predetermined position in the memory 22. To do. For example, when the header information of the cache management information 221 exists at a predetermined position in the memory 22, the power failure determination unit 711 determines that the computer 1 ended abnormally last time.

  In addition, you may provide the flag (abnormal end flag) for the determination of the normal end or abnormal end by the power failure determination part 711. FIG. In that case, for example, when the computer 1 is started after the normal termination, an abnormal termination flag indicating that the computer 1 terminated abnormally is set, and when the computer 1 is terminated normally, the abnormal termination flag is reset. . Therefore, when the abnormal end flag remains set at the next startup, the power failure determination unit 711 determines that the computer 1 has ended abnormally last time.

  The power failure determination unit 711 requests the first initialization unit 712 to start processing when it is determined that the computer 1 ended normally last time. The first initialization unit 712 starts a process for initializing the memory 22 in response to the request from the power failure determination unit 711. Specifically, the first initialization unit 712 creates, for example, an address table 221A and a command table 221B by building cache management information 221 in the memory 22. The first initialization unit 712 loads the cache management information 31B stored in the SSD 31 into the created address table 221A.

  FIG. 5 shows a configuration example of the address table 221A. The cache management information 221 includes an entry corresponding to data stored in the temporary cache area 222 or the cache area 31A. The data stored in the temporary cache area 222 or the cache area 31A is, for example, data corresponding to read data from the HDDs 32, 33, 34 or write data to the HDDs 32, 33, 34. Each entry includes, for example, cache area information, area information in the HDD, and an HDD write flag. In an entry corresponding to certain data, the cache area information indicates an area on the memory 22 where the data is stored (for example, a range indicated by an address). The area information in the HDD indicates an area on the HDD 32, 33, 34 in which the data is stored (or should be stored). The HDD write flag (dirty flag) indicates whether or not the data has been written to the HDDs 32, 33 and 34. For example, when the data has already been written in the HDDs 32, 33, 34, a value indicating that the data has been written is set in the HDD write flag (that is, the dirty flag is not set). For example, when the data has not been written to the HDDs 32, 33, 34, the HDD write flag is set to a value indicating that the data has not been written (that is, the dirty flag is set). In other words, the HDD write flag indicates whether or not the data is dirty data (data that has not yet been written to the HDDs 32, 33, and 34). The entry corresponding to the data stored in the temporary cache area 222 and the entry corresponding to the data stored in the cache area 31A may be described in different tables (directories). That is, the cache management information 221 includes, for example, a directory including an entry corresponding to data stored in the temporary cache area 222 (also referred to as a primary cache directory) and an entry corresponding to data stored in the cache area 31A. Directory (also referred to as a secondary cache directory).

  When the power failure determination unit 711 determines that the computer 1 ended abnormally last time, the power failure determination unit 711 requests the second initialization unit 713 to start processing. The second initialization unit 713 responds to the request from the power failure determination unit 711 and based on the cache management information 221 (address table 221A) stored in the memory 22, the dirty stored in the temporary cache area 222. Data is written to the HDD 32, 33, 34 or SSD 31. Specifically, the second initialization unit 713 detects an entry for which the HDD write flag is not set (that is, corresponding data is dirty data) from a plurality of entries included in the address table 221A. Then, the second initialization unit 713 reads data (dirty data) from the temporary cache area 222 based on the cache area information included in the detected entry, and based on the area information in the HDD included in the entry. Thus, the read data is written in the HDDs 32, 33, 34. The second initialization unit 713 may write the read dirty data in a corresponding area or a free area in the cache area 31A (SSD 31). The second initialization unit 713 sets a value indicating that data has been written to the HDDs 32, 33, and 34 in the HDD write flag of the entry.

  Note that the second initialization unit 713 may write the dirty data stored in the temporary cache area 222 to the HDDs 32, 33, 34 or the SSD 31 based on the command table 221B. The command table 221B includes, for example, a plurality of entries corresponding to a plurality of commands. An entry corresponding to a certain command includes, for example, the type of the command and a completion flag. The command type indicates a read command, a write command, or the like. Further, the read destination or the write destination may be indicated. The completion flag indicates whether or not the execution of the command is completed.

  When using the command table 221B, the second initialization unit 713 determines whether there is a command that has not been executed (ie, is being executed) in the command table 221B based on the completion flag. . When there is a command that has not been executed, the second initialization unit 713 determines whether or not the command is a write command. When the command is a write command, the second initialization unit 713 writes the data stored in the temporary cache area 222 corresponding to the command to the HDDs 32, 33, and 34 (or the SSD 31). Then, the second initialization unit 713 sets a value indicating that the execution has been completed in the completion flag included in the entry corresponding to the command. The second initialization unit 713 also sets a value indicating that the data is not dirty data to the HDD write flag included in the entry in the address table 221A corresponding to the data written to the HDDs 32, 33, and 34 by execution of the command. Set. When the command is a read command, the second initialization unit 713 clears the entry corresponding to the command from the command table 221B. By performing the above-described processing for all commands that have not been executed, the HDD 32, 33, and HDD 32, 33, without losing dirty data stored in the primary cache (memory 22) even when a power failure occurs. 34 can be written.

After the initialization process described above is completed, the process by the cache control unit 72 is started.
The cache control unit 72 controls the cache operation using the memory 22 initialized by the first initialization unit 712 or the second initialization unit 713. The cache control unit 72 includes a read control unit 722, a cache read unit 722A, an SSD read unit 722B, an HDD read unit 722C, a write control unit 723, a cache write unit 723A, an SSD write unit 723B, an HDD write unit 723C, and a read completion notification unit. 724 and a write completion notification unit 725.

  The command receiving unit 721 issues a read command issued by the OS 51 (host system 10) to read data from the HDDs 32, 33, and 34 (cache corresponding areas 32A, 33A, and 34A), and data to the HDDs 32, 33, and 34. Receives a write command for writing. The command receiving unit 721 outputs the received read command to the read control unit 722. In addition, the command receiving unit 721 outputs the received write command to the write control unit 723.

  The read control unit 722 controls processing for reading data specified in the read command output by the command receiving unit 721. Specifically, first, the read control unit 722 uses the cache management information 221 to determine whether data corresponding to the data specified by the read command is stored in the temporary cache area 222. When the data is stored in the temporary cache area 222, the read control unit 722 requests the cache read unit 722A to read the data from the temporary cache area 222. The cache read unit 722A reads the data from the temporary cache area 222 in response to a request from the read control unit 722. The read data is stored in the main memory 13, for example. Then, the cache read unit 722A notifies the read completion notification unit 724 that the data specified by the read command has been read. The read completion notification unit 724 notifies the OS 51 (host system 10) that the execution of the read command has been completed. Note that the read control unit 722 issues a read command for reading the data from the temporary cache area 222 to the memory 22 instead of requesting the cache read unit 722A to read the data (recombination issue). May be.

  When the data is not stored in the temporary cache area 222, the read control unit 722 uses the cache management information 221 to store the data corresponding to the data specified by the read command in the cache area 31A in the SSD 31. It is determined whether or not. When data corresponding to the data specified by the read command is stored in the cache area 31A, the read control unit 722 requests the SSD read unit 722B to read the data from the cache area 31A. In response to the request from the read control unit 722, the SSD read unit 722B reads the data from the cache area 31A. The read data is stored in the main memory 13, for example. Then, the SSD read unit 722B notifies the read completion notification unit 724 that the data specified by the read command has been read. The read completion notification unit 724 notifies the OS 51 (host system 10) that the execution of the read command has been completed. The SSD read unit 722B may write the read data in the temporary cache area 222. In that case, the SSD read unit 722B includes information (cache area information) indicating an area in the memory 22 in which data is written, and in the HDDs 32, 33, and 34 from which data is read (corresponding to the area in the SSD 31). An entry including information indicating the area (area information in the HDD) is added to the cache management information 221. Instead of requesting the SSD read unit 722B to read data, the read control unit 722 may issue a read command for reading the data from the cache area 31A in the SSD 31 to the SSD 31.

  If the data is not stored in either the temporary cache area 222 in the memory 22 or the cache area 31A in the SSD 31, the read control unit 722 sends the data from the HDDs 32, 33, and 34 to the HDD read unit 722C. Is requested to be read. The HDD read unit 722C reads the data from the HDDs 32, 33, and 34 in response to the request from the read control unit 722. The read data is stored in the main memory 13, for example. Then, the HDD read unit 722C notifies the read completion notification unit 724 that the data specified by the read command has been read. The read completion notification unit 724 notifies the OS 51 (host system 10) that the execution of the read command has been completed. Further, the HDD read unit 722C may write the read data into the temporary cache area 222 and the cache area 31A. In this case, the HDD read unit 722C has information (cache area information) indicating an area in the memory 22 in which data is written, and information (area in the HDD) indicating areas in the HDDs 32, 33, and 34 from which the data is read. An entry including (region information) is added to the cache management information 221. Also, the HDD read unit 722C has information (cache area information) indicating an area in the SSD 31 in which data is written and information (area information in the HDD) indicating areas in the HDDs 32, 33, and 34 from which the data has been read. ) Is added to the cache management information 221. The read control unit 722 may issue a read command for reading the data from the HDDs 32, 33, 34 to the HDDs 32, 33, 34 instead of requesting the HDD read unit 722 C to read the data. Good.

  The write control unit 723 controls processing for writing data designated in the write command output by the command receiving unit 721. Specifically, first, the write control unit 723 requests the cache write unit 723A to write the data specified by the write command in the temporary cache area 222. In response to the request from the write control unit 723, the cache write unit 723A writes the data in the temporary cache area 222. The cache write unit 723A includes information (cache area information) indicating an area in the memory 22 in which data is written, information (area information in the HDD) indicating areas in the HDDs 32, 33, and 34 where the data is to be written. Is added to the cache management information 221. In the entry to be added, a value indicating that data has not been written to the HDDs 32, 33, 34 is set in the HDD write flag. Then, the cache write unit 723A notifies the write completion notification unit 725 that the data designated by the write command has been written. The write completion notification unit 725 notifies the OS 51 (host system 10) that the execution of the write command has been completed. Note that the write control unit 723 issues a write command for writing the data to the temporary cache area 222 to the memory 22 instead of requesting the cache write unit 723A to write the data (recombination issue). May be.

  Next, the write control unit 723 has an area in the cache area 31 </ b> A (SSD 31) where the dirty data stored in the temporary cache area 222 can be written at a predetermined timing (for example, at regular intervals). Determine whether or not. Specifically, the write control unit 723 is stored in the temporary cache area 222 in the plurality of entries corresponding to the data stored in the cache area 31 </ b> A in the SSD 31 using the cache management information 221. It is determined whether there is an entry in which the entry corresponding to the dirty data matches the area information in the HDD 32, 33, 34. When there is an entry in which the area information in the HDDs 32, 33, and 34 match, the write control unit 723 writes the dirty data stored in the temporary cache area 222 to the cache area 31 A in the corresponding SSD 31. Requests to the SSD write unit 723B. The SSD write unit 723B writes the dirty data stored in the temporary cache area 222 to the cache area 31A in the corresponding SSD 31. The SSD write unit 723B then enters an entry corresponding to the temporary cache area 222 in which the data is stored (referred to as a first entry) and an entry corresponding to the cache area 31A in the SSD 31 in which the data is written. (Referred to as the second entry). That is, the SSD write unit 723B sets a value indicating that it is not dirty data in the HDD write flag of the first entry, and sets a value indicating that it is dirty data in the HDD write flag of the second entry.

  In addition, when there is no entry in which the area information in the HDDs 32, 33, and 34 matches, the write control unit 723 can write the dirty data stored in the temporary cache area 222 to the cache area 31 </ b> A in the SSD 31. Determine if there is free space. When there is an empty area where dirty data can be written, the write control unit 723 requests the SSD write unit 723B to write the dirty data stored in the temporary cache area 222 to the empty area in the cache area 31A. To do. Then, the SSD write unit 723B writes the dirty data stored in the temporary cache area 222 to a free area in the cache area 31A of the SSD 31. The SSD write unit 723B then enters an entry (first entry) corresponding to the temporary cache area 222 in which the data is stored and an entry (first entry) corresponding to the cache area 31A in the SSD 31 in which the data is written. 2 entries). That is, the SSD write unit 723B sets a value indicating that it is not dirty data in the HDD write flag of the first entry. In addition, the SSD write unit 723B includes information indicating an area in the SSD 31 in which the data is written, information indicating areas in the HDDs 32, 33, and 34 in which the data is written, and an HDD write flag indicating that the data is dirty data. Is added to the cache management information 221. Note that the write control unit 723 may issue a write command (recombination issue) for writing the data to the cache area 31 </ b> A to the SSD 31 instead of requesting the SSD write unit 723 </ b> B to write the data.

  Further, when there is no free area in the cache area 31A where dirty data can be written, the write control unit 723 uses the dirty data stored in the temporary cache area 222 as the area in the corresponding HDD 32, 33, 34. To the HDD write unit 723C. The HDD write unit 723C writes the dirty data stored in the temporary cache area 222 to the areas in the corresponding HDDs 32, 33, and 34 based on the cache management information 221. Then, the HDD write unit 723C sets a value indicating that the data is not dirty data in the HDD write flag of the entry corresponding to this data. The write control unit 723 issues a write command for writing the data to the cache corresponding areas 32A, 33A, and 34A to the HDDs 32, 33, and 34 instead of requesting the HDD write unit 723C to write the data. (Recombination issue) may be performed.

  The end processing unit 73 writes the dirty data stored in the temporary cache area 222 to the HDDs 32, 33, and 34 based on the cache management information 221 when the computer 1 is shut down (normally ended). Further, the end processing unit 73 updates the cache management information 31 </ b> B stored in the SSD 31 using the cache management information 221 stored in the memory 22. Then, the end processing unit 73 clears the header information of the cache management information 221. As described above, when the header information of the cache management information 221 is cleared, the power failure determination unit 711 detects that the computer 1 has been normally terminated last time. Note that the end processing unit 73 writes the dirty data stored in the cache area 31A of the SSD 31 to the HDDs 32, 33, and 34 based on the cache management information 221 and updates the corresponding cache management information 221 entry. Good.

  With the above configuration, even when an abnormal end occurs due to a power failure, the dirty data stored in the temporary cache area 222 can be written to the HDDs 32, 33, and 34. The above-described processing is not limited to the cache driver program 54, and may be performed in cooperation with processing by software and hardware corresponding to other layers shown in FIG.

Next, an example of the procedure of the initialization process executed by the cache driver 54 will be described with reference to the flowchart shown in FIG.
First, the power failure determination unit 711 determines whether or not the cache management information 221 is stored in the memory 22 in the RAID controller 20 (block B11). Specifically, the power failure determination unit 711 determines that the cache management information 221 is stored in the memory 22 when the header information of the cache management information 221 exists at a predetermined position in the memory 22, for example. The power failure determination unit 711 determines that the cache management information 221 is not stored in the memory 22 when the header information of the cache management information 221 does not exist at a predetermined position in the memory 22, for example. As described above, the presence of the header information of the cache management information 221 at a predetermined position in the memory 22 indicates that the computer 1 ended abnormally last time due to a power failure or the like. Further, the absence of the header information of the cache management information 221 at a predetermined position in the memory 22 indicates that the computer 1 ended normally last time.

  When the cache management information 221 is not stored in the memory 22 in the RAID controller 20 (that is, when the computer has ended normally last time) (NO in block B11), the first initialization unit 712 uses the RAID controller 20 The cache management information 221 is reconstructed in the internal memory 22 (block B12). Then, the first initialization unit 712 loads the cache management information 31B stored in the SSD 31 into the memory 22 in the RAID controller 20 (block B13).

  When the cache management information 221 is stored in the memory 22 in the RAID controller 20 (that is, when the computer has ended abnormally last time) (YES in block B11), the second initialization unit 713 uses the RAID controller 20 To use the cache management information 221 stored in the internal memory 22 (block B14). Then, the second initialization unit 713 determines whether there is a command that has not been executed based on the cache management information 221 (block B15).

  If there is a command that has not been executed (YES in block B15), the second initialization unit 713 determines whether the command is a write command (block B16). When the command is a write command (YES in block B16), the second initialization unit 713 executes the command again (block B17). Then, the second initialization unit 713 returns to block B15 and determines whether or not there is a command that has not yet been executed in the cache management information 221.

  If the command is not a write command (for example, if it is a read command) (NO in block B16), the second initialization unit 713 clears the command from the cache management information 221 (command table 221B) (block B18). ). Then, the second initialization unit 713 returns to block B15 and determines whether or not there is a command that has not yet been executed in the cache management information 221.

  When there is no command that has not been executed (NO in block B15), the second initialization unit 713 ends the process.

  Through the above processing, the memory 22 in the RAID controller 20 used as a cache memory can be initialized, and a cache operation using the memory 22 can be started. If it is determined that the computer has ended abnormally last time, the data has already been written to the HDD 32, 33, 34 in the HDD write flag using the address table 221A instead of the command table 221B of the cache management information 221. A process of writing dirty data in which a value indicating a certain value is not set to the HDDs 32, 33, 34 may be performed.

  The flowchart in FIG. 7 shows an example of the read processing procedure executed by the computer 1. The read process is started, for example, when the OS 51 issues a read command for reading data from the HDDs 32, 33, 34.

  First, the read control unit 722 determines whether the data specified by the read command is stored in the temporary cache area 222 (block B201). Specifically, the read control unit 722 uses the cache management information 221 to determine whether or not the read target data stored in the cache corresponding areas 32A, 33A, and 34A is stored in the temporary cache area 222. judge.

  When the data specified by the read command is stored in the temporary cache area 222 (YES in block B201), the read control unit 722 issues a read command for reading data from the temporary cache area 222. (Block B202). The read control unit 722 outputs the issued read command to the cache read unit 722A. The cache read unit 722A reads data specified by the read command from the temporary cache area 222 (block B203). Then, the read completion notifying unit 724 notifies the host system 10 of the read completion (block B204).

  When the data specified by the read command is not stored in the temporary cache area 222 (NO in block B201), the read control unit 722 determines whether the data specified by the read command is stored in the cache area 31A. Is determined (block B205). When the data specified by the read command is stored in the cache area 31A (YES in block B205), the read control unit 722 issues a read command for reading data from the cache area 31A (block B206). The read control unit 722 outputs the issued read command to the SSD read unit 722B. The SSD read unit 722B reads data specified by the read command from the cache area 31A (block B207). Then, the read completion notification unit 724 notifies the host system 10 of the completion of reading (block B208). Further, the SSD read unit 722B stores the read data in the temporary cache area 222 (block B209). Then, the SSD read unit 722B adds the corresponding entry to the cache management information 221 (block B210). The SSD read unit 722B includes, for example, information indicating an area in the memory 22 (temporary cache area 222) in which data is stored, and HDDs 32, 33, and 34 (cache corresponding areas 32A, 33A, and 34A) in which data is stored. And an entry including a flag indicating that the data is not dirty data (HDD write flag).

  When the data specified by the read command is not stored in the cache area 31A (NO in block B205), the HDD read unit 722C reads the data specified by the read command from the HDDs 32, 33, and 34 (block B211). Then, the read completion notification unit 724 notifies the host system 10 of the completion of reading (block B212). The HDD read unit 722C stores the read data in the temporary cache area 222 (block B213). The HDD read unit 722C stores the read data in the cache area 31A (block B214). Then, the HDD read unit 722C adds the corresponding entry to the cache management information 221 (block B215). The HDD read unit 722C includes, for example, information indicating an area in the memory 22 (temporary cache area 222) in which data is stored, and in the HDDs 32, 33, and 34 (cache corresponding areas 32A, 33A, and 34A) in which data is stored. , An entry including a flag (HDD write flag) indicating that the data is not dirty data, information indicating an area in the SSD 31 (cache area 31A) in which the data is stored, an HDD 32 in which the data is stored, 33, 34 (cache corresponding areas 32A, 33A, 34A) information indicating an area and an entry including a flag (HDD write flag) indicating that the data is not dirty data are added.

  With the above processing, corresponding data is read from the temporary cache area 222, cache area 222, or HDD 32, 33, 34 in accordance with the read command issued by the OS 51 for reading data from the HDD 32, 33, 34. be able to.

  Next, the flowchart of FIG. 8 shows an example of the procedure of the write process executed by the computer 1. The write process is started, for example, when the OS 51 issues a write command for writing data to the HDDs 32, 33, 34.

  First, the cache write unit 723A stores data specified by a write command (also referred to as write data) in a temporary cache area 222 provided in the memory 22 in the RAID controller 20 (block B301). The cache write unit 723A adds the corresponding entry to the cache management information 221. The cache write unit 723A includes, for example, information indicating an area in the memory 22 (temporary cache area 222) in which data is stored and HDDs 32, 33, and 34 (cache corresponding areas 32A, 33A, and 34A) in which the data is stored. ) And an entry including a flag (HDD write flag) indicating that the data is dirty data. Then, the write completion notifying unit 725 notifies the host system 10 of the completion of writing (block B302).

  Next, the write control unit 723 determines whether or not the cache area 31A provided in the SSD 31 has an area corresponding to an area (write target area) in the HDD 32, 33, or 34 where write data is to be written. (Block B303). When there is no area corresponding to the write target area in the HDD 32, 33, 34 in the cache area 31 </ b> A (NO in block B <b> 303), the write control unit 723 has a free area in which write data can be written in the cache area 31. Whether or not (block B309).

  When there is an area corresponding to the write target area in the HDD 32, 33, 34 in the cache area 31A (YES in block B303), or there is an empty area in which write data can be written in the cache area 31 (in block B309) YES), the write control unit 723 issues a write command for writing the write data stored in the temporary cache area 222 to the cache area 31A (block B304). The write control unit 723 outputs the issued write command to the SSD write unit 723B. Then, the SSD write unit 723B writes the write data stored in the temporary cache area 222 to the cache area 31A (block B305). Then, the SSD write unit 723B updates (adds) an entry in the cache management information 221. For example, the SSD write unit 723B adds the corresponding entry to the cache management information 221. The SSD write unit 723B includes, for example, information indicating an area in the SSD 31 (cache area 31A) in which data is stored, and areas in the HDDs 32, 33, and 34 (cache corresponding areas 32A, 33A, and 34A) in which data is stored. An entry including information indicating that the data is dirty data (HDD write flag) is added.

  Next, the write control unit 723 determines whether or not a predetermined time has elapsed since the write data was stored in the cache area 31A (block B306). If the certain time has not elapsed (NO in block B306), the write control unit 723 executes the process in block B306 again and determines whether the certain time has elapsed.

  When the predetermined time has elapsed (YES in block B306), the write control unit 723 issues a write command for writing the write data stored in the cache area 31A to the write target areas in the HDDs 32, 33, and 34 ( Block B307). Then, the HDD write unit 723C writes the write data stored in the cache area 31A to the write target areas in the HDDs 32, 33, and 34 (block B308). The HDD write unit 723C updates the corresponding entry in the cache management information 221. For example, the HDD write unit 723C sets a value indicating that it is not dirty data in the HDD write flag included in the corresponding entry.

  If there is no free area in the cache area 31 where write data can be written (NO in block B309), the write control unit 723 stores the write data stored in the temporary cache area 222 in the HDDs 32, 33, and 34. A write command for writing to the write target area is issued (block B310). The HDD write unit 723C writes the write data stored in the temporary cache area 222 to the write target areas in the HDDs 32, 33, and 34 (block B311). The HDD write unit 723C updates the corresponding entry in the cache management information 221. For example, the HDD write unit 723C sets a value indicating that it is not dirty data in the HDD write flag included in the corresponding entry.

  With the above processing, it is possible to realize a cache operation in the write-back mode using the temporary cache area 222 and the cache area 31A in accordance with a write command for writing data to the HDDs 32, 33, and 34.

  Note that the DMA controller 28 may be used for accessing the memory 22 in the RAID controller 20. Thereby, the processing amount by the processor 11 of the host system 10 and the processor 21 of the RAID controller 20 can be reduced. For example, the data transfer between the main memory 13 and the memory 22 in the RAID controller 20 is executed by the processor 11. By executing this data transfer using the DMA controller 28 in the RAID controller 20, the processor 11 can be distributed.

  Next, a second embodiment will be described based on FIG. 9 and FIG. FIG. 9 shows the configuration of an information processing apparatus (computer 1) according to the second embodiment.

  In the second embodiment, not the memory 22 in the RAID controller 20 but a non-volatile memory (SSD) 29 is used as a cache memory (primary cache). The nonvolatile memory (SSD) 29 includes an area for storing the cache management information 291 and a temporary cache area 292. The cache driver 54 uses the nonvolatile memory 29 as a cache memory in the same manner as in the first embodiment.

  In general, it is assumed that the nonvolatile memory 29 is slower than the main memory 13. Therefore, reading the cache management information 291 stored in the non-volatile memory 29 may reduce the processing speed of the computer 1 (host system 10). This is because the nonvolatile memory 29 is slower than the main memory 13, and thus it takes a lot of time to read the cache management information 291. Therefore, the cache management information 291 is also stored in the main memory 13, and when the cache management information 291 is updated, the cache management information 291 stored in the main memory 13 and the cache management information stored in the nonvolatile memory 29 are stored. Both information 291 is updated. In the cache operation, it is assumed that the cache management information 291 is frequently read, so that the number of accesses to the nonvolatile memory 29 in which only the cache management information 291 is updated can be reduced.

  FIG. 10 shows an example of the procedure of the initialization process executed by the cache driver 54. The configuration of the cache driver 54 is the same as that shown in FIG.

  First, the power failure determination unit 711 determines whether or not the cache management information 291 is stored in the SSD (nonvolatile memory) 29 (block B41). Specifically, the power failure determination unit 711 determines that the cache management information 291 is stored in the SSD 29 when, for example, the header information of the cache management information 291 exists at a predetermined position in the SSD 29. The power failure determination unit 711 determines that the cache management information 291 is not stored in the SSD 29 when the header information of the cache management information 291 does not exist at a predetermined position in the SSD 29, for example. The presence of the header information of the cache management information 291 at a predetermined position in the SSD 29 indicates that the computer 1 ended abnormally last time due to a power failure or the like. Further, the absence of the header information of the cache management information 291 at a predetermined position in the SSD 29 indicates that the computer 1 ended normally last time.

  When the cache management information 291 is not stored in the SSD 29 (that is, when the computer has been normally terminated last time) (NO in block B41), the first initialization unit 712 stores the cache management information 291 in the main memory 13. Reconstruction is performed (block B42). Then, the first initialization unit 712 loads the cache management information 31B stored in the SSD 31 into the main memory 13 (block B43).

  When the cache management information 291 is stored in the SSD 29 (that is, when the computer has ended abnormally last time) (YES in block B41), the second initialization unit 713 stores the cache management information 291 stored in the SSD 29. Is transferred to the area in the main memory 13 where the cache management information is stored (block B44). Then, the second initialization unit 713 determines whether there is a command that has not been executed based on the cache management information 291 (block B45).

  If there is a command that has not been executed (YES in block B45), the second initialization unit 713 determines whether the command is a write command (block B46). When the command is a write command (YES in block B46), the second initialization unit 713 executes the command again (block B47). Then, the second initialization unit 713 returns to block B45 and determines whether or not there is a command that has not yet been executed in the cache management information 291.

  If the command is not a write command (for example, a read command) (NO in block B46), the second initialization unit 713 clears the command from the cache management information 291 (command table) (block B48). . Then, the second initialization unit 713 returns to block B45 and determines whether or not there is a command that has not yet been executed in the cache management information 291.

  If there is no command that has not been executed (NO in block B45), the second initialization unit 713 ends the process.

  Through the above processing, the main memory 13 and the SSD 29 used as the cache memory can be initialized, and the cache operation using the main memory 13 and the SSD 29 can be started.

  As described above, according to the first and second embodiments, cached dirty data can be written to the external storage device even when an abnormal end such as a power failure occurs. The host system 10 uses the memory 22 supplied with power by the battery 23 at the time of a power failure as a primary cache for the HDDs 32, 33, 34. Then, an area for storing the cache management information 221 and a temporary cache area 222 are provided in the memory 22 to which power is supplied by the battery 23 in the event of a power failure. In addition, the host system 10 has a function of determining whether the computer 1 ended normally or abnormally at the time of startup. Thereby, when it is determined that the computer 1 has ended abnormally, dirty data stored in the memory 22 to which power is supplied by the battery 23 in the event of a power failure can be written to the HDDs 32, 33, 34. That is, even when an abnormal end such as a power failure occurs, it can be reflected in the HDDs 32, 33, and 34 without losing dirty data. Note that a nonvolatile memory 29 may be used instead of the memory 22 to which power is supplied by the battery 23 at the time of a power failure.

  Note that the procedures of the initialization process, read process, write process, and end process of this embodiment can all be executed by software. For this reason, the present embodiment is merely installed and executed on a normal computer through a computer-readable storage medium storing a program for executing a procedure for initialization processing, read processing, write processing, and termination processing. The same effect as can be easily realized.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 10 ... Host system, 20 ... RAID controller, 30 ... External storage device, 11 ... Processor, 12 ... PCH, 13 ... Main memory, 21 ... Processor, 22 ... Memory, 23 ... Battery, 24 ... Battery circuit, 25 ... BBU option , 26 ... PCI Express connector, 27 ... SAS connector, 28 ... DMA controller, 221 ... cache management information, 222 ... temporary cache area, 31 ... SSD, 32, 33, 34 ... HDD, 31A ... cache area, 31B ... Cache management information, 32A, 33A, 34A ... cache corresponding area, 43 ... service, 54 ... cache driver program.

Claims (11)

An information processing apparatus capable of accessing the first external storage device,
A host system;
A second external storage device that functions as a secondary cache for the first external storage device and temporarily stores read data read from the first external storage device and write data to be written to the first external storage device;
A volatile memory that functions as a primary cache for the first external storage device and that is powered by a battery in the event of a power failure;
Write data to be written to the first external storage device in response to a write request from the host system is stored in a cache area in the volatile memory, and cache management information stored in the volatile memory is updated. 1 cache control means;
When the information processing apparatus is normally terminated, based on the cache management information stored in the volatile memory, the dirty data stored in the cache area in the volatile memory is transferred to the first external storage device or the first 2 termination processing means for writing to the external storage device;
When the information processing apparatus is started after abnormal termination due to a power failure, the dirty data stored in the cache area in the volatile memory is transferred to the first external memory based on the cache management information stored in the volatile memory. An information processing apparatus comprising: a storage device or an initialization unit that writes to the second external storage device. A flag that sets an abnormal end flag indicating that the information processing apparatus has ended abnormally when activated after the information processing apparatus has ended normally, and resets the abnormal end flag when the information processing apparatus ends normally Control means;
When the abnormal end flag is set, the initialization means stores the dirty data stored in the cache area in the volatile memory based on the cache management information stored in the volatile memory. The information processing apparatus according to claim 1, wherein the information processing apparatus writes in an external storage device or the second external storage device.   The first cache control means outputs address information indicating a correspondence between an address on the first external storage device to which the write data is to be written and an address on the volatile memory in which the write data is stored. The information processing apparatus according to claim 1, wherein the information processing apparatus is added to cache management information stored in a memory.   Based on the cache management information stored in the volatile memory, the write data stored in the cache area in the volatile memory is written to the first external storage device, and the cache management information stored in the volatile memory is stored. 4. The information processing apparatus according to claim 3, further comprising second cache control means for setting a write flag indicating that the write data has been written.   The termination processing means, based on the cache management information stored in the volatile memory, writes the write data in which the write flag is not set among the write data stored in the cache area in the volatile memory. The information processing apparatus according to claim 4, wherein the information is written in the first external storage device or the second external storage device.   2. The information processing apparatus according to claim 1, further comprising third cache control means for storing the write data in a cache area in the second external storage device and updating cache management information stored in the volatile memory.   The third cache control means includes address information indicating a correspondence between an address on the first external storage device to which the write data is to be written and an address on the second external storage device in which the write data is stored. The information processing apparatus according to claim 6, wherein the information processing apparatus is added to cache management information stored in a volatile memory.   Based on the cache management information stored in the volatile memory, the write data stored in the cache area in the second external storage device is written to the first external storage device, and the cache stored in the volatile memory is stored. 8. The information processing apparatus according to claim 7, further comprising fourth cache control means for setting a write flag indicating that the write data has been written in the management information.   The termination processing means is a write for which the write flag is not set among the write data stored in the cache area in the second external storage device based on the cache management information stored in the volatile memory. The information processing apparatus according to claim 8, wherein data is written to the first external storage device. An information processing apparatus capable of accessing the first external storage device,
A host system;
A second external storage device that functions as a secondary cache for the first external storage device and temporarily stores read data read from the first external storage device and write data to be written to the first external storage device;
A non-volatile memory that functions as a primary cache for the first external storage device;
Write data to be written to the first external storage device in response to a write request from the host system is stored in a cache area in the nonvolatile memory, and cache management information stored in the nonvolatile memory is updated. 1 cache control means;
When the information processing apparatus is normally terminated, based on the cache management information stored in the nonvolatile memory, dirty data stored in the cache area in the nonvolatile memory is transferred to the first external storage device or the first 2 termination processing means for writing to the external storage device;
When the information processing apparatus is started after abnormal termination due to a power failure, the dirty data stored in the cache area in the nonvolatile memory is transferred to the first external memory based on the cache management information stored in the nonvolatile memory. An information processing apparatus comprising: a storage device or an initialization unit that writes to the second external storage device. An information processing apparatus capable of accessing a first external storage device, which functions as a secondary cache for a host system and the first external storage device, and read data read from the first external storage device and the first external storage device A second external storage device that temporarily stores write data to be written to the storage device; and a volatile memory that functions as a primary cache for the first external storage device and that is supplied with power using a battery in the event of a power failure A cache control method for controlling a cache operation of an information processing apparatus,
Storing write data to be written to the first external storage device in response to a write request from the host system in a cache area in the volatile memory, and updating cache management information stored in the volatile memory;
When the information processing apparatus is normally terminated, based on the cache management information stored in the volatile memory, the dirty data stored in the cache area in the volatile memory is transferred to the first external storage device or the first 2 Write to external storage device,
When the information processing apparatus is started after abnormal termination due to a power failure, the dirty data stored in the cache area in the volatile memory is transferred to the first external memory based on the cache management information stored in the volatile memory. A cache control method for writing into a storage device or the second external storage device.

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