JP2000357762A - Package board - Google Patents
Package boardInfo
- Publication number
- JP2000357762A JP2000357762A JP11231934A JP23193499A JP2000357762A JP 2000357762 A JP2000357762 A JP 2000357762A JP 11231934 A JP11231934 A JP 11231934A JP 23193499 A JP23193499 A JP 23193499A JP 2000357762 A JP2000357762 A JP 2000357762A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- package substrate
- substrate
- conductive
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010410 layer Substances 0.000 claims description 144
- 239000000758 substrate Substances 0.000 claims description 100
- 229920005989 resin Polymers 0.000 claims description 76
- 239000011347 resin Substances 0.000 claims description 76
- 239000000853 adhesive Substances 0.000 claims description 39
- 230000001070 adhesive effect Effects 0.000 claims description 39
- 239000004020 conductor Substances 0.000 claims description 24
- 239000011229 interlayer Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 239000011135 tin Substances 0.000 claims description 17
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- 229910052718 tin Inorganic materials 0.000 claims description 13
- 239000011133 lead Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 229910045601 alloy Inorganic materials 0.000 claims description 8
- 239000000956 alloy Substances 0.000 claims description 8
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- 238000009413 insulation Methods 0.000 claims description 7
- 238000002844 melting Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 229910000510 noble metal Inorganic materials 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052787 antimony Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052725 zinc Inorganic materials 0.000 claims description 3
- 239000011701 zinc Substances 0.000 claims description 3
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 2
- 229910052745 lead Inorganic materials 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 claims 1
- 238000007747 plating Methods 0.000 description 28
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 24
- 238000007772 electroless plating Methods 0.000 description 21
- 239000003822 epoxy resin Substances 0.000 description 16
- 229920000647 polyepoxide Polymers 0.000 description 16
- RAXXELZNTBOGNW-UHFFFAOYSA-N imidazole Natural products C1=CNC=N1 RAXXELZNTBOGNW-UHFFFAOYSA-N 0.000 description 12
- 229910052759 nickel Inorganic materials 0.000 description 12
- 229910000679 solder Inorganic materials 0.000 description 12
- 239000002245 particle Substances 0.000 description 11
- 238000009713 electroplating Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- 239000002253 acid Substances 0.000 description 8
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 8
- 239000003795 chemical substances by application Substances 0.000 description 8
- 229920006015 heat resistant resin Polymers 0.000 description 8
- 239000003054 catalyst Substances 0.000 description 7
- 239000000203 mixture Substances 0.000 description 7
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 229920003986 novolac Polymers 0.000 description 6
- 239000007800 oxidant agent Substances 0.000 description 6
- 229920001187 thermosetting polymer Polymers 0.000 description 6
- 229910000906 Bronze Inorganic materials 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 239000010974 bronze Substances 0.000 description 5
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000007788 roughening Methods 0.000 description 5
- 229910018104 Ni-P Inorganic materials 0.000 description 4
- 229910018536 Ni—P Inorganic materials 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229920001971 elastomer Polymers 0.000 description 4
- 239000000945 filler Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 239000005060 rubber Substances 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- MTHSVFCYNBDYFN-UHFFFAOYSA-N diethylene glycol Chemical compound OCCOCCO MTHSVFCYNBDYFN-UHFFFAOYSA-N 0.000 description 3
- -1 etc.) Polymers 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 150000007524 organic acids Chemical class 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 229920005992 thermoplastic resin Polymers 0.000 description 3
- QTWJRLJHJPIABL-UHFFFAOYSA-N 2-methylphenol;3-methylphenol;4-methylphenol Chemical compound CC1=CC=C(O)C=C1.CC1=CC=CC(O)=C1.CC1=CC=CC=C1O QTWJRLJHJPIABL-UHFFFAOYSA-N 0.000 description 2
- VVBLNCFGVYUYGU-UHFFFAOYSA-N 4,4'-Bis(dimethylamino)benzophenone Chemical compound C1=CC(N(C)C)=CC=C1C(=O)C1=CC=C(N(C)C)C=C1 VVBLNCFGVYUYGU-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229930185605 Bisphenol Natural products 0.000 description 2
- 229910020598 Co Fe Inorganic materials 0.000 description 2
- 229910002519 Co-Fe Inorganic materials 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- 229910000640 Fe alloy Inorganic materials 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000004697 Polyetherimide Substances 0.000 description 2
- 239000004734 Polyphenylene sulfide Substances 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 2
- 150000001412 amines Chemical class 0.000 description 2
- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 2
- GVFOJDIFWSDNOY-UHFFFAOYSA-N antimony tin Chemical compound [Sn].[Sb] GVFOJDIFWSDNOY-UHFFFAOYSA-N 0.000 description 2
- 239000002585 base Substances 0.000 description 2
- PXKLMJQFEQBVLD-UHFFFAOYSA-N bisphenol F Chemical compound C1=CC(O)=CC=C1CC1=CC=C(O)C=C1 PXKLMJQFEQBVLD-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- KRVSOGSZCMJSLX-UHFFFAOYSA-L chromic acid Substances O[Cr](O)(=O)=O KRVSOGSZCMJSLX-UHFFFAOYSA-L 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 239000000084 colloidal system Substances 0.000 description 2
- 229930003836 cresol Natural products 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000004210 ether based solvent Substances 0.000 description 2
- AWJWCTOOIBYHON-UHFFFAOYSA-N furo[3,4-b]pyrazine-5,7-dione Chemical compound C1=CN=C2C(=O)OC(=O)C2=N1 AWJWCTOOIBYHON-UHFFFAOYSA-N 0.000 description 2
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 2
- 239000003999 initiator Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 229920002492 poly(sulfone) Polymers 0.000 description 2
- 229920001601 polyetherimide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920013636 polyphenyl ether polymer Polymers 0.000 description 2
- 229920000069 polyphenylene sulfide Polymers 0.000 description 2
- 229920012287 polyphenylene sulfone Polymers 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- FBHPRUXJQNWTEW-UHFFFAOYSA-N 1-benzyl-2-methylimidazole Chemical compound CC1=NC=CN1CC1=CC=CC=C1 FBHPRUXJQNWTEW-UHFFFAOYSA-N 0.000 description 1
- BTJPUDCSZVCXFQ-UHFFFAOYSA-N 2,4-diethylthioxanthen-9-one Chemical compound C1=CC=C2C(=O)C3=CC(CC)=CC(CC)=C3SC2=C1 BTJPUDCSZVCXFQ-UHFFFAOYSA-N 0.000 description 1
- LCPVQAHEFVXVKT-UHFFFAOYSA-N 2-(2,4-difluorophenoxy)pyridin-3-amine Chemical compound NC1=CC=CN=C1OC1=CC=C(F)C=C1F LCPVQAHEFVXVKT-UHFFFAOYSA-N 0.000 description 1
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- UIDDPPKZYZTEGS-UHFFFAOYSA-N 3-(2-ethyl-4-methylimidazol-1-yl)propanenitrile Chemical compound CCC1=NC(C)=CN1CCC#N UIDDPPKZYZTEGS-UHFFFAOYSA-N 0.000 description 1
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- ULKLGIFJWFIQFF-UHFFFAOYSA-N 5K8XI641G3 Chemical compound CCC1=NC=C(C)N1 ULKLGIFJWFIQFF-UHFFFAOYSA-N 0.000 description 1
- 101000946889 Homo sapiens Monocyte differentiation antigen CD14 Proteins 0.000 description 1
- CERQOIWHTDAKMF-UHFFFAOYSA-N Methacrylic acid Chemical compound CC(=C)C(O)=O CERQOIWHTDAKMF-UHFFFAOYSA-N 0.000 description 1
- 102100035877 Monocyte differentiation antigen CD14 Human genes 0.000 description 1
- 241000238413 Octopus Species 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229920012266 Poly(ether sulfone) PES Polymers 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- PQIJHIWFHSVPMH-UHFFFAOYSA-N [Cu].[Ag].[Sn] Chemical compound [Cu].[Ag].[Sn] PQIJHIWFHSVPMH-UHFFFAOYSA-N 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 229920003180 amino resin Polymers 0.000 description 1
- 229910001870 ammonium persulfate Inorganic materials 0.000 description 1
- 239000002518 antifoaming agent Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- RWCCWEUUXYIKHB-UHFFFAOYSA-N benzophenone Chemical compound C=1C=CC=CC=1C(=O)C1=CC=CC=C1 RWCCWEUUXYIKHB-UHFFFAOYSA-N 0.000 description 1
- 239000012965 benzophenone Substances 0.000 description 1
- BVKZGUZCCUSVTD-UHFFFAOYSA-N carbonic acid Chemical compound OC(O)=O BVKZGUZCCUSVTD-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000000805 composite resin Substances 0.000 description 1
- GYZLOYUZLJXAJU-UHFFFAOYSA-N diglycidyl ether Chemical compound C1OC1COCC1CO1 GYZLOYUZLJXAJU-UHFFFAOYSA-N 0.000 description 1
- SBZXBUIDTXKZTM-UHFFFAOYSA-N diglyme Chemical compound COCCOCCOC SBZXBUIDTXKZTM-UHFFFAOYSA-N 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- XEMZLVDIUVCKGL-UHFFFAOYSA-N hydrogen peroxide;sulfuric acid Chemical compound OO.OS(O)(=O)=O XEMZLVDIUVCKGL-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000003504 photosensitizing agent Substances 0.000 description 1
- IEQIEDJGQAUEQZ-UHFFFAOYSA-N phthalocyanine Chemical compound N1C(N=C2C3=CC=CC=C3C(N=C3C4=CC=CC=C4C(=N4)N3)=N2)=C(C=CC=C2)C2=C1N=C1C2=CC=CC=C2C4=N1 IEQIEDJGQAUEQZ-UHFFFAOYSA-N 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 239000012286 potassium permanganate Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- KCTAWXVAICEBSD-UHFFFAOYSA-N prop-2-enoyloxy prop-2-eneperoxoate Chemical compound C=CC(=O)OOOC(=O)C=C KCTAWXVAICEBSD-UHFFFAOYSA-N 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- CHQMHPLRPQMAMX-UHFFFAOYSA-L sodium persulfate Substances [Na+].[Na+].[O-]S(=O)(=O)OOS([O-])(=O)=O CHQMHPLRPQMAMX-UHFFFAOYSA-L 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- YFNKIDBQEZZDLK-UHFFFAOYSA-N triglyme Chemical compound COCCOCCOCCOC YFNKIDBQEZZDLK-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、導電性接続ピンが
固定された樹脂パッケージ基板に関する。The present invention relates to a resin package substrate to which conductive connection pins are fixed.
【0002】[0002]
【従来の技術】ICチップ等をマザーボード又はドータ
ボードへ接続するためのパッケージ基板は、近年、信号
の高周波数化に伴い、低誘電率、低誘電正接が求められ
るようになった。そのため、基板の材質もセラミックか
ら樹脂へと主流が移りつつある。2. Description of the Related Art In recent years, a package substrate for connecting an IC chip or the like to a motherboard or a daughter board has been required to have a low dielectric constant and a low dielectric loss tangent with an increase in the frequency of signals. Therefore, the mainstream of the material of the substrate is shifting from ceramic to resin.
【0003】このような背景の下、樹脂基板を用いたプ
リント配線板に関する技術として、例えば、特公平4−
55555号公報に、回路形成がなされたガラスエポキ
シ基板にエポキシアクリレートを層間樹脂絶縁層として
形成し、続いて、フォトリソグラフィの手法を用いてバ
イアホール用開口を設け、表面を粗化した後、めっきレ
ジストを設けて、めっきにより導体回路およびバイアホ
ールを形成した、いわゆるビルドアップ多層配線板が提
案されている。Under such a background, as a technique relating to a printed wiring board using a resin substrate, for example, Japanese Patent Publication No.
No. 55555 discloses that an epoxy acrylate is formed as an interlayer resin insulating layer on a glass epoxy substrate on which a circuit is formed, a via hole opening is formed by using a photolithography method, and the surface is roughened. A so-called build-up multilayer wiring board in which a resist is provided and a conductive circuit and a via hole are formed by plating has been proposed.
【0004】パッケージ基板として用いられるビルドア
ップ多層配線板において、ICチップへ瞬時的に大電力
を供給できるように電源層を構成するプレーン層、ま
た、ノイズ低減の目的でアース層を構成するプレーン層
が配設されている。[0004] In a build-up multilayer wiring board used as a package substrate, a plane layer constituting a power supply layer so that a large amount of power can be instantaneously supplied to an IC chip, and a plane layer constituting an earth layer for the purpose of noise reduction. Are arranged.
【0005】[0005]
【発明が解決しようとする課題】しかしながら、上述し
た構造では、プレーン層は、バイアホールを介して外部
基板(例えば、ドータボード)への接続用のパッドに接
続されている。微細なバイアホールを介してドータボー
ド側からの電流を流すために、電源層を構成するプレー
ン層は、ICチップへ送り得る電力に制限を受け、十分
な機能を果たし得なかった。また、アース層を構成する
プレーン層においても、抵抗の高い微細なバイアホール
を介してドータボード側のアースラインと接続している
ため、ノイズ防止の役割を十分に果たし得なかった。However, in the structure described above, the plane layer is connected to a pad for connection to an external substrate (for example, a daughter board) through a via hole. Since a current flows from the daughter board side through the fine via hole, the plane layer constituting the power supply layer is limited in the power that can be sent to the IC chip, and cannot perform a sufficient function. Also, the plane layer constituting the ground layer is not connected to the ground line on the daughter board side via a fine via hole having a high resistance, so that it cannot sufficiently play the role of preventing noise.
【0006】また、パッケージ基板として用いられる多
層プリント配線板を、ドータボードへ接続するために
は、該多層プリント配線板に設けたパッドに導電性接続
ピンを取り付ける必要がある。しかしながら、樹脂から
なるパッケージ基板に、金属のパッドを設けても、両者
の接着強度が低く、導電性接続ピンに応力が加わった際
に、導電性接続ピンがパッドと共に剥離することがあっ
た。In order to connect a multilayer printed wiring board used as a package substrate to a daughter board, it is necessary to attach conductive connection pins to pads provided on the multilayer printed wiring board. However, even when a metal pad is provided on a package substrate made of a resin, the bonding strength between the two is low, and when a stress is applied to the conductive connection pin, the conductive connection pin sometimes peels off together with the pad.
【0007】請求項1、2、3の発明は、このような問
題点を解決するために提案されたものであって、プレー
ン層が機能を十分に果たし得るパッケージ基板を提供す
ることを目的とする。The inventions of claims 1, 2, and 3 have been proposed to solve such problems, and an object of the invention is to provide a package substrate in which a plane layer can sufficiently fulfill a function. I do.
【0008】請求項4,5、6、7、8、9の発明は、
このような問題点を解決するために提案されたものであ
って、プレーン層が機能を十分に果たし得ると共に、導
電性接続ピンが剥離し難い樹脂パッケージ基板を提供す
ることを目的とする。[0008] The invention of claims 4, 5, 6, 7, 8, 9 is
It has been proposed to solve such a problem, and an object of the present invention is to provide a resin package substrate in which a plane layer can sufficiently perform a function and conductive connection pins are not easily separated.
【0009】[0009]
【課題を解決するための手段】本発明者らは鋭意検討し
た結果、本発明に到達した。すなわち、基板の表面に導
体層であるプレーン層を配置し、該プレーン層に導電性
接続ピンを直接接続することで、外部基板(例えば、ド
ータボード)からプレーン層までの電気抵抗を下げる。
これにより、ドータボード側からの電力供給を容易に
し、電源層を構成するプレーン層に十分な機能を果たさ
せる。また、アース層を構成するプレーン層において
も、低抵抗の導電性接続ピンを介してドータボード側の
アースラインと接続させ、ノイズ防止の役割を十分には
果たさせる。なお、プレーン層は、メッシュ状であって
もよい。メッシュは、方形、円形の導体非形成部分を配
設することにより形成される(図12参照)。Means for Solving the Problems As a result of intensive studies, the present inventors have reached the present invention. That is, a plane layer, which is a conductor layer, is arranged on the surface of the substrate, and the conductive connection pins are directly connected to the plane layer, thereby reducing the electric resistance from the external substrate (eg, daughter board) to the plane layer.
This facilitates power supply from the daughter board side, and causes the plane layer constituting the power supply layer to perform a sufficient function. Also, the plane layer constituting the ground layer is connected to the ground line on the daughter board side through the low-resistance conductive connection pin to sufficiently play the role of noise prevention. Note that the plane layer may be in a mesh shape. The mesh is formed by arranging square and circular conductor-free portions (see FIG. 12).
【0010】更に、請求項4の発明では、導電性接続ピ
ンが固定されるパッドは、当該パッドを部分的に露出す
る開口部が設けられた有機樹脂絶縁層によって覆われ
る。従って、導電性接続ピンを介してパッケージ基板を
マザーボード等の他の基板に取り付ける際などに、たと
えば導電性接続ピンとマザーボードのソケットとの間に
位置のずれなどがあって当該導電性接続ピンに応力が加
わった場合や、ヒートサイクル条件の熱履歴で基板に反
りなどを生じた場合でも、パッドが有機樹脂絶縁層で押
さえられており、基板から剥離するのを防止できる。特
に、金属性のパッドと層間樹脂絶縁層という全く異なる
材質同士の接着で、充分な接着力を得難い場合でも、パ
ッド表面から有機樹脂絶縁層で覆うことで、高い剥離強
度を付与することができる。Further, according to the present invention, the pad to which the conductive connection pin is fixed is covered with the organic resin insulating layer provided with an opening for partially exposing the pad. Therefore, when the package substrate is attached to another substrate such as a motherboard via the conductive connection pins, for example, there is a displacement between the conductive connection pins and the socket of the motherboard, and the conductive connection pins are stressed. The pad is held down by the organic resin insulating layer even when the substrate is warped due to the heat history of the heat cycle conditions, and the peeling from the substrate can be prevented. In particular, even when it is difficult to obtain a sufficient adhesive strength by bonding completely different materials such as a metal pad and an interlayer resin insulating layer, high peel strength can be imparted by covering the pad surface with the organic resin insulating layer. .
【0011】請求項5の発明では、導電性接続ピンを可
撓性に優れた銅または銅合金、スズ、亜鉛、アルミニウ
ム、貴金属から選ばれる少なくとも1種類以上の金属製
とすることで、ピンに応力が加わった際に撓んでその応
力が吸収され、基板から導電性接続ピンが剥離しにくく
なっている。この導電性接続ピンに用いられる銅合金と
しては、リン青銅が好適である。可撓性に優れているだ
けでなく、電気的特性も良好でしかも導電性接続ピンへ
の加工性にも優れているからである。According to the fifth aspect of the present invention, the conductive connection pin is made of at least one metal selected from the group consisting of copper or copper alloy, tin, zinc, aluminum, and noble metal having excellent flexibility. When the stress is applied, the conductive connection pin bends and absorbs the stress, which makes it difficult for the conductive connection pin to peel off from the substrate. Phosphor bronze is suitable as the copper alloy used for the conductive connection pins. This is because, in addition to being excellent in flexibility, it has excellent electrical characteristics and also has excellent workability into conductive connection pins.
【0012】この導電性接続ピンには、板状の固定部と
この板状の固定部の略中央に突設された柱状の接続部と
からなる、いわゆるT型ピンが好適に用いられる。板状
の固定部は、パッドとなる導体層に導電性接着剤を介し
て固定される部分であって、パッドの大きさに合わせた
円形状や多角形状など適宜に形成される。また、接続部
の形状は、他の基板に挿入可能な形状であれば特に問題
はなく、円柱・角柱・円錐・角錐など何でもよい。この
接続部は、通常位置のピンに対し基本的1本であるが、
2本以上設けても特に問題はなく、実装される他の基板
に応じて適宜に形成してよい。As the conductive connection pin, a so-called T-shaped pin composed of a plate-shaped fixing portion and a column-shaped connecting portion protruding substantially at the center of the plate-shaped fixing portion is preferably used. The plate-shaped fixing portion is a portion fixed to the conductor layer serving as a pad via a conductive adhesive, and is appropriately formed in a circular shape or a polygonal shape according to the size of the pad. The shape of the connecting portion is not particularly limited as long as it can be inserted into another substrate, and may be any shape such as a cylinder, a prism, a cone, or a pyramid. This connection is basically one for the pin in the normal position,
There is no particular problem even if two or more are provided, and they may be formed as appropriate according to the other substrate to be mounted.
【0013】導電性接続ピンにおいて、柱状の接続部
は、直径が0.1〜0.8mmで長さが1.0〜10m
m、板状の固定部の直径は0.5〜2.0mmの範囲と
することが望ましく、パッドの大きさや装着される他の
基板の種類などによって適宜に選択される。In the conductive connecting pin, the columnar connecting portion has a diameter of 0.1 to 0.8 mm and a length of 1.0 to 10 m.
m, the diameter of the plate-shaped fixing portion is desirably in the range of 0.5 to 2.0 mm, and is appropriately selected depending on the size of the pad, the type of other substrate to be mounted, and the like.
【0014】請求項6の発明では、導電性接続ピンの柱
状の接続部に他の部分の直径よりも小さいくびれ部が設
けられているので、ピンに曲がりやすさが付与される。
そのため、導電性接続ピンに応力が加わった際には、接
続部がくびれ部で曲がるのでその応力が吸収され、導電
性接続ピンが基板から剥離し難くなる。According to the sixth aspect of the present invention, since the columnar connecting portion of the conductive connecting pin is provided with a constricted portion smaller than the diameter of the other portion, the pin is easily bent.
Therefore, when stress is applied to the conductive connection pin, the connection portion is bent at the constricted portion, so that the stress is absorbed, and the conductive connection pin is hardly peeled off from the substrate.
【0015】この導電性接続ピンには、板状の固定部と
この板状の固定部の略中央に突設された柱状の接続部と
からなる、いわゆるT型ピンが好適に用いられる。板状
の固定部は、パッドとなる導体層に導電性接着剤を介し
て固定される部分であって、パッドの大きさに合わせて
円形状や多角形状など適宜に形成される。また、接続部
は、他の基板に取り付けられる部分であって、その電子
部品に挿入可能であれば形状に特に問題はなく、円柱・
角柱・円錐・角錐など何でもよい。この接続部は通常一
のピンに対し基本的に1本であるが、2本以上設けても
特に問題はなく、実装される他の基板に応じて適宜に形
成してよい。As the conductive connection pin, a so-called T-shaped pin composed of a plate-shaped fixing portion and a column-shaped connecting portion protruding substantially at the center of the plate-shaped fixing portion is preferably used. The plate-shaped fixing portion is a portion fixed to the conductor layer serving as a pad via a conductive adhesive, and is appropriately formed in a circular shape or a polygonal shape according to the size of the pad. Further, the connection portion is a portion to be attached to another substrate, and there is no particular problem in the shape as long as it can be inserted into the electronic component.
Anything such as a prism, a cone, or a pyramid may be used. Usually, this connection portion is basically one for one pin, but there is no particular problem if two or more connection portions are provided, and the connection portion may be appropriately formed according to another board to be mounted.
【0016】この導電性接続ピンは、板状の固定部の直
径が0.5〜2.0mmの範囲、柱状の接続部の直径が
0.1から0.8mmで、長さが1〜10mmで形成す
ることが好ましく、固定されるパッケージ基板や装着さ
れる他の基板の種類などにより適宜選択される。The conductive connecting pin has a plate-shaped fixing portion having a diameter of 0.5 to 2.0 mm, a columnar connecting portion having a diameter of 0.1 to 0.8 mm, and a length of 1 to 10 mm. It is preferable to select the type according to the type of the package substrate to be fixed or the other substrate to be mounted.
【0017】くびれ部は、この接続部の途中に設けられ
ており、他の部分よりも細く形成されている。このくび
れ部の太さは、導電性接続ピンを構成する材質や導電性
接続ピンの大きさなどによって異なるが、その直径が、
接続部そのものの直径の50%以上98%以下とするこ
とが重要である。くびれ部の直径が他の部分の直径の5
0%より小さいと、接続部の強度が不充分となり、パッ
ケージ基板を装着した際に変形したり折れたりすること
がある。また、くびれ部の直径が他の部分の直径の98
%を超えると、接続部に所期の可撓性を付与することが
できず、応力の吸収効果が得られない。なお、くびれ部
は、複数形成されていてもよい。The constricted portion is provided in the middle of the connecting portion, and is formed thinner than other portions. The thickness of the constricted portion varies depending on the material of the conductive connection pin, the size of the conductive connection pin, and the like.
It is important that the diameter be 50% or more and 98% or less of the diameter of the connection part itself. The diameter of the constricted part is 5 times the diameter of the other part
If it is less than 0%, the strength of the connection portion becomes insufficient, and the package may be deformed or broken when the package substrate is mounted. Also, the diameter of the constricted part is 98 times the diameter of the other part.
%, The desired flexibility cannot be imparted to the connection portion, and the effect of absorbing stress cannot be obtained. Note that a plurality of constrictions may be formed.
【0018】本発明の導電性接続ピンを構成する材質
は、金属であれば特に限定はなく、金・銀・銅・ニッケ
ル・コバルト・スズ・鉛などの中から少なくとも一種類
以上の金属で形成するのがよい。鉄合金である、商品名
「コバール」(Ni−Co−Feの合金)やステンレ
ス、銅合金であるリン青銅は好ましい材質である。電気
的特性が良好で、しかも導電性接続ピンへの加工性にも
優れているからである。特に、リン青銅は、高い可撓性
を有するため、応力吸収のために好適である。The material constituting the conductive connection pin of the present invention is not particularly limited as long as it is a metal, and is formed of at least one kind of metal from among gold, silver, copper, nickel, cobalt, tin and lead. Good to do. Iron alloy, trade name "Kovar" (an alloy of Ni-Co-Fe), stainless steel, and phosphor bronze which is a copper alloy are preferable materials. This is because the electrical characteristics are good and the processability of the conductive connection pin is excellent. In particular, phosphor bronze has high flexibility and is therefore suitable for absorbing stress.
【0019】請求項7発明では、導電性接着剤の融点が
180〜280℃であることによって、導電性接続ピン
との接着強度2.0Kg/pin以上が確保される。この強
度は、ヒートサイクルなどの信頼性試験後、あるいは、
ICチップの実装の際に要する熱を加えた後でも、その
強度の低下が少ない。180℃未満の場合は、接着強度
も2.0Kg/pin前後であり、場合によっては、1.
5Kg/pin程度しか出ない。また、ICチップ実装の加
熱によって、導電性接着剤が溶解してしまい、導電性接
続ピンの脱落、傾きを起こってしてしまう。280℃を
越える場合は、導電性接着剤の溶解温度に対して、樹脂
層である樹脂絶縁層、ソルダーレジスト層が溶けてしま
う。特に、望ましい温度は、200〜260℃である。
その温度の導電性接着剤であることが、導電性接続ピン
の接着強度のバラツキも少なくなり、実際に加わる熱が
パッケージ基板を構成する樹脂層への損傷もないからで
ある。According to the seventh aspect of the present invention, since the melting point of the conductive adhesive is 180 to 280 ° C., the bonding strength with the conductive connecting pin of 2.0 kg / pin or more is ensured. This strength can be measured after reliability tests such as heat cycle, or
Even after applying the heat required for mounting the IC chip, the strength of the IC chip does not decrease much. When the temperature is lower than 180 ° C., the adhesive strength is also around 2.0 kg / pin.
Only about 5Kg / pin comes out. In addition, the heating of the IC chip mounting dissolves the conductive adhesive, causing the conductive connection pins to drop or tilt. If it exceeds 280 ° C., the resin insulating layer and the solder resist layer, which are resin layers, will melt at the melting temperature of the conductive adhesive. In particular, a desirable temperature is 200-260 ° C.
This is because the conductive adhesive at that temperature reduces the variation in the bonding strength of the conductive connection pins, and the heat actually applied thereto does not damage the resin layer constituting the package substrate.
【0020】請求項8の発明では、導電性接着剤は、ス
ズ、鉛、アンチモン、銀、金、銅が少なくとも1種類以
上で形成されていることによって、前述の融点を有する
導電性接着剤を形成することができる。特に、スズ−鉛
あるいはスズ−アンチモンが少なくとも含有されている
導電性接着剤が、前述の融点の範囲を形成させることが
でき、熱によって融解しても、再度、固着し易く導電性
接続ピンの脱落、傾きを引き起こさない。According to the invention of claim 8, the conductive adhesive is formed of at least one kind of tin, lead, antimony, silver, gold and copper. Can be formed. In particular, the conductive adhesive containing at least tin-lead or tin-antimony can form the above-mentioned melting point range, and is easily fixed again even if melted by heat, so that the conductive connecting pin is Does not cause falling off or tilting.
【0021】前記導電性接着剤は、Sn/Pb、Sn/
Sb、Sn/Ag、Sn/Sb/Pbの合金であること
によって、特に、接着強度も2.0Kg/pinであり、そ
のバラツキも小さく、ヒートサイクル条件下やICチッ
プの実装の熱によっても、導電性接続ピンの接着強度の
低下もなく、ピンの脱落、傾きを引き起こさず、電気的
接続も確保されている。The conductive adhesive is Sn / Pb, Sn / Pb.
Due to the alloys of Sb, Sn / Ag, and Sn / Sb / Pb, especially, the adhesive strength is 2.0 Kg / pin, the variation is small, and even under the heat cycle condition or the heat of mounting the IC chip, There is no decrease in the adhesive strength of the conductive connection pin, no drop-out or inclination of the pin, and electrical connection is ensured.
【0022】[0022]
【発明の実施の形態】次に、図1ないし図8に従い、第
1実施例のパッケージ基板を、ビルドアップ基板の製造
方法とともに説明する。以下の方法は、セミアディティ
ブ法によるものであるが、フルアディティブ法を採用し
てもよい。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a package substrate according to a first embodiment will be described with reference to FIGS. 1 to 8 together with a method for manufacturing a build-up substrate. The following method is based on the semi-additive method, but may use the full-additive method.
【0023】[第1実施例] (1) まず、基板の表面に導体層を形成したコア基板
を作成する。コア基板としては、ガラスエポキシ基板、
ポリイミド基板、ビスマレイミド−トリアジン樹脂基板
などの樹脂絶縁基板の両面に銅箔8を貼った銅張積層板
を使用することができる(図1(a)参照)。銅箔8
は、片面が粗化面(マット面)となっており、樹脂基板
に強固に密着している。この基板に、ドリルで貫通孔を
設けた後、無電解めっきを施しスルーホール9を形成す
る。無電解めっきとしては銅めっきが好ましい。引き続
き、めっきレジストを形成し、エッチング処理して導体
層4を形成する。なお、銅箔の厚付けのためにさらに電
気めっきを行ってもよい。この電気めっきにも銅めっき
が好ましい。また、電気めっきの後、導体層4の表面お
よびスルーホール9の内壁面を粗面4a,9aとしても
よい(図1(b)参照)。[First Embodiment] (1) First, a core substrate having a conductor layer formed on the surface of the substrate is prepared. As a core substrate, a glass epoxy substrate,
A copper-clad laminate in which copper foils 8 are stuck on both sides of a resin insulating substrate such as a polyimide substrate or a bismaleimide-triazine resin substrate can be used (see FIG. 1A). Copper foil 8
Has a roughened surface (mat surface) on one side and is firmly adhered to the resin substrate. After a through hole is formed in this substrate by a drill, electroless plating is performed to form a through hole 9. Copper plating is preferred as the electroless plating. Subsequently, a plating resist is formed and an etching process is performed to form the conductor layer 4. Electroplating may be further performed for thickening the copper foil. Copper plating is also preferred for this electroplating. Further, after the electroplating, the surface of the conductor layer 4 and the inner wall surface of the through hole 9 may be made rough surfaces 4a, 9a (see FIG. 1B).
【0024】この粗化処理方法としては、例えば、例え
ば黒化(酸化)−還元処理、有機酸と第2銅錯体の混合
水溶液によるスプレー処理、Cu−Ni−Pの針状合金
めっきによる処理などが挙げられる。Examples of the roughening treatment include, for example, blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, treatment with Cu-Ni-P needle-like alloy plating, and the like. Is mentioned.
【0025】次に、得られた基板を水洗してから乾燥す
る。その後、基板表面の導体層4間およびスルーホール
9内に樹脂充填材10を充填し、乾燥させる(図1
(c))。引き続き、基板両面の不要な樹脂充填材10
をベルトサンダー研磨などで研削し、導体層4を露出さ
せ、樹脂充填材10を本硬化させる。導体層4間および
スルーホール9による凹部を埋めて基板を平滑化する
(図1(d)参照)。Next, the obtained substrate is washed with water and dried. Thereafter, a resin filler 10 is filled between the conductor layers 4 on the substrate surface and in the through holes 9 and dried (FIG. 1).
(C)). Subsequently, unnecessary resin filler 10 on both sides of the substrate
Is ground by belt sander polishing or the like to expose the conductor layer 4 and the resin filler 10 is fully cured. The substrate is smoothed by filling the recesses between the conductor layers 4 and the through holes 9 (see FIG. 1D).
【0026】次に、露出した導体層4の表面に粗化層1
1を再度設ける(図2(a)参照)。なお、図2(a)
中の円で示す部分は、粗化層11が設けられた導体層4
を拡大して示している。この粗化層11は、先に述べた
ようなCu−Ni−Pの針状あるいは多孔質状合金層に
より形成されていることが望ましいが、この他にも黒化
(酸化)−還元処理やエッチング処理で粗化層を形成す
ることもできる。Cu−Ni−P針状または多孔質状合
金層による場合、荏原ユージライト製商品名「インター
プレート」により、また、エッチング処理は、メック社
製商品名「MEC etch Bond」により行うこ
とが望ましい。Next, the roughened layer 1 is formed on the exposed surface of the conductor layer 4.
1 is provided again (see FIG. 2A). In addition, FIG.
The part indicated by the circle in the middle is the conductor layer 4 on which the roughened layer 11 is provided.
Is enlarged. The roughened layer 11 is desirably formed of the needle-like or porous alloy layer of Cu-Ni-P as described above. A roughened layer can be formed by an etching process. In the case of using a Cu-Ni-P needle-like or porous alloy layer, it is preferable to perform the etching under the trade name "Interplate" manufactured by Ebara Uzilite and the etching processing under the trade name "MEC etch Bond" manufactured by MEC.
【0027】(2) 上記(1)で作成した導体層4を
有する配線基板の両面に樹脂層2a、2bからなる樹脂
絶縁層2を形成する(図2(b)参照)。この樹脂絶縁
層2は後述するようにパッケージ基板の層間樹脂絶縁層
200として機能する。上記樹脂絶縁体層(以下、層間
樹脂絶縁層200)を構成する材料としては、例えば、
熱硬化性樹脂、熱可塑性樹脂またはこれらの複合樹脂な
どが挙げられる。層間樹脂絶縁層2として、無電解めっ
き用接着剤を用いることが望ましい。この無電解めっき
用接着剤は、硬化処理された酸あるいは酸化剤に可溶性
の耐熱性樹脂粒子が、酸あるいは酸化剤に難溶性の未硬
化の耐熱性樹脂中に分散されてなるものが最適である。
後述するように酸、酸化剤の溶液で処理することによ
り、耐熱性樹脂粒子が溶解除去されて、表面に蛸つぼ状
のアンカーからなる粗化面を形成できるからである。(2) A resin insulating layer 2 composed of resin layers 2a and 2b is formed on both surfaces of the wiring board having the conductor layer 4 prepared in (1) (see FIG. 2B). This resin insulating layer 2 functions as an interlayer resin insulating layer 200 of the package substrate as described later. Examples of a material constituting the resin insulator layer (hereinafter, interlayer resin insulation layer 200) include, for example,
A thermosetting resin, a thermoplastic resin, or a composite resin thereof may be used. It is desirable to use an adhesive for electroless plating as the interlayer resin insulating layer 2. The most suitable adhesive for electroless plating is one in which heat-resistant resin particles soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or oxidizing agent. is there.
This is because, as described later, by treating with a solution of an acid and an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.
【0028】上記無電解めっき用接着剤において、特に
硬化処理された前記耐熱性樹脂粒子としては、平均粒
径が10μm以下の耐熱性樹脂粉末、平均粒子径が相
対的に大きな粒子と平均粒子径が相対的に小さな粒子を
混合した粒子が望ましい。これらはより複雑なアンカー
を形成できるからである。In the above-mentioned adhesive for electroless plating, particularly as the heat-resistant resin particles subjected to the curing treatment, a heat-resistant resin powder having an average particle diameter of 10 μm or less, a particle having a relatively large average particle diameter, and an average particle diameter However, particles obtained by mixing relatively small particles are desirable. Because they can form more complex anchors.
【0029】使用できる耐熱性樹脂としては、例えば、
エポキシ樹脂(ビスA型エポキシ樹脂、クレゾールノボ
ラック型エポキシ樹脂など)、ポリイミド樹脂、エポキ
シ樹脂と熱可塑性樹脂との複合体等が挙げられる。複合
させる熱可塑性樹脂として、ポリエーテルスルフォン
(PES)、ポリサルフォン(PSF)、ポリフェニレ
ンサルフォン(PPS)、ポリフェニレンサルファイド
(PPES)、ポリフェニルエーテル(PPE)、ポリ
エーテルイミド(PI)などを使用できる。また、酸や
酸化剤の溶液に溶解する耐熱性樹脂粒子としては、たと
えば、エポキシ樹脂(特にアミン系硬化剤で硬化させた
エポキシ樹脂がよい)、アミノ樹脂や、ポリエチレン系
ゴム、ポリブタン系ゴム、ポリブタジェンゴム、ポリブ
チンゴムなどのゴムが挙げられる。層間絶縁層は、塗
布、樹脂フィルムを加熱圧着などを施して形成される。Examples of the heat-resistant resin that can be used include, for example,
Epoxy resins (bis-A type epoxy resin, cresol novolak type epoxy resin, etc.), polyimide resins, composites of epoxy resins and thermoplastic resins, and the like are included. As the thermoplastic resin to be composited, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PPE), polyetherimide (PI), and the like can be used. Examples of the heat-resistant resin particles soluble in a solution of an acid or an oxidizing agent include, for example, an epoxy resin (especially an epoxy resin cured with an amine-based curing agent), an amino resin, a polyethylene-based rubber, a polybutane-based rubber, Rubbers such as polybutadiene rubber and polybutyne rubber are exemplified. The interlayer insulating layer is formed by applying a resin film and applying heat and pressure to the resin film.
【0030】(3) 次に、層間樹脂絶縁層2に、導体
層4との電気接続を確保するためのバイアホール形成用
開口6を設ける(図2(c)参照)。上述した無電解め
っき用接着剤を用いる場合には、バイアホール形成のた
めの円パターンが描画されたフォトマスクを載置し、露
光、現像処理してから熱硬化することで開口6を設け
る。一方、熱硬化性樹脂を用いた場合には、熱硬化した
のちレーザー加工することにより、上記層間樹脂絶縁層
2にバイアホール用の開口6を設ける。また、樹脂フィ
ルムを貼り付けて層間絶縁層を形成させた場合には、炭
酸、YAG、エキシマ、UVレーザ等のレーザで加工す
ることにより、バイアホール用の開口を設ける。必要に
応じて過マンガン酸などによるディップあるいは、プラ
ズマなどのドライエッチングによってデスミヤ処理をす
る。(3) Next, an opening 6 for forming a via hole for securing electrical connection with the conductor layer 4 is provided in the interlayer resin insulating layer 2 (see FIG. 2C). When the above-mentioned adhesive for electroless plating is used, an opening 6 is provided by placing a photomask on which a circular pattern for forming a via hole is drawn, exposing and developing, and then thermosetting. On the other hand, when a thermosetting resin is used, an opening 6 for a via hole is provided in the interlayer resin insulating layer 2 by performing laser processing after thermosetting. When a resin film is attached to form an interlayer insulating layer, an opening for a via hole is provided by processing with a laser such as carbonic acid, YAG, excimer, or UV laser. If necessary, desmearing is performed by dipping with permanganic acid or the like or dry etching with plasma or the like.
【0031】(4) 次に、バイアホール形成用開口6
を設けた層間樹脂絶縁層2の表面を粗化する(図2
(d)参照)。層間樹脂絶縁層2に無電解めっき用接着
剤を用いた場合、この無電解めっき用接着剤層の表面に
存在する耐熱性樹脂粒子を酸または酸化剤で溶解除去す
ることにより、無電解めっき用接着剤層2の表面を粗化
して、蛸壺状のアンカーを設ける。(4) Next, an opening 6 for forming a via hole
The surface of the interlayer resin insulation layer 2 provided with the surface is roughened (FIG. 2).
(D)). When an adhesive for electroless plating is used for the interlayer resin insulating layer 2, heat-resistant resin particles present on the surface of the adhesive layer for electroless plating are dissolved and removed with an acid or an oxidizing agent to form an electroless plating adhesive. The surface of the adhesive layer 2 is roughened to provide an octopus-shaped anchor.
【0032】ここで、上記酸としては、例えば、リン
酸、塩酸、硫酸などの強酸、または蟻酸や酢酸などの有
機酸を用いることができる。特に、有機酸を用いるのが
望ましい。これは、粗化処理した場合に、バイアホール
用開口6から露出する金属導体層4を腐食させにくいか
らである。一方、上記酸化剤としては、クロム酸、過マ
ンガン酸塩(過マンガン酸カリウムなど)の水溶液を用
いることが望ましい。Here, as the acid, for example, a strong acid such as phosphoric acid, hydrochloric acid or sulfuric acid, or an organic acid such as formic acid or acetic acid can be used. In particular, it is desirable to use an organic acid. This is because the metal conductor layer 4 exposed from the via hole opening 6 is hardly corroded when the roughening treatment is performed. On the other hand, as the oxidizing agent, it is desirable to use an aqueous solution of chromic acid or permanganate (such as potassium permanganate).
【0033】前記粗化は、表面の最大粗度Rmax0.
1〜20μmがよい。厚すぎると粗化面自体が損傷、剥
離しやすく、薄すぎると密着性が低下するからである。The above-mentioned roughening is performed by using a maximum surface roughness Rmax0.
1-20 μm is preferred. If the thickness is too large, the roughened surface itself is easily damaged and peeled off, and if the thickness is too small, the adhesion decreases.
【0034】(5) 次に、層間樹脂絶縁層2の表面を
粗化した配線基板に、触媒核を付与する。触媒核の付与
には、貴金属イオンや貴金属コロイドなどを用いること
が望ましく、一般的には塩化パラジウムやパラジウムコ
ロイドを使用する。なお、この触媒核を固定するため
に、加熱処理を行うことが望ましい。このような触媒核
にはパラジウムが好適である。(5) Next, a catalyst nucleus is applied to the wiring substrate having the surface of the interlayer resin insulating layer 2 roughened. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus. Generally, palladium chloride or a palladium colloid is used. In order to fix the catalyst core, it is desirable to perform a heat treatment. Palladium is suitable for such a catalyst core.
【0035】(6) 続いて、粗化し触媒核を付与した
層間樹脂絶縁層2の全面に無電解めっきを施し、無電解
めっき膜12を形成する(図3(a)参照)。この無電
解めっき膜12の厚みは、0.1〜5μmが好ましい。(6) Subsequently, electroless plating is applied to the entire surface of the interlayer resin insulating layer 2 to which the roughened catalyst nuclei have been applied to form an electroless plated film 12 (see FIG. 3A). The thickness of the electroless plating film 12 is preferably 0.1 to 5 μm.
【0036】次に、無電解めっき膜12の表面にめっき
レジスト3を形成する(図3(b)参照)。形成した無
電解めっき膜12上に感光性樹脂フィルム(ドライフィ
ルム)をラミネートし、この感光性樹脂フィルム上に、
めっきレジストパターンが描画されたフォトマスク(ガ
ラス基板がよい)を密着させて載置し、露光し現像処理
することによりめっきレジスト3を形成できる。Next, a plating resist 3 is formed on the surface of the electroless plating film 12 (see FIG. 3B). A photosensitive resin film (dry film) is laminated on the formed electroless plating film 12, and on this photosensitive resin film,
The plating resist 3 can be formed by placing a photomask (preferably a glass substrate) on which the plating resist pattern is drawn in close contact, exposing and developing.
【0037】(7) 次に、電気めっきを施し、無電解
めっき膜12上のめっきレジスト非形成部に電気めっき
膜を形成し、導体層5とバイアホール7を形成する。そ
の厚みは5〜20μmがよい。この電気めっきには、銅
めっきが好ましい。また、電気めっき後に、電解ニッケ
ルめっき、無電解ニッケルめっき、またはスパッタから
選ばれる少なくとも1の方法により、ニッケル膜14を
形成する(図3(c)参照)。このニッケル膜14上に
はCu−Ni−Pからなる合金めっきが析出しやすいか
らである。また、ニッケル膜はメタルレジストとして作
用するため、その後の工程でも過剰エッチングを防止す
るという効果を奏する。(7) Next, electroplating is performed, an electroplating film is formed on the portion of the electroless plating film 12 where the plating resist is not formed, and the conductor layer 5 and the via hole 7 are formed. Its thickness is preferably 5 to 20 μm. Copper plating is preferred for this electroplating. After the electroplating, the nickel film 14 is formed by at least one method selected from electrolytic nickel plating, electroless nickel plating, and sputtering (see FIG. 3C). This is because an alloy plating made of Cu-Ni-P is easily deposited on the nickel film 14. In addition, since the nickel film functions as a metal resist, there is an effect that excessive etching is prevented even in a subsequent process.
【0038】(8) 続いて、めっきレジスト3を除去
した後、そのめっきレジスト下に存在していた無電解め
っき膜12を、硫酸と過酸化水素の混合液や過硫酸ナト
リウム、過硫酸アンモニウムなどの水溶液からなるエッ
チング液にて除去し、無電解めっき膜12、電解めっき
膜13及びニッケル膜14の3層からなる独立した導体
層5とバイアホール7を得る(図3(d)参照)。な
お、非導体部分に露出した粗化面上のパラジウム触媒核
は、クロム酸、硫酸−過酸化水素水溶液などにより溶解
除去する。(8) Subsequently, after the plating resist 3 is removed, the electroless plating film 12 existing under the plating resist is replaced with a mixed solution of sulfuric acid and hydrogen peroxide, sodium persulfate, ammonium persulfate, or the like. Removal is performed with an etching solution composed of an aqueous solution to obtain an independent conductor layer 5 composed of three layers of an electroless plating film 12, an electrolytic plating film 13, and a nickel film 14 and via holes 7 (see FIG. 3D). The palladium catalyst nuclei on the roughened surface exposed to the non-conductive portion are dissolved and removed with chromic acid, sulfuric acid-hydrogen peroxide aqueous solution or the like.
【0039】(9) 次に、導体層5とバイアホール7
の表面に粗化層11を設け、さらに層間樹脂絶縁層2と
して先に述べた無電解めっき用接着剤の層を形成する
(図4(a)参照)。(9) Next, the conductor layer 5 and the via hole 7
A roughening layer 11 is provided on the surface of the substrate, and a layer of the above-described adhesive for electroless plating is formed as the interlayer resin insulating layer 2 (see FIG. 4A).
【0040】(10) この層間樹脂絶縁層2に、バイ
アホール用開口6を設けるとともに、層間樹脂絶縁層2
の表面を粗化する。(図4(b)参照)。(10) A via hole opening 6 is provided in the interlayer resin insulation layer 2 and the interlayer resin insulation layer 2
The surface of is roughened. (See FIG. 4B).
【0041】(11) つづいて、この粗化した層間樹
脂絶縁層2の表面に触媒核を付与した後、無電解めっき
膜12を形成する(図4(c)参照)。(11) Subsequently, after a catalyst nucleus is provided on the surface of the roughened interlayer resin insulating layer 2, an electroless plating film 12 is formed (see FIG. 4C).
【0042】(12) 無電解めっき膜12の表面にめ
っきレジスト3を形成し、先に述べたように、めっきレ
ジスト3の非形成部に電気メッキ膜13、ニッケルめっ
き膜14を形成する(図4(d)参照)。(12) The plating resist 3 is formed on the surface of the electroless plating film 12, and the electroplating film 13 and the nickel plating film 14 are formed on the portion where the plating resist 3 is not formed as described above (FIG. 4 (d)).
【0043】(13) めっきレジスト3を除去し、め
っきレジスト下の無電解めっき膜12を除去し、導体層
5、バイアホール7及びプレーン層21を設け、片面3
層の6層のビルドアップ基板を得る(図5参照)。(13) The plating resist 3 is removed, the electroless plating film 12 under the plating resist is removed, and the conductor layer 5, the via hole 7 and the plane layer 21 are provided.
A six-layer build-up substrate is obtained (see FIG. 5).
【0044】(14) このようにして得られたビルド
アップ基板の導体層5、バイアホール7、プレーン層2
1に粗化層11を形成し、パッド16及びプレーン層2
1を部分的に露出させる開口部18を有する有機樹脂絶
縁層15で被覆する(図6参照)。有機樹脂絶縁層の厚
さは5〜40μmがよい。薄すぎると絶縁性能が低下
し、厚すぎると開口し難くなるうえ半田と接触し、クラ
ックなどの原因となるからである。(14) The conductor layer 5, the via hole 7, and the plane layer 2 of the build-up substrate thus obtained.
1, a roughened layer 11 is formed, and a pad 16 and a plane layer 2 are formed.
1 is covered with an organic resin insulating layer 15 having an opening 18 for partially exposing it (see FIG. 6). The thickness of the organic resin insulating layer is preferably 5 to 40 μm. If the thickness is too small, the insulation performance is reduced, and if the thickness is too large, the opening becomes difficult, and it comes into contact with the solder, causing cracks and the like.
【0045】この有機樹脂絶縁層を構成する樹脂として
は、種々のものが使用でき、例えば、ビスフェノールA
型エポキシ樹脂、ビスフェノールA型エポキシ樹脂のア
クリレート、ノボラック型エポキシ樹脂、ノボラック型
エポキシ樹脂のアクリレートをアミン系硬化剤やイミダ
ゾール硬化剤で硬化させた樹脂を使用できる。Various resins can be used as the resin constituting the organic resin insulating layer. For example, bisphenol A
A type epoxy resin, a bisphenol A type epoxy resin acrylate, a novolak type epoxy resin, and a resin obtained by curing a novolak type epoxy resin acrylate with an amine-based curing agent or an imidazole curing agent can be used.
【0046】このような構成の有機樹脂絶縁層は、鉛の
マイグレーション(鉛イオンが、有機樹脂絶縁層内を拡
散する現象)が少ないといった利点を有する。しかも、
この有機樹脂絶縁層は、耐熱性、耐アルカリ性に優れ、
ハンダなどの導電性接着剤が溶融する温度(200℃前
後)でも劣化しないし、ニッケルめっきや金めっきのよ
うな強塩基性のめっき液で分解することもない。The organic resin insulating layer having such a configuration has an advantage that migration of lead (a phenomenon in which lead ions diffuse in the organic resin insulating layer) is small. Moreover,
This organic resin insulation layer has excellent heat resistance and alkali resistance,
It does not deteriorate even at the temperature at which the conductive adhesive such as solder melts (around 200 ° C.), and does not decompose with a strongly basic plating solution such as nickel plating or gold plating.
【0047】ここで、上記ノボラック型エポキシ樹脂の
アクリレートとしてはフェノールノボラックやクレゾー
ルノボラックのグリシジルエーテルをアクリル酸やメタ
クリル酸などと反応させたエポキシ樹脂などを用いるこ
とができる。上記イミダゾール硬化剤は、25℃で液状
であることが望ましい。液状であれば均一混合できるか
らである。Here, as the acrylate of the novolak type epoxy resin, an epoxy resin obtained by reacting glycidyl ether of phenol novolak or cresol novolak with acrylic acid, methacrylic acid or the like can be used. The imidazole curing agent is desirably liquid at 25 ° C. This is because a liquid can be uniformly mixed.
【0048】このような液状イミダゾール硬化剤として
は、1−ベンジル−2−メチルイミダゾール(品名:1
B2MZ)、1−シアノエチル−2−エチル−4−メチ
ルイミダゾール(品名:2E4MZ−CN)、4−メチ
ル−2−エチルイミダゾール(品名:2E4MZ)を用
いることができる。As such a liquid imidazole curing agent, 1-benzyl-2-methylimidazole (product name: 1)
B2MZ), 1-cyanoethyl-2-ethyl-4-methylimidazole (product name: 2E4MZ-CN), and 4-methyl-2-ethylimidazole (product name: 2E4MZ) can be used.
【0049】このイミダゾール硬化剤の添加量は、上記
有機樹脂絶縁層の総固形分に対して1から10重量%と
することが望ましい。この理由は、添加量がこの範囲内
にあれば均一混合がしやすいからである。上記有機樹脂
絶縁層の硬化前組成物は、溶媒としてグリコールエーテ
ル系の溶剤を使用することが望ましい。かかる組成物を
用いた有機樹脂絶縁層は遊離酸素が発生せず、パッド表
面を酸化させず、また人体に対する有害性も少ないから
である。The amount of the imidazole curing agent is desirably 1 to 10% by weight based on the total solid content of the organic resin insulating layer. The reason for this is that if the added amount is within this range, uniform mixing is easy. In the composition before curing of the organic resin insulating layer, it is desirable to use a glycol ether-based solvent as a solvent. This is because an organic resin insulating layer using such a composition does not generate free oxygen, does not oxidize the pad surface, and has little harm to the human body.
【0050】上記グリコールエーテル系溶剤としては、
望ましくはジエチレングリコールジメチルエーテル(D
MDG)およびトリエチレングリコールジメチルエーテ
ル(DMTG)から選ばれるいずれか少なくとも1種を
用いる。これらの溶剤は、30〜50℃程度の加温によ
り、反応開始剤であるベンゾフェノンやミヒラーケトン
を完全に溶解させることができるからである。このグリ
コールエーテル系の溶媒は、有機樹脂絶縁層の組成物の
全重量に対して10〜40重量%がよい。Examples of the glycol ether solvents include:
Desirably, diethylene glycol dimethyl ether (D
At least one selected from MDG) and triethylene glycol dimethyl ether (DMTG) is used. This is because these solvents can completely dissolve benzophenone and Michler's ketone as reaction initiators by heating at about 30 to 50 ° C. The amount of the glycol ether solvent is preferably 10 to 40% by weight based on the total weight of the composition of the organic resin insulating layer.
【0051】以上説明したような有機樹脂絶縁層の組成
物には、そのほかに各種消泡剤やレベリング剤、耐熱性
や耐塩基性の改善と可撓性付与のために熱硬化性樹脂、
解像度改善のために感光性モノマーなどを添加すること
ができる。例えば、レベリング剤としてはアクリル酸エ
ステルの重合体からなるものがよい。また、開始剤とし
てはチバガイギー社製のイルガキュアI907、光増感
剤としては日本化薬社製のDETX−Sがよい。さら
に、有機樹脂絶縁層の組成物には色素や顔料を添加して
もよい。配線パターンを隠蔽できるからである。この色
素としてはフタロシアニングリーンを用いることが望ま
しい。The composition of the organic resin insulating layer as described above includes, in addition to the above, various antifoaming agents and leveling agents, thermosetting resins for improving heat resistance and base resistance and imparting flexibility.
A photosensitive monomer or the like can be added to improve the resolution. For example, as the leveling agent, one made of a polymer of an acrylate ester is preferable. Further, Irgacure I907 manufactured by Ciba-Geigy is preferably used as an initiator, and DETX-S manufactured by Nippon Kayaku is preferable as a photosensitizer. Further, a dye or a pigment may be added to the composition of the organic resin insulating layer. This is because the wiring pattern can be hidden. It is desirable to use phthalocyanine green as this dye.
【0052】添加成分としての上記熱硬化性樹脂として
は、ビスフェノール型エポキシ樹脂を用いることができ
る。このビスフェノール型エポキシ樹脂には、ビスフェ
ノールA型エポキシ樹脂とビスフェノールF型エポキシ
樹脂があり、耐塩基性を重視する場合には前者が、低粘
度化が要求される場合(塗布性を重視する場合)には後
者がよい。As the thermosetting resin as an additional component, a bisphenol type epoxy resin can be used. This bisphenol type epoxy resin includes a bisphenol A type epoxy resin and a bisphenol F type epoxy resin, and when importance is attached to base resistance, the former is required to reduce viscosity (when importance is attached to coating properties). The latter is better.
【0053】また、これらの有機樹脂絶縁層組成物は、
25℃で0.5から10Pa・s、より望ましくは1〜
10Pa・sがよい。ロールコータで塗布しやすい粘度
だからである。Further, these organic resin insulating layer compositions include:
0.5 to 10 Pa · s at 25 ° C., more preferably 1 to 10 Pa · s
10 Pa · s is preferable. This is because the viscosity is easy to apply with a roll coater.
【0054】(15) 前記開口部18内に金めっき
膜、ニッケルめっき膜−金めっき膜などの耐食金属であ
る金属膜19の形成を行った後、パッケージ基板の下面
側(ドータボード、マザーボードとの接続面)となる開
口部18内に、導電性接着剤17としてハンダペースト
を印刷する。半田ペースの粘度としては、50〜400
PaSの範囲で行うことがよい。さらに、導電性接続ピ
ン100を適当なピン保持装置に取り付けて支持し、導
電性接続ピン100の固定部101を開口部16内の導
電性接着剤17に当接させて、240〜270℃でリフ
ロを行い,導電性接続ピン100を導電性接着剤17に
固定する(図7参照)。または、導電性接着剤をボール
状等とに形成したものを開口部内に入れて、あるいは、
導電性接続ピンの板状の固定部側に接合させて導電性接
続ピンを取り付けた後、リフローさせてもよい。なお、
パッケージ基板311において、上面側の開口18に
は、ICチップなどの部品に接続可能なハンダバンプ2
30を設けた。(15) After forming a metal film 19, which is a corrosion-resistant metal such as a gold plating film, a nickel plating film and a gold plating film, in the opening 18, the lower surface side of the package substrate (daughter board, motherboard). A solder paste is printed as the conductive adhesive 17 in the opening 18 to be the connection surface. The solder paste has a viscosity of 50 to 400
It is preferable to carry out in the range of PaS. Further, the conductive connection pin 100 is attached to and supported by an appropriate pin holding device, and the fixing portion 101 of the conductive connection pin 100 is brought into contact with the conductive adhesive 17 in the opening 16, and at 240 to 270 ° C. Reflow is performed to fix the conductive connection pins 100 to the conductive adhesive 17 (see FIG. 7). Or, put the conductive adhesive in the form of a ball or the like in the opening, or
After attaching the conductive connection pin to the conductive connection pin and attaching the conductive connection pin to the plate-shaped fixed portion side, reflow may be performed. In addition,
In the opening 18 on the upper surface side of the package substrate 311, a solder bump 2 connectable to a component such as an IC chip is provided.
30 were provided.
【0055】本発明に用いられる導電性接続ピン100
は、板状の固定部101とこの板状の固定部101の略
中央に突設された柱状の接続部102とからなる、いわ
ゆるT型ピンが好適に用いられる。板状の固定部101
は、パッド16となるパッケージ基板の最外層の導体層
5に導電性接着剤17を介して固定される部分であっ
て、パッドの大きさに合わせた円形状や多角形状など適
当に形成される。また、接続部102の形状は、他の基
板の端子など接続部に挿入可能な柱状であれば問題な
く、円柱・角柱・円錐・角錐など何でもよい。The conductive connection pin 100 used in the present invention
A so-called T-shaped pin composed of a plate-shaped fixing portion 101 and a columnar connecting portion 102 protruding substantially at the center of the plate-shaped fixing portion 101 is preferably used. Plate-shaped fixing part 101
Is a portion fixed to the outermost conductor layer 5 of the package substrate to be the pad 16 via the conductive adhesive 17 and is appropriately formed in a circular shape or a polygonal shape according to the size of the pad. . The shape of the connection portion 102 is not limited as long as it can be inserted into the connection portion such as a terminal of another substrate, and may be any shape such as a cylinder, a prism, a cone, or a pyramid.
【0056】導電性接続ピン100の材質にも金属であ
れば限定はなく、金・銀・銅・鉄・ニッケル・コバルト
・スズ・鉛などの中から少なくとも1種類以上の金属で
形成するのがよい。特に、鉄合金である、商品名「コバ
ール」(Ni−Co−Fe)、ステンレスや、銅合金で
あるリン青銅が挙げられる。電気的特性および導電性接
続ピンとしての加工性に優れているからである。また、
この導電性接続ピンは、一種類の金属または合金で形成
しても、腐食防止あるいは強度向上のために表面を他の
金属層で被覆してもよい。さらに、セラミックなどの絶
縁性物質で形成し、その表面を金属層で被覆してもよ
い。The material of the conductive connection pin 100 is not limited as long as it is a metal, and it is preferable that the conductive connection pin 100 be formed of at least one kind of metal among gold, silver, copper, iron, nickel, cobalt, tin, lead and the like. Good. In particular, iron alloys such as "Kovar" (Ni-Co-Fe), stainless steel, and phosphor bronze which is a copper alloy are exemplified. This is because they have excellent electrical characteristics and workability as a conductive connection pin. Also,
The conductive connection pin may be formed of one kind of metal or alloy, or may be coated with another metal layer for preventing corrosion or improving strength. Further, it may be formed of an insulating material such as ceramic, and its surface may be covered with a metal layer.
【0057】導電性接続ピン100において、柱状の接
続部102は直径が0.1〜0.8mmで長さが1.0
〜10mm、板状の固定部101の直径は0.5〜2.
0mmの範囲とすることが望ましく、パッドの大きさや
装着されるマザーボードのソケット等の種類などによっ
て適宜に選択される。In the conductive connecting pin 100, the columnar connecting portion 102 has a diameter of 0.1 to 0.8 mm and a length of 1.0 to 1.0.
10 to 10 mm, and the diameter of the plate-shaped fixing portion 101 is 0.5 to 2.
It is desirable to set the range to 0 mm, and it is appropriately selected according to the size of the pad, the type of the socket of the motherboard to be mounted, and the like.
【0058】本発明のパッケージ基板に用いられる導電
性接着剤17としては、ハンダ(スズ−鉛、スズ−アン
チモン、銀−スズ−銅など)、導電性樹脂、導電性ペー
ストなどを使用することができる。導電性接着剤の融点
が180〜280℃の範囲のものを用いることがよい。
それにより、導電性接続ピンの接着強度2.0Kg/pin
以上が確保され、ヒートサイクル条件下や実装の際にか
かる熱による導電性接続ピンの脱落、傾きがなくなり、
電気的接続も確保されるのである。ハンダで形成するの
が最も好ましい。導電性接続ピンとの接続強度に優れて
いるとともに、熱にも強く、接着作業がやりやすいから
である。As the conductive adhesive 17 used for the package substrate of the present invention, solder (tin-lead, tin-antimony, silver-tin-copper, etc.), conductive resin, conductive paste and the like can be used. it can. It is preferable to use a conductive adhesive having a melting point in the range of 180 to 280 ° C.
Thereby, the adhesive strength of the conductive connection pin is 2.0 kg / pin.
The above is ensured, and the conductive connection pins do not fall off or tilt due to heat applied under heat cycle conditions or during mounting,
The electrical connection is also ensured. Most preferably, it is formed of solder. This is because it has excellent connection strength with the conductive connection pin, is resistant to heat, and is easily bonded.
【0059】導電性接着剤17をハンダで形成する場
合、Sn/Pb=95/5、60/40などの組成より
なるハンダを使用するのが好適である。用いられるハン
ダの融点も180〜280℃の範囲にあるものが好適で
ある。特に望ましいのは200〜260℃の範囲である
ものがよい。それにより、導電性接続ピンの接着強度の
バラツキも少なくなり、実装の際に加わる熱がパッケー
ジ基板を構成する樹脂層を損傷しないからである。When the conductive adhesive 17 is formed by solder, it is preferable to use solder having a composition such as Sn / Pb = 95/5, 60/40. The melting point of the solder used is preferably in the range of 180 to 280 ° C. Particularly preferred is a temperature in the range of 200 to 260 ° C. Thereby, the variation in the adhesive strength of the conductive connection pins is reduced, and the heat applied during mounting does not damage the resin layer constituting the package substrate.
【0060】図12は、プレーン層21を示す平面図で
ある。プレーン層21には、円形の導体非形成部分21
aを配設することによりメッシュ状に形成されている。
導電性接続ピンが接続される接続部分21bは、導体非
形成部分21aを避けて設けられる。なお、メッシュ
は、円形ではなく方形でもよく、更に、プレーン層にメ
ッシュを設けないことも可能である。FIG. 12 is a plan view showing the plane layer 21. FIG. The plane layer 21 has a circular conductor non-forming portion 21.
It is formed in a mesh shape by disposing a.
The connection portion 21b to which the conductive connection pin is connected is provided so as to avoid the conductor non-formed portion 21a. It should be noted that the mesh may be rectangular instead of circular, and it is also possible that no mesh is provided on the plane layer.
【0061】図7に示すように、本発明の第1実施例の
パッケージ基板311においては、基板の表面に電源層
を形成するプレーン層21を配置し、該プレーン層21
に導電性接続ピン100を直接接続することで、外部基
板(例えば、ドータボード)からプレーン層21までの
電気抵抗を下げてある。これにより、ドータボード側か
らの電力供給を容易にして、ICチップへの大電流の供
給を可能にし、電源層を構成するプレーン層21が十分
な機能を果たさせるようにしてある。As shown in FIG. 7, in the package substrate 311 according to the first embodiment of the present invention, a plane layer 21 for forming a power supply layer is disposed on the surface of the substrate.
The electrical resistance from the external substrate (for example, a daughter board) to the plane layer 21 is reduced by directly connecting the conductive connection pins 100 to the conductive layers. This facilitates power supply from the daughter board side, enables a large current to be supplied to the IC chip, and allows the plane layer 21 constituting the power supply layer to perform a sufficient function.
【0062】[第2実施例]図8は、本発明の第2実施例
に係るパッケージ基板312の断面を示し、図9は、図
8において、円で囲んだ導電性接続ピン400を設けた
パッド分を拡大して示している。第2実施例のパッケー
ジ基板312のパッド16は、図9に示すように、当該
パッド16を部分的に露出させる開口部18が形成され
た有機樹脂絶縁層(スルーホール層)15により被覆さ
れており、開口部18から露出したパッド16に導電性
接着剤(Sn/Sb=95:5)17を介して導電性接
続ピン400の固定部101が固定されている。図から
理解されるように、この有機樹脂絶縁層15は、パッド
16の周囲を押さえるように被覆しているので、ヒート
サイクル時や、パッケージ基板をマザーボードへ装着す
る際などに、導電性接続ピン400に応力が加わって
も、パッド16の破壊および層間樹脂絶縁層15との剥
離を防止できる。また、金属と樹脂という異なった素材
同士の接着においても剥離し難くなっている。[Second Embodiment] FIG. 8 shows a cross section of a package substrate 312 according to a second embodiment of the present invention, and FIG. 9 shows a configuration in which conductive connection pins 400 surrounded by a circle in FIG. 8 are provided. The pad portion is shown in an enlarged manner. As shown in FIG. 9, the pads 16 of the package substrate 312 of the second embodiment are covered with an organic resin insulating layer (through-hole layer) 15 in which an opening 18 for partially exposing the pad 16 is formed. The fixing portion 101 of the conductive connection pin 400 is fixed to the pad 16 exposed from the opening 18 via a conductive adhesive (Sn / Sb = 95: 5) 17. As can be understood from the figure, the organic resin insulating layer 15 covers the periphery of the pad 16 so as to be pressed down, so that the conductive connection pin 15 can be used during a heat cycle or when mounting the package substrate on a motherboard. Even if a stress is applied to 400, destruction of pad 16 and separation from interlayer resin insulating layer 15 can be prevented. Also, it is difficult to peel off even when bonding different materials such as metal and resin.
【0063】図8に示すように、本発明の第2実施例の
パッケージ基板においては、基板の表面にアース層を形
成するプレーン層21を配置し、該プレーン層21に導
電性接続ピン400を直接接続することで、外部基板
(例えば、ドータボード)からプレーン層21までの電
気抵抗を下げてある。これにより、アース層を構成する
プレーン層においても、低抵抗の導電性接続ピンを介し
てドータボード側のアースラインと接続させ、ノイズ防
止の役割を十分に果たさせる。As shown in FIG. 8, in the package substrate according to the second embodiment of the present invention, a plane layer 21 forming an earth layer is disposed on the surface of the substrate, and conductive connection pins 400 are formed on the plane layer 21. The direct connection reduces the electrical resistance from the external substrate (eg, daughter board) to the plane layer 21. Thus, even in the plane layer constituting the ground layer, the ground layer is connected to the ground line on the daughter board via the low-resistance conductive connection pin, thereby sufficiently fulfilling the role of preventing noise.
【0064】この第2実施例のパッケージ基板312に
おいては、導電性接続ピン400の材質は、銅又は銅合
金、スズ、亜鉛、アルミニウム、貴金属から選ばれる少
なくとも1種類以上の高い可撓性を有する金属からな
る。特に、銅合金であるリン青銅が挙げられる。電気的
特性および導電性接続ピンとしての加工性に優れている
からである。また、この導電性接続ピンは、腐食防止あ
るいは強度向上のために表面を他の金属層で被覆しても
よい。In the package substrate 312 of the second embodiment, the material of the conductive connection pin 400 has at least one kind of high flexibility selected from copper or copper alloy, tin, zinc, aluminum, and noble metal. Made of metal. In particular, phosphor bronze, which is a copper alloy, may be mentioned. This is because they have excellent electrical characteristics and workability as a conductive connection pin. The surface of the conductive connection pin may be covered with another metal layer to prevent corrosion or improve strength.
【0065】図9から理解されるように、この導電性接
続ピン400は、可撓性に優れた材質よりなるので、パ
ッケージ基板を他の基板へ取り付ける際などに導電性接
続ピン400に加わった応力を、図中の点線で示すよう
に接続部102が撓んで吸収することができる。As can be understood from FIG. 9, since the conductive connection pins 400 are made of a material having excellent flexibility, they are added to the conductive connection pins 400 when the package substrate is mounted on another substrate. The stress can be absorbed by the connection portion 102 flexing as shown by a dotted line in the drawing.
【0066】[第3実施例]図10は、本発明の第3実
施例に係るパッケージ基板313の断面を示し、図11
は、図10において、円で囲んだ導電性接続ピン500
を設けたパッド分を拡大して示している。図11から理
解されるように、第3実施例のパッケージ基板313の
導電性接続ピン500は、接続部102にくびれ部10
3が設けられているので、可撓性に富んで曲がり易くな
っており、パッケージ基板をマザーボード等へ取り付け
る際などに導電性接続ピン500に加わった応力を、接
続部102がくびれ部103を介して曲がることにより
吸収することができる。[Third Embodiment] FIG. 10 shows a cross section of a package substrate 313 according to a third embodiment of the present invention.
Is a conductive connection pin 500 encircled in FIG.
The pad portion provided with is shown in an enlarged manner. As can be understood from FIG. 11, the conductive connecting pins 500 of the package substrate 313 of the third embodiment are connected to
3 is provided, the connector is flexible and easy to bend. When the package substrate is attached to a motherboard or the like, the stress applied to the conductive connection pins 500 is reduced by the connection portion 102 through the narrow portion 103. It can be absorbed by bending.
【0067】[第4実施例]基本的に第2実施例と同じ
であるが、ハンダをボール状にしたものを導電性接続ピ
ンに取り付けて、その後、導電性接続ピンを配設した。[Fourth Embodiment] Basically the same as the second embodiment, except that a ball-shaped solder is attached to the conductive connection pins, and then the conductive connection pins are provided.
【0068】[0068]
【発明の効果】以上説明したように、本発明によれば、
基板の表面にプレーン層を配置し、該プレーン層に導電
性接続ピンを直接接続することで、外部基板からプレー
ン層までの電気抵抗を下げてある。これにより、プレー
ン層の機能を十分に果たさせることができる。As described above, according to the present invention,
An electric resistance from the external substrate to the plane layer is reduced by disposing a plane layer on the surface of the substrate and directly connecting conductive connection pins to the plane layer. Thereby, the function of the plane layer can be sufficiently performed.
【0069】図13に各実施例のパッケージ基板を評価
した結果を示す。評価項目として、接合後の導電性接続
ピンの最小の接着強度、加熱試験(仮想のIC実測状態
の再現、ピンを配設した基板を250℃にした窒素リフ
ロー炉に通すことによる評価)、およびヒートサイクル
条件下(130℃/3分+−65℃/3分を1サイクル
として、10000サイクル実施)後の各々のピンの状
態、最小接着強度、導通試験を行った。FIG. 13 shows the results of evaluating the package substrates of the respective embodiments. Evaluation items include the minimum bonding strength of the conductive connection pins after bonding, a heating test (reproduction of a virtual IC actual measurement state, evaluation by passing a substrate on which the pins are disposed through a nitrogen reflow furnace at 250 ° C.), and After heat cycle conditions (10000 cycles at 130 ° C./3 minutes + −65 ° C./3 minutes as one cycle), the state of each pin, minimum adhesive strength, and conduction test were performed.
【図1】図1(a),図1(b),図1(c),図1
(d)は、本発明の第1実施例に係るパッケージ基板の
製造工程図である。1 (a), 1 (b), 1 (c), 1
(D) is a manufacturing process diagram of the package substrate according to the first example of the present invention.
【図2】図2(a),図2(b),図2(c),図2
(d)は、本発明の第1実施例に係るパッケージ基板の
製造工程図である。2 (a), 2 (b), 2 (c), 2
(D) is a manufacturing process diagram of the package substrate according to the first example of the present invention.
【図3】図3(a),図3(b),図3(c),図3
(d)は、本発明の第1実施例に係るパッケージ基板の
製造工程図である。3 (a), 3 (b), 3 (c), 3
(D) is a manufacturing process diagram of the package substrate according to the first example of the present invention.
【図4】図4(a),図4(b),図4(c),図4
(d)は、本発明の第1実施例に係るパッケージ基板の
製造工程図である。4 (a), 4 (b), 4 (c), 4
(D) is a manufacturing process diagram of the package substrate according to the first example of the present invention.
【図5】本発明の第1実施例に係るパッケージ基板の断
面図である。FIG. 5 is a sectional view of a package substrate according to the first embodiment of the present invention.
【図6】本発明の第1実施例に係るパッケージ基板の断
面図である。FIG. 6 is a sectional view of the package substrate according to the first embodiment of the present invention.
【図7】本発明の第1実施例に係るパッケージ基板の断
面図である。FIG. 7 is a sectional view of the package substrate according to the first embodiment of the present invention.
【図8】本発明の第2実施例に係るパッケージ基板の断
面図である。FIG. 8 is a sectional view of a package substrate according to a second embodiment of the present invention.
【図9】図8において、導電性接続ピンをパッドに接続
した部分を拡大した断面図である。FIG. 9 is an enlarged sectional view of a portion where a conductive connection pin is connected to a pad in FIG. 8;
【図10】本発明の第3実施例に係るパッケージ基板の
断面図である。FIG. 10 is a sectional view of a package substrate according to a third embodiment of the present invention.
【図11】図10において、導電性接続ピンをパッドに
接続した部分を拡大した断面図である。FIG. 11 is an enlarged sectional view of a portion where a conductive connection pin is connected to a pad in FIG. 10;
【図12】プレーン層を示す平面図である。FIG. 12 is a plan view showing a plane layer.
【図13】各実施例のパッケージ基板の評価結果を示す
図表である。FIG. 13 is a table showing evaluation results of the package substrates of the respective examples.
1 コア基板 2,200 層間樹脂絶縁層 3 めっきレジスト 4 導体層 4a 粗化面 5 導体層 6 バイアホール用開口 7 バイアホール 8 銅箔 9 スルーホール 9a 粗化面 91 スルーホールのランド 10 樹脂充填剤 11 粗化層 12 無電解めっき膜 13 電解めっき膜 14 ニッケルめっき層 15 有機樹脂絶縁層 16 パッド 16a 延在部 16b 本体部 17 導電性接着剤 18 開口部 21 プレーン層 100 導電性接続ピン 101 固定部 102 接続部 103 くびれ部 311,312,313 パッケージ基板 400,500 導電性接続ピン Reference Signs List 1 core substrate 2,200 interlayer resin insulating layer 3 plating resist 4 conductive layer 4a roughened surface 5 conductive layer 6 via hole opening 7 via hole 8 copper foil 9 through hole 9a roughened surface 91 land of through hole 10 resin filler DESCRIPTION OF SYMBOLS 11 Roughening layer 12 Electroless plating film 13 Electroplating film 14 Nickel plating layer 15 Organic resin insulating layer 16 Pad 16a Extension part 16b Body part 17 Conductive adhesive 18 Opening 21 Plain layer 100 Conductive connection pin 101 Fixed part 102 connecting part 103 constricted part 311, 312, 313 package substrate 400, 500 conductive connecting pin
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 3/46 H05K 3/46 Z Q H01L 23/12 K (72)発明者 広瀬 直宏 岐阜県揖斐郡揖斐川町北方1−1 イビデ ン株式会社大垣北工場内 (72)発明者 川出 雅徳 岐阜県揖斐郡揖斐川町北方1−1 イビデ ン株式会社大垣北工場内 Fターム(参考) 5E085 BB08 BB13 CC07 DD05 EE01 EE15 EE34 GG26 HH40 JJ06 JJ35 5E344 BB10 CC23 CD14 DD02 EE16 EE21 5E346 AA02 AA43 CC08 CC09 CC32 EE31 FF07 FF10 FF13 FF14 FF18 GG15 GG17 GG27 HH31──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 3/46 H05K 3/46 Z Q H01L 23/12 K (72) Inventor Naohiro Hirose Ibikawa, Ibi-gun, Gifu Prefecture 1-1, Ikiden, Ogaki-Kita Plant (72) Inventor, Masanori Kawade 1-1, Ibigawa-cho, Ibi-gun, Ibi-gun, Gifu Pref., Ogaki-Kita Plant F-term (reference) EE15 EE34 GG26 HH40 JJ06 JJ35 5E344 BB10 CC23 CD14 DD02 EE16 EE21 5E346 AA02 AA43 CC08 CC09 CC32 EE31 FF07 FF10 FF13 FF14 FF18 GG15 GG17 GG27 HH31
Claims (9)
レーン層と、 前記プレーン層の表面に、開口を形成して設けられた有
機樹脂絶縁層と、 前記有機樹脂絶縁層の開口から露出される前記プレーン
層に、導電性接着剤を介して固定された導電性接続ピン
とを有することを特徴とするパッケージ基板。1. A plane layer which is a conductor layer provided on a surface of a substrate, an organic resin insulating layer provided by forming an opening on a surface of the plane layer, and exposed from an opening of the organic resin insulating layer. A conductive connection pin fixed to the plane layer via a conductive adhesive.
けられた有機樹脂絶縁層と、 該有機樹脂絶縁層の開口から露出される前記プレーン層
及び前記パッドに、導電性接着剤を介して固定された導
電性接続ピンと、を有することを特徴とするパッケージ
基板。2. A plane layer provided on the surface of the substrate, a pad provided on the surface of the substrate, an organic resin insulating layer provided with an opening formed on the surface of the plane layer and the pad, A package substrate, comprising: a conductive connection pin fixed to the plane layer and the pad exposed through an opening of an organic resin insulating layer via a conductive adhesive.
が交互に積層された構造を少なくとも一つ以上有するビ
ルトアップ基板であることを特徴とする請求項1又は2
に記載のパッケージ基板。3. The substrate according to claim 1, wherein the substrate is a built-up substrate having at least one structure in which conductor layers and interlayer resin insulation layers are alternately laminated.
A package substrate according to claim 1.
被覆されていることを特徴とする請求項2又は3に記載
のパッケージ基板。4. The package substrate according to claim 2, wherein a peripheral portion of said pad is covered with an organic resin insulating layer.
状の固定部よりなり、銅または銅合金、スズ、亜鉛、ア
ルミニウム、貴金属から選ばれる少なくとも1種類以上
の金属からなることを特徴とする請求項1〜4のいずれ
か1に記載のパッケージ基板。5. The conductive connecting pin comprises a columnar connecting portion and a plate-like fixing portion, and is made of at least one metal selected from copper or copper alloy, tin, zinc, aluminum, and a noble metal. The package substrate according to claim 1, wherein:
状の固定部よりなり、前記柱状の接続部に他の部分の直
径よりも小さいくびれ部が形成されていることを特徴と
する請求項1〜4のいずれか1に記載のパッケージ基
板。6. A method according to claim 1, wherein said conductive connecting pin comprises a columnar connecting portion and a plate-like fixing portion, and said columnar connecting portion is formed with a constricted portion having a diameter smaller than that of another portion. The package substrate according to claim 1.
80℃であることを特徴とする請求項1ないし6のいず
れか1に記載のパッケージ基板。7. The conductive adhesive has a melting point of 180-2.
The package substrate according to any one of claims 1 to 6, wherein the temperature is 80 ° C.
モン、銀、金、銅が少なくとも1種類以上で形成されて
いることを特徴とする請求項1ないし7のいずれか1に
記載のパッケージ基板。8. The method according to claim 1, wherein the conductive adhesive is made of at least one of tin, lead, antimony, silver, gold, and copper. Package substrate.
/Sb、Sn/Ag、Sn/Sb/Pbの合金であるこ
とを特徴とする請求項1ないし8のいずれか1に記載の
パッケージ基板。9. The conductive adhesive is Sn / Pb, Sn
9. The package substrate according to claim 1, wherein the package substrate is an alloy of / Sb, Sn / Ag, and Sn / Sb / Pb.
Priority Applications (18)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23193499A JP4458582B2 (en) | 1999-01-04 | 1999-08-18 | Package substrate |
PCT/JP1999/006428 WO2000036886A1 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin and package board |
KR1020017007575A KR100882173B1 (en) | 1998-12-16 | 1999-11-17 | Conductive Connection Pins and Package Board |
EP99973449A EP1150551B1 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin and package board |
KR1020067024954A KR100804456B1 (en) | 1998-12-16 | 1999-11-17 | Conductive Connection Pins and Package Board |
EP06014707A EP1720385A3 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin and package substrate |
DE69936319T DE69936319T2 (en) | 1998-12-16 | 1999-11-17 | CONDUCTIVE CONNECTING PIN AND MODULE PLATE |
US09/830,949 US8035214B1 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin for package substance |
KR1020077019759A KR100866814B1 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin and package board |
EP07106099A EP1845759A1 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin and package substrate |
KR1020087010076A KR20080043408A (en) | 1998-12-16 | 1999-11-17 | Conductive Connection Pins and Package Board |
EP08151537A EP1924130A3 (en) | 1998-12-16 | 1999-11-17 | Conductive connecting pin and package substrate |
TW094140779A TWI282255B (en) | 1998-12-16 | 1999-12-15 | Conductive connecting pin and package board |
TW095147633A TW200715918A (en) | 1998-12-16 | 1999-12-15 | Conductive connecting pin and package board |
US12/257,501 US7847393B2 (en) | 1998-12-16 | 2008-10-24 | Conductive connecting pins for a package substrate |
US12/359,663 US7902659B2 (en) | 1998-12-16 | 2009-01-26 | Conductive connecting pin and package substrate |
US12/546,950 US8536696B2 (en) | 1998-12-16 | 2009-08-25 | Conductive pin attached to package substrate |
US12/581,205 US8110917B2 (en) | 1998-12-16 | 2009-10-19 | Package substrate with a conductive connecting pin |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3461699 | 1999-01-04 | ||
JP11-34616 | 1999-04-05 | ||
JP10429499 | 1999-04-12 | ||
JP11-104294 | 1999-04-12 | ||
JP23193499A JP4458582B2 (en) | 1999-01-04 | 1999-08-18 | Package substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2000357762A true JP2000357762A (en) | 2000-12-26 |
JP4458582B2 JP4458582B2 (en) | 2010-04-28 |
Family
ID=27288468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23193499A Expired - Lifetime JP4458582B2 (en) | 1998-12-16 | 1999-08-18 | Package substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4458582B2 (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004047931A (en) * | 2002-07-12 | 2004-02-12 | Samsung Electro Mech Co Ltd | Method for forming electrodes of circuit element, chip package and multilayer substrate using the same |
JP2008193036A (en) * | 2007-01-31 | 2008-08-21 | Tamura Kaken Co Ltd | Semiconductor package substrate for mounting conductive balls and the like, method of manufacturing the same, and conductive jointing material for the semiconductor package substrate |
US7497694B2 (en) | 2005-12-09 | 2009-03-03 | Ibiden Co., Ltd. | Printed board with a pin for mounting a component |
US7773388B2 (en) | 2005-12-09 | 2010-08-10 | Ibiden Co., Ltd. | Printed wiring board with component mounting pin and electronic device using the same |
JP2010219206A (en) * | 2009-03-16 | 2010-09-30 | Hitachi Automotive Systems Ltd | Laminated circuit substrate |
US8409461B2 (en) | 2005-12-09 | 2013-04-02 | Ibiden Co., Ltd. | Method of manufacturing printed wiring board with component mounting pin |
JP2015015285A (en) * | 2013-07-03 | 2015-01-22 | 新光電気工業株式会社 | Wiring board and method for manufacturing wiring board |
-
1999
- 1999-08-18 JP JP23193499A patent/JP4458582B2/en not_active Expired - Lifetime
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004047931A (en) * | 2002-07-12 | 2004-02-12 | Samsung Electro Mech Co Ltd | Method for forming electrodes of circuit element, chip package and multilayer substrate using the same |
US7497694B2 (en) | 2005-12-09 | 2009-03-03 | Ibiden Co., Ltd. | Printed board with a pin for mounting a component |
US7731504B2 (en) | 2005-12-09 | 2010-06-08 | Ibiden Co., Ltd. | Printed board with component mounting pin |
US7773388B2 (en) | 2005-12-09 | 2010-08-10 | Ibiden Co., Ltd. | Printed wiring board with component mounting pin and electronic device using the same |
US7891089B2 (en) | 2005-12-09 | 2011-02-22 | Ibiden Co., Ltd. | Printed board with component mounting pin |
US8409461B2 (en) | 2005-12-09 | 2013-04-02 | Ibiden Co., Ltd. | Method of manufacturing printed wiring board with component mounting pin |
JP2008193036A (en) * | 2007-01-31 | 2008-08-21 | Tamura Kaken Co Ltd | Semiconductor package substrate for mounting conductive balls and the like, method of manufacturing the same, and conductive jointing material for the semiconductor package substrate |
JP2010219206A (en) * | 2009-03-16 | 2010-09-30 | Hitachi Automotive Systems Ltd | Laminated circuit substrate |
JP2015015285A (en) * | 2013-07-03 | 2015-01-22 | 新光電気工業株式会社 | Wiring board and method for manufacturing wiring board |
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JP4458582B2 (en) | 2010-04-28 |
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