JP2000134143A - Wireless relay system using time division multiple access-time division bidirectional transmission system - Google Patents

Abstract

(57) [Problem] To provide a wireless relay system adopting a TDD scheme suitable for a TDMA scheme as an access scheme between a wireless base station and a wireless repeater and between a wireless repeater and a terminal. A wireless relay system disposed between a base station and a terminal, comprising a frequency converter and an oscillator for an offset frequency signal, each for a downlink and an uplink.
System signal processing circuit, and a first signal processing circuit directed to the base station.
And a second antenna directed toward the terminal. The frequency converter of the signal processing circuit for the downlink shifts the carrier frequency signal from the base station received by the first antenna by an offset frequency from the offset frequency oscillator, and shifts the carrier frequency signal by the offset frequency. Is transmitted from the second antenna, and the frequency converter of the uplink signal processing circuit
The signal from the terminal received by the antenna is shifted by the offset frequency from the offset frequency oscillator,
The signal is converted into a carrier frequency signal from the base station, and the converted carrier frequency signal is transmitted from the first antenna.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a radio relay system using a time division multiple access (TDMA) and a time division duplex (TDD).

[0002]

2. Description of the Related Art In recent years, TDMA and TDD (hereinafter, TDMA-TDD)
Mobile phone system (PH)
S) is widely used. In such PHS,
As shown in FIG. 30, a base station (WCS: Wireless Cell)
Station 1) and a terminal (WSU: Wireless Subscriber U)
nit) 2a and 2b are communicated by a carrier of a predetermined frequency.

Here, one base station 1 is connected to a terminal 2
The larger the accessible areas a and 2b, the more preferable for the PHS system operator and the user. However, as shown in FIG. 30, the terminal 2b and the base station 1
If there is an obstacle 3 such as a building between the base station 1 and the base station 1
Path Pa that directly connects the antenna of terminal 2b to the antenna of terminal 2b
Is impeded, and communication cannot be performed even within the accessible area. Therefore, in such a case, it is conceivable to install the repeater (REP) 4 to enable communication on the path of the path Pb + the repeater 4 + the path Pc.

Further, in a PHS system or a mobile communication system, an accessible area is expanded using a repeater (REP). For example, in the technique described in Japanese Patent Application Laid-Open Publication No. HEI 8-18499 (hereinafter referred to as “open technique”), one of channels assigned to a wireless zone belonging to one base station is selected.
Assign a new wireless zone. And it is characterized by relaying to this new wireless zone by a repeater.

[0005]

However, when the access zone is expanded by the repeater, starting with the above-mentioned disclosed technology, the carrier used for the relay is limited to one frequency. Furthermore, in the above-mentioned disclosed technology, the system is configured on the assumption that the operating frequency between the wireless base station and the wireless relay is different from the operating frequency between the wireless relay and the terminal, that is, the mobile station.

[0006] Further, the disclosed technology employs an FDD (frequency division) system as an access system between a wireless base station and a wireless repeater and between a wireless repeater and a terminal.

[0007] Therefore, the conventional system including the public technology is not efficient in terms of system operation and economy. In addition, application to the TDMA method has not been easy.

In view of the above, an object of the present invention is to provide a wireless relay system using TDMA-TDD which solves the above-mentioned problems.

A further object of the present invention is to provide a radio relay system capable of simultaneously using a plurality of carriers without being limited to the number of frequencies used.

[0010] It is another object of the present invention to provide an access method between a radio base station and a radio repeater and between a radio repeater and a terminal.
An object of the present invention is to provide a wireless relay system employing a TDD scheme suitable for the MA scheme.

[0011]

One configuration of a wireless relay system using TDMA-TDD which achieves the above object of the present invention is a wireless access system using a time division multiple access-time division bidirectional transmission system. A radio relay system disposed between a base station and a terminal, wherein the base station includes two signal processing circuits for downlink and uplink, each including a frequency converter and an oscillator for an offset frequency signal; A first antenna directed toward the terminal and a second antenna directed toward the terminal.

The frequency converter of the downlink signal processing circuit shifts a carrier frequency signal received from the base station from the base station by an offset frequency from the offset frequency oscillator, and The signal shifted by the amount of minutes is transmitted from the second antenna, and the frequency converter of the signal processing circuit for the uplink transmits the signal from the terminal received by the second antenna to the offset from the offset frequency oscillator. The frequency is shifted by a frequency and converted into a carrier frequency signal from the base station, and the converted carrier frequency signal is transmitted from the first antenna.

According to still another aspect, there are provided two signal processing circuits for downlink and uplink, each including a synthesizer and an oscillator of a pilot frequency signal, and a first antenna directed to the base station. And a second antenna directed to the terminal side. The combiner of the downlink signal processing circuit adds and combines a pilot frequency signal from an oscillator of the pilot frequency signal with a carrier frequency signal from a base station received by the first antenna, and generates a combined signal. Is transmitted from the second antenna, and the combiner of the signal processing circuit for the uplink subtracts the pilot frequency signal from the oscillator of the pilot frequency signal to the signal from the terminal received by the second antenna. The combined signal is transmitted from the first antenna.

[0014] In another aspect, in the above, further, a first switch for alternately connecting the first antenna and the two signal processing circuits is provided, and a second switch for connecting the second antenna and the two signal processing circuits. A second switch for alternately switching and connecting the signal processing circuits; and a transmission / reception switching control unit for receiving a control channel from the base station and generating transmission / reception switching timing based on the control channel. The switching between the first switch and the second switch is controlled at the transmission / reception switching timing generated by the transmission / reception switching control unit.

In another embodiment, a signal processing circuit for one system including a frequency converter and an offset frequency oscillator, a first antenna directed to the base station,
A second antenna directed to the terminal side, and the first antenna and the second antenna so that the signal processing circuit is alternately input with signals input from the first antenna and the second antenna. Has a switch for switching connection to
The frequency converter of the signal processing circuit shifts the frequency of a signal input from the first antenna or the second antenna by an offset frequency from the offset frequency oscillator, and outputs a signal shifted by the offset frequency. Transmitted from the second antenna or from the first antenna.

In still another embodiment, a signal processing circuit for one system including a synthesizer and an oscillator for a pilot frequency signal, a first antenna directed to the base station side, The second antenna directed and the signal processing circuit are switched and connected to the first antenna and the second antenna so that signals input from the first antenna and the second antenna are alternately input. A switch, wherein the combiner of the signal processing circuit adds or subtracts a pilot frequency signal from an oscillator of the pilot frequency signal to a frequency of a signal input from the first antenna or the second antenna. And a signal obtained by addition or subtraction synthesis is transmitted from the second antenna or
Transmitted from the first antenna.

In another aspect, a frequency converter and an oscillator for a signal of a predetermined frequency are provided, respectively, two signal processing circuits for down-link and up-link provided with an amplifier, and a signal processing circuit for the base station. A first antenna, and a second antenna directed to the terminal side, wherein the frequency converter of the downlink signal processing circuit is a carrier from a base station received by the first antenna. A frequency signal is shifted by the frequency of the signal of the predetermined frequency from the oscillator, and the signal shifted by the frequency of the signal of the predetermined frequency is the second signal.
Transmitted from the antenna, the frequency converter of the signal processing circuit for the uplink, the signal from the terminal received by the second antenna is shifted by the frequency of the signal of the predetermined frequency from the oscillator, The signal is converted into a carrier frequency signal from the base station, the converted carrier frequency signal is transmitted from the first antenna, and the amplifiers of the two signal processing circuits are alternately activated. You.

In still another embodiment, a TDM in which time slots are exchanged for baseband signals, respectively.
A signal processing circuit for downlink and uplink having an A time slot control unit, a controller, a first antenna directed to the base station side, and a second signal processing circuit directed to the terminal side Has an antenna.

The controller replaces a TDMA time slot of a downlink signal received from the first antenna from a first time slot to a second time slot, and further receives the signal from the second antenna. The TDMA time slot control unit is controlled so that a TDMA time slot of an uplink signal is changed from the second time slot to the first time slot.

In the aspect in which the controller is swung,
Further, the two signal processing circuits for the downlink and the uplink have an oscillator for an offset frequency signal and a frequency converter, respectively, and the controller is received from the first and second antennas. The frequency converter controls the frequency of the offset frequency signal oscillated from the oscillator based on the frequency information included in the signal, and the frequency converter shifts the frequency of the signal input by the offset frequency signal.

In another aspect, one of the two signal processing circuits for the downlink and the uplink has a delay correction circuit, and the controller controls the reception timing of the downlink and uplink signals. Is controlled to correct the amount of delay of the delay correction circuit so that.

Further features of the present invention will be apparent from embodiments of the present invention described with reference to the drawings.

[0023]

Embodiments of the present invention will be described below with reference to the drawings. In the figures, the same or
Similar components will be described with the same reference numerals or reference symbols.

FIG. 1 is a block diagram showing an example of the configuration of a repeater 4 showing an embodiment of a wireless relay system using the TDMA-TDD system according to the present invention. In particular, the configuration of the embodiment of FIG. 1 employs a frequency through repeater / offset booster system.

An antenna 40 directed toward the base station 1;
It has an antenna 41 directed toward the terminal 2 (2a, 2b). The signal processing circuit inside the repeater 4 includes an antenna 40
A circuit in the direction (downlink) from
It has two circuits of circuits in the direction from the antenna 41 to the antenna 40 (uplink).

In the TDMA system, the transmission and reception time is switched at a constant time. Therefore, when signals from the downlink circuit and the uplink circuit are supplied to the antennas 40 and 41, the switch 400 is controlled by the control channel (CH) detection transmission / reception switching control unit (hereinafter simply referred to as a switching control unit) 42. , 401 by switching control alternately.

FIG. 2 is a diagram for explaining the switching timing T of the switches 400 and 401 by the switching control unit 42 of FIG. In FIG. 2, switches 400 and 401
, The transmission / reception operation A of the base station 1
And the state where the transmission / reception operation B of the terminal 2 is alternately switched.

FIG. 3 is an operation flow of the switching control section 42 for controlling the switching of the switches 400 and 401 in FIG. The switching control unit 42 receives the control CH signal transmitted from the base station 1 through the hybrid circuit 43 (Step S01). At this time, the switch 400 is fixed to the system on the base station 1 side.

Next, the switching control unit 42 demodulates the received control CH signal, and outputs a synchronization word UW (Unique Worm).
d)) Extraction of the detection and transmission timing of the control CH (step S02).

Here, the configuration of the control CH sent from the base station 1 to the downlink will be described with reference to FIG. TDM
The A frame has a period of 5 ms, and therefore 20 frames of TDMA frames, thus (5 × 20 frames =) 100 ms
Is the downlink intermittent transmission cycle.

Further, in FIG. 4, a downlink control physical slot PS is allocated to the first time slot of the TDMA frame for each downlink intermittent transmission / reception cycle. Therefore,
If the transmission timing of the downlink control physical slot PS can be extracted, it is possible to create a switch switching timing for transmission / reception switching at a period of 5 ms.

FIG. 5 is a diagram showing a configuration example of the downlink control physical slot PS. In FIG. 5, the numbers are the number of bits, and the reference symbols are as follows.

That is, R: ramp time for transient response,
SS: Start symbol, PR: Preamble, UW
(Unique Word): synchronization word, CAC: control signal, and CRC: cyclic code.

Further, in FIG. 4, the configuration of the communication physical slot CPS following the downlink control physical slot PS of the TDMA frame is as shown in FIG. As in FIG. 5, the numbers are the number of bits, and the reference symbols are CI: channel identification and SA: source address. Therefore, if the synchronization word UW can be detected in the communication physical slot CPS, the transmission timing of the control CH can be extracted.

The downlink logical control channel LCCH has a superframe structure shown in FIG. WCS intermittent transmission or SCC
All transmission / reception timings # of the control physical slot PS such as the designation of an H uplink slot are generated based on a superframe.

Then, the downlink LCCH (logical control channel) is received, the timing of the downlink control physical slot PS is extracted by detecting the synchronization word UW, and the switching timing T of the transmission / reception switches 400 and 401 (FIG. 2). See).

As a specific example, 1 frame = 5 ms, 1
A frame is composed of 8 slots (4 transmission slots + 4 reception slots). Then, timing can be generated by using the first transmission slot for the control CH.

FIG. 8 shows a base station 1, a repeater 4, and a terminal 2.
It is a figure which shows the control sequence between. The base station 1 changes from a standby state (step S1) to an active state (step S1).
LCCH (Logical Control Channel) for the repeater 4 in 2)
Is transmitted (step S3). When receiving the LCCH (logical control channel), the repeater 4 detects the synchronization word UW and generates a transmission timing (step S4).

Then, once synchronization with the base station 1 has been established, the base station 1 is kept in a synchronized state until the base station 1 stops its wave. When the base station 1 returns, the above operation is repeated to resynchronize (steps S5 and S6).

On the other hand, when calling (step S8) from the standby state (step S7), the terminal 2 sends a logical channel (LCH) establishment request to the repeater 4 (step S8).
9), the logical channel (LC
H) An establishment request is sent (step S10).

Returning to FIG. 1, there is a case where a transmission wave wraps around between the antenna 40 and the antenna 41. In such a case, in the frequency through system, the transmission wave may enter the receiving side circuit and become positive feedback, which may cause oscillation.

Therefore, the repeater 2 having the configuration shown in FIG. 1 according to the present invention has a function of measuring the amount of leakage of the transmission wave into the receiving circuit, suppressing the loop gain, and automatically preventing oscillation.

FIG. 9 is a diagram schematically showing a part related to the function of suppressing the loop gain and automatically preventing the oscillation from the block diagram of the embodiment shown in FIG. FIG.
Here, as an example, a case is shown in which a transmission wave from the antenna 41 on the terminal 2 side goes around the antenna 40 on the base station 1 side.

Now, as a method of detecting the amount of leakage due to wraparound, the frequency of the transmission signal is slightly offset from the reception signal, and the beat generated in the envelope of the reception signal is detected.

That is, in the frequency through system, when transmitting a carrier signal from the base station 1 to the terminal 2 through the repeater 4, the frequency converter 406a receives the shift frequency Δf from the offset frequency signal oscillator 44, for example, 50 Hz. Input offset signal.

Then, a signal having a frequency (f + Δf) obtained by shifting the frequency f of the carrier signal from the base station 1 by Δf is output from the frequency converter 406a. Frequency converter 40
The output from 6a is further amplified by power amplifier 407a, rolled off by bandpass filter 408a, and transmitted from antenna 41 via switch 401.

In FIG. 9, the bandpass filter 408a of FIG. 1 is not shown. Here, a part of the transmission wave transmitted from the antenna 41 wraps around the antenna 40 and is received. Therefore, the signal received by the antenna 40 is obtained by superimposing the component of Δf as the beat frequency on the envelope of the carrier signal.

The signal received by the antenna 40 is branched by the directional coupler 402a via the switch 400, and the signal is split by the variable attenuator 405a and the wraparound detector 403.
is input to a. The wraparound detector 403a includes a high frequency signal detector 413a, a beat frequency bandpass filter 423a.
And, it has a beat frequency signal detector 433a.

The high-frequency signal detector 413a demodulates the carrier signal on which the beat frequency Δf is superimposed. Then
The demodulated signal is input to bandpass filter 423a. The bandpass filter 423a has a pass band of the beat frequency Δf. Therefore, only the beat frequency Δf component is output from bandpass filter 423a. The beat frequency signal is rectified by the beat frequency detector 433a and converted to a voltage level.

The detection output of the beat frequency detector 433a is input to the control unit 404a. FIG. 10 is a diagram showing the relationship between the rectified voltage value of the beat component and the controlled attenuation. Therefore, as shown in FIG. 10, the control unit 404a controls the attenuation of the variable attenuator 405a in proportion to the rectified voltage value of the beat component. Thereby, it is possible to suppress the loop gain and avoid the positive feedback oscillation due to the sneak signal.

Here, in the description of the embodiment of FIG.
The signal transmitted from the base station 1 is one carrier frequency f1
It has been described that the relay 4 relays between the base station 1 and one terminal 2 with the (modulated) signal transmitted in the above. However, the application of the present invention is not limited to such a case.

That is, the signal transmitted from the base station 1 is a plurality of signals transmitted at each of a plurality of carrier frequencies, and even if these are transmitted to a plurality of terminals, the repeater 4 according to the present invention can be used. Can be relayed.

That is, a plurality of signals transmitted at each of a plurality of carrier frequencies can be received as it is as described above, amplified, and transmitted to a plurality of terminals 2. The same applies to other embodiments described below.

FIG. 11 is a block diagram showing another example of the construction of the repeater 4 employing the frequency repeater / pilot system. Similar to the configuration of FIG. 1, the pilot signal is used in the configuration of FIG. 11 to detect the level of the sneak signal for preventing oscillation due to the sneak wave.

In comparison with the configuration of FIG. 1, 1.9G is used as an embodiment instead of the oscillator 44 having the offset frequency Δf.
A pilot signal oscillator 45 of Hz is provided.

The operation of FIG. 11 will be described with reference to the schematic configuration shown in FIG. As in the case shown in FIG. 9, a description will be given of an example in which the antenna goes from the antenna 41 on the terminal 2 side to the antenna 40 on the base station 1 side.

In FIG. 12, when transmitting a signal of the carrier frequency fc from the base station 1 to the terminal 2 through the repeater 4, the combiner 406a converts the signal of the carrier frequency fc from the base station 1 into a signal from the pilot signal oscillator 45. Are added and synthesized.

A signal obtained by adding the carrier frequency fc and the pilot signal frequency fp is output from the combiner 406a, amplified by the amplifier 407a, and transmitted from the antenna 41.

A part of the transmission wave transmitted from the antenna 41 wraps around and is received by the antenna 40 on the base station 1 side.
Therefore, the signal received by antenna 40 is a signal including carrier signal frequency fc and pilot signal frequency fp.

The signal received by the antenna 40 is split at the directional coupler 402a,
5a and the pilot detector 403a. The pilot detector 403a includes a bandpass filter 423a having a passband of the pilot signal frequency fp and a pilot signal level detector 433a.

The bandpass filter 423a extracts only the pilot signal frequency fp component from the signal of the carrier signal frequency fc and the pilot signal frequency fp. Next, the level of the pilot signal is detected by a pilot signal level detector 433a.

The detection output of pilot signal level detector 433a is input to control section 404a. Control unit 404a
Controls the attenuation of the variable attenuator 405a according to the level of the detected pilot signal. This makes it possible to attenuate the sneaking signal.

On the contrary, the signal containing the carrier frequency fc and the pilot frequency fp received by the antenna 41 on the terminal 2 side is subtracted and combined with the pilot frequency signal output from the oscillator 45 by the combiner 405b, and the base station 1 To the antenna 40 on the side. That is, the pilot frequency signal component is removed and transmitted to the base station 1 at the carrier frequency fc.

FIG. 13 shows the frequency repeater TDD of FIG.
FIG. 11 is a block diagram of another embodiment of a repeater 4 that employs the same principle as the scheme (in the case of an offset booster). FIG.
The third feature is that switches 400 and 401 are provided in addition to the switches 400 and 401. This allows
The internal signal processing circuit has only one system configuration from one antenna to the other antenna.

That is, the switches 400, 401, 41
By combining 0 and 411, one system of signal processing circuits can alternately function as an uplink signal or a downlink signal.

FIGS. 14 and 15 show the circuit of FIG. 13 for transmitting a signal on the downlink from base station 1 to terminal 2 and for transmitting the signal on the uplink from terminal 2 to base station 1, respectively. It is a figure explaining operation | movement in the case.

In FIG. 14, a switch 400 and a switch 410 are connected so as to guide a signal received by the antenna 40 of the base station 1 to a directional coupler 402a. On the other hand, the switch 411 and the switch 401
It is connected so that the output of “a” is sent to the antenna 41 on the terminal 2 side.

FIG. 15 shows switches 400, 401, 410, and 400 when signals are sent from terminal 2 to base station 1.
411 is a connection example. It is connected so that the signal received by the antenna 41 on the terminal 2 side is guided to the directional coupler 402a through the switches 401 and 410. on the other hand,
The switch 411 and the switch 400 are connected so as to guide the output of the amplifier 407a to the antenna 40 on the base station 1 side.

FIG. 16 is a block diagram showing a configuration in which the principle of FIG. 13 is applied to the embodiment of the through repeater / TDD system (pilot system) of FIG. As in the configuration example of FIG. 13, in addition to the switches 400 and 401, further switches 410 and 411 are provided. Thus, the internal signal processing circuit has only one system configuration from one antenna to the other antenna.

Switches 400, 401, 410, and 41 are used for both downlinks from base station 1 to terminal 2 and uplinks from terminal 2 to base station 2.
The state of connection 1 is the same as that shown in FIGS. 14 and 15, respectively, and further description is omitted.

FIG. 17 shows still another embodiment of the repeater 4, which is a block diagram of a configuration adopting the frequency conversion repeater system. The switches 400 and 401 are switched at the switching timing T set based on the control CH signal sent from the base station 2 as described with reference to FIG. As a result, transmission on the downlink from the base station 1 to the terminal 2 and transmission on the uplink from the terminal 2 to the base station 1 are alternately switched.

FIG. 18 is a diagram for explaining the operation of the configuration of FIG. In the configuration of FIG. 17, the frequency component of the signal transmitted from the base station 1 has a carrier frequency fc and a timing frequency ft as shown in FIG. These frequency components are amplified by the low-noise amplifier 501a, and only the predetermined band frequency components are passed by the bandpass filter 502a.

The output of bandpass filter 502a is input to frequency conversion section 503a. The frequency conversion unit 503a
The output of the bandpass filter 502a is shifted by Δf by the shift frequency signal of the oscillator 44 as shown in FIG. Therefore, the output of the frequency conversion unit 503a is
This is as shown in FIG.

The bandpass filter 504a passes a frequency band in a predetermined range including the frequency-shifted frequency components (fc + Δf, ft + Δf), amplifies the power with the power amplifier 505a, and passes through the switch 401 to the terminal 2 side. It is transmitted from the antenna 41.

The same applies to the uplink where signals are transmitted from the terminal 2 to the base station 1. However, the frequency converter 5
In 03b, the frequency shift of Δf is shifted in the direction opposite to the downward direction. Therefore, the problem of the transmission wave wraparound between the antennas 40 and 41 does not occur.

Also in the embodiment shown in FIG. 17, the structure of the repeater 4 can be only one system. FIG. 19 shows an embodiment in which the configuration of the signal processing circuit in the repeater 4 of the embodiment of FIG.

FIGS. 20 and 21 show switches 400 and 4 for the case of the downlink from base station 1 to terminal 2 and the case of the uplink from terminal 2 to base station 1, respectively.
It is the schematic which shows the connection of 01,410,411. In FIG. 19, the amplifier 505a and the filter 504
The arrangement relationship before and after a can be any. Therefore, in FIGS. 20 and 21, the arrangement of the power amplifier 505a and the filter 504a is replaced with each other so as to be opposite to the relationship shown in FIG.

In FIG. 20, in the case of a downlink from base station 1 to terminal 2, the signal received by antenna 40 of base station 1 is input to low noise amplifier 501 a through switches 400 and 410. Connected. Further, the output of the filter 504a is connected to a switch 411 and
The signal is transmitted from the antenna 41 of the terminal 2 through 401.

On the other hand, in the case of an uplink from the terminal 2 to the base station 1, the signal received by the antenna 41 of the terminal 2 is transmitted through the switches 401 and 410 to the low noise amplifier 50.
1a. Further, the output of the filter 504a is transmitted from the antenna 40 of the base station 1 through the switches 411 and 400.

FIG. 22 shows still another embodiment, in which circulators 500 and 510 are used instead of switches 400 and 401.
FIG. 2 is a block diagram of an embodiment of a frequency conversion repeater system using the CDMA. In contrast to the configuration of the embodiment shown in FIG.
It has circulators 500 and 510 instead of 01.

Further, in synchronization with the control CH sent from the base station 1, the transmission / reception switching unit 42 alternately activates the operation of the low-noise amplifier 501a in the downlink system and the operation of the low-noise amplifier 501b in the uplink system. It is controlled to be in a state.

This operation will be further described with reference to the operation schematic diagram shown in FIG. In FIG. 23, circulators 500 and 510 enable the flow of signals in the clockwise direction. Therefore, circulator 500 transmits the signal received by antenna 40 of base station 1 to low-noise amplifier 501a of the downlink system, and outputs the output of power amplifier 505b of the uplink system to the antenna of base station 1. Function to flow to 40.

On the contrary, circulator 510 is connected to terminal 2
The function of transmitting the signal received by the antenna 41 on the upstream side to the low-noise amplifier 501b on the uplink line and flowing the output of the power amplifier 505a on the downlink line to the antenna 41 on the terminal 2 side.

That is, the transmission / reception switching unit 42
The power amplifiers 505a and 505b are alternately activated. Therefore, at the timing when the signal received by the antenna 40 of the base station 1 is transmitted to the low-noise amplifier 501a in the downlink, the power amplifier 5 in the uplink
05b is OFF. On the contrary, the signal received by the antenna 41 on the terminal 2 side is transmitted to the uplink low noise amplifier 501.
At the timing of transmission to b, the power amplifier 505a of the downlink system is turned off.

FIG. 24 is a block diagram showing an embodiment of the repeater 4 of the baseband relay system (TDMA slot replacement system) having improved flexibility by using a controller. The time slots are switched so that the same frequency is not used for input and output, so that the influence of sneaking around is eliminated.

In FIG. 24, as in the previous embodiment, two systems correspond to the direction from base station 1 to terminal 2, ie, the downlink, and the direction from terminal 2 to base station 1, ie, the uplink. It has a signal processing circuit. Further, an MPU 100 as a controller for controlling the whole is provided.

As shown in FIGS. 2 and 3, the demodulator 60
Based on the control CH signal from the base station 1 demodulated in 1a, the timing generation circuit 102 generates a TDD transmission / reception timing signal. That is, in the TDMA system, the transmission / reception time is switched at a constant time, so that the control CH from the base station 1 is received first. Then, the timing generation circuit 102 uses the reception timing of the control CH as a trigger to switch 400,
401 switching timing signal or power amplifier 505
a, a switching control signal for switching the active state of 505b.

Next, the MPU 100 controls the TDMA time slot control units 600a and 600b to convert the signal from the base station 1 into a baseband signal, exchange the slots, and output it to the terminal 2 side.

In the example shown in FIG.
On the other hand, the signal of the first slot is replaced by the second slot in the TDMA time slot control section 600a. On the contrary, when going from the terminal 2 to the base station 1, the signal of the second slot is
The first slot has been replaced.

Control CH information (LAPD) 102a, 1
02b is extracted from the signals demodulated by the demodulators 601a and 601b, respectively, and notified to the MPU 100. The control CH information includes used carrier information.

Therefore, MPU 100 controls the oscillation frequency of oscillators 101a and 101b according to the used carrier information. As a result, the baseband signal whose time slot has been exchanged is subjected to frequency conversion by the frequency converters 603a and 603b with respect to the modulation output of the modulators 602a and 602b by the carrier before demodulation, and is output.

That is, between the base station 1 and the repeater 4 and
The same carrier frequency can be used between the repeater 4 and the terminal 2.

FIG. 26 is a specific example of the exchange of the time slots of the baseband signal. FIG. 26 (a)
FIG. 26B shows an output time slot of each of the TDMA time slot control units 600a and 600b. That is, the TDMA time slot control unit 600
a, 600b take in the baseband data once,
The timing is controlled by the MPU 100 so as to output a signal in which time slots are exchanged at the timing of the next frame.

In the configuration of the embodiment shown in FIG. 24, the delay correction circuit 607 corrects a delay difference due to the distance between the terminal 2 and the base station 1. FIG. 27 is a diagram for explaining such delay correction. FIG. 27A shows transmission and reception timings on the base station 1 side. FIG. 27B shows transmission and reception timings on the terminal 2 side.

The delay amount T depends on the distance between the terminal 2 and the base station 1.
Only the timing is off. Therefore, MPU10
0 is the delay correction circuit 6 so that the delay amount T becomes zero.
07 is controlled. As a result, as shown in FIG. 27C, the transmission and reception timings of the terminal 2 and the base station 1 match.

Here, in the configuration of FIG.
Under the control of 00, the time slots of the baseband signal are exchanged. Further, under the control of the MPU 100,
As in the previous implementation, it is also possible to convert the frequency.

FIG. 28 is a diagram for explaining such frequency conversion in the configuration of FIG. Frequency f from base station 1
TDMA time slot control unit 60
The signals are converted into baseband signals at 0a and 600b. LAPD1
02a and 102b notify the MPU 100 of the content of the control CH. Based on the notification from the LAPD 102a, the MPU 100 controls to shift by Δf so as to be different from the carrier frequency f1 sent from the base station 1 side, and allocates another carrier frequency (f1 + Δf) to the terminal 2 side.

Therefore, when transmitting from the terminal 2 to the uplink, the repeater 4 returns to the carrier frequency f1 allocated from the base station 1 by the control of the MPU 100 based on the notification of the LAPD 102b, Is output to

FIG. 29 is a diagram for explaining one application example realized in the configuration of FIG. 24, and is a diagram showing a frame configuration of a signal transmitted from base station 1. In FIG. In this application example, the power consumption of the repeater 4 is reduced by utilizing the features of the TDMA-TDD method.

In the frame structure of a signal transmitted from the base station 1 shown in FIG. 29, four terminals 2, that is, cell stations CS1 to CS4 are simultaneously
Collective control by PU. Set the slot passing through the repeater 4 to T
Designate any of S1, TS2, TS3, and TS4.

As an example, in FIG.
Is the period of the downlink, the period II is the period of the uplink, and the power amplifier is ON only during the time slot TS1.
The cell stations CS1 to CS4 are controlled so as to be collectively effective during this period.

For this purpose, the amplifiers 501a, 501a,
The power supply system control of 501b, 505a, 505b is synchronized with the TDD time slot. Then, the power of these power amplifiers is turned ON only at the designated time slot. This makes it possible to reduce power consumption to 1/8 (1/2 when all time slots are used).

[0103]

As described above with reference to the drawings, according to various embodiments, according to the present invention, a TDD system suitable for a TDMA system is used for an access system between a radio base station and a radio repeater and between a radio repeater and a terminal. Is provided.

Furthermore, a plurality of carriers can be used at the same time without being limited to the number of frequencies to be used. Therefore, a radio relay system which is advantageous in terms of system operation and economy is provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration example of a repeater 4 showing an embodiment of a wireless relay system using TDMA-TDD according to the present invention.

FIG. 2 shows switches 400 and 4 by a switching control unit 42.
FIG. 9 is a diagram illustrating a switching timing T of 01.

FIG. 3 is an operation flow of a switching control unit 42 that controls switching of switches 400 and 401.

FIG. 4 is a diagram illustrating a configuration of a control CH transmitted in a downlink direction from a base station 1.

FIG. 5 is a diagram illustrating a configuration example of a downlink control physical slot PS.

FIG. 6 shows a physical slot P for downlink control of a TDMA frame.
FIG. 4 is a diagram illustrating a configuration of a communication physical slot CPS following S.

FIG. 7 is a diagram illustrating a superframe structure of a logical control channel LCCH.

FIG. 8 is a diagram showing a control sequence among a base station 1, a repeater 4, and a terminal 2.

FIG. 9 is a schematic block diagram illustrating the operation of FIG. 1;

FIG. 10 is a diagram illustrating a relationship between the amount of attenuation of a variable attenuator 405a and a rectified voltage value of a beat component.

FIG. 11 is a block diagram illustrating a configuration example of a repeater 4 that employs a frequency repeater pilot scheme.

12 is a schematic block diagram illustrating the operation of FIG.

FIG. 13 is a block diagram showing an embodiment of a frequency through repeater / TDD system of FIG. 1;

FIG. 14 is a diagram illustrating an operation in the case where a signal is transmitted in a downlink direction from the base station 1 to the terminal 2 in the circuit of the embodiment in FIG. 13;

FIG. 15 is a diagram illustrating an operation in the case where a signal is transmitted in an uplink direction from the terminal 2 to the base station 1 in the circuit of the embodiment in FIG. 13;

FIG. 16 illustrates the principle of FIG. 13 using the through repeater T of FIG. 11;
It is a block diagram of an example configuration applied to an example of the DD system (pilot system).

FIG. 17 is still another embodiment of the repeater 4, and is a block diagram of a configuration of an embodiment employing a frequency conversion repeater method.

18 is a diagram illustrating the operation of the configuration of FIG.

FIG. 19 is an embodiment in which the configuration of the signal processing circuit in the repeater 4 of the embodiment of FIG. 17 is constituted by one system by adding switches 410 and 411;

20. In FIG. 19, switches 400, 401, and 41 in a downlink direction from the base station 1 side to the terminal 2 side.
It is the schematic which shows the connection of 0,411.

FIG. 21 is a diagram illustrating switches 400, 401, and 41 in an upward direction from the terminal 2 to the base station 1 in FIG.
It is the schematic which shows the connection of 0,411.

FIG. 22 is a block diagram of an embodiment of a frequency conversion repeater system using circulators 500 and 510 instead of the switches 400 and 401 in the embodiment of FIG.

FIG. 23 is a schematic configuration diagram for explaining the operation of FIG. 22;

FIG. 24 is a block diagram of an embodiment of a repeater 4 of a baseband relay system (TDMA slot replacement system) with increased flexibility using a controller.

FIG. 25 is a diagram for explaining TDMA slot exchange in the embodiment of FIG. 24;

FIG. 26 is a diagram illustrating a specific example of TDMA slot replacement in the embodiment of FIG. 24;

FIG. 27 is a diagram illustrating a function of a delay correction circuit 607 in the configuration of the embodiment in FIG. 24;

28 is a diagram illustrating a frequency conversion operation in the configuration of FIG.

FIG. 29 is a diagram illustrating an application example realized in the configuration of FIG. 24, and is a diagram illustrating a frame configuration of a signal transmitted from a base station.

FIG. 30: Base station (WCS: Wireless Cell Station)
FIG. 2 is an explanatory diagram of a general configuration in which communication is performed between a terminal and a wireless subscriber unit (WSU) using a carrier of a predetermined frequency.

[Explanation of symbols]

 Reference Signs List 1 base station 2 (2a, 2b) terminal 4 repeater 40, 41 antenna 42 transmission / reception switching control unit 400, 401 system switching switch 44 offset frequency oscillator 45 pilot signal oscillator 402a, 402b directional coupler 403a, 403b wraparound detector 404a, 404b Variable attenuation control units 405a, 405b Variable attenuators 406a, 406b Frequency converters 407a, 407b Power amplifiers 408a, 408b Band filters 500, 510 Circulators 501a, 501b Low noise amplifiers 502a, 502b Band filters 503a, 503b Frequency conversion Unit 504a, 504b Bandpass filter 505a, 505b Power amplifier

 ────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yasushi Okada 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa F-term in Fujitsu Limited (reference) 5K011 BA03 DA03 DA06 DA21 DA28 EA02 EA03 FA01 GA04 JA01 JA08 KA05 5K072 AA18 BB13 BB27 CC15 CC32 DD16 DD17 DD19 EE32 FF13 FF25 FF26 GG01 GG24 GG25 GG39

Claims (13)

[Claims] A wireless relay system disposed between a base station and a terminal of a wireless access system using a time division multiple access-time division two-way transmission system, wherein a frequency converter and an oscillator of an offset frequency signal are respectively provided. Comprising two signal processing circuits for downlink and uplink, a first antenna directed to the base station side, and a second antenna directed to the terminal side; The frequency converter of the signal processing circuit for the line shifts a carrier frequency signal from the base station received by the first antenna by an offset frequency from the offset frequency oscillator, and the signal shifted by the offset frequency is The frequency converter of the signal processing circuit for the uplink transmitted from the second antenna turns off the signal from the terminal received by the second antenna. A radio relay system that shifts by an offset frequency from a unit frequency oscillator and converts the carrier frequency signal from the base station, and the converted carrier frequency signal is transmitted from the first antenna. . 2. A radio relay system arranged between a base station and a terminal of a radio access system utilizing a time division multiple access-time division bidirectional transmission system, comprising a synthesizer and a pilot frequency signal oscillator, respectively. And two signal processing circuits for downlink and uplink, a first antenna directed to the base station side, and a second antenna directed to the terminal side. A combiner of a signal processing circuit for adding and combining a pilot frequency signal from an oscillator of the pilot frequency signal to a carrier frequency signal from a base station received by the first antenna, and the combined signal is Second
The combiner of the signal processing circuit for the uplink, subtracts and combines the pilot frequency signal from the oscillator of the pilot frequency signal with the signal from the terminal received by the second antenna, A wireless relay system, wherein a combined signal is transmitted from the first antenna. 3. The system according to claim 1, further comprising: a first switch for alternately switching and connecting the first antenna and the signal processing circuits of the two systems; A second switch for alternately connecting and connecting the signal processing circuits of the system, and a transmission / reception switching control unit for receiving a control channel from the base station and generating transmission / reception switching timing based on the control channel, A wireless relay system, wherein switching between the first switch and the second switch is controlled at a transmission / reception switching timing generated by a control unit. 4. A radio relay system arranged between a base station and a terminal of a radio access system using a time division multiple access-time division bidirectional transmission system, comprising a frequency converter and an offset frequency oscillator. A signal processing circuit for one system, a first antenna directed to the base station side, a second antenna directed to the terminal side, and a signal processing circuit for the first antenna and the second antenna. A switch for switching between the first antenna and the second antenna so as to alternately input a signal input from the antenna; and a frequency converter of the signal processing circuit, wherein the first antenna or the second The frequency of the signal input from the second antenna is shifted by the offset frequency from the offset frequency oscillator, and the signal shifted by the offset frequency is input to the second antenna. Kara or is sent from the first antenna, it is characterized in radio relay systems. 5. A radio relay system arranged between a base station and a terminal of a radio access system utilizing a time division multiple access-time division bidirectional transmission system, comprising a synthesizer and an oscillator of a pilot frequency signal. A signal processing circuit for one system, a first antenna directed to the base station side, a second antenna directed to the terminal side, and the signal processing circuit including the first antenna and the second antenna. A switch for switching between the first antenna and the second antenna so as to alternately input a signal input from the antenna of the first antenna or the second antenna; And a pilot frequency signal from an oscillator of the pilot frequency signal is added to or combined with the frequency of the signal input from the second antenna. Wherein the second antenna or a radio relay system sent from the first antenna, it is characterized. 6. The transmission / reception control unit according to claim 4, further comprising a transmission / reception switching unit that receives a control channel from the base station and generates transmission / reception switching timing based on the control channel. A wireless relay system, wherein switching of the switch is controlled at a transmission / reception switching timing generated by a switching control unit. 7. The signal processing circuit according to claim 1 or 4, wherein the signal processing circuit has a wraparound detection unit that detects a level of the offset frequency signal component from a received signal, a variable attenuator, and a control unit, The wireless relay system according to claim 1, wherein the control unit controls an amount of attenuation of the variable attenuator according to a level of the offset frequency signal component detected by the wraparound detection unit. 8. The signal processing circuit according to claim 3 or 5, wherein the signal processing circuit has a wraparound detection unit that detects a level of the pilot frequency signal component from a received signal, a variable attenuator, and a control unit, The wireless relay system according to claim 1, wherein the control unit controls an amount of attenuation of the variable attenuator according to a level of the offset frequency signal component detected by the wraparound detection unit. 9. A radio relay system disposed between a base station and a terminal of a radio access system using a time division multiple access-time division bidirectional transmission system, wherein each of the radio relay system and the oscillator for a signal of a predetermined frequency is provided. When,
A signal processing circuit for down-link and up-link with an amplifier, a first antenna directed to the base station side, and a second antenna directed to the terminal side; The frequency converter of the signal processing circuit for the downlink shifts the carrier frequency signal from the base station received by the first antenna by the frequency of the signal of the predetermined frequency from the oscillator. A signal shifted by the frequency of the signal is transmitted from the second antenna, and the frequency converter of the signal processing circuit for the uplink transmits a signal from a terminal received by the second antenna from the oscillator. Shift by the frequency of the signal of the predetermined frequency,
The signal is converted into a carrier frequency signal from the base station, and the converted carrier frequency signal is transmitted from the first antenna. Further, the respective amplifiers of the two signal processing circuits are alternately activated. It is characterized by a wireless relay system. 10. The transmission / reception method according to claim 9, further comprising: receiving a control channel from said base station, wherein said amplifiers of said two signal processing circuits are alternately activated based on said control channel. A wireless relay system comprising a transmission / reception switching control unit for generating switching timing. 11. A radio relay system arranged between a base station and a terminal of a radio access system using a time division multiple access-time division bidirectional transmission system, wherein time slots are exchanged for baseband signals. A signal processing circuit for downlink and an uplink having a TDMA time slot control unit for performing, a controller, a first antenna directed to the base station side, and a second antenna directed to the terminal side Wherein the controller replaces a TDMA time slot of a downlink signal received from the first antenna from a first time slot to a second time slot,
Furthermore, the TDMA time slot of the uplink signal received from the second antenna is replaced with the first time slot from the second time slot.
A wireless relay system for controlling a DMA time slot control unit. 12. The signal processing circuit according to claim 11, wherein the two signal processing circuits for the downlink and the uplink have an oscillator for an offset frequency signal and a frequency converter, respectively, and the controller comprises: 1, based on frequency information included in a signal received from a second antenna, controls a frequency of an offset frequency signal oscillated from the oscillator, and the frequency converter controls a frequency of a signal input by the offset frequency signal. A wireless relay system for shifting a frequency. 13. The signal processing circuit according to claim 12, further comprising a delay correction circuit in one of the two signal processing circuits for the downlink and the uplink.
A wireless relay system, wherein a delay amount of the delay correction circuit is corrected and controlled such that reception timings of downlink and uplink signals coincide.