GB1280876A - Improvements in and relating to semiconductor devices - Google Patents
Improvements in and relating to semiconductor devicesInfo
- Publication number
- GB1280876A GB1280876A GB42024/69A GB4202469A GB1280876A GB 1280876 A GB1280876 A GB 1280876A GB 42024/69 A GB42024/69 A GB 42024/69A GB 4202469 A GB4202469 A GB 4202469A GB 1280876 A GB1280876 A GB 1280876A
- Authority
- GB
- United Kingdom
- Prior art keywords
- type
- regions
- epitaxial layer
- region
- diffusing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000012535 impurity Substances 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 2
- 229910052698 phosphorus Inorganic materials 0.000 abstract 2
- 239000011574 phosphorus Substances 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 230000004048 modification Effects 0.000 abstract 1
- 238000012986 modification Methods 0.000 abstract 1
- 230000003071 parasitic effect Effects 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
Abstract
1280876 Semi-conductor devices MULLARD Ltd 22 Aug 1969 [30 Aug 1968] 42024/69 Heading H1K A region of a semi-conductor device is -produced by diffusing an impurity through the major part of the thickness of an epitaxial layer from a highly doped buried layer and diffusing a peripheral wall from the surface to meet the first diffused region, the substrate and epitaxial layer being of the same conductivity type. As shown, Fig. 7, phosphorus is diffused into selected areas of a P<SP>-</SP>-type Si substrate 31 to form N<SP>++</SP>-type regions and a P<SP>-</SP>-type epitaxial layer'34 is deposited, the phosphorus diffusing- out to 'form N-type regions 36 containing N<SP>+</SP>- type regions 35 at the sites of the original N<SP>++</SP>- type regions. Annular N<SP>+</SP>-type walls 37 are 'formed by diffusion to complete the isolation thus leaving enclosed portions (38) of the P<SP>-</SP> type epitaxial layer into which P-type base regions and N<SP>+</SP>-type emitter regions are 'diffused, the buried regions 36 forming the collectors of the transistors. In a modification, Fig. 8 (not shown), the annular N<SP>+</SP>-type walls are extended to contact the heavily doped part (35) of the initially formed buried layer and P-type grids (47, 48) are provided surrounding the N-type islands at the epitaxial layer-substrate interface and at the surface of the epitaxial layer to interrupt parasitic channels. The collector junction may be profiled by increasing 'the impurity concentration in that part of the N<SP>++</SP>-type buried layer which is to directly underlie the emitter region or by using an impurity of higher diffusivity in this region.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB42024/69A GB1280876A (en) | 1968-08-30 | 1968-08-30 | Improvements in and relating to semiconductor devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB42024/69A GB1280876A (en) | 1968-08-30 | 1968-08-30 | Improvements in and relating to semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1280876A true GB1280876A (en) | 1972-07-05 |
Family
ID=10422487
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB42024/69A Expired GB1280876A (en) | 1968-08-30 | 1968-08-30 | Improvements in and relating to semiconductor devices |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1280876A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0011964B1 (en) * | 1978-11-15 | 1984-09-05 | Fujitsu Limited | Semiconductor device including a diode and a bipolar transistor |
-
1968
- 1968-08-30 GB GB42024/69A patent/GB1280876A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0011964B1 (en) * | 1978-11-15 | 1984-09-05 | Fujitsu Limited | Semiconductor device including a diode and a bipolar transistor |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed [section 19, patents act 1949] | ||
PCNP | Patent ceased through non-payment of renewal fee |