CN113805112B - Detection circuit and detection method for extended interface group applied to interface conversion - Google Patents
Detection circuit and detection method for extended interface group applied to interface conversion Download PDFInfo
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- CN113805112B CN113805112B CN202111090831.9A CN202111090831A CN113805112B CN 113805112 B CN113805112 B CN 113805112B CN 202111090831 A CN202111090831 A CN 202111090831A CN 113805112 B CN113805112 B CN 113805112B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
- G01R31/68—Testing of releasable connections, e.g. of terminals mounted on a printed circuit board
- G01R31/69—Testing of releasable connections, e.g. of terminals mounted on a printed circuit board of terminals at the end of a cable or a wire harness; of plugs; of sockets, e.g. wall sockets or power sockets in appliances
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Abstract
The invention provides a detection circuit and a detection method for an extended interface group applied to interface conversion. The charge pump unit charges and discharges according to the state signal of the configuration channel of the first universal serial bus interface. The switch unit is electrically connected with the charge pump unit, is conducted according to the state signal of the configuration channel, and outputs the endpoint voltage. The reversing unit is electrically connected with the switch unit and converts the terminal voltage to generate a reversing terminal voltage. The universal serial bus terminal conducts one of the first universal serial bus interface and the second universal serial bus interface according to the voltage of the reverse endpoint. Therefore, the detection circuit of the expansion interface group applied to interface conversion detects the insertion state of the expansion interface group through a pure hardware circuit.
Description
Technical Field
The present invention relates to a detection circuit and a detection method thereof, and more particularly to a detection circuit and a detection method thereof for an extended interface group applied to interface conversion.
Background
With the development of data transmission technology, the interface of the usb has developed into a plurality of different specifications, such as a type a, B and C usb, and the specifications of the interfaces used by different electronic devices are different. When a group of universal serial bus terminals on the electronic device need to support the universal serial bus interfaces with more than two interface specifications at the same time, the control is performed through an additional system module, and one of the interfaces to be received at present is judged and the signal path is switched.
In view of this, how to develop a detection circuit and a detection method for an extended interface set applied to interface conversion for an electronic product having only one set of usb terminals and supporting two interface specifications at the same time is a goal and direction of breakthrough for related industries.
Disclosure of Invention
Therefore, an object of the present invention is to provide a detection circuit and a detection method for an extended interface group applied to interface conversion, which detect a status signal of a configuration channel of a first usb interface, and further conduct one of the first usb interface and a second usb interface.
According to an embodiment of the present invention, a detection circuit for an expansion interface group applied to interface conversion is provided, and the detection circuit is used for detecting an insertion state of the expansion interface group and conducting the expansion interface group to a universal serial bus terminal, wherein the expansion interface group includes a first universal serial bus interface and a second universal serial bus interface. The detection circuit of the extended interface group applied to interface conversion comprises a charge pump unit, a switch unit and a reversing unit. The charge pump unit receives a state signal of a configuration channel of the first universal serial bus interface and charges and discharges according to the state signal. The switch unit is electrically connected with the charge pump unit, is conducted according to the state signal of the configuration channel, and outputs terminal voltage. The reversing unit is electrically connected with the switch unit and converts the terminal voltage to generate a reversing terminal voltage. The universal serial bus terminal conducts one of the first universal serial bus interface and the second universal serial bus interface according to the voltage of the reverse endpoint. Wherein the charge pump unit comprises: a first diode, a first capacitor, a second diode, a second capacitor and a first resistor. The first diode is electrically connected with the configuration channel and comprises a cathode terminal and an anode terminal. The first capacitor is electrically connected with the cathode end of the first diode. The second diode comprises a cathode terminal and an anode terminal, and the anode terminal of the second diode is connected with the cathode terminal of the first diode and the first capacitor. The second capacitor is electrically connected to the cathode end of the second diode. The first resistor is electrically connected with the cathode end of the second diode and is connected with the second capacitor in parallel. The state signal of the configuration channel is one of a high-low conversion signal and a voltage stabilizing signal. When the status signal of the configuration channel is a high-low conversion signal, the high-low conversion signal includes: when the configuration channel outputs a high potential, the configuration channel charges the first capacitor; and when the configuration channel is switched from high potential to low potential, the first capacitor discharges and charges the second capacitor. When the state signal of the configuration channel is a voltage stabilizing signal, the second capacitor discharges to a zero potential.
Therefore, the detection circuit of the expansion interface group applied to interface conversion detects the insertion state of the expansion interface group through a pure hardware circuit.
According to an embodiment of the present invention, a method for detecting a detection circuit of an expansion interface group applied to interface conversion is provided, which is used for detecting an insertion state of the expansion interface group, and conducting the expansion interface group to a universal serial bus terminal through the detection circuit, wherein the expansion interface group includes a first universal serial bus interface and a second universal serial bus interface. The detection method of the detection circuit applied to the extended interface group of the interface conversion comprises a charge pump charging step, a switch switching step and a voltage reversing step. The charge pump charging step is to receive a status signal of a configuration channel of the first usb interface, and charge and discharge the charge pump unit of the detection circuit according to the status signal. The switching step is to control the switch unit of the detection circuit according to the state signal and output the terminal voltage. The voltage reversing step is to drive a reversing unit of the detection circuit to convert the endpoint voltage to generate a reversing endpoint voltage. The universal serial bus terminal conducts one of the first universal serial bus interface and the second universal serial bus interface according to the voltage of the reverse endpoint, the switch unit is electrically connected with the charge pump unit, and the reverse unit is electrically connected with the switch unit. Wherein the charge pump unit comprises: a first diode, a first capacitor, a second diode, a second capacitor and a first resistor. The first diode is electrically connected with the configuration channel and comprises a cathode terminal and an anode terminal. The first capacitor is electrically connected with the cathode end of the first diode. The second diode comprises a cathode terminal and an anode terminal, and the anode terminal of the second diode is connected with the cathode terminal of the first diode and the first capacitor. The second capacitor is electrically connected to the cathode end of the second diode. The first resistor is electrically connected with the cathode end of the second diode and is connected with the second capacitor in parallel. The state signal of the configuration channel is one of a high-low conversion signal and a voltage stabilizing signal. When the status signal of the configuration channel is a high-low conversion signal, the high-low conversion signal includes: when the configuration channel outputs a high potential, the configuration channel charges the first capacitor; and when the configuration channel is switched from high potential to low potential, the first capacitor discharges and charges the second capacitor. When the state signal of the configuration channel is a voltage stabilizing signal, the second capacitor discharges to a zero potential.
Therefore, the detection method of the detection circuit of the expansion interface group applied to interface conversion detects the insertion state of the expansion interface group through a pure hardware circuit.
Drawings
FIG. 1 is a block diagram showing a detection circuit of an extended interface group applied to interface conversion according to a first embodiment of the present invention;
FIG. 2 is a schematic diagram showing the connection of the detection circuit of the extended interface group applied to interface conversion according to the embodiment of FIG. 1;
FIG. 3 is a circuit diagram illustrating a detection circuit of an extended interface group applied to interface conversion according to the embodiment of FIG. 1;
FIG. 4 is a circuit diagram showing a detection circuit of an extended interface group applied to interface conversion according to a second embodiment of the present invention;
FIG. 5 is a waveform diagram illustrating a detection circuit of an extended interface group applied to interface conversion according to the embodiment of FIG. 4;
FIG. 6 is a flowchart showing a detecting method of a detecting circuit of an extended interface group applied to interface conversion according to a third embodiment of the present invention; and
Fig. 7 is a flowchart showing a detection method of a detection circuit of an extended interface group applied to interface conversion according to a fourth embodiment of the present invention.
Wherein reference numerals are as follows:
100, 100a: detection circuit
10, 30: Universal serial bus terminal
20: Expansion interface group
20A: first universal serial bus interface
20B: second universal serial bus interface
120, 120A: charge pump unit
140, 140A: switch unit
160, 160A: reversing unit
180: Multiplexer
S1, S2: input terminal
SE: selection terminal
So: an output terminal
D1: first diode
D2: second diode
D3: third diode
B1: buffer device
CC: configuration channel
C1: first capacitor
C2: second capacitor
And C3: third capacitor
R1: first resistor
R2: second resistor
R3: third resistor
R4: fourth resistor
U1: first switch
U2: second switch
V1: supply voltage
Vs1, vg2: node voltage
Vd1: terminal voltage
Vo: reverse terminal voltage
S200, S200a: detection method
S12, S12a: charge pump charging step
S14, S14a: a switch switching step
S16, S16a: voltage reversing step
S18a: selection step
Detailed Description
Referring to fig. 1 and fig. 2 together, fig. 1 is a block diagram illustrating a detection circuit 100 of an expansion interface group 20 applied to interface conversion according to a first embodiment of the present invention; fig. 2 is a schematic diagram illustrating connection of the detection circuit 100 of the extended interface group 20 applied to interface conversion according to the embodiment of fig. 1. The detection circuit 100 of the expansion interface group 20 applied to interface conversion is used for detecting the insertion state of the expansion interface group 20 and conducting the expansion interface group 20 to the universal serial bus terminal 10. The expansion interface group 20 includes a first universal serial bus interface 20a and a second universal serial bus interface 20b. The detection circuit 100 of the extended interface group 20 applied to interface conversion includes a charge pump unit 120, a switch unit 140 and an inverting unit 160. The charge pump unit 120 receives the status signal of the configuration channel CC (Configuration Channel) of the first usb interface 20a, and charges and discharges according to the status signal. The switch unit 140 is electrically connected to the charge pump unit 120, and the switch unit 140 is turned on according to the status signal of the configuration channel CC and outputs the terminal voltage Vd1 (shown in fig. 3). The inverting unit 160 is electrically connected to the switching unit 140 and converts the terminal voltage Vd1 to generate an inverted terminal voltage Vo. The usb terminal 10 turns on one of the first usb interface 20a and the second usb interface 20b according to the reverse end voltage Vo. Therefore, the detection circuit 100 of the expansion interface group 20 applied to interface conversion of the present invention detects the insertion state of the expansion interface group 20 through a pure hardware circuit, and further selects one of the first usb interface 20a and the second usb interface 20b to be connected to the usb terminal 10.
Specifically, the transmission specification of the universal serial bus terminal 10 may be USB2.0 specification; the detection circuit 100 of the extended interface group 20 applied to interface conversion is disposed among the first universal serial bus interface 20a, the second universal serial bus interface 20b and the universal serial bus terminal 10. The first USB interface 20a and the second USB interface 20b are a Type C USB interface (USB Type C) and a Type A USB interface (USB Type-A), respectively. The first USB interface 20a is also directly connected to another USB port 30, and the USB port 30 may have a transmission format of USB3.0. The status signal of the configuration channel CC is one of a high-low conversion signal and a voltage stabilizing signal. When the first usb interface 20a does not detect the device insertion, the status signal of the configuration channel CC is a high-low switching signal, i.e. the voltage of the configuration channel CC is switched between a high voltage and a low voltage. When the first usb interface 20a detects the device insertion, the status signal of the configuration channel CC is a voltage stabilizing signal, i.e. the voltage of the configuration channel CC is a fixed voltage with non-zero. The configuration channel CC of the first usb interface 20a is electrically connected to the charge pump unit 120. When the state signal received by the charge pump unit 120 is a high-low conversion signal and the high voltage is switched to the low voltage, the charge pump unit 120 charges to one time of the high voltage, so as to cause the switch unit 140 to be turned on, and the output terminal voltage Vd1 is at the high voltage. The inverting unit 160 converts the terminal voltage Vd1 to generate an inverted terminal voltage Vo, which is at a low level. On the contrary, when the state signal received by the charge pump unit 120 is the voltage stabilizing signal, the charge pump unit 120 discharges to further cause the switch unit 140 to be turned off, and the output terminal voltage Vd1 is at the low level. The inverting unit 160 converts the terminal voltage Vd1 to generate an inverted terminal voltage Vo, which is at a high level.
The detection circuit 100 of the extended interface group 20 applied to interface conversion may further include a multiplexer 180. The multiplexer 180 includes two input terminals S1 and S2, an output terminal So and a select terminal SE. The two input terminals S1 and S2 are electrically connected to the first usb interface 20a and the second usb interface 20b, respectively. The output terminal So is electrically connected to the universal serial bus terminal 10. The select terminal SE is electrically connected to the inverting unit 160. In detail, the multiplexer 180 determines that the output terminal So is connected to the first usb interface 20a or the second usb interface 20b according to the voltage level of the reverse voltage Vo received by the select terminal SE. When the voltage received by the select terminal SE is at a high level, the universal serial bus terminal 10 is turned on to the first universal serial bus interface 20a; when the voltage received by the select terminal SE is low, the universal serial bus terminal 10 is turned on to the second universal serial bus interface 20b. It should be noted that, since the detection circuit 100 of the expansion interface group 20 applied to the interface conversion is configured to determine the status signal of the configuration channel CC of the first usb interface 20a, the multiplexer 180 is further switched. When the first usb interface 20a and the second usb interface 20b are plugged into the device at the same time, the usb terminal 10 is turned on to the first usb interface 20a because the reverse voltage Vo received by the select terminal SE is high. Therefore, the detection circuit 100 of the expansion interface group 20 applied to interface conversion of the present invention can preferentially turn on the first usb interface 20a when the first usb interface 20a and the second usb interface 20b are simultaneously plugged into the device. The operation of each element will be described below by means of a more detailed circuit diagram.
Referring to fig. 1 to 3, fig. 3 is a circuit diagram illustrating a detection circuit 100 of the expansion interface group 20 applied to interface conversion according to the embodiment of fig. 1. The charge pump unit 120 may include a first diode D1, a first capacitor C1, a second diode D2, a second capacitor C2, and a first resistor R1. The first diode D1 is electrically connected to the configuration channel CC, and the first diode D1 includes a cathode terminal and an anode terminal. The first capacitor C1 is electrically connected to the cathode terminal of the first diode D1. The second diode D2 includes a cathode terminal and an anode terminal, and the anode terminal of the second diode D2 is connected to the cathode terminal of the first diode D1 and the first capacitor C1. The second capacitor C2 is electrically connected to the cathode terminal of the second diode D2. The first resistor R1 is electrically connected to the cathode terminal of the second diode D2, and is connected to the second capacitor C2 in parallel. In other words, the charge pump unit 120 may be a charge pump circuit, the switch unit 140 may include a first switch U1, and the first switch U1 may be a P-type metal oxide semiconductor field effect Transistor (Metal Oxide Semiconductor FIELD EFFECT transistors; MOSFET) or other P-type switching element. The inverting unit 160 may include a second resistor R2, a third resistor R3, a third capacitor C3, and a second switch U2. The second switch U2 may be a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or other N-type switching element.
When the state signal of the configuration channel CC is a high-low conversion signal, the high-low conversion signal can generate two conditions, one of which is that the configuration channel CC outputs a high potential (e.g. 5V), and the configuration channel CC charges the first capacitor C1; another condition is that the configuration channel CC is switched from high to low (e.g. 0V), the first capacitor C1 is discharged, and the second capacitor C2 is charged. In other words, when the configuration channel CC is at a high voltage, the high voltage of the configuration channel CC turns on the first diode D1 in a forward direction and charges the first capacitor C1 to the high voltage, and at this time, the second diode D2 is turned off. When the configuration channel CC is switched from high to low, the high voltage (5V) stored in the first capacitor C1 forward turns on the second diode D2, and charges the second capacitor C2 until the voltage across the second capacitor C2 is twice the high voltage (i.e., 5V). At this time, the node voltage Vs1 (10V) is greater than the node voltage Vg1 (5V), the first switch U1 is turned on, the terminal voltage Vd1 outputted from the switch unit 140 is similar to the node voltage Vs1, the third capacitor C3 is charged, at this time, the node voltage Vg2 is greater than zero potential, the second switch U2 is turned on, and at this time, the reverse terminal voltage Vo is at a low potential (0V).
When the status signal of the configuration channel CC is a voltage stabilizing signal, the second capacitor C2 is discharged to zero potential, the first switch U1 is turned off, the second switch U2 is also turned off, and the reverse endpoint voltage Vo is equal to the power voltage V1 (1.8V). Therefore, the detection circuit 100 of the expansion interface group 20 applied to interface conversion detects the insertion state of the expansion interface group 20 through a pure hardware detection circuit composed of basic electronic elements, and does not need to judge the insertion state through a software detection module.
Referring to fig. 4 and 5, fig. 4 is a circuit diagram illustrating a detection circuit 100a of an expansion interface group 20 applied to interface conversion according to a second embodiment of the present invention; fig. 5 is a waveform diagram illustrating the detection circuit 100a of the extended interface group 20 applied to interface conversion according to the embodiment of fig. 4. The detection circuit 100a of the extended interface group 20 applied to interface conversion includes a charge pump unit 120a, a switch unit 140a and an inverting unit 160a. In the embodiment of fig. 4, the switch unit 140a and the inverting unit 160a of the detection circuit 100a of the extended interface group 20 applied to interface conversion are respectively identical to the switch unit 140 and the inverting unit 160 of the embodiment of fig. 3, and are not described again. Specifically, the detection circuit 100a of the expansion interface group 20 applied to interface conversion may further include a buffer B1; the charge pump unit 120a may further include a fourth resistor R4; the inverting unit 160a may further include a third diode D3.
The buffer B1 is electrically connected between the charge pump unit 120a and the configuration channel CC. Thereby, the detection circuit 100a of the extended interface group 20 applied to interface conversion is prevented from generating a loading effect, and disturbing the status signal of the configuration channel CC.
Specifically, the fourth resistor R4 is connected between the second diode D2 and the second capacitor C2, and the resistance values of the fourth resistor R4 and the first resistor R1 can be adjusted according to the withstand voltage of the second capacitor C2 and the gate-source turn-on voltage of the first switch U1. The anode terminal of the third diode D3 is connected to the first switch U1, and the cathode terminal of the third diode D3 is connected to the second resistor R2, the third capacitor C3, and the second switch U2.
As shown in fig. 5, the state signal of the configuration channel CC is converted from the high-low conversion signal to the voltage stabilizing signal when the time is 2 seconds, the voltage Vo at the opposite end point before the state signal is switched is the low potential voltage (0V), after the state signal is switched, the source-gate voltage (i.e. node voltage Vs 1-node voltage Vg 1) at both ends of the first switch U1 and the gate-source voltage (i.e. node voltage Vg 2) at both ends of the second switch U2 are gradually reduced, the first switch U1 and the second switch U2 are turned off, and the voltage Vo at the opposite end point is switched to the power voltage V1.
Referring to fig. 1 and fig. 6 in combination, fig. 6 is a flowchart illustrating a detection method S200 of the detection circuit 100 of the extended interface group 20 applied to interface conversion according to a third embodiment of the present invention. The detection method S200 of the detection circuit 100 applied to the interface conversion expansion interface group 20 includes a charge pump charging step S12, a switch switching step S14, and a voltage reversing step S16. The charge pump charging step S12 is to receive the status signal of the configuration channel CC of the first usb interface 20a, and charge and discharge the charge pump unit 120 of the detection circuit 100 according to the status signal. The switching step S14 is to control the switching unit 140 of the detection circuit 100 according to the status signal and output the terminal voltage (not shown). The voltage reversing step S16 is to generate a reversed endpoint voltage Vo by converting the endpoint voltage by the reversing unit 160 of the driving detection circuit 100. Therefore, the detection method S200 of the detection circuit 100 applied to the expansion interface group 20 for interface conversion of the present invention detects the insertion state of the expansion interface group 20 through a pure hardware circuit, and further selects one of the first usb port 20a and the second usb port 20b to be connected to the usb port 10.
Referring to fig. 1, fig. 2 and fig. 7 in combination, fig. 7 is a flowchart illustrating a detection method S200a of the detection circuit 100 of the extended interface group 20 applied to interface conversion according to a fourth embodiment of the present invention. The detection method S200a of the detection circuit 100 applied to the interface-converted expansion interface group 20 includes a charge pump charging step S12a, a switch switching step S14a, and a voltage reversing step S16a. In the embodiment of fig. 7, the charge pump charging step S12a, the switch switching step S14a and the voltage reversing step S16a of the detection method S200a applied to the detection circuit 100 of the extended interface group 20 for interface conversion are the same as the charge pump charging step S12, the switch switching step S14 and the voltage reversing step S16 of the embodiment of fig. 6, and will not be described again. Specifically, the detection method S200a of the detection circuit 100 applied to the interface conversion expansion interface group 20 further includes a selection step S18a. The selecting step S18a is to drive the multiplexer 180 of the detecting circuit 100 to selectively turn on one of the first usb interface 20a and the second usb interface 20b according to the reverse end voltage Vo. Therefore, the detection method S200a of the detection circuit 100 applied to the expansion interface group 20 for interface conversion of the present invention can preferentially turn on the first usb interface 20a when the first usb interface 20a and the second usb interface 20b are simultaneously plugged into the device.
While the invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto but may be variously modified and modified by those skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention is accordingly defined by the appended claims.
Claims (6)
1. The detection circuit of an expansion interface group applied to interface conversion is used for detecting an insertion state of an expansion interface group and conducting the expansion interface group to a universal serial bus end, and the expansion interface group comprises a first universal serial bus interface and a second universal serial bus interface, and is characterized in that the detection circuit of the expansion interface group applied to interface conversion comprises:
a charge pump unit for receiving a status signal of a configuration channel of the first USB interface and charging and discharging according to the status signal;
The switch unit is electrically connected with the charge pump unit, is conducted according to the state signal of the configuration channel, and outputs a terminal voltage; and
A reverse unit electrically connected to the switch unit and converting the terminal voltage to generate a reverse terminal voltage;
Wherein the USB terminal turns on one of the first USB interface and the second USB interface according to the reverse endpoint voltage;
Wherein the charge pump unit comprises:
a first diode electrically connected to the configuration channel, the first diode including a cathode terminal and an anode terminal;
A first capacitor electrically connected to the cathode terminal of the first diode;
a second diode including a cathode terminal and an anode terminal, the anode terminal of the second diode being connected to the cathode terminal of the first diode and the first capacitor;
a second capacitor electrically connected to the cathode terminal of the second diode; and
The first resistor is electrically connected with the cathode end of the second diode and is connected with the second capacitor in parallel;
wherein the status signal of the configuration channel is one of a high-low conversion signal and a voltage stabilizing signal;
When the status signal of the configuration channel is the high-low conversion signal, the high-low conversion signal comprises:
when the configuration channel outputs a high potential, the configuration channel charges the first capacitor; and
When the configuration channel is converted from the high potential to a low potential, the first capacitor discharges and charges the second capacitor; and
When the status signal of the configuration channel is the voltage stabilizing signal, the second capacitor discharges to a zero potential.
2. The detection circuit for an extended interface group for interface conversion according to claim 1, further comprising:
and the buffer is electrically connected between the charge pump unit and the configuration channel.
3. The detecting circuit for interface conversion as defined in claim 1, wherein the first USB interface and the second USB interface are a C-type USB interface and an A-type USB interface respectively.
4. The detection circuit for an extended interface group for interface conversion according to claim 1, further comprising:
A multiplexer, comprising:
the two input ends are respectively and electrically connected with the first universal serial bus interface and the second universal serial bus interface;
An output end electrically connected to the universal serial bus end; and
A selection terminal electrically connected to the reversing unit.
5. The detection method of the detection circuit of the expansion interface group applied to interface conversion is used for detecting an insertion state of the expansion interface group and conducting the expansion interface group to a universal serial bus end through a detection circuit, and the expansion interface group comprises a first universal serial bus interface and a second universal serial bus interface, and is characterized in that the detection method of the detection circuit of the expansion interface group applied to interface conversion comprises the following steps:
A charge pump charging step, which is to receive a status signal of a configuration channel of the first universal serial bus interface and charge and discharge a charge pump unit of the detection circuit according to the status signal;
a switch switching step of controlling a switch unit of the detection circuit according to the status signal and outputting a terminal voltage; and
A voltage reversing step of driving a reversing unit of the detecting circuit to convert the terminal voltage to generate a reversed terminal voltage;
The switch unit is electrically connected with the charge pump unit, and the reversing unit is electrically connected with the switch unit;
Wherein the charge pump unit comprises:
a first diode electrically connected to the configuration channel, the first diode including a cathode terminal and an anode terminal;
A first capacitor electrically connected to the cathode terminal of the first diode;
a second diode including a cathode terminal and an anode terminal, the anode terminal of the second diode being connected to the cathode terminal of the first diode and the first capacitor;
a second capacitor electrically connected to the cathode terminal of the second diode; and
The first resistor is electrically connected with the cathode end of the second diode and is connected with the second capacitor in parallel;
wherein the status signal of the configuration channel is one of a high-low conversion signal and a voltage stabilizing signal;
When the status signal of the configuration channel is the high-low conversion signal, the high-low conversion signal comprises:
when the configuration channel outputs a high potential, the configuration channel charges the first capacitor; and
When the configuration channel is converted from the high potential to a low potential, the first capacitor discharges and charges the second capacitor; and
When the status signal of the configuration channel is the voltage stabilizing signal, the second capacitor discharges to a zero potential.
6. The method for detecting a detection circuit of an extended interface group applied to interface conversion according to claim 5, further comprising:
and a selecting step of driving a multiplexer of the detecting circuit to selectively conduct one of the first USB interface and the second USB interface according to the reverse endpoint voltage.
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| CN202111090831.9A CN113805112B (en) | 2021-09-17 | 2021-09-17 | Detection circuit and detection method for extended interface group applied to interface conversion |
| TW110141550A TWI777848B (en) | 2021-09-17 | 2021-11-08 | Detecting circuit of expansion interface assembly applied to interface conversion and detecting method thereof |
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| CN202111090831.9A CN113805112B (en) | 2021-09-17 | 2021-09-17 | Detection circuit and detection method for extended interface group applied to interface conversion |
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| CA3010261A1 (en) * | 2018-06-29 | 2019-12-29 | Mitchell B. Miller | A system and method utilizing deflection conversion for increasing the energy efficiency of a circuit and time rate while charging an electrical storage device, different circuit configurations composing a group termed deflection converters, where this invention utilizes a current loop and or feedback |
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2021
- 2021-09-17 CN CN202111090831.9A patent/CN113805112B/en active Active
- 2021-11-08 TW TW110141550A patent/TWI777848B/en active
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| TW435758U (en) * | 1999-05-28 | 2001-05-16 | Aten Int Co Ltd | Electronic switching apparatus for general-purpose sequential bus interface |
| CN107491159A (en) * | 2015-06-19 | 2017-12-19 | 赛普拉斯半导体公司 | The low-power of Type C connector subsystems is realized |
| TWM614161U (en) * | 2020-05-21 | 2021-07-01 | 立訊精密工業股份有限公司 | Multifunctional adapter device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113805112A (en) | 2021-12-17 |
| TW202314530A (en) | 2023-04-01 |
| TWI777848B (en) | 2022-09-11 |
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