CN113067461B

CN113067461B - Control system for turn-off of N-type high-side switching tube without bootstrap capacitor

Info

Publication number: CN113067461B
Application number: CN202110358632.5A
Authority: CN
Inventors: 闸钢
Original assignee: Shenzhen Enchip Semiconductor Co ltd
Current assignee: Shenzhen Enchip Semiconductor Co ltd
Priority date: 2021-04-02
Filing date: 2021-04-02
Publication date: 2022-07-05
Anticipated expiration: 2041-04-02
Also published as: CN113067461A

Abstract

The application relates to a control system that no bootstrap capacity's N type high side switch tube shut off, including charge pump, NMOS pipe MH, NMOS pipe ML, main module and the control module of shutting off, main module of shutting off has first link, second link and third link, and control module includes: the main turn-off module comprises an NMOS tube M8 and a resistor R2, the current supply module comprises PMOS current mirrors M6-M5 and a controllable current source I1, and the auxiliary turn-off module comprises an NMOS tube M7. Further comprising: from the outage module, the module includes from the outage: the circuit breaking signal input module and the execution module. The grid electrode and the source electrode of the NMOS tube MH are short-circuited through the main turn-off module, so that the grid electrode and the source electrode of the NMOS tube MH are the same in voltage, the NMOS tube MH is not easy to cross and communicate and break down, and the NMOS tube MH is protected.

Description

Control system for turn-off of N-type high-side switching tube without bootstrap capacitor

Technical Field

The application relates to the field of control circuits, in particular to a control system for turning off an N-type high-side switching tube without a bootstrap capacitor.

Background

In power applications such as switching power supplies, motor control, etc., two N-type power MOS transistors are often used to control the output voltage to switch between supply and ground voltages. The switches of the low-side N-type power tube can be directly driven by low-voltage logic circuits, and the driving circuit of the high-side N-type power tube generally needs to use a capacitor bootstrap circuit to provide power for the high-side N-type power tube. In some applications, the bootstrap circuit cannot be used to generate the power supply for the high-side driving circuit due to the limitation of chip pins, so that a power output stage without the bootstrap circuit appears.

Fig. 1 is a conventional power output stage circuit without a bootstrap circuit, which includes a charge pump, an NMOS transistor ML, an NMOS transistor MH, and an NMOS transistor M1, wherein an output terminal of the charge pump is coupled to a drain terminal of the NMOS transistor M1, a source terminal of the NMOS transistor M1 is grounded, a gate terminal of the NMOS transistor M1 is connected to an external logic circuit to receive a signal G1, a gate terminal of the NMOS transistor MH is coupled to the output terminal of the charge pump, a drain terminal of the NMOS transistor MH is connected to VCC, a source terminal of the NMOS transistor MH is coupled to the drain terminal of the NMOS transistor ML, an electrical connection point between the source terminal of the MOS transistor MH and the drain terminal of the NMOS transistor ML is used to output a voltage Vout, the source terminal of the NMOS transistor ML is grounded, a gate terminal of the NMOS transistor ML is connected to a signal GL, the NMOS transistor M1 is controlled to be turned off by the signal G1, and the NMOS transistor ML is controlled to be turned off by the signal GL.

In the above related art, in order to prevent the cross conduction of the NMOS transistor MH, a certain dead time is set, that is, the gate voltage of the NMOS transistor MH is 0V, but if the external application circuit of the output terminal has an inductive element such as an inductor, after the NMOS transistor MH is turned off, the external application circuit generates an induced voltage, follow current is performed through the NMOS transistor ML within the dead time, the voltage of the output terminal is reduced to-0.7V or lower, and the gate voltage of the NMOS transistor MH is 0V, so that the NMOS transistor MH is turned on again, and the NMOS transistor MH cannot be completely turned off, and the cross communication phenomenon occurs. Secondly, under the condition that high-low side power tube closed simultaneously, the output is the high resistance state, and output voltage probably is pulled different voltages by outside application circuit, because NMOS pipe MH passes through NMOS pipe M1 after the shutoff, and NMOS pipe MH's grid voltage is 0V, if output is pulled higher voltage by outside application circuit this moment, probably surpasss NMOS pipe MH grid oxide layer's withstand voltage and damages NMOS pipe MH.

Disclosure of Invention

In order to make the difficult phenomenon that takes place alternately to switch on of NMOS pipe MH prevent NMOS pipe MH from being punctured simultaneously and damaging, this application provides the control system that the N type high side switch tube of a no bootstrap capacitor turned off.

The technical scheme is adopted in the control system for turning off the N-type high-side switching tube without the bootstrap capacitor.

The utility model provides a control system that no bootstrap capacity's N type high side switch tube shut off, including charge pump, NMOS pipe MH, NMOS pipe ML, coupling of NMOS pipe MH's grid and charge pump's output, NMOS pipe MH's drain electrode connects the VCC, NMOS pipe MH's source electrode and NMOS pipe ML's drain electrode are coupled, NMOS pipe ML's source electrode ground connection, NMOS pipe ML's drain electrode and NMOS pipe MH's the voltage between two points of source electrode are exported as Vout, still include:

the main turn-off module is coupled with the NMOS tube MH and used for short-circuiting the grid electrode of the NMOS tube MH with the source electrode;

and the control module is coupled with the main turn-off module and used for controlling the on and off of the main turn-off module.

By adopting the technical scheme, switch on through control module control owner's shutoff module, with NMOS pipe MH's grid and source electrode short circuit, make NMOS pipe MH's grid the same with the voltage of source electrode, turn off NMOS pipe MH, simultaneously because outside application circuit's voltage is from NMOS pipe MH's source electrode access to this control system, when outside application circuit's inductive voltage or load voltage, after applying to NMOS pipe MH's source electrode, because the short circuit of owner's shutoff module, make NMOS pipe MH's grid and source electrode unable voltage difference that forms, and avoid leading to NMOS pipe MH to take place the phenomenon of cross intercommunication or reverse breakdown.

Preferably, the main shutdown module has a first connection end, a second connection end, and a third connection end, the first connection end of the main shutdown module is coupled to a gate of an NMOS transistor MH, the second connection end is coupled to a source of the NMOS transistor MH, and the third connection end is coupled to the control module;

when the voltage value at the third connection exceeds the voltage value at the second connection, the main switch-off module is activated to switch on.

Through adopting above-mentioned technical scheme, personnel's accessible control module makes the main voltage value that turns off the module through the third link be greater than the voltage value of second link and turn off the module switch-on with the main to the realization is with NMOS pipe MH's grid and source electrode short circuit.

Preferably, a resistor R2 is coupled between the second connection terminal and the third connection terminal of the main shutdown module, and the control module includes:

the current supply module is coupled to the third connection terminal of the main turn-off module and used for supplying current to the main turn-off module to generate a voltage drop on a resistor R2;

and an auxiliary turn-off module coupled to the gate of the NMOS transistor MH for grounding the gate of the NMOS transistor MH to zero its voltage.

By adopting the technical scheme, the grid electrode of the NMOS tube MH is grounded through the auxiliary turn-off module to enable the voltage of the grid electrode to be zero, the NMOS tube MH is turned off, the source electrode voltage of the NMOS tube MH is reduced, the current supply module supplies current to the third connecting end of the main turn-off module to generate voltage drop on the resistor R2, the voltage value of the third connecting end is larger than that of the second connecting end, and therefore the main turn-off module is turned on.

Preferably, the main turn-off module includes an NMOS transistor M8 and a resistor R2, a drain of the NMOS transistor M8 is coupled to a gate of the NMOS transistor MH, a source of the NMOS transistor MH is coupled to a source of the NMOS transistor MH, and a gate of the NMOS transistor M2 is coupled to the control module, two ends of the resistor R2 are coupled to a source and a gate of the NMOS transistor M8, respectively, the first connection terminal is a drain of the NMOS transistor M8, the second connection terminal is a source of the NMOS transistor M8, and the third connection terminal is a gate of the NMOS transistor M8.

By adopting the technical scheme, the main turn-off module adopts the NMOS tube M8 and the resistor R2, the NMOS tube has the advantages of extremely low on-resistance, extremely low grid charge, low noise, low power consumption, large dynamic range, easiness in integration and the like, the extremely low internal resistance after the NMOS tube is switched on is equivalent to short circuit, and the NMOS tube is relatively suitable for the system.

Preferably, the current supply module includes PMOS current mirrors M6-M5 and a controllable current source I1, wherein input terminals of the PMOS current mirrors M6-M5 are coupled to an external current source I1, output terminals of the PMOS current mirrors M6-M5 are coupled to a gate of the NMOS transistor M8, a power supply terminal of the PMOS current mirror is coupled to the power source VCC, the other terminal of the controllable current source I1 is grounded, and the controllable current source I1 has a control terminal for receiving an external control signal to control the controllable current source I1 to generate a current.

By adopting the technical scheme, the current source I1 is controlled to generate current through the control end, the current is input into the main turn-off module through the current mirror, and voltage is formed on the grid electrode of the NMOS tube M8 according to the resistance value of the resistor R2 to supply voltage to the third connecting end.

Preferably, the auxiliary turn-off module includes an NMOS transistor M7, and the drain of the NMOS transistor M7 is coupled to the gate of the NMOS transistor M8, the source is grounded, and the gate is used for receiving an external control signal.

By adopting the technical scheme, the NMOS tube M7 is switched on through an external control signal, and the internal resistance of the NMOS tube after being switched on is extremely low, namely short circuit, so that the grid grounding voltage of the NMOS tube MH is reduced to 0V, the NMOS tube MH is switched off, the internal resistance of the NMOS tube MH is increased, and the voltage value of the source voltage of the NMOS tube is reduced.

Preferably, the gate of the NMOS transistor M7 is coupled to the control terminal of the controllable current source I1, so that the gate of the NMOS transistor M7 and the controllable current source I1 receive the external control signal at the same time.

Through adopting above-mentioned technical scheme for when personnel input NMOS pipe M7 with external control signal, make controllable current source I1 also can receive external control signal, need not personnel and carry out secondary operation, it is comparatively convenient.

Preferably, the method further comprises the following steps:

and the self-disconnection module is coupled with the auxiliary disconnection module and used for disconnecting the auxiliary disconnection module after the main disconnection module is started.

By adopting the technical scheme, the auxiliary turn-off module can be cut off by the self-breaking module, so that the grid voltage of the NMOS tube MH is recovered to the voltage of the output end Vout, and the output end Vout can be recovered to be in a high-resistance state when the NMOS tube MH and the NMOS tube ML are closed simultaneously.

Preferably, the self-shutdown module includes:

a shutdown signal input module, coupled to the auxiliary shutdown module, having a preset reference voltage value therein, and comparing the source voltage value of the NMOS transistor MH with the reference voltage value to output a shutdown signal;

and the execution module is coupled with the circuit breaking signal input module and the auxiliary shutdown module, receives a circuit breaking signal and responds to the control of the auxiliary shutdown module.

By adopting the technical scheme, after the grid voltage of the source voltage value of the NMOS tube MH is set to be 0, the source voltage can be reduced, when the source voltage value of the NMOS tube MH is detected to be smaller than the reference voltage value, the auxiliary turn-off module is turned on, the NMOS tube MH is turned off, the turn-off signal input module outputs the turn-off signal at the moment, and the execution module turns off the auxiliary turn-off module after receiving the turn-off signal.

Preferably, the execution module includes:

a not gate, the input end of which is coupled to the open circuit signal input module, for receiving an open circuit signal;

and the first input end of the AND gate is coupled to the output end of the NOT gate, and the second input end of the AND gate is used for receiving an external control signal so as to respond to the control of the on-off of the auxiliary turn-off module.

By adopting the technical scheme, when the open circuit signal passes through the NOT gate, the NOT gate outputs a low level signal, so that the AND gate outputs the low level signal, and the auxiliary turn-off module is turned off.

In summary, the present application includes at least one of the following beneficial technical effects:

the grid electrode and the source electrode of the NMOS tube MH are short-circuited through the main turn-off module, so that the grid electrode and the source electrode of the NMOS tube MH are the same in voltage, the NMOS tube MH is not easy to cross and communicate and break down, and the NMOS tube MH is protected.

Two paths of turn-off branches are adopted for complementary work, turn-off control can be effectively carried out, and a complex protection circuit is avoided.

In addition, the working interval of the branch pulling down to the ground can be accurately set by adjusting the number of diodes between the diode D1 and the diode Dn so as to achieve the optimal turn-off speed.

Drawings

Fig. 1 is a circuit diagram of a conventional power output stage without a bootstrap circuit.

Fig. 2 is a circuit diagram of an embodiment of the present application.

Description of reference numerals: 1. a main turn-off module; 2. a control module; 21. a current supply module; 22. an auxiliary turn-off module; 3. a self-shutdown module; 31. a circuit breaking signal input module; 32. and executing the module.

Detailed Description

The present application is described in further detail below with reference to fig. 2.

The embodiment of the application discloses a control system for turning off an N-type high-side switching tube without a bootstrap capacitor. Referring to fig. 2, a control system for turning off an N-type high-side switching tube without a bootstrap capacitor includes a charge pump, an NMOS tube MH, an NMOS tube ML, a main turn-off module 1, a control module 2, and a self-shutdown module 3, where the control module 2 includes a current supply module 21 and an auxiliary turn-off module 22. The self-shutdown module 3 includes a shutdown signal input module 31 and an execution module 32.

The grid of NMOS pipe MH is coupled with the output of charge pump, the drain-source resistance VCC of NMOS pipe MH, the source electrode of NMOS pipe MH is coupled with the drain-source resistance of NMOS pipe ML, the source electrode ground connection of NMOS pipe ML, the grid of NMOS pipe ML is used for supplying external control signal GL input in order to control whether NMOS pipe ML switches on, the tie point between the drain-source resistance of NMOS pipe MH and NMOS pipe ML has the output of output voltage Vout.

The main turn-off module 1 is coupled to the NMOS transistor MH and is used for short-circuiting the gate and the source of the NMOS transistor MH. Specifically, the method comprises the following steps: the main turn-off module 1 has a first connection end, a second connection end and a third connection end, the main turn-off module 1 includes an NMOS transistor M8 and a resistor R2, the first connection end is a drain of the NMOS transistor M8, the second connection end is a source of the NMOS transistor M8, and the third connection end is a gate of the NMOS transistor M8. The drain of the NMOS transistor M8 is coupled to the gate of the NMOS transistor MH, the source is coupled to the source of the NMOS transistor MH, and the gate is coupled to the control module 2, two ends of the resistor R2 are coupled to the source and the gate of the NMOS transistor M8, respectively, and the gate of the NMOS transistor M8 is coupled to the control module 2.

And the current supply module 21 is coupled to the third connection terminal of the main shutdown module 1, and is configured to supply a current to the main shutdown module 1 to generate a voltage drop across the resistor R2. Specifically, the method comprises the following steps: the current supply module 21 includes PMOS current mirrors M6-M5 and a controllable current source I1, wherein input terminals of the PMOS current mirrors M6-M5 are coupled to an external current source I1, output terminals thereof are coupled to a gate of the NMOS transistor M8, a power supply terminal thereof is coupled to a power supply VCC, the other terminal of the controllable current source I1 is grounded, the controllable current source I1 has a control terminal for receiving an external control signal Hoff to control the controllable current source I1 to generate a current. When the external control signal is a high-level signal Hoff, the current source I1 is activated to generate a current I1, and after the current I1 passes through the resistor R2, the gate voltage (VGS = I1 × R2) of the NMOS transistor M8 is raised, but since the gate voltage of the NMOS transistor M8 is distributed by the PMOS current mirrors M6 to M5 and does not exceed VCC at most, but when the NMOS transistor MH is turned on, the source output voltage is VCC, and therefore VGS =0 of M8 cannot be turned on, so that light cannot be turned off by the current supply module 21 through the NMOS transistor MH, the auxiliary turn-off module 22 is provided.

The auxiliary turn-off module 22 is coupled to the gate of the NMOS transistor MH, and is configured to ground the gate of the NMOS transistor MH to zero its voltage. Specifically, the method comprises the following steps: the auxiliary turn-off module 22 includes an NMOS transistor M7, a drain of the NMOS transistor M7 is coupled to a gate of the NMOS transistor MH, a source of the NMOS transistor M7 is grounded, an external control signal Hoff is input to the gate of the NMOS transistor M7 through processing of the execution module 32, the gate of the NMOS transistor M7 is coupled to a control end of the controllable current source I1, the execution module 32 is connected in series between the NMOS transistor M7 and the NMOS transistor M7, and the high-level external control signal Hoff enters the gate of the NMOS transistor M7 through the execution module 32 to turn on and ground the NMOS transistor M7, so that the gate of the NMOS transistor MH is grounded to zero its voltage, and the NMOS transistor MH is turned off, so that the source voltage of the NMOS transistor MH gradually drops, and the NMOS transistor M8 is turned on in cooperation with the voltage supplied to the gate of the NMOS transistor M8 by the current supply module 21, and the gate and the source of the NMOS transistor MH are shorted.

Because the voltage of the gate and the source of the NMOS transistor MH is O after the voltage drop by the auxiliary turn-off module 22, although the NMOS transistor MH can be turned off, the NMOS transistor MH still has a risk of being damaged by the voltage breakdown of the external application circuit, and it cannot be ensured that the NMOS transistor MH and the NMOS transistor ML are turned off at the same time (because the NMOS transistor M7 is grounded, the NMOS transistor MH may still be turned on when the load continues current), therefore, in order to enable the NMOS transistor MH and the NMOS transistor ML to be turned off at the same time, the embodiment provides the turn-off signal input module 31 and the execution module 32 to turn off the NMOS transistor M7.

The shutdown signal input module 31 is coupled to the auxiliary shutdown module 22, has a preset reference voltage value therein, and compares the source voltage value of the NMOS MH with the reference voltage value to output a shutdown signal. Specifically, the method comprises the following steps: the disconnection signal input module 31 includes: PMOS current mirrors M1 to M2, PMOS current mirrors M3 to M4, a current source I2, a current source I3 and an NMOS transistor MS, wherein the grid electrode of the NMOS transistor MS is coupled with the grid electrode of the NMOS transistor MH, the drain electrode of the NMOS transistor MS is connected with a power source VCC, the source electrode of the NMOS transistor MS is coupled with the current source I3, the other end of the current source I3 is grounded, one end of the current source I2 is coupled with the power source VCC, the other end of the current source I2 is connected in series with a diode D1 and a diode Dn, a plurality of diodes are further connected in series between the diode D1 and the diode Dn, the anode of the diode D1 is connected with the output end of the current source I2, the cathode of the diode Dn is coupled with the input ends of the PMOS current mirrors M1 to M2, the power supply end of the PMOS current mirrors M2 to M2 is coupled with the source electrode of the NMOS transistor MS, the output ends of the PMOS current mirrors M2 to M2 are coupled with the input ends of the PMOS current mirrors M2 to M2, the power supply end of the PMOS current mirrors M2 to M2, and the other end of the resistor R2 is grounded, the middle connection point of the end part of the resistor R1 and the output ends of the PMOS current mirrors M3-M4 is coupled with the execution module 32;

the drain electrode and the grid electrode of the NMOS tube MS are connected with the drain electrode and the grid electrode of the NMOS tube MH, the source electrode is connected with the current source load I1 so that the source electrode voltage is not 0V, and the specification types of the NMOS tube MS and the NMOS tube MH are the same because the grid electrode voltage and the drain electrode voltage of the NMOS tube MS and the NMOS tube MH are the same, so that the source electrode voltages of the NMOS tube MS and the NMOS tube MH are approximately equal in the process of turning off the NMOS tube MH. The gate voltage of the NMOS transistor MS can be judged by detecting the voltage of the source node A of the NMOS transistor MS. When the NMOS MH is turned off and the gate voltage starts to decrease, the operating region of the NMOS MH and the NMOS M8 gradually transitions from the linear region VDS =0 at the beginning to the saturation region, and at this time, the gate voltage v (gh) = v (a) + VGS of the NMOS MS. The voltage at point A is close to the voltage of the power supply VCC, the branch cannot be conducted due to the series connection of the current source I2, a plurality of diodes (including diode D1, diode Dn and the like) and the PMOS current mirrors M1 to M2, no current flows at the output ends of the PMOS current mirrors M1 to M2 and the PMOS current mirrors M3 to M4, but when the NMOS transistor M7 is conducted, the grid voltage of the NMOS transistor MS and the grid voltage of the MOS transistor MH drop, the voltage at point A begins to drop along with the drop, and the voltage at point A drops to a reference voltage value, which is determined by the number of the plurality of diodes connected in series between the diode D1 and the diode Dn. The voltage difference from the power supply VCC to A is increased to n VD + VGS (the grid and source conducting voltage of NMOS tubes in the PMOS current mirrors M1-M2), at this time, current starts to flow through the output ends of the PMOS current mirrors M3-M4, current is generated, the current is equal to the current of I2, the current flows into R1 to increase the end voltage of the resistor R1, and a voltage signal is input to the execution module 32.

The execution module 32 is coupled to the shutdown signal input module 31 and the auxiliary shutdown module 22, and receives the shutdown signal to respond to the control of the auxiliary shutdown module 22. Specifically, the method comprises the following steps: the execution module 32 includes a not gate and an and gate, a middle connection point between the resistor R1 and the output ends of the PMOS current mirrors M3-M4 is coupled to the input end of the not gate, the output end of the not gate is coupled to the first input end of the and gate, the second input end of the and gate is coupled to the control end of the controllable current source I3, and the output end of the and gate is coupled to the gate of the NMOS transistor M7.

When I2 × R1=5V, and the voltage at point B is equivalent to a high level signal, the voltage is converted into a low level signal in the reverse direction of the not gate, and the low level signal is input into the and gate, so that the and gate changes from the original high level signal to the low level signal output to the NMOS transistor M7 (at this time, the external control signal Hoff is a high level signal), so that M7 is turned off, and at this time, the turn-off of the NMOS transistor MH is handled by the main turn-off module 1, so that the NMOS transistor MH can still be effectively turned off during inductive load freewheeling.

The implementation principle of the control system for turning off the N-type high-side switching tube without the bootstrap capacitor in the embodiment of the application is as follows: make NMOS pipe MH turn-off through main module 1 and turn-off the grid and the source electrode short circuit of NMOS pipe MH simultaneously, even outside application circuit appears induced voltage or has a higher external voltage because of inductance components and parts for the voltage of NMOS pipe MH's grid and source electrode can keep equal at all, avoids NMOS pipe MH alternately intercommunication or is broken by reverse breakdown.

The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.

Claims

1. The utility model provides a control system that no bootstrap capacity's N type high side switch tube shut off, including charge pump, NMOS pipe MH, NMOS pipe ML, coupling of NMOS pipe MH's grid and charge pump's output, NMOS pipe MH's drain electrode VCC that connects, NMOS pipe MH's source electrode and NMOS pipe ML's drain electrode are coupled, NMOS pipe ML's source electrode ground connection, NMOS pipe ML's drain electrode and NMOS pipe MH's voltage between two points of source electrode are as Vout output, a serial communication port, still include:

the main turn-off module (1) is coupled with the NMOS tube MH and is used for short-circuiting the grid electrode and the source electrode of the NMOS tube MH;

and a control module (2), coupled to the main turn-off module (1), for controlling the turn-on and turn-off of the main turn-off module (1);

the main turn-off module (1) is provided with a first connecting end, a second connecting end and a third connecting end, wherein the first connecting end of the main turn-off module (1) is coupled to a grid electrode of an NMOS (N-channel metal oxide semiconductor) tube MH, the second connecting end is coupled to a source electrode of the NMOS tube MH, and the third connecting end is coupled to the control module (2);

when the voltage value at the third connection exceeds the voltage value at the second connection, the main switch-off module (1) is activated to switch on;

a resistor R2 is coupled between the second connection terminal and the third connection terminal of the main shutdown module (1), and the control module (2) comprises:

a current supply module (21) coupled to the third connection terminal of the main shutdown module (1) for supplying current to the main shutdown module (1) to generate a voltage drop across a resistor R2;

and an auxiliary turn-off module (22) coupled to the gate of the NMOS transistor MH for grounding the gate of the NMOS transistor MH to zero its voltage.

2. The control system for turning off the N-type high-side switching tube without the bootstrap capacitor as recited in claim 1, wherein: the main turn-off module (1) comprises an NMOS tube M8 and a resistor R2, wherein the drain electrode of the NMOS tube M8 is coupled with the grid electrode of the NMOS tube MH, the source electrode of the NMOS tube MH is coupled with the source electrode of the NMOS tube MH, the grid electrode of the NMOS tube MH is coupled with the control module (2), two ends of the resistor R2 are respectively coupled with the source electrode and the grid electrode of the NMOS tube M8, the first connecting end is the drain electrode of the NMOS tube M8, the second connecting end is the source electrode of the NMOS tube M8, and the third connecting end is the grid electrode of the NMOS tube M8.

3. The control system for turning off the N-type high-side switching tube without the bootstrap capacitor as recited in claim 2, wherein: the current supply module (21) comprises PMOS current mirrors M6-M5 and a controllable current source I1, wherein the input ends of the PMOS current mirrors M6-M5 are coupled with the controllable current source I1, the output ends of the PMOS current mirrors M6-M5 are coupled with the grid electrode of the NMOS tube M8, the power supply end of the PMOS current mirrors is coupled with a power supply VCC, the other end of the controllable current source I1 is grounded, the controllable current source I1 is provided with a control end, and the control end is used for receiving an external control signal to control the controllable current source I1 to generate current.

4. The control system for turning off the N-type high-side switching tube without the bootstrap capacitor as recited in claim 3, wherein: the auxiliary turn-off module (22) comprises an NMOS tube M7, wherein the drain electrode of the NMOS tube M7 is coupled to the gate electrode of the NMOS tube M8, the source electrode of the NMOS tube is grounded, and the gate electrode of the NMOS tube is used for accessing an external control signal.

5. The control system for turning off the N-type high-side switching tube without the bootstrap capacitor as recited in claim 4, wherein: the gate of the NMOS transistor M7 is coupled to the control terminal of the controllable current source I1, so that the gate of the NMOS transistor M7 and the controllable current source I1 receive the external control signal at the same time.

6. The control system for turning off the N-type high-side switching tube without the bootstrap capacitor as recited in claim 1, further comprising:

a self-shutdown module (3) coupled to the auxiliary shutdown module (22) for disconnecting the auxiliary shutdown module (22) after the main shutdown module (1) is turned on.

7. The control system for turn-off of an N-type high-side switch tube without a bootstrap capacitor as claimed in claim 6, characterized in that said self-shutdown module (3) comprises:

a shutdown signal input module (31) coupled to the auxiliary shutdown module (22), having a preset reference voltage value therein, and comparing the source voltage value of the NMOS transistor MH with the reference voltage value to output a shutdown signal;

and the execution module (32) is coupled with the circuit breaking signal input module (31) and the auxiliary shutdown module (22) and receives a circuit breaking signal so as to respond to the control of the auxiliary shutdown module (22) to be turned on and off.

8. The control system for turning off the N-type high-side switch tube without the bootstrap capacitor of claim 7, wherein the execution module (32) comprises:

a not gate having an input coupled to the trip signal input module (31) for receiving a trip signal;

and an AND gate having a first input coupled to the output of the NOT gate, a second input for receiving an external control signal, and an output coupled to the auxiliary shutdown module (22) for responding to the control of the auxiliary shutdown module (22).