CN117480503A - A chip safe startup method and chip - Google Patents

Abstract

The application provides a chip safety starting method and a chip, wherein the chip comprises a secret key generation module and a processing module; the key generation module is used for generating a first key corresponding to the first starting stage; the first starting stage is any one of a plurality of starting stages of the chip; the first key is different from a key corresponding to a second starting stage, and the second starting stage is one starting stage except the first starting stage in a plurality of starting stages; the processing module is used for decrypting the first encrypted file according to the first key in the first starting stage to obtain a first image file, and starting the first image file; the first encrypted file is encrypted using a first key. The chip provided by the embodiment of the application can generate the secret key in real time in the chip starting process without pre-storing the secret key, so that the secret key is prevented from being revealed; meanwhile, the same key is not used for decryption in all starting stages, so that the safety of starting the chip is improved.

Description

A chip safe startup method and chip Technical field

The present application relates to the field of information technology, and in particular to a chip secure startup method and chip.

Background technique

The chip startup process includes multiple startup stages. For example, the system chip on the terminal device needs to go through multiple startup stages. For example, the startup process of the system chip on the terminal device includes ONCHIPROM, FASHBOOT, TEEOS, etc. startup phase. During the chip startup process, a startup image file is required for each startup stage. In order to ensure the security of the image file, manufacturers usually store encrypted image files in the chip when producing chips. Therefore, during the chip startup process, the encrypted image file needs to be decrypted before starting the image file.

At present, the more common chip startup method is to store the key in the chip in advance, read the key and decrypt the encrypted image file during the chip startup phase. In this method, multiple image files in the multiple startup phases of the chip correspond to a fixed key, but the method of using the same key to decrypt all image files in the chip startup phase is less secure. Once the key is leaked, all image files will be decrypted, causing security risks.

Contents of the invention

This application provides a chip secure startup method and chip, which are used to improve the security of the chip startup process.

In a first aspect, embodiments of the present application provide a chip, which includes a key generation module and a processing module; wherein the key generation module is used to generate a first key corresponding to the first startup phase; the first startup The stage is any startup stage among the multiple startup stages of the chip; the first key is different from the key corresponding to the second startup stage, and the second startup stage is any startup stage among the multiple startup stages. A startup phase other than the first startup phase; a processing module, configured to decrypt the first encrypted file according to the first key in the first startup phase, obtain the first image file, and start the first image file, wherein , the first encrypted file is encrypted using the first key.

In this way, the chip provided by the embodiment of the present application can generate a key for decrypting the encrypted file in each startup stage during the chip startup process, and the keys corresponding to at least two startup stages are not used, thereby generating the key in real time when the chip starts. The key does not need to be stored in advance to prevent key leakage; at the same time, the same key is no longer used for decryption in all startup stages, further improving the security of chip startup.

In one possible design, the key generation module is specifically configured to: determine the first key parameter corresponding to the first startup phase, and the first key parameter is the same as the key corresponding to the second startup phase. The parameters are different; the first key is generated according to the first key parameter.

Through this design, when the chip generates the first key in the first startup phase, it first generates the first key parameters corresponding to the first startup phase. At least the key parameters corresponding to the two startup phases are different, which can ensure that according to the After the key parameters are generated, at least the keys corresponding to the two startup stages are different, which improves the security of the chip startup process.

In a possible design, the key generation module is specifically configured to perform an operation on the first key parameter and the chip parameter of the chip according to a first operation rule to obtain the first key.

In a possible design, the chip parameters include at least one of the following: a life cycle used to indicate the use cycle of the chip; a public key hash value used to indicate the chip manufacturer; the chip The application manufacturer identification; the application equipment identification of the chip; the register identification of the registers contained in the chip.

Through the above equipment, when the chip generates the first key according to the first key parameters, it calculates the first key parameters of the chip and the chip parameters to obtain the first key, where the chip parameters can include the life cycle, public key and hash rate. Greek value, application manufacturer identification and application product identification, etc., so that the content of the chip parameters can be flexibly set, ensuring that the keys corresponding to the chip are different during different stages of use of the chip or when the chip is used in different manufacturers or products, further ensuring the reliability of the chip. Safe to use.

In a possible design, the key generation module is specifically configured to: when the first startup phase is the first startup phase among the multiple startup phases, generate a key according to a preconfigured initial value and a second operation rule. The first key parameter; or when the first startup phase is a startup phase other than the first startup phase among the multiple startup phases, the key parameter corresponding to the previous startup phase of the first startup phase. key parameters and the third operation rule to generate the first key parameters.

Through this design, when the chip generates key parameters in multiple startup phases included in the startup process, it can generate key parameters for the first startup phase based on the preconfigured initial values, and for other startup phases except the first startup phase , the key parameters of this startup phase can be generated based on the key parameters of the previous startup phase, so that different key parameters corresponding to different startup phases can be obtained.

In a possible design, the processing module is further configured to: after starting the first image file, process the first key into an invalid key;

The key generation module is also configured to: after the multiple startup phases are completed, when the first startup phase needs to be restarted, re-determine the key corresponding to the first startup phase according to the preconfigured target key parameters. the first key;

The processing module is further configured to: decrypt the first encrypted file according to the first key to obtain the first image file; and restart the first image file.

Through this design, after starting the first image file, the first key is processed as an invalid key to prevent the first key from being leaked. After multiple startup phases are completed, if the first startup phase needs to be restarted, the first key will be re-determined based on the preconfigured target key parameters, so that when individual startup phases need to be restarted, there is no need to restart the entire chip. Save costs while ensuring safe startup of the chip.

In the second aspect, embodiments of the present application provide a chip secure startup method, which method includes:

Generate a first key corresponding to the first startup phase; wherein the first startup phase is any startup phase among multiple startup phases of the chip; the first key and the key corresponding to the second startup phase Differently, the second startup phase is a startup phase among the plurality of startup phases except the first startup phase; in the first startup phase, the first encryption key is encrypted according to the first key. The file is decrypted to obtain a first image file; the first image file is started; wherein the first encrypted file is encrypted using the first key.

In a possible design, generating a first key corresponding to the first startup phase includes: determining a first key parameter corresponding to the first startup phase, and the first key parameter is consistent with the second key parameter. Key parameters corresponding to the startup phase are different; the first key is generated according to the first key parameter.

In a possible design, generating the first key according to the first key parameter includes: performing an operation on the first key parameter and the chip parameter of the chip according to a first operation rule. , obtain the first key.

In one possible design, determining the first key parameter corresponding to the first startup phase includes: when the first startup phase is the first startup phase among the multiple startup phases, according to the preconfiguration The initial value and the second operation rule generate the first key parameter; or when the first startup phase is a startup phase other than the first startup phase among the multiple startup phases, according to the first startup phase The first key parameters are generated using the key parameters corresponding to the previous startup stage and the third operation rule.

In a possible design, the chip parameters include at least one of the following: a life cycle used to indicate the use cycle of the chip; a public key hash value used to indicate the chip manufacturer; the chip The application manufacturer identification; the application equipment identification of the chip; and the identification of the registers contained in the chip.

In a possible design, after starting the first image file, the method further includes: processing the first key as an invalid key;

After the multiple startup phases are completed, the method further includes: when the first startup phase needs to be restarted, re-determine the first key corresponding to the first startup phase according to the preconfigured target key parameters. Key; decrypt the first encrypted file according to the first key to obtain the first image file; restart the first image file.

In a third aspect, embodiments of the present application provide a computer-readable storage medium that includes instructions that, when run on a computer, cause the computer to perform the method described in any possible design of the second aspect.

In a fourth aspect, embodiments of the present application provide a computer program product that, when run on a computer, causes the computer to execute the method described in any possible design of the second aspect.

Description of the drawings

Figure 1 is a schematic diagram of an exemplary chip structure;

Figure 2 is a schematic structural diagram of a chip provided by an embodiment of the present application;

Figure 3 is a schematic structural diagram of another chip provided by an embodiment of the present application;

Figure 4 is a schematic structural diagram of a key parameter generation module provided by an embodiment of the present application;

Figure 5 is a flow chart of a chip secure startup method provided by an embodiment of the present application.

Detailed ways

In order to facilitate understanding of the embodiments of the present application, terminology related to the embodiments of the present application is introduced below:

(1) An image file is a file similar to a rar or zip compressed file. A specific series of files are made into a single file in a certain format for users to download and use, such as operating system images, game images, and image files. Can be recognized by specific software and burned to disc.

The system image file contains operating system files, boot files, partition table information, etc., and is used for system installation and repair. The system image file can be understood as a clone file of all the data on the entire system installation CD, such as the original Microsoft system, or it can be Backup files of operating system partitions, such as ghost system images, generally the suffix of image files is .iso.

(2) Life cycle. The life cycle of the chip can be used to indicate the use cycle of the chip. For example, the life cycle can indicate that the chip is currently in the testing phase or the application phase. The testing phase is the phase where the performance of the chip is tested after the chip is produced. The application phase is the chip Enter the stage of application of electronic equipment.

A chip is a semiconductor component of an integrated circuit, which is widely used in various types of smart devices, such as smart terminal devices, smart home devices, smart cars, etc. A chip is usually composed of multiple intellectual property (IP) cores. Multiple IP cores are connected to the memory through a bus to interact with programs and data. Each IP core can be regarded as a pre-designed circuit function module used to implement corresponding functions. Among them, the IP core can be a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a multimedia subsystem (video subsystem), a camera subsystem ( camera subsystem), wireless access module (modem), display subsystem (display subsystem), etc.

By way of example, the structure of a chip can be shown in Figure 1 . In Figure 1, the CPU, multimedia subsystem, camera subsystem, display subsystem, GPU and wireless access module are connected to the memory through the bus.

As can be seen from Figure 1, the chip includes multiple IP cores, and the chip needs to go through multiple startup stages before it can complete the chip startup process. For example, the startup process of the system chip on the terminal device includes ONCHIPROM, FASHBOOT, TEEOS and other startup stages. . During the chip startup process, an image file needs to be started at each startup stage. In order to ensure the security of the image file, manufacturers usually store the encrypted image file in the chip when producing the chip. For example, the encrypted image file is stored in In the memory shown in Figure 1, therefore during the chip startup process, the encrypted image file needs to be decrypted before starting the image file.

At present, the more common chip startup method is to store the key in the chip in advance, such as storing the key in the memory shown in Figure 1, reading the key and decrypting the encrypted image file during the chip startup phase. Taking a system chip startup method as an example, during the chip encryption stage, a fixed key is burned into the system chip and the programmable fuse of the system chip is blown, thereby storing the fixed key into the system chip. During the startup phase of the system chip, the stored fixed key is read, multiple encrypted files are decrypted according to the fixed key, multiple image files are obtained, and multiple image files are started to complete the chip startup process. In this method, multiple encrypted files in the multiple startup phases of the chip all correspond to a set of the same fixed keys. However, the method of using the same key to decrypt all encrypted files in the chip startup phase is more secure. Low, once the key is leaked, all encrypted files will be decrypted, causing security risks.

Based on the above problems, embodiments of the present application provide a chip secure startup method and chip. In multiple startup phases of the chip, keys for decrypting encrypted files are generated. The keys corresponding to different startup phases can be different. This ensures the security of the chip startup process.

The embodiments of the present application can be applied to a variety of possible scenarios. For example, in the chip testing phase or the chip application phase, the chip secure startup method provided by the embodiments of the present application can be used. Optionally, a key generation module can be added to the chip during the chip design phase, or a key generation function can be added to an existing chip module such as the CPU as a key generation module. The key generation module is used for chip testing. Or during the chip application, the key used to decrypt the encrypted file is generated during the multiple startup stages of the chip. The keys in different startup stages can be different, so that the key does not need to be stored in the chip and can also be used during the chip startup process. Generating a key can decrypt encrypted files while ensuring the security of chip startup.

It can be seen from the above introduction that the chip startup process includes multiple startup stages. The following takes the first startup stage of the chip as an example to further introduce the chip startup method provided by the embodiment of the present application. The first startup stage is the multiple startup stages of the chip. any startup phase;.

FIG. 2 is a schematic structural diagram of a chip provided by an embodiment of the present application. Referring to FIG. 2 , the chip may include a key generation module and a processing module.

A key generation module, used to generate a first key corresponding to the first startup phase; the first key is different from the key corresponding to the second startup phase, and the second startup phase is the first startup phase among multiple startup phases. A start-up stage other than;

A processing module configured to decrypt the first encrypted file according to the first key during the first startup phase to obtain the first image file; start the first image file; wherein the first encrypted file is generated using the first key Encrypted.

In any startup phase of the chip, the image file corresponding to the startup phase needs to be started. For example, the audio image file and video image file need to be started in the startup phase of the multimedia subsystem of the chip. In the first startup stage, the first encrypted file needs to be decrypted to obtain the image file that needs to be started in the first startup stage. In the chip encryption stage, the first encrypted file is encrypted using the first key and then saved to the chip. middle. Therefore, during the first startup phase, a first key needs to be generated to decrypt the first encrypted file.

It should be noted that in the chip secure startup method provided by the embodiment of the present application, the keys corresponding to the encrypted files that need to be decrypted in different startup stages can be the same or different, but at least two startup stages have different keys. Specifically, the first key corresponding to the first startup phase is different from the key corresponding to the second startup phase, where the second startup phase may be one of the multiple startup phases of the chip other than the first startup phase, That is to say, in the chip secure startup method provided by the embodiment of the present application, a fixed key is not used to encrypt all image files that need to be started during the startup phase, thereby improving security.

In an optional implementation, during the chip encryption stage, different keys can be used to encrypt multiple image files with higher confidentiality levels, while the same key can be used for multiple image files with lower confidentiality levels. key for encryption. In specific implementation, the key can be flexibly used to encrypt the image file according to the image file that needs to be encrypted by the chip and the startup time of each startup stage of the chip.

The following is an introduction to the way in which the key generation module in the chip generates the first key in the chip secure startup method provided by the embodiment of the present application:

The key generation module generates the first key parameters corresponding to the first startup phase. The first key parameters are used to constitute the first key. Different key parameters can constitute different keys, and further, different keys can be generated by key parameters to get different keys.

Optionally, when the first startup phase is the first startup phase among multiple startup phases, the first key parameter is generated according to the preconfigured initial value and the second operation rule, where the preconfigured initial value may be The chip is stored in the chip. For example, assume that the preconfigured initial value is 001, assume that the second operation rule is an accumulation operation, and the accumulation value is 1, then the first key parameter is 010.

When the first startup phase is a startup phase other than the first startup phase among the multiple startup phases, the first key parameter is generated according to the key parameter corresponding to the previous startup phase of the first startup phase and the third operation rule. For example, assume that the key parameter corresponding to the previous startup phase of the first startup phase is 100, the third operation rule is an accumulation operation, and the accumulated value is 1, then the first key parameter is 101.

It should be noted that the second operation rule and the third operation rule may be the same. For example, the second operation rule and the third operation rule are both accumulation operations, but multiple keys calculated according to the second operation rule and the third operation rule The same key parameter does not exist in the parameters.

Taking the second operation rule and the third operation rule, both of which are set operation rules, as an example, the method of generating key parameters by the key generation module in the embodiment of the present application is further introduced: the key generation module can be based on the preconfigured initial value and set operation rules to generate at least one key parameter. Optionally, the preconfigured initial value can be programmed into the chip's fixed cache when the chip is produced to prevent the initial value from being tampered with, for example, by programming the preconfigured initial value into one-time programmable memory (EFUSE). middle. It should be noted that, in order to ensure that at least one key parameter generated is different, the operation rule is set to be an irreversible one-way calculation operation rule. For example, the set operation rule can be accumulation operation, accumulation subtraction operation, exponential operation, etc. , but the set operation rule cannot be an operation rule in which accumulation operation and accumulation operation are alternately performed. Therefore, the key parameter generated according to the chip secure startup method provided by the embodiment of the present application can also be called an irreversible factor, that is, when generating the key During the process of generating key parameters, no two identical key parameters will be generated, and the generation process of key parameters is irreversible.

For example, a 32-bit register in the key generation module can be used to generate key parameters. Assume that the preconfigured initial value is 0x00000001, the operation rule is set to accumulation operation, and the accumulation value is 1. During the startup phase, this register is enabled once and a key parameter can be obtained. For example, the first key parameter generated is 0x00000002, the second key parameter is 0x00000003... and so on. This register can support the generated key parameter. The last key parameter is 0xFFFFFFFF, that is, to ensure that any two generated key parameters are different, this register does not support flipping after accumulating to 0xFFFFFFFF.

Optionally, after obtaining the first key parameter, the key generation module may perform an operation on the first key parameter and the chip parameter according to the first operation rule to obtain the first key. The first operation rule may be, for example, a bit splicing operation, a shift operation, or a combination of a shift operation and a bit splicing operation. Optionally, when performing operations on the first key parameters and chip parameters, operations may be performed on all fields of the first key parameters and chip parameters, or operations may be performed on part of the fields of the first key parameters and chip parameters. to get the key parameters.

For example, when the first operation rule is a bit splicing operation, assuming that the first key parameter occupies 32 bits and the chip parameter occupies 16 bits, then after bit splicing the first key parameter and the chip parameter, a 48-bit first key.

For another example, when the first operation rule is a combination of a shift operation and a bit splicing operation, the first key parameter can be shifted by a set number of bits, and then the shifted first key parameter and the chip parameter can be bit-processed. Splicing.

It can be understood that in the embodiment of the present application, after the multiple key parameters and chip parameters are respectively calculated according to the first operation rule, the multiple key parameters obtained are all different. That is to say, the first operation rule cannot So that the same key parameters can be obtained after different key parameters and chip parameters are calculated. The above first operation rule is only used as an exemplary description. Any operation rule that can obtain different keys after operation on different key parameters and chip parameters is applicable, and the embodiments of the present application are not limited to this.

It should be noted that the chip parameters can be used to indicate the chip's life cycle, manufacturer, application manufacturer, application equipment and other information. For example, the chip parameters can include life cycle, public key hash value, application manufacturer identity document (original equipment manufacturer identity document). , OEM ID), application device identification (product ID), and register identification, where the life cycle is used to indicate the current use cycle of the chip. For example, the use cycle includes the testing phase and the application phase, which can be distinguished by the life cycle. The life cycle of the chip, so that different keys are used to encrypt the image file during the testing phase and application phase of the chip, further improving security; the public key hash value can be used to indicate the manufacturer of the chip; the OEM ID can be used to indicate the chip The manufacturer of the application; product ID can be used to indicate the product of the chip application; register identification is used to indicate the registers included in the chip, such as register type, register status, etc. During implementation, different keys can be generated by setting the specific content of the chip parameters, so that the chips correspond to different keys in different use cycles, different manufacturers, different application manufacturers, and different application products, further preventing key leakage.

After generating the first key, the key generation module sends the first key to the processing module, and the processing module decrypts the first encrypted file according to the first key to obtain the first image file. The processing module starts the first image file, thereby completing the first startup phase.

It can be understood that from the above introduction, the image files corresponding to several startup stages of the chip can be encrypted using the same key. Then, after the processing module obtains the key parameters and generates the key, it can separately In each startup phase, use this key to decrypt the encrypted file in each startup phase, and start the image file obtained after decryption.

Optionally, a startup phase of the chip may contain multiple sub-boot phases, and multiple image files need to be started. These multiple image files can correspond to the same key or different keys, that is to say , the first startup phase can correspond to multiple keys. For example, the first startup phase corresponds to a first key and a second key. The first key is used to decrypt the first encrypted file to obtain the first image file, and the second key is used to decrypt the first encrypted file to obtain the first image file. The key is used to decrypt the second encrypted file to obtain the second image file, and the first key and the second key are different. It can be understood that the second key parameters corresponding to the second key can be generated according to the first key parameters and the set operation rules. For the specific generation method of the second key, please refer to the above-mentioned generation method of the first key. Implementation, the repetitive parts will not be repeated.

In addition, when a startup phase contains multiple sub-boot phases, and the multiple sub-boot phases need to start the same image file, the key parameters corresponding to the image file can be stored in the chip during the chip production phase. When the chip startup process reaches this startup stage, in multiple sub-start stages, a key is generated according to the preconfigured key parameters, the encrypted file is decrypted according to the key, an image file is obtained, and the image file is started.

In a possible embodiment of this application, in order to prevent key leakage, in each startup phase of the chip, after starting the image file, the key corresponding to the startup phase is processed as an invalid key, for example, deleted The key may set all bit positions of the key to 0 or 1 so that the key cannot be used again, further ensuring the security of chip startup.

Optionally, the multiple stages of the chip startup process in the embodiment of the present application are not reversible. For example, assume that the chip startup process includes three startup phases (startup phase A, startup phase B, and startup phase C). After startup phase B ends, , can only enter startup phase C, but cannot enter startup phase A and startup phase B again. It can be understood from the foregoing that after each startup phase is completed, the key corresponding to the startup phase will be processed as an invalid key. That is to say, even if the previous startup phase is forcibly re-entered, because the corresponding key in the previous startup phase The key is invalid, these image files in the previous startup phase cannot be decrypted, and the previous startup phase cannot be restarted.

Optionally, after multiple startup phases of the chip are completed, some startup phases of the chip may need to be restarted. For example, the communication module of the chip may be powered on and off frequently, and the corresponding startup phase of the communication module needs to be restarted frequently. of restart. Of course, multiple startup phases of the current chip have been completed. The need to restart some startup phases does not mean that the entire chip needs to be restarted. When the chip is applied to a smart device, when the multiple startup phases of the chip are completed, the smart device has After the boot is completed, some startup stages of the chip need to be restarted, and the smart device does not need to be restarted. Assuming that the first startup phase is a startup phase that needs to be restarted after multiple startup phases are completed, during the chip production process, the target key parameters corresponding to the first startup phase can be stored in the memory of the chip. When the first startup phase needs to be restarted, the memory of the chip is directly read to obtain the target key parameters, so as to regenerate the first key corresponding to the first startup phase according to the target key parameters. According to the first key pair The first encrypted file corresponding to the first startup phase is decrypted to obtain the first image file, and the first image file is restarted to complete the restart of the first startup phase.

In an optional implementation, the key generation module of the chip in the embodiment of the present application can also be split into a key parameter generation module and an operation module. For example, Figure 3 is a schematic structural diagram of a chip. The chip includes a key Parameter generation module, operation module, processing module and storage module.

Among them, the storage module can be a one-time programmable memory (OTP) such as flash memory (FLASH) or EFUSE, or the storage module can be a non-volatile memory (non-volatile memory, NVM). The storage module can be used for Stores preconfigured initial values.

Based on the chip structure shown in Figure 3, a chip secure startup method provided by the embodiment of the present application includes the following steps. It is assumed that the chip startup process includes N startup stages:

S301: In response to the startup command, the key parameter generation module obtains the preconfigured initial value from the storage module.

S302: The key parameter module generates key parameters corresponding to the first startup phase based on the preconfigured initial value and the set operation rules.

For example, the key parameter generation module can be an irreversible one-way accumulation or one-way decrement counter Monotonic. Assume that the key parameter generation module is an accumulation calculator. After obtaining the preconfigured initial value, the key parameter module can Calculate the sum of the initial value and the accumulated value as the first key parameter. Each time the key parameter generation module is enabled, it performs a summation operation on the current value and the accumulated value to obtain the next key parameter.

S303: The key parameter module sends the calculated key parameters to the operation module.

S304: The operation module operates on the key parameters and chip parameters according to the first operation rule to obtain the key.

Optionally, when the first startup phase corresponds to multiple keys, the key parameter generation module can be enabled multiple times to obtain multiple key parameters, and the operation module can perform calculations on each key parameter and chip parameter respectively. , get multiple keys.

S305: The computing module sends the key to the processing module.

S306: The processing module decrypts the encrypted file corresponding to the first startup stage according to the key, obtains the image file, and starts the image file.

S307: The key parameter module generates key parameters corresponding to the current startup stage based on the current value and the set operation rule.

It can be understood that the current value in the key parameter module is the key parameter last generated by the key parameter module.

S308: The key parameter module sends the calculated key parameters to the operation module.

S309: The operation module operates on the key parameters and chip parameters according to the first operation rule to obtain the key.

S310: The computing module sends the key to the processing module.

S311: The processing module decrypts the encrypted file corresponding to the current startup stage according to the key, obtains the image file, and starts the image file.

Repeat S307 to S311 until all N startup phases of the chip are completed.

Exemplarily, the embodiment of the present application also provides a possible structure of a key parameter generation module. For example, Figure 4 is an exemplary structural schematic diagram of a key parameter generation module. The key generation module includes 4 memories. These four registers are: the first register, the second register, the third register and the fourth register. The functions of these four registers are introduced below:

The second register is a selection register, used to select the third register or the fourth register as the output register. When the second register is 0, the third register serves as the output register, and the key parameters generated by the third register are used to generate the key. ; When the second register is not 0, the fourth register serves as the output register, and the key parameters generated by the fourth register are used to generate the key.

The third register can be configured to any value that the register can support.

The fourth register is used to generate key parameters according to the set operation rules. For example, during the first startup phase of the chip, the preconfigured initial value is written into the fourth register. The fourth register can be based on the initial value and the set operation rules. Generate key parameters corresponding to the first startup phase. Once the software configuration is enabled, the fourth register performs an operation on the current value according to the set operation rules to obtain a key parameter.

The first register is a lock register, used to lock the second register, the third register and the fourth register after the chip completes multiple startup stages. For example, after writing the Magic value of the first register, the second register is clamped to 0, that is, the third register is selected as the output register, and the fourth register no longer generates key parameters.

In an optional implementation, the chip is powered on to start the startup process, the second register is written to set a non-zero value, the fourth register is selected as the output register, the initial value stored in the chip is written into the fourth register, and the software configures When enabled once, the fourth register performs an operation on the current value according to the set operation rules to obtain a key parameter. The fourth register outputs the generated key parameter, and the subsequent operation module calculates the key parameter according to the first operation rule. Perform calculations with chip parameters to generate a key. In the BOOTLOADER stage of the chip, all image files during the startup process of the chip are verified. After the verification passes, the first register initiates a lock. After locking, the second register is clamped to 0. At this time, the fourth register stops generating key parameters. , and the fourth register is no longer used as an output register. That is to say, after the multiple startup phases of the chip are completed, the key parameters can only be generated by configuring the third register and using the third register as an output register.

Optionally, the key parameter generation module shown in Figure 4 can also generate key parameters in the following two special scenarios:

Scenario 1: After the multiple boot phases of the chip are completed, the first boot phase requires a reboot.

The first startup phase is, for example, the TEEOS phase.

When it is determined that the first startup phase needs to be restarted, the target key parameters corresponding to the first startup phase are obtained from the memory of the chip, and the target key parameters are written into the third register. After the multiple startup phases of the chip are completed, the third One register initiates locking, and after locking, the second register is clamped to 0. At this time, the third register serves as the output register, and the third register can output the target key parameters. The operation module calculates the target key parameters and the sum according to the first operation rule. The chip parameters are calculated and the first key is regenerated. The processing module can decrypt the first encrypted file according to the first key to obtain the first image file, and the processor starts the first image file to complete the restart of the first startup phase.

Scenario 2: Multiple sub-boot stages included in one startup phase of the chip all need to start the same image file.

One startup phase of the chip may include multiple sub-boot phases, and some image files may need to be started in multiple sub-boot phases. For example, the first startup phase of the chip includes sub-boot phase A and sub-boot phase B, and the sub-boot phase Both stage A and sub-startup stage B need to start image file A, then during the chip production stage, the key parameter A corresponding to image file A is stored in the memory of the chip. In sub-start phase A, write the second register to 0, switch the third register as the output register, and keep the fourth register suspended. Read the key parameter A corresponding to the image file A from the memory of the chip, and write the key parameter A into the third register, so that the operation module can operate on the key parameter A and the chip parameter according to the first operation rule to generate Key A, the processing module can decrypt the encrypted file A according to the key A, obtain the image file A and start the image file A. Write a non-zero value to the second register and switch the fourth register as an output register.

Similarly, in sub-startup phase B, write the second register as 0, switch the third register as the output register, read the key parameter A corresponding to the image file A from the memory of the chip, and write the key parameter A into The third register, so that the operation module can operate on the key parameter A and the chip parameter according to the first operation rule to generate the key A. The processing module can decrypt the encrypted file A according to the key A, obtain the image file A and start the image. Document A. Write a non-zero value to the second register and switch the fourth register as an output register.

In an optional implementation manner of the embodiment of this application, after the computing module receives the key parameters sent by the key parameter generation module, it can also perform different processing on the received key parameters according to different output registers. For example, it can be preset that when the third register is used as an output register, the key parameter output by the third register is first processed, and then the key parameter after the first processing is calculated with the chip identification to obtain the key; and preset When the fourth register is used as an output register, a second process is performed on the key parameter output by the fourth register, and then the key parameter after the second process is calculated with the chip identification to obtain the key, where the first process and the second The processing can be scrambling processing or encryption processing, and the first processing and the second processing are different, thereby preventing unsafe problems caused by maliciously configuring the third register to the value generated by the fourth register during the chip startup process. By processing different The key parameter settings generated by the register are processed differently. Even if the third register is maliciously configured as a key parameter that can be generated by the fourth register, the corresponding key cannot be obtained based on the key parameter, further improving the chip startup security.

It should be noted that, when only the third register is set as the output register, the first processing is performed on the key parameter output by the third register, or when only the fourth register is set as the output register, the key parameter output by the fourth register is processed. The second processing performed on the key parameter can also achieve the above effect.

Based on the same inventive concept, embodiments of the present application provide a chip secure startup method. Referring to Figure 5, the method includes the following steps:

S501: Generate the first key corresponding to the first startup phase.

Wherein, the first startup phase is any one of the multiple startup phases of the chip; the first key is different from the key corresponding to the second startup phase, and the second startup phase is the multiple startup phases. One startup phase other than the first startup phase among the startup phases.

S502: In the first startup phase, decrypt the first encrypted file according to the first key to obtain the first image file.

Wherein, the first encrypted file is encrypted using the first key.

S503: Start the first image file.

In a possible design, generating a first key corresponding to the first startup phase includes: determining a first key parameter corresponding to the first startup phase, the first key parameter being the same as the first key parameter corresponding to the first startup phase. The key parameters corresponding to the two startup stages are different; the first key is generated according to the first key parameter.

In a possible design, generating the first key according to the first key parameter includes: performing an operation on the first key parameter and the chip parameter of the chip according to a first operation rule. , obtain the first key.

In one possible design, determining the first key parameter corresponding to the first startup phase includes: when the first startup phase is the first startup phase among the multiple startup phases, according to the preconfiguration The initial value and the second operation rule generate the first key parameter; or when the first startup phase is a startup phase other than the first startup phase among the multiple startup phases, according to the first startup phase The first key parameters are generated using the key parameters corresponding to the previous startup stage and the third operation rule.

In a possible design, the chip parameters include at least one of the following: a life cycle used to indicate the use cycle of the chip; a public key hash value used to indicate the chip manufacturer; the chip The application manufacturer identification; the application equipment identification of the chip; and the identification of the registers contained in the chip.

In a possible design, after starting the first image file, the method further includes: processing the first key as an invalid key;

After the multiple startup phases are completed, the method further includes: when the first startup phase needs to be restarted, re-determine the first key corresponding to the first startup phase according to the preconfigured target key parameters. Key; decrypt the first encrypted file according to the first key to obtain the first image file; restart the first image file.

In addition, other implementation methods in the method shown in Figure 5 can also refer to the relevant descriptions in Figures 2 to 4 above, and will not be described again here.

The steps of the method or algorithm described in the embodiments of this application can be directly embedded in hardware, a software unit executed by a processor, or a combination of the two. The software unit may be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, register, hard disk, removable disk, CD-ROM or any other form of storage medium in the art. For example, the storage medium can be connected to the processor, so that the processor can read information from the storage medium and can store and write information to the storage medium. Optionally, the storage medium can also be integrated into the processor. The processor and the storage medium can be installed in the ASIC, and the ASIC can be installed in the terminal device. Optionally, the processor and the storage medium may also be provided in different components in the terminal device.

These computer program instructions may also be loaded onto a computer or other programmable data processing device, causing a series of operating steps to be performed on the computer or other programmable device to produce computer-implemented processing, thereby executing on the computer or other programmable device. Instructions provide steps for implementing the functions specified in a process or processes of a flowchart diagram and/or a block or blocks of a block diagram.

Although the present application has been described in conjunction with specific features and embodiments thereof, it will be apparent that various modifications and combinations may be made without departing from the spirit and scope of the application. Accordingly, the specification and drawings are intended to be merely illustrative of the application as defined by the appended claims and are to be construed to cover any and all modifications, variations, combinations or equivalents within the scope of the application. Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. In this way, if these modifications and variations of the present application fall within the scope of the claims of the present application and its equivalent technology, the present application is also intended to include these modifications and variations.

Claims (14)

1. A chip, characterized in that the chip comprises a key generation module and a processing module;

   the key generation module is used for generating a first key corresponding to the first starting stage; wherein the first starting stage is any one of a plurality of starting stages of the chip; the first key is different from a key corresponding to a second starting stage, and the second starting stage is one starting stage except the first starting stage in the plurality of starting stages;

   the processing module is used for decrypting the first encrypted file according to the first key in the first starting stage to obtain a first image file; starting the first mirror image file; wherein the first encrypted file is encrypted using the first key.
2. The chip of claim 1, wherein the key generation module is specifically configured to:

   determining a first key parameter corresponding to the first starting stage, wherein the first key parameter is different from the key parameter corresponding to the second starting stage;

   and generating the first key according to the first key parameter.
3. The chip of claim 2, wherein the key generation module is specifically configured to:

   And operating the first key parameter and the chip parameter of the chip according to a first operation rule to obtain the first key.
4. A chip as claimed in claim 2 or 3, wherein the key generation module is specifically configured to:

   when the first starting stage is the first starting stage of the plurality of starting stages, generating the first key parameter according to a preset initial value and a second operation rule; or alternatively

   And when the first starting stage is a starting stage except for the first starting stage in the plurality of starting stages, generating the first key parameter according to the key parameter and a third operation rule corresponding to the previous starting stage of the first starting stage.
5. The chip of any one of claims 2 to 4, wherein the chip parameters include at least one of:

   a lifecycle for indicating a usage period of the chip;

   the public key hash value is used for indicating the chip manufacturer;

   the application manufacturer of the chip is identified;

   an application device identifier of the chip;

   register identification of registers contained in the chip.
6. The chip of any one of claims 1 to 5, wherein the processing module is further to:

   Processing the first key as an invalid key after the first image file is started;

   the key generation module is further configured to:

   after the starting phases are finished, when the first starting phase needs to be restarted, the first key corresponding to the first starting phase is redetermined according to a preset target key parameter;

   the processing module is further configured to:

   decrypting the first encrypted file according to the first key to obtain the first image file; restarting the first image file.
7. A chip security starting method applied to a chip, the method comprising:

   generating a first key corresponding to the first starting stage; the first starting stage is any one of a plurality of starting stages of the chip; the first key is different from a key corresponding to a second starting stage, and the second starting stage is one starting stage except the first starting stage in the plurality of starting stages;

   in the first starting stage, decrypting the first encrypted file according to the first key to obtain a first mirror image file; starting the first mirror image file; wherein the first encrypted file is encrypted using the first key.
8. The method of claim 7, wherein the generating the first key corresponding to the first startup phase comprises:

   determining a first key parameter corresponding to the first starting stage, wherein the first key parameter is different from the key parameter corresponding to the second starting stage;

   and generating the first key according to the first key parameter.
9. The method of claim 8, wherein the generating the first key from the first key parameter comprises:

   and operating the first key parameter and the chip parameter of the chip according to a first operation rule to obtain the first key.
10. The method according to claim 8 or 9, wherein said determining a first key parameter corresponding to the first start-up phase comprises:

    when the first starting stage is the first starting stage of the plurality of starting stages, generating the first key parameter according to a preset initial value and a second operation rule; or alternatively

    And when the first starting stage is a starting stage except for the first starting stage in the plurality of starting stages, generating the first key parameter according to the key parameter and a third operation rule corresponding to the previous starting stage of the first starting stage.
11. The method of any of claims 8 to 10, wherein the chip parameters include at least one of:

    a lifecycle for indicating a usage period of the chip;

    the public key hash value is used for indicating the chip manufacturer;

    the application manufacturer of the chip is identified;

    an application device identifier of the chip;

    the chip contains an identification of the register.
12. The method of any one of claims 7 to 11, wherein after the first image file is started, the method further comprises:

    processing the first key as an invalid key;

    after the plurality of start-up phases are over, the method further comprises:

    when the first starting stage needs to be restarted, the first key corresponding to the first starting stage is redetermined according to a preconfigured target key parameter;

    decrypting the first encrypted file according to the first key to obtain the first image file; restarting the first image file.
13. A computer readable storage medium comprising instructions which, when run on a computer, cause the computer to perform the method of any of claims 7 to 12.
14. A computer program product, characterized in that it, when run on a computer, causes the computer to perform the method of any of claims 7 to 12.