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CN115940948A - Calibration method, storage medium, calibration device and chip of analog-to-digital converter - Google Patents

Calibration method, storage medium, calibration device and chip of analog-to-digital converter Download PDF

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CN115940948A
CN115940948A CN202211527238.0A CN202211527238A CN115940948A CN 115940948 A CN115940948 A CN 115940948A CN 202211527238 A CN202211527238 A CN 202211527238A CN 115940948 A CN115940948 A CN 115940948A
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code value
test
voltage
deviation
analog
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李黎明
程树东
江玮
张楠赓
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Hangzhou Canaan Creative Information Technology Ltd
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Hangzhou Canaan Creative Information Technology Ltd
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Abstract

The invention provides a calibration method, a storage medium, a calibration device and a chip of an analog-to-digital converter. The calibration method comprises the steps of receiving an output code value converted by an analog-to-digital converter according to an input signal; and acquiring a calibration coefficient corresponding to the output code value, and calibrating the output code value according to the calibration coefficient. According to the calibration method, a better linear relation can be formed between digital output and analog input in the full range of the amplitude of the input signal of the analog-to-digital converter, and deviation of the digital output caused by inconsistent offset voltages under different input voltages can be better calibrated.

Description

Calibration method, storage medium, calibration device and chip of analog-to-digital converter
Technical Field
The present invention relates to a calibration method for an analog-to-digital converter, and more particularly, to a calibration method, a storage medium, a calibration apparatus, and a chip for an analog-to-digital converter that perform calibration over a full range of input signal amplitudes.
Background
With the development of information technology and material engineering technology, the feature size of integrated circuit devices is gradually reduced, the performance is better and better, the working frequency is higher and higher, and successive approximation analog-to-digital converters (SAR-ADCs) are also widely applied and become important components of digital-to-analog hybrid systems.
The successive approximation type analog-to-digital converter realizes quantization by continuously reducing the range of an analog input signal by adopting a binary search algorithm, thereby having the advantages of low power consumption and small area. An ideal analog-to-digital converter has a fixed gain for the analog input voltage and the digital output value, i.e. they are linear. However, in practical applications, due to the influence of various factors such as process deviation, circuit limitations, environmental noise and the like, the analog-to-digital converter has several common defects such as offset error, gain error, linearity error and the like, which seriously affect the conversion accuracy and practical applications of the analog-to-digital converter.
For successive approximation analog-to-digital converters, there are many calibration methods developed based on the internal capacitor array (CDAC). The traditional calibration method requires a separate calibration DAC array for each capacitor to be calibrated, so the required capacitors of all calibration arrays are often equivalent to the area of the capacitor array (CDAC) of the calibration method, and the algorithm implemented by the calibration method occupies a large amount of resources of a digital circuit, which results in much higher cost and complexity of a chip.
Disclosure of Invention
In order to solve the above problems, the present invention provides a calibration method, a storage medium, a calibration apparatus, and a chip for an analog-to-digital converter, which can make a better linear relationship between a digital output and an analog input in a full range of the amplitude of an input signal, and solve the deviation of the digital output caused by the inconsistency of offset voltages under different input voltages.
In order to achieve the above object, the present invention provides a calibration method of an analog-to-digital converter, including: receiving an output code value converted by the analog-to-digital converter according to an input signal; and acquiring a calibration coefficient corresponding to the output code value, and calibrating the output code value according to the calibration coefficient.
In the above method, the step of obtaining a calibration coefficient corresponding to the output code value and calibrating the output code value according to the calibration coefficient includes:
determining a preset code value range corresponding to the output code value;
and calibrating the output code value according to the calibration coefficient corresponding to the preset code value range to obtain calibration data.
In the above method, the preset code value range includes a value smaller than a reference code value, or a value greater than or equal to the reference code value;
the step of calibrating the output code value according to the calibration coefficient corresponding to the preset code value range to obtain calibration data includes:
when the output code value is smaller than the reference code value, calibrating the output code value according to a first calibration coefficient and the reference code value to obtain calibration data;
and when the output code value is larger than or equal to the reference code value, calibrating the output code value according to a second calibration coefficient and the reference code value to obtain the calibration data.
The method described above, wherein, further comprising:
the first calibration coefficient and the second calibration coefficient are predetermined prior to receiving the input signal.
The method above, wherein the step of predetermining the first calibration coefficient and the second calibration coefficient comprises:
acquiring a first test code value and a first target test code value according to the first test voltage;
calculating to obtain a first calibration coefficient according to the first test code value, the first target test code value and the reference code value;
acquiring a second test code value and a second target test code value according to the second test voltage;
and calculating to obtain a second calibration coefficient according to the second test code value, the second target test code value and the reference code value.
In the method, the step of obtaining the first test code value and the first target test code value according to the first test voltage includes:
receiving the first test code value converted by the analog-to-digital converter according to the first test voltage;
acquiring the first target test code value corresponding to the first test voltage.
In the method, the step of receiving the first test code value converted by the analog-to-digital converter according to the first test voltage includes:
sampling the output code value obtained by the analog-to-digital converter through conversion according to the first test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the first test code value.
In the above method, the step of obtaining the second test code value and the second target test code value according to the second test voltage includes:
receiving a second test code value converted by the analog-to-digital converter according to the second test voltage;
acquiring the second target test code value corresponding to the second test voltage.
In the method, the step of receiving the second test code value converted by the analog-to-digital converter according to the second test voltage includes:
sampling the output code value obtained by the analog-to-digital converter according to the conversion of the second test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the second test code value.
In the above method, the step of calculating a first calibration coefficient according to the first test code value, the first target test code value, and the reference code value includes:
obtaining a first reference deviation according to the first target test code value and the reference code value;
obtaining a first test deviation according to the first test code value and the reference code value;
obtaining a first deviation according to the first reference deviation and the first test deviation;
calculating to obtain the first calibration coefficient according to the first deviation and the first reference deviation; wherein
The first calibration factor = 1/(1 + first deviation/first reference deviation).
In the above method, the step of calculating a second calibration coefficient according to the second test code value, the second target test code value, and the reference code value includes:
obtaining a second reference deviation according to the second target test code value and the reference code value;
obtaining a second test deviation according to the second test code value and the reference code value;
obtaining a second deviation according to the second reference deviation and the second test deviation;
calculating to obtain the second calibration coefficient according to the second deviation and the second reference deviation; wherein
The second calibration factor = 1/(1 + second deviation/second reference deviation).
In the above method, the step of calibrating the output code value according to the first calibration coefficient and the reference code value to obtain calibration data includes:
calibration data = reference code value-first calibration coefficient (reference code value-output code value).
In the above method, the step of calibrating the output code value according to the second calibration coefficient and the reference code value to obtain calibration data includes:
calibration data = reference code value + second calibration coefficient (reference code value-output code value).
The method above, wherein the reference code value corresponds to a reference input voltage, is smaller than the reference input voltage configuration in a first voltage interval, and is greater than or equal to the reference input voltage configuration in a second voltage interval; wherein,
the first test voltage is located in the first voltage interval, and the second test voltage is located in the second voltage interval.
The method as described above, wherein the first test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a second voltage interval.
The method above, wherein the first test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a second voltage interval.
The method as above, wherein the first test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a first voltage interval, and the second test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a second voltage interval; or
The first test voltage corresponds to the voltage of the input signal with the minimum code value deviation ratio in a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a second voltage interval.
The method above, wherein the first test voltage corresponds to a voltage of the input signal with a mean code value deviation ratio within a first voltage interval; the second test voltage corresponds to a voltage of the input signal at a mean code value deviation ratio over a second voltage interval.
The method as above, wherein the method further comprises determining the code value deviation ratio:
acquiring a target code value corresponding to an input signal of an analog-digital converter;
calculating to obtain a code value deviation ratio according to the target code value and the output code value of the analog-to-digital converter; wherein
Code value deviation ratio = | target code value-output code value |/target code value.
In order to better achieve the above object, the present invention further provides a calibration method for an analog-to-digital converter, including: acquiring a corresponding test code value and a target test code value according to the test voltage;
calculating according to the test code value, the target test code value and the reference code value to obtain a calibration coefficient;
and calibrating the output code value of the analog-to-digital converter according to the calibration coefficient and the reference code value.
The method above, wherein the test voltage comprises a first test voltage and a second test voltage; wherein
The step of obtaining the corresponding test code value and the target test code value according to the test voltage comprises the following steps:
acquiring a first test code value and a first target test code value according to the first test voltage;
and acquiring a second test code value and a second target test code value according to the second test voltage.
In the above method, the step of calculating a calibration coefficient according to the test code value, the target test code value, and the reference code value includes:
calculating to obtain a first calibration coefficient according to the first test code value, the first target test code value and the reference code value;
and calculating to obtain a second calibration coefficient according to the second test code value, the second target test code value and the reference code value.
In the method, the step of obtaining the first test code value and the first target test code value according to the first test voltage includes:
receiving the first test code value converted by the analog-to-digital converter according to the first test voltage;
a first target test code value corresponding to the first test voltage is obtained.
In the method, the step of receiving the first test code value converted by the analog-to-digital converter according to the first test voltage includes:
sampling the output code value obtained by the analog-to-digital converter according to the first test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the first test code value.
In the above method, the step of obtaining the second test code value and the second target test code value according to the second test voltage includes:
receiving a second test code value converted by the analog-to-digital converter according to the second test voltage;
acquiring the second target test code value corresponding to the second test voltage.
In the method, the step of receiving the second test code value converted by the analog-to-digital converter according to the second test voltage includes:
sampling the output code value obtained by the analog-to-digital converter according to the conversion of the second test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the second test code value.
In the above method, the step of calculating a first calibration coefficient according to the first test code value, the first target test code value, and the reference code value includes:
obtaining a first reference deviation according to the first target test code value and the reference code value;
obtaining a first test deviation according to the first test code value and the reference code value;
obtaining a first deviation according to the first reference deviation and the first test deviation;
calculating to obtain the first calibration coefficient according to the first deviation and the first reference deviation; wherein
The first calibration coefficient = 1/(1 + first deviation/first reference deviation).
In the above method, the step of calculating a second calibration coefficient according to the second test code value, the second target test code value and the reference code value includes:
obtaining a second standard deviation according to the second target test code value and the reference code value;
obtaining a second test deviation according to the second test code value and the reference code value;
obtaining a second deviation according to the second reference deviation and the second test deviation;
calculating to obtain the second calibration coefficient according to the second deviation and the second reference deviation; wherein
The second calibration coefficient = 1/(1 + second deviation/second reference deviation).
The method above, wherein the reference code value corresponds to a reference input voltage, wherein a voltage interval smaller than the reference input voltage is defined as a first voltage interval, and a voltage interval greater than or equal to the reference input voltage is defined as a second voltage interval;
the first test voltage is located in the first voltage interval, and the second test voltage is located in the second voltage interval.
The method above, wherein the first test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a first voltage interval; the second test voltage corresponds to a voltage of the input signal having a largest code value deviation ratio in a second voltage interval.
The method above, wherein the first test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a second voltage interval.
The method as described above, wherein the first test voltage corresponds to the voltage of the input signal having the largest code value deviation ratio in a first voltage interval, and the second test voltage corresponds to the voltage of the input signal having the smallest code value deviation ratio in a second voltage interval; or
The first test voltage corresponds to the voltage of the input signal with the minimum code value deviation ratio in a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a second voltage interval.
The method as described above, wherein the first test voltage corresponds to a voltage of the input signal of a mean code value deviation ratio within a first voltage interval; the second test voltage corresponds to a voltage of the input signal at a mean code value deviation ratio over a second voltage interval.
The method as described above, wherein the method further comprises:
acquiring a target code value corresponding to the input signal;
calculating to obtain a code value deviation ratio according to the target code value and the output code value; wherein
Code value deviation ratio = | target code value-output code value |/target code value.
In order to better achieve the above object, the present invention further provides a storage medium for storing a computer program, wherein the computer program is used for executing any one of the calibration methods as described above.
In order to better achieve the above object, the present invention further provides a calibration apparatus for an analog-to-digital converter, comprising a processing unit; a storage medium as described above; the computer program, when being executed by the processing unit, is operable to carry out any one of the calibration methods as described above.
In order to better achieve the above object, the present invention further provides a chip comprising at least one calibration device as described above.
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Drawings
Fig. 1 is a schematic circuit diagram of an analog-to-digital converter according to an embodiment of the invention.
Fig. 2 is a schematic circuit diagram of an analog-to-digital conversion unit according to an embodiment of the invention.
Fig. 3 is a flowchart illustrating a calibration method according to an embodiment of the invention.
FIG. 4 is a flowchart of step S1 according to an embodiment of the present invention.
FIG. 5 is a flowchart of step S12 according to an embodiment of the present invention.
Fig. 6 is a flowchart of step S122 according to an embodiment of the present invention.
FIG. 7 is a flowchart of step S14 according to an embodiment of the present invention.
Fig. 8 is a flowchart of step S142 according to an embodiment of the present invention.
FIG. 9 is a graphical illustration of a code value deviation ratio curve according to an embodiment of the present invention.
FIG. 10 is a diagram illustrating a deviation ratio curve of code values according to another embodiment of the present invention.
Detailed Description
The structural and operational principles of the present invention are described in detail below with reference to the accompanying drawings:
certain terms are used throughout the description and following claims to refer to particular components. As one of ordinary skill in the art will appreciate, manufacturers may refer to a component by different names. This specification and the claims that follow do not intend to distinguish between components that differ in name but not function.
In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. In addition, the term "connected" is intended to encompass any direct or indirect electrical connection. Indirect electrical connection means include connection by other means.
In an embodiment of the invention, a single-point calibration method is used, i.e., offset calibration is performed according to a specific input voltage value. For example, offset calibration is performed when the input signal corresponds to a digital output of the analog-to-digital converter that is intermediate. However, for the Full range (Full-Scale) of the input signal, for example, when the input signal corresponds to the digital output of the adc being the minimum or maximum value, the offset value used for the calibration at the middle value is difficult to be completely matched and cancelled, thereby causing the offset calibration technique to fail when the input signal is lower or higher.
Therefore, the embodiment of the present invention further provides a calibration method for an analog-to-digital converter, which can enable a better linear relationship between a digital output and an analog input of the analog-to-digital converter in a full range of the amplitude of an input signal, and solve the deviation of the digital output caused by the inconsistency of offset voltages under different input voltages.
Fig. 1 is a schematic circuit diagram of an analog-to-digital converter according to an embodiment of the present invention, and fig. 2 is a schematic circuit diagram of an analog-to-digital conversion unit according to an embodiment of the present invention. As shown in fig. 1 and 2, the analog-to-digital converter 200 of the present invention includes a first input terminal SIGINN, a second input terminal SIGINN, a reference voltage terminal VREF, output terminals B1 to Bn, and an analog-to-digital conversion unit 201. The adc unit 201 obtains an output code value according to the input signal Vip of the first input terminal SIGINN, the input signal Vin of the second input terminal SIGINN, and the reference voltage VREF of the reference voltage terminal VREF, where the output code value corresponds to n-bit binary digits, that is, the output code values output by the output terminals B1 to Bn are from 0 to (2) n -1).
In the present invention, the minimum output code value of 0 and the maximum output code value of 2 n In the present invention, the reference code value Data _ ref is obtained by inputting the reference input voltage Vin _ ref under an ideal operating state of the analog-to-digital converter 200, and the reference code value Data _ ref is obtained by electrically connecting the second input terminal SIGINN of the analog-to-digital converter 200 to the reference voltage terminal VREF and the first input terminal SIGINN is obtained by connecting the reference input voltage Vin _ ref to the second input terminal SIGINN of the analog-to-digital converter 200.
Of course, the reference code value may be arbitrarily selected, and may also be an intermediate code value. For example, n is 12, the output code value of the adc 200 is between 0 and 4095, and the reference code value may be 1024, 3072, or the intermediate code value 2048.
For the analog-to-digital converter with more bits output, in order to further improve the calibration precision of the analog-to-digital converter, the reference code values can be selected to be multiple, for example, m reference code values, data _ ref1, data _ ref2, data _ 8230, data _ refm, wherein the m reference code values divide the output code value into multiple (m + 1) preset code value ranges, 0-Data _ ref1, data _ ref1-Data _ ref2, \8230, data _ refm-4095, the input voltage of the input signal corresponding to the output code value divides the input voltage of the input signal into m +1 voltage intervals, 0-Vin _ ref1, vin _ ref1-Vin _ ref2, \\\ 8230, and Vin _ ref (m-1) -Vin _ refm, and Vin _ refm-VDD.
Correspondingly, the test voltages are also selected to be m +1, and one test voltage is selected from each voltage interval of Vin _1, vin _2, and/or 8230, vin _ m +1, namely m +1 voltage intervals. A calibration factor can be calculated from each test voltage, and therefore, the determined calibration factors are m +1, coeff _1, \ 8230and coeff _ m +1. The following description will use one reference code value and two calibration coefficients corresponding to the reference code value as an example, but the invention is not limited thereto.
It should be noted that, the working voltage of the analog-to-digital converter 200 of the present invention is set to VDD, the reference voltage Vref is VDD/2, and when the second input terminal SIGINN is electrically connected to the reference voltage Vref and the second input terminal SIGINN is electrically connected to the reference voltage Vref, the output code value outputted at this time is the intermediate code value Data _ mid. In the present invention, the intermediate code value Data _ mid is an intermediate code value of the analog-to-digital converter 200 in an ideal working state, where n is 12 for example, and the intermediate code value Data _ mid of the analog-to-digital converter 200 is 2048.
The calibration method of the present invention is only explained by taking the analog-to-digital converter shown in fig. 1 and fig. 2 as an example, and can also be applied to other types of analog-to-digital converters, and the present invention is not limited thereto. The specific circuit structures of the analog-to-digital converter 200 and the analog-to-digital conversion unit 201 are not described herein again.
Fig. 3 to 8 are schematic flowcharts illustrating a calibration method according to an embodiment of the invention. Referring to fig. 1-3, a calibration method 100 for an analog-to-digital converter of the present invention includes the following steps:
and S2, receiving the input signal and acquiring an output code value. The analog-to-digital converter 200 receives an analog input signal and converts the input signal to obtain a digital output code value.
And S3, acquiring a calibration coefficient corresponding to the output code value. Judging a preset code value range corresponding to the output code value obtained by the analog-to-digital converter 200, wherein the output code value is smaller than the reference code value Data _ ref, or the output code value is larger than or equal to the reference code value Data _ ref, selecting a calibration coefficient corresponding to the preset code value range according to a judgment result, and adopting different calibration modes respectively.
And S4, calibrating. When the output code value obtained after the conversion by the analog-to-digital converter 200 is smaller than the reference code value Data _ ref, calibrating the output code value output by the analog-to-digital converter 200 according to the first calibration coefficient coeff _ low to obtain calibration Data; when the output code value obtained after the conversion by the analog-to-digital converter 200 is greater than the reference code value Data _ ref, the output code value is calibrated according to the second calibration coefficient coeff _ high to obtain calibration Data.
Based on the above, in the invention, different test voltages are selected, calibration coefficients in different preset code value ranges corresponding to the output code values are determined, and calibration is respectively performed, so that a better linear relation is formed between digital output and analog input in the full range of the amplitude of the input signal, and the deviation of the digital output caused by the inconsistency of offset voltages is solved under different input voltages.
In the present invention, a step S1 of determining a calibration coefficient may be further added before receiving the input signal. The calibration coefficients include a first calibration coefficient coeff _ low and a second calibration coefficient coeff _ high; before calibration, a first calibration code value adj _ low and a second calibration code value adj _ high are obtained through calculation according to the first calibration coefficient coeff _ low or the second calibration coefficient coeff _ high. The calibration coefficients and calibration code values may be stored in memory for recall during calibration.
Specifically, with reference to fig. 1 and 4, the step S1 of determining the calibration coefficient further includes:
s11, receiving a first test voltage, and acquiring a first test code value. The adc 200 receives the first test voltage Vin _ low, and converts the first test voltage Vin _ low to obtain a first test code value Data _ low, that is, an output code value actually output by the adc 200 before calibration. The first test code value Data _ low is obtained by electrically connecting the second input terminal SIGINN of the analog-to-digital converter 200 to the reference voltage terminal VREF, and the first input terminal SIGINN is connected to the first test voltage Vin _ low.
And S12, calculating to obtain a first calibration coefficient. According to the first test code value Data _ low and the reference code value Data _ ref of the analog-to-digital converter 200, a first calibration coefficient coeff _ low is calculated.
And S13, receiving a second test voltage and acquiring a second test code value. The analog-to-digital converter 200 receives the second test voltage Vin _ high and converts the second test voltage Vin _ high to obtain a second test code value Data _ high, that is, an output code value actually output by the analog-to-digital converter 200 before calibration. The second test code value Data _ high is obtained by electrically connecting the second input terminal SIGINN of the analog-to-digital converter 200 to the reference voltage terminal VREF, and the second input terminal SIGINN is connected to the second test voltage Vin _ low.
And S14, calculating to obtain a second calibration coefficient. The second calibration coefficient coeff _ high is calculated according to the second test code value Data _ high and the reference code value Data _ ref of the analog-to-digital converter 200.
In the present invention, the first test voltage Vin _ low is between 0-Vin _ ref, i.e. located in the first voltage interval 0-Vin _ ref, the second test voltage Vin _ high is between Vin _ ref-VDD, i.e. located in the second voltage interval Vin _ ref-VDD, and accordingly, the output code value corresponding to the first test voltage Vin _ low is between the minimum value and the reference code value Data _ ref, and the output code value corresponding to the second test voltage Vin _ high is between the reference code value Data _ ref and the maximum value.
As further shown in fig. 5, the step S12 of calculating the first calibration coefficient further includes:
s121, acquiring a first target test code value. For an analog-to-digital converter that is not mismatched and ideal, each input signal corresponds to an ideal output code value. The ideal output code value corresponding to the first test voltage Vin _ low, i.e. the first target test code value, is Data _ ideal _ low.
And S122, calculating to obtain a first calibration coefficient. And calculating a first calibration coefficient coeff _ low according to the first test code value Data _ low and the first target test code value Data _ ideal _ low.
As further shown in fig. 6, the step S122 of calculating the first calibration coefficient further includes:
s122-1, acquiring a first reference deviation. According to the first target test code value Data _ ideal _ low and the reference code value Data _ ref, a first standard deviation Data _ dev _ ideal _ low is obtained. Wherein:
Data_dev_ideal_low=|Data_ref-Data_ideal_low|。
s122-2, acquiring a first test deviation. A first test deviation Data _ dev _ low is obtained according to the first test code value Data _ low and the reference code value Data _ ref. Wherein:
Data_dev_low=|Data_ref-Data_low|。
and S122-3, calculating to obtain a first deviation. And obtaining a first deviation Data _ err _ low according to the first reference deviation Data _ ideal _ low and the first test deviation Data _ dev _ low. Wherein:
Data_err_low=|Data_dev_low-Data_ideal_low|。
and S122-4, calculating to obtain a first calibration coefficient. And calculating a first calibration coefficient coeff _ low according to the first deviation Data _ err _ low. Wherein:
coeff_low=1/(1+Data_err_low/Data_dev_ideal_low)。
similarly, as shown in fig. 7, the step S14 of calculating the second calibration coefficient further includes:
and S141, acquiring a second target test code value. For an analog-to-digital converter that is not mismatched and ideal, each input signal corresponds to an ideal output code value. The ideal output code value corresponding to the second test voltage Vin _ high, i.e., the second target test code value, is Data _ ideal _ high.
And S142, calculating to obtain a second calibration coefficient. A second calibration coefficient coeff _ high is calculated according to the second test code value Data _ high and the second target test code value Data _ ideal _ high.
As further shown in fig. 8, the step S142 of calculating the second calibration coefficient further includes:
s142-1, acquiring a second reference deviation. A second standard deviation Data _ dev _ ideal _ high is obtained according to the second target test code value Data _ ideal _ high and the reference code value Data _ ref. Wherein:
Data_dev_ideal_high=|Data_ideal_high-Data_ref|。
and S142-2, acquiring a second test deviation. A second test deviation Data _ dev _ high is obtained according to the second test code value Data _ high and the reference code value Data _ ref. Wherein:
Data_dev_high=|Data_mid-Data_high|。
and S142-3, calculating to obtain a second deviation. And obtaining a second deviation Data _ err _ high according to the second reference deviation Data _ ideal _ high and the second test deviation Data _ dev _ high. Wherein:
Data_err_high=|Data_dev_high-Data_ideal_high|。
and S142-4, calculating to obtain a second calibration coefficient. And calculating to obtain a second calibration coefficient coeff _ high according to the second deviation Data _ err _ high. Wherein:
coeff_high=1/(1+Data_err_high/Data_dev_ideal_high)。
during normal operation of the analog-to-digital converter 200, it needs to be calibrated. The analog-to-digital converter 200 receives an input signal. The input signals comprise a first input signal and a second input signal.
Specifically, with reference to fig. 1 and 3, the step S5 of calculating the calibration code value further includes:
the analog-to-digital converter 200 performs conversion according to the received first input signal, and obtains a first output code value Data1, where the first output code value Data1 is smaller than the reference code value Data _ ref, and at this time, the first calibration code value adj _ low is calculated according to the first calibration coefficient coeff _ low. Wherein:
adj_low=coeff_low*(Dataref-Data1)。
and calibrating the first output code value Data1 according to the first calibration code value adj _ low to obtain first calibration Data _ calc _ low. Wherein:
Data_calc_low=Data_mid-adj_low。
similarly, the analog-to-digital converter 200 performs conversion according to the received second input signal to obtain a second output code value Data2, where the second output code value Data2 is greater than or equal to the reference code value Data _ ref, and at this time, the second calibration code value adj _ high is calculated according to the second calibration coefficient coeff _ low. Wherein:
adj_high=coeff_high*(Data2-Data_mid)。
and calibrating the second output code value Data2 according to the second calibration code value adj _ high to obtain second calibration Data _ calc _ high. Wherein:
Data_calc_high=Data_mid+adj_high。
of course, based on the above method, a plurality of calibration code values may also be obtained by using a plurality of test voltages, and the calibration may be performed on the output code values in a segmented manner. The invention is not limited thereto.
In the invention, the output code value and the test code value can be obtained by taking an average value after multiple times of sampling, so as to improve the accuracy of the code value, which is not limited by the invention.
How to select the test voltage can be done in the following manner.
For an ideal analog-to-digital converter, there is a linear relationship between the output code value and the input, i.e., OUT = K × IN. Due to the offset voltage between the various implementation blocks of the analog-to-digital converter, the linearity of the output and the input is reduced, i.e. there is a mismatch.
For any input signal value Vin, the output code value of the analog-to-digital converter is Yadc; and calculating the ideal output code value of the analog-to-digital converter as Yideal according to an ideal linear relation formula. The deviation between the actual output code value Yadc and the ideal output code value Yideal is yrer = | Yadc-Yideal |; the percentage of the deviation value to the ideal output code value Yideal is defined as the code value deviation ratio yirr _ ratio, where yirr _ ratio = yirr/Yideal 100%.
From the input-output curve of the first voltage interval or the second voltage interval, a curve of the code value deviation ratio yrer _ ratio with the input IN the first voltage interval or the second voltage interval, respectively, can be obtained.
FIG. 9 is a diagram illustrating a code value deviation ratio curve according to an embodiment of the present invention. As shown IN fig. 9, when the curve of the code value deviation ratio yrer _ ratio with respect to the input IN is a straight line, and the corresponding code value deviation ratio is constant K for any input signal Vin, i.e., yrer _ ratio = K, the first test voltage Vin _ low and the second test voltage Vin _ high can respectively select any value within the first voltage interval 0-Vin _ ref and the second voltage interval Vin _ ref-VDD.
For the case that the curve of the code value deviation ratio yrer _ ratio and the input IN is not a straight line, the selection method of the first test voltage Vin _ low will be described IN detail by taking the first voltage interval as an example, and the selection method of the second test voltage Vin _ high is the same as the selection method of the first test voltage Vin _ low, and will not be described again.
FIG. 10 is a graphical illustration of a code value deviation ratio curve according to another embodiment of the present invention. As shown in FIG. 10, in the first voltage interval 0-Vin _ ref, the code value deviation ratio Yerr _ ratio is in the form of fluctuation having a maximum value Yerr _ ratio _ max and a minimum value Yerr _ ratio _ min, at which time, the voltage value Vin _ max of the input signal corresponding to the code value deviation ratio maximum value Yerr _ ratio _ max can be selected as the first test voltage Vin _ low, and the voltage value Vin _ min of the input signal corresponding to the code value deviation ratio minimum value Yerr _ ratio _ min can also be selected as the first test voltage Vin _ low.
Of course, the voltage value Vin _ min of the input signal corresponding to the code value deviation ratio average value yrer _ ratio _ ave may also be used as the first test voltage Vin _ low. The code value deviation ratio average value Yerr _ ratio _ ave can be obtained by averaging the code value deviation ratio maximum value Yerr _ ratio _ max and the code value deviation ratio minimum value Yerr _ ratio _ min, that is
Yerr_ratio_ave=(Yerr_ratio_max+Yerr_ratio_min)/2。
The deviation ratios of all code values in the first voltage interval may be averaged, and the invention is not limited thereto.
Based on the above, in the invention, by selecting a plurality of different test voltages, different preset code value ranges of the output code values are determined, the calibration coefficient in each preset code value range is calculated, and the output code values in the different preset code value ranges are respectively calibrated according to different calibration coefficients, so that a better linear relation between digital output and analog input can be obtained in the full range of the amplitude of the input signal, and the deviation of the digital output caused by the inconsistency of offset voltages can be solved under different input voltages.
In order to better achieve the above object, the present invention further provides a storage medium for storing a computer program, wherein the computer program is used for executing any one of the calibration methods as described above.
In order to better achieve the above object, the present invention further provides a calibration apparatus for an analog-to-digital converter, comprising a processing unit; a storage medium as described above; the computer program, when being executed by the processing unit, is operable to carry out any one of the calibration methods as described above.
In order to better achieve the above object, the present invention further provides a chip comprising at least one calibration device as described above.
It should be noted that in the description of the present invention, the terms "lateral", "longitudinal", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In other words, the present invention may have other embodiments, and those skilled in the art can make various corresponding changes and modifications according to the present invention without departing from the spirit and the essence of the present invention, and these corresponding changes and modifications should fall within the protection scope of the appended claims.

Claims (37)

1. A method for calibrating an analog-to-digital converter, comprising:
receiving an output code value converted by the analog-to-digital converter according to an input signal;
and acquiring a calibration coefficient corresponding to the output code value, and calibrating the output code value according to the calibration coefficient.
2. The method of claim 1, wherein said step of obtaining a calibration coefficient corresponding to said output code value and calibrating said output code value based on said calibration coefficient comprises:
determining a preset code value range corresponding to the output code value;
and calibrating the output code value according to the calibration coefficient corresponding to the preset code value range to obtain calibration data.
3. The method of claim 2, wherein the preset range of code values comprises less than a reference code value, or greater than or equal to the reference code value;
the step of calibrating the output code value according to the calibration coefficient corresponding to the preset code value range to obtain calibration data includes:
when the output code value is smaller than the reference code value, calibrating the output code value according to a first calibration coefficient and the reference code value to obtain calibration data;
and when the output code value is larger than or equal to the reference code value, calibrating the output code value according to a second calibration coefficient and the reference code value to obtain the calibration data.
4. The method of claim 3, further comprising:
the first calibration coefficient and the second calibration coefficient are predetermined prior to receiving the input signal.
5. The method of claim 4, wherein the step of predetermining the first calibration coefficient and the second calibration coefficient comprises:
acquiring a first test code value and a first target test code value according to the first test voltage;
calculating to obtain a first calibration coefficient according to the first test code value, the first target test code value and the reference code value;
acquiring a second test code value and a second target test code value according to the second test voltage;
and calculating to obtain a second calibration coefficient according to the second test code value, the second target test code value and the reference code value.
6. The method of claim 5, wherein obtaining a first test code value and a first target test code value based on a first test voltage comprises:
receiving the first test code value converted by the analog-to-digital converter according to the first test voltage;
acquiring the first target test code value corresponding to the first test voltage.
7. The method of claim 6, wherein receiving the first test code value converted by the analog-to-digital converter from the first test voltage comprises:
sampling the output code value obtained by the analog-to-digital converter according to the first test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the first test code value.
8. The method of claim 5, wherein obtaining the second test code value and the second target test code value from the second test voltage comprises:
receiving a second test code value converted by the analog-to-digital converter according to the second test voltage;
acquiring the second target test code value corresponding to the second test voltage.
9. The method of claim 8, wherein receiving the second test code value converted by the analog-to-digital converter from the second test voltage comprises:
sampling the output code value obtained by the analog-to-digital converter according to the conversion of the second test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the second test code value.
10. The method of claim 5, wherein calculating a first calibration coefficient from the first test code value, the first target test code value, and the reference code value comprises:
obtaining a first standard deviation according to the first target test code value and the reference code value;
obtaining a first test deviation according to the first test code value and the reference code value;
obtaining a first deviation according to the first reference deviation and the first test deviation;
calculating to obtain the first calibration coefficient according to the first deviation and the first reference deviation; wherein
The first calibration coefficient = 1/(1 + first deviation/first reference deviation).
11. The method of claim 5, wherein computing a second calibration coefficient from the second test code value, the second target test code value and the reference code value comprises:
obtaining a second reference deviation according to the second target test code value and the reference code value;
obtaining a second test deviation according to the second test code value and the reference code value;
obtaining a second deviation according to the second reference deviation and the second test deviation;
calculating the second calibration coefficient according to the second deviation and the second reference deviation; wherein
The second calibration coefficient = 1/(1 + second deviation/second reference deviation).
12. A method as claimed in claim 3, wherein calibrating said output code value against said first calibration coefficient and said reference code value, resulting in calibration data, comprises:
calibration data = reference code value-first calibration coefficient (reference code value-output code value).
13. A method as claimed in claim 3, wherein the step of calibrating the output code value in dependence on the second calibration coefficient and the reference code value to obtain calibration data comprises:
calibration data = reference code value + second calibration coefficient (reference code value-output code value).
14. The method of claim 5, wherein the reference code value corresponds to a reference input voltage, less than the reference input voltage configuration for a first voltage interval, greater than or equal to the reference input voltage configuration for a second voltage interval; wherein,
the first test voltage is located in the first voltage interval, and the second test voltage is located in the second voltage interval.
15. The method of claim 14, wherein the first test voltage corresponds to a voltage of the input signal having a maximum ratio of code value deviation within a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a second voltage interval.
16. The method of claim 14, wherein the first test voltage corresponds to a voltage of the input signal having a smallest code value deviation ratio within a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a second voltage interval.
17. The method of claim 14, wherein the first test voltage corresponds to a voltage of the input signal with a largest code value deviation ratio within a first voltage interval, and the second test voltage corresponds to a voltage of the input signal with a smallest code value deviation ratio within a second voltage interval; or alternatively
The first test voltage corresponds to the voltage of the input signal with the smallest code value deviation ratio in a first voltage interval; the second test voltage corresponds to a voltage of the input signal having a largest code value deviation ratio in a second voltage interval.
18. The method of claim 14, wherein the first test voltage corresponds to a voltage of the input signal at a mean code value deviation ratio over a first voltage interval; the second test voltage corresponds to a voltage of the input signal at a mean code value deviation ratio over a second voltage interval.
19. A method according to any one of claims 15-18, further comprising determining the code value deviation ratio:
acquiring a target code value corresponding to an input signal of an analog-digital converter;
calculating to obtain a code value deviation ratio according to the target code value and the output code value of the analog-to-digital converter; wherein
Code value deviation ratio = | target code value-output code value |/target code value.
20. A method for calibrating an analog-to-digital converter, comprising:
acquiring a corresponding test code value and a target test code value according to the test voltage;
calculating to obtain a calibration coefficient according to the test code value, the target test code value and the reference code value;
and calibrating the output code value of the analog-to-digital converter according to the calibration coefficient and the reference code value.
21. The method of claim 20, wherein the test voltage comprises a first test voltage and a second test voltage; wherein
The step of obtaining the corresponding test code value and the target test code value according to the test voltage comprises the following steps:
acquiring a first test code value and a first target test code value according to the first test voltage;
and acquiring a second test code value and a second target test code value according to the second test voltage.
22. The method of claim 21, wherein said step of calculating calibration coefficients from said test code value, said target test code value and a reference code value comprises:
calculating to obtain a first calibration coefficient according to the first test code value, the first target test code value and the reference code value;
and calculating to obtain a second calibration coefficient according to the second test code value, the second target test code value and the reference code value.
23. The method of claim 22, wherein the step of obtaining a first test code value and a first target test code value based on a first test voltage comprises:
receiving the first test code value converted by the analog-to-digital converter according to the first test voltage;
a first target test code value corresponding to the first test voltage is obtained.
24. The method of claim 23, wherein receiving the first test code value converted by the analog-to-digital converter from the first test voltage comprises:
sampling the output code value obtained by the analog-to-digital converter through conversion according to the first test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the first test code value.
25. The method of claim 22, wherein obtaining the second test code value and the second target test code value from the second test voltage comprises:
receiving a second test code value converted by the analog-to-digital converter according to the second test voltage;
acquiring the second target test code value corresponding to the second test voltage.
26. The method of claim 25, wherein receiving the second test code value converted by the analog-to-digital converter from the second test voltage comprises:
sampling the output code value obtained by the analog-to-digital converter according to the conversion of the second test voltage for multiple times to obtain multiple sampling code values;
and averaging the plurality of sampling code values to obtain the second test code value.
27. The method of claim 22, wherein calculating a first calibration coefficient from the first test code value, the first target test code value, and the reference code value comprises:
obtaining a first reference deviation according to the first target test code value and the reference code value;
obtaining a first test deviation according to the first test code value and the reference code value;
obtaining a first deviation according to the first reference deviation and the first test deviation;
calculating to obtain the first calibration coefficient according to the first deviation and the first reference deviation; wherein
The first calibration coefficient = 1/(1 + first deviation/first reference deviation).
28. The method of claim 22, wherein computing a second calibration coefficient from the second test code value, the second target test code value and the reference code value comprises:
obtaining a second reference deviation according to the second target test code value and the reference code value;
obtaining a second test deviation according to the second test code value and the reference code value;
obtaining a second deviation according to the second reference deviation and the second test deviation;
calculating the second calibration coefficient according to the second deviation and the second reference deviation; wherein
The second calibration coefficient = 1/(1 + second deviation/second reference deviation).
29. The method of claim 22, wherein the reference code value corresponds to a reference input voltage, wherein less than the reference input voltage defines a first voltage interval and greater than or equal to the reference input voltage defines a second voltage interval;
the first test voltage is located in the first voltage interval, and the second test voltage is located in the second voltage interval.
30. The method of claim 29, wherein the first test voltage corresponds to a voltage of the input signal having a maximum ratio of code value deviation within a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a second voltage interval.
31. The method of claim 29, wherein the first test voltage corresponds to a voltage of the input signal having a smallest code value deviation ratio within a first voltage interval; the second test voltage corresponds to a voltage of the input signal having a smallest code value deviation ratio within a second voltage interval.
32. The method of claim 29, wherein the first test voltage corresponds to a voltage of the input signal with a largest code value deviation ratio within a first voltage interval, and the second test voltage corresponds to a voltage of the input signal with a smallest code value deviation ratio within a second voltage interval; or
The first test voltage corresponds to the voltage of the input signal with the minimum code value deviation ratio in a first voltage interval; the second test voltage corresponds to the voltage of the input signal with the largest code value deviation ratio in a second voltage interval.
33. The method of claim 29, wherein the first test voltage corresponds to a voltage of the input signal at a ratio of mean code value deviation over a first voltage interval; the second test voltage corresponds to a voltage of the input signal at a mean code value deviation ratio over a second voltage interval.
34. The method of any one of claims 30-33, wherein the method further comprises:
acquiring a target code value corresponding to the input signal;
calculating to obtain a code value deviation ratio according to the target code value and the output code value; wherein
Code value deviation ratio = | target code value-output code value |/target code value.
35. A storage medium for storing a computer program for performing any one of the calibration methods of claims 1-34.
36. An apparatus for calibrating an analog-to-digital converter, comprising:
a processing unit;
a storage medium according to claim 35;
the computer program, when being executed by the processing unit, is operable to carry out any one of the calibration methods of claims 1-34.
37. A chip comprising at least one calibration device according to any one of claims 36.
CN202211527238.0A 2022-12-01 2022-12-01 Calibration method, storage medium, calibration device and chip of analog-to-digital converter Pending CN115940948A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117254811A (en) * 2023-11-14 2023-12-19 北京智联安科技有限公司 Successive approximation type analog-to-digital converter, and calibration method and medium for capacitor array of successive approximation type analog-to-digital converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117254811A (en) * 2023-11-14 2023-12-19 北京智联安科技有限公司 Successive approximation type analog-to-digital converter, and calibration method and medium for capacitor array of successive approximation type analog-to-digital converter

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