CN115938442A - Multi-scene flash memory data migration method and device, electronic equipment and medium - Google Patents

Abstract

The present invention discloses a multi-scenario flash memory data offset method, device, electronic equipment and medium, wherein the multi-scenario flash memory data offset method includes: in the first scene, recording the original data of the data block of the flash memory; In the second scenario, set the offset of the data page of the data block to obtain the offset data corresponding to the data page. The second scenario is obtained by adjusting the scene of the first scenario; compare the original data with the offset data, Obtaining bit inversion information; screening the bit inversion information to obtain an optimal read voltage offset of the data page. In the embodiment of the present invention, the optimal read voltage offset of the data page can be accurately obtained in any scenario.

Description

Multi-scenario flash memory data migration method, device, electronic equipment and medium

technical field

The present application relates to the technical field of data processing, in particular to a multi-scenario flash memory data offset method, device, electronic equipment and media.

Background technique

NAND Flash is a storage product widely used today, with excellent characteristics such as fast speed and non-volatile. It actually expresses data in the form of stored charge. However, during the use of NAND Flash products, due to the influence of internal and external conditions of the load, the number of electrons in the stored charge will change, resulting in the failure to obtain the default read voltage. correct data. Among them, typical scenarios that lead to changes in the charge of NAND Flash products include: high and low temperature read and write scenarios, data retention scenarios, read interference scenarios, power-off scenarios, and so on. In order to cover these scenarios in the actual use of the product, it is often necessary to do a lot of tests to obtain the read voltage offset corresponding to the scenario. Today's commonly used testing methods usually rely on the reread list provided by the original manufacturer. By doing experiments in different scenarios, match the corresponding stress items in the stress list provided by the original factory. Mark the matching reread as the best reread for the scene. However, if the original factory re-read table does not cover a certain scene, the optimal read voltage offset of the scene cannot be obtained, and the read voltage offset matched from the original factory is only the relative optimal read offset, not the global optimal read offset. offset, so the exact read voltage offset cannot be obtained.

Contents of the invention

Embodiments of the present application provide a multi-scenario flash memory data offset method, device, electronic device, and medium, capable of accurately obtaining the optimal read voltage offset of a data page in any scenario.

In a first aspect, an embodiment of the present invention provides a multi-scenario flash memory data offset method, the multi-scenario flash memory data offset method comprising:

In the first scenario, record the original data of the data block of the flash memory;

In the second scene, offset setting is performed on the data page of the data block to obtain offset data corresponding to the data page, wherein the second scene is obtained by scene adjustment of the first scene;

comparing the original data with the offset data to obtain bit flip information;

The bit flipping information is screened to obtain the optimal read voltage offset of the data page.

The multi-scenario flash memory data offset method provided by the embodiment of the present invention has at least the following beneficial effects: first, in the first scene, record the original data of the data block of the flash memory, and then perform scene adjustment on the first scene to obtain the second Scenario, in the second scenario, set the offset of the data page of the data block to obtain the offset data corresponding to the data page, so that the offset data in a specific scenario can be obtained in real time, and then the original data and the offset data are compared By comparison, the bit flip information is obtained, and the offset data of the data page is obtained by comparing the original data, which is convenient for subsequent determination of the best offset voltage in the current scene. Finally, the bit flip information is screened to obtain the best read voltage of the data page offset, so as to accurately obtain the optimal read voltage offset of the data page in the current scenario, without relying on the re-read table provided by the original factory, and directly compare the original data with the offset data.

In some embodiments, the offset setting of the data page of the data block to obtain the offset data includes:

Obtain the data page type of the data page;

determining a read voltage set of the data page according to the data page type, wherein the read voltage set includes at least one read voltage;

The voltage offset is performed on the read voltages in the read voltage set according to a preset offset direction to obtain the offset data, so as to realize real-time acquisition of the offset data.

In some embodiments, before comparing the original data with the offset data to obtain the bit flip information, it further includes:

It is determined that the set of read voltages includes one read voltage.

In some embodiments, the comparing the original data with the offset data to obtain bit flip information includes:

Comparing the original data with the offset data to obtain the number of bit flips corresponding to the offset data;

The number of bit inversions is counted to obtain the bit inversion information, which is convenient for subsequent determination of an optimal read voltage offset in the current scenario.

In some embodiments, before the screening of the bit flip information to obtain the optimal read voltage offset of the data page, the method further includes:

Recording the number of shifts of the read voltage to obtain the number of voltage shifts;

Comparing the number of voltage offsets with a preset offset condition to obtain a comparison result;

It is determined that the comparison result is that the number of voltage offsets satisfies the offset condition, so as to accurately obtain the read voltage offset of the data page.

In some embodiments, the filtering the bit flip information to obtain the optimal read voltage offset of the data page includes:

Comparing the number of bit flips in the bit flip information to determine the target number of bit flips;

Determine the offset data corresponding to the target bit flip number, and record the offset data as the optimal read voltage offset of the data page, so that the optimal read voltage offset of each data page can be obtained quickly and accurately. voltage offset.

In some embodiments, also include:

When the set of read voltages includes at least two read voltages, selecting a first read voltage from the set of read voltages, and fixing offsets of the remaining read voltages to obtain a subset of read voltages;

adjusting the first read voltage to move according to a preset offset direction to obtain first offset data;

Comparing the first offset data with the original data to obtain first bit flip information;

comparing the first bit flip information with a preset offset condition;

When the first bit inversion information satisfies the offset condition, determining a first read voltage offset according to the first bit inversion information;

fixing an offset of the first read voltage as the first read voltage offset, and storing the fixed first read voltage in the subset of read voltages;

reading the second read voltage in the read voltage subset, and performing offset setting on the second read voltage to obtain second offset data, until all the read voltages in the read voltage set are traversed;

Read the read voltage offset of each read voltage in the read voltage set, and obtain the optimal read voltage offset of the data page according to the read voltage offset, and realize a large amount of data analysis through an automated program .

In the second aspect, the embodiment of the present invention also provides a multi-scenario flash memory data offset device, including: a memory, a processor, and a computer program stored in the memory and operable on the processor, and the processor executes the The computer program implements the multi-scenario flash memory data offset method as described in the first aspect.

In a third aspect, an embodiment of the present invention further provides a solid-state hard disk, which is provided with the multi-scenario flash memory data offset device as described in the second aspect.

In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to make a computer perform the A multi-scenario flash data offset method.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description as well as the appended drawings.

Description of drawings

The accompanying drawings are used to provide a further understanding of the technical solution of the present invention, and constitute a part of the description, and are used to explain the technical solution of the present invention together with the examples of the present invention, and do not constitute a limitation to the technical solution of the present invention.

FIG. 1 is an overall flowchart of a multi-scenario flash memory data offset method provided by an embodiment of the present invention;

Fig. 2 is the specific method flowchart of step S102 in Fig. 1;

Fig. 3 is the specific method flowchart of step S103 in Fig. 1;

4 is an overall flow chart of a multi-scenario flash memory data offset method provided by another embodiment of the present invention;

Fig. 5 is a specific method flowchart of step S104 in Fig. 1;

6 is an overall flowchart of a multi-scenario flash memory data offset method provided by another embodiment of the present invention;

FIG. 7 is a schematic diagram of a flash data offset method provided by a specific example of the present invention;

FIG. 8 is a schematic structural diagram of a multi-scenario flash memory data offset device provided by an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

The embodiment of the present invention provides a multi-scenario flash memory data offset method, device, electronic equipment, and medium. First, in the first scene, record the original data of the data block of the flash memory, and then perform scene adjustment on the first scene Get the second scene. In the second scene, offset the data page of the data block to get the offset data, so that the offset data in a specific scene can be obtained in real time, and then the original data is compared with the offset data. Obtain the bit flip information, realize the offset data of the data page by comparing the original data, so as to facilitate subsequent determination of the best offset voltage in the current scene, and finally, filter the bit flip information to obtain the best read voltage offset of the data page , so as to accurately obtain the optimal read voltage offset of the data page in the current scenario, without relying on the re-read table provided by the original manufacturer.

The embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

Referring to FIG. 1 , an embodiment of the present invention provides a multi-scenario flash data migration method, which includes but not limited to the following steps S101 to S104.

Step S101, in the first scenario, record the original data of the data block of the flash memory;

In some embodiments, in the first scenario, the original data of the data block of the flash memory is recorded for subsequent comparison with the offset data.

It should be noted that, in the first scenario, the data block of the flash memory needs to be erased and written first, and then the original data of the data block of the flash memory is recorded.

Step S102, in the second scenario, perform offset setting on the data page of the data block to obtain offset data corresponding to the data page;

It should be noted that the second scene is obtained by performing scene adjustment on the first scene.

In some embodiments, in the second scenario, offset setting is performed on the data page of the data block to obtain offset data corresponding to the data page, so as to obtain an optimal read voltage offset subsequently.

It should be noted that the first scenario and the second scenario in this embodiment may be failure scenarios that make flash memory data invalid, for example, high and low temperature reading and writing scenarios, data retention scenarios, etc., wherein the first scenario in this embodiment The scene is a high-temperature reading and writing scene, and the second scene is a low-temperature reading and writing scene. The temperature of the high-temperature reading and writing scene is 85 degrees Celsius, and the temperature of the low-temperature reading and writing scene is -25 degrees Celsius. The specific scene settings and scene parameters are not specified in this embodiment. limit.

Step S103, comparing the original data with the offset data to obtain bit flip information;

In some embodiments, the recorded original data is compared and counted with the offset data to obtain the bit flip information, so that the bit flip information of the data page can be obtained by comparison in any scenario, which is convenient for subsequent determination of the best data page. Read voltage offset.

Step S104, filter the bit flip information to obtain the optimal read voltage offset of the data page.

In some embodiments, the bit flipping information is screened, and the minimum value in the bit flipping information is selected as the optimal read voltage offset of the data page in the current scenario to obtain the global optimal read voltage offset, which can be quickly and accurately obtained Optimal read voltage offset for each data page.

Referring to FIG. 2, in some embodiments, step S102 may include, but is not limited to, step S201 to step S203:

Step S201, acquiring the data page type of the data page;

Step S202, determining the read voltage set of the data page according to the type of the data page;

It should be noted that the read voltage set includes at least one read voltage.

Step S203, performing a voltage offset on the read voltages in the read voltage set according to a preset offset direction to obtain offset data.

In steps S201 to S203 in some embodiments, in the process of obtaining offset data, it is necessary to obtain the data page type of the data page first, and then determine the read voltage sets of different types of data pages according to the data page type, and finally , performing a voltage offset on the read voltages in the read voltage concentration according to a preset offset direction to obtain offset data, thereby realizing real-time acquisition of the offset data.

It should be noted that the number of read voltages in the read voltage set corresponds to the data page type. For example, when the data page is of the LSB (Least Significant Bit, least significant bit) type, the read voltage set includes one read voltage; If the page is of MSB (Most Significant Bit, most significant bit) type, then the read voltage set includes two read voltages at this time; when the data page is of CSB (Central Significant Bit, middle significant bit) type, then the read voltage set includes three read voltage, which is not specifically limited in this embodiment.

It can be understood that the original factory provides a method to adjust the left and right offset of the read voltage. Generally speaking, the read voltage is allowed to shift 255 units from the default position to the left and right. Therefore, the preset offset direction in this embodiment is from the left to the left. Offset to the right.

In some embodiments, before comparing the original data with the offset data to obtain bit flip information, the method further includes: determining that the set of read voltages includes one read voltage.

Referring to FIG. 3, in some embodiments, step S103 may include, but is not limited to, steps S301 to S302:

Step S301, comparing the original data with the offset data to obtain the number of bit flips corresponding to the offset data;

Step S302, counting the number of bit flips to obtain bit flip information.

In some embodiments, from step S301 to step S302, in the process of obtaining the bit flip information, the original data is first compared with the bit flip numbers of the offset data to obtain the bit flip numbers corresponding to the number of bits of the offset data, After that, the number of bit flips is counted to obtain multiple bit flip information, which is convenient for subsequent determination of the optimal read voltage offset in the current scenario.

It should be noted that, for example, in a high-temperature (85°) scene, write a SLC (Single-Level Cell, single-level unit flash memory) data block, record the written original data as data_original, and then write it at a low temperature (-25° ) scenario, set the offset of the SLC page (data page), respectively set the read voltage offset of the SLC page (data page) to v1, v2, v3, ... v255, and read the offset data of the SLC page. Name these offset data respectively: data_offset1, data_offset2, data_offset3,..., data_offset_255; then compare the written original data data_original with data_offset1, data_offset2, data_offset3, data_offset255 respectively. Count the number of flipped bits to obtain the bit flipped information, and record the bit flipped information as: bit_cnt1, bit_cnt2, bit_cnt3,..., bit_cnt255, so as to obtain the best read voltage offset in the current scene later.

Referring to FIG. 4 , FIG. 4 is a multi-scenario flash data migration method provided by another embodiment of the present invention. The multi-scenario flash data migration method includes but is not limited to the following steps S401 to S403.

It should be noted that steps S401 to S403 occur before screening the bit flip information to determine the optimal read voltage offset of the data page.

Step S401, recording the number of offsets of the read voltage to obtain the number of voltage offsets;

Step S402, comparing the number of voltage offsets with a preset offset condition to obtain a comparison result;

In step S403, it is determined that the comparison result is that the number of voltage offsets satisfies the offset condition.

In steps S401 to S403 of some embodiments, before screening the bit flip information, it is also necessary to record the number of shifts of the read voltage to obtain the current number of voltage shifts, and then compare the number of voltage shifts with the preset Compare the offset conditions, judge whether the number of voltage offsets meets the preset offset conditions, and obtain the comparison result. After confirming that the comparison result is that the number of voltage offsets meets the offset conditions, then filter the bit flip information. Thus, the read voltage offset of the data page can be accurately obtained.

It should be noted that when it is determined that the number of voltage offsets does not meet the offset condition as a result of the comparison, it is necessary to continue offsetting the read voltage according to the preset offset direction, and update the number of voltage offsets until the voltage offset The number of times satisfies the preset offset condition.

It can be understood that the offset condition can be one or more combinations of the number of offsets, the offset direction, and the offset threshold voltage, wherein the read voltage is allowed to offset a total of 255 units from the default position to the left and right, from the maximum A total of 256 read voltage offsets from left to right are respectively called v1, v2, v3, ..., v255, so the number of offsets in the preset offset condition in this embodiment is less than or equal to 255.

Referring to FIG. 5, in some embodiments, step S104 may include but not limited to include steps S501 to S502:

Step S501, comparing the number of bit flips in the bit flip information to determine the target number of bit flips;

Step S502, determining offset data corresponding to the target bit flip number, and recording the offset data as an optimal read voltage offset of the data page.

In some embodiments, from step S501 to step S502, compare the number of bit flips in the bit flip information, select the minimum value in the bit flip information as the target bit flip number, and then determine the offset corresponding to the target bit flip number Data, record the offset data as the optimal read voltage offset of the data page, that is, the optimal read voltage offset in the current scenario, so that the optimal read voltage offset of each data page can be obtained quickly and accurately .

Referring to FIG. 6 , FIG. 6 is a multi-scenario flash data migration method provided by another embodiment of the present invention. The multi-scenario flash data migration method includes but is not limited to the following steps S601 to S608.

Step S601, when the set of read voltages includes at least two read voltages, select the first read voltage from the set of read voltages, and fix the offsets of the remaining read voltages to obtain a subset of read voltages;

Step S602, adjusting the first read voltage to move according to the preset offset direction to obtain the first offset data;

Step S603, comparing the first offset data with the original data to obtain the first bit flip information;

Step S604, comparing the first bit flip information with a preset offset condition;

Step S605, when the first bit inversion information satisfies the offset condition, determine the first read voltage offset according to the first bit inversion information;

Step S606, fixing the offset of the first read voltage as the first read voltage offset, and storing the fixed first read voltage in the read voltage subset;

Step S607, read the second read voltage in the read voltage subset, and perform offset setting on the second read voltage to obtain the second offset data, until all the read voltages in the read voltage set are traversed;

Step S608, read the read voltage offset of each read voltage in the read voltage set, and obtain the optimal read voltage offset of the data page according to the read voltage offset.

In some embodiments, from step S601 to step S608, when it is determined that the set of read voltages includes at least two read voltages, the first read voltage is first selected from the set of read voltages, and the offsets of the other remaining read voltages are calculated. fixed, and store the remaining read voltages in a subset to obtain a subset of read voltages, and then adjust the first read voltage for offset according to the preset offset direction to obtain the first offset data, and the first offset The data is compared with the original data to obtain the first bit inversion information of the first read voltage, wherein the first bit inversion information includes the number of voltage offsets and the number of bit inversions of the first read voltage, and the voltage offset of the first read voltage is The number of shifts is compared with the preset offset condition. When the first bit flip information meets the preset offset condition, the bit flip number in the first bit flip information is compared, and the minimum bit flip number is selected as the first read voltage offset, set the offset of the first read voltage as the first voltage offset, fix the offset of the first read voltage, store the fixed first read voltage in the read voltage subset, and When the offset of the first read voltage is fixed, read the second read voltage in the subset of read voltages, and set the offset for the second read voltage. Finally, repeat steps S602 to S606 until the read voltages are traversed. All the read voltages in the set, complete the voltage offset of all the read voltages in the read voltage set, read the read voltage offset of each read voltage in the read voltage set, and get the best data page according to the read voltage offset Read the voltage offset to realize a large amount of data analysis through an automated program.

It can be understood that if the read voltage set includes two read voltages, the optimal read voltage offset of the data page can be obtained through the following operations, wherein the two read voltages are respectively named level_a and level_b, and the offset to level_a Fix it, that is, set the offset of level_a to 0, then shift level_b from left to right to get the first offset data, compare the first offset data with the written original data, and get the first bit flip Information, in the case that the first bit flipping information satisfies the preset offset condition, the first bit flipping information is screened to obtain the minimum bit flipping offset level_b_x;

After that, fix the offset of level_b, set the offset of level_b to level_b_x, and then offset level_a from left to right to obtain the second offset data, and compare the second offset data with the written original data, Obtaining the second bit inversion information, when the second bit inversion information satisfies the preset offset condition, screening the second bit inversion information to obtain the minimum bit inversion offset level_a_y;

The level_a_y and level_b_x obtained through the above operation are the optimal read voltage offset of the data page in the corresponding scenario.

It should be noted that if the set of read voltages includes three read voltages, the offsets of the two read voltages need to be fixed first, and the other read voltage should be offset and compared to obtain the optimum read voltage for the read voltage. After that, the offset of the read voltage that has obtained the best read voltage is fixed, and the remaining two read voltages are processed sequentially, thereby completing the offset of all the read voltages, and obtaining the best read voltage offset of the data page. Both the read voltage scanning method and the data comparison method are relatively easy to implement with software, so that the optimal read voltage offset of a single page can be accurately obtained. When dealing with the optimal read voltage offset of a block or even a chip, it is only necessary to Each page performs the same operation, and completes a large amount of data analysis through an automated program, and is not limited by usage scenarios.

In order to more clearly illustrate the flow of the multi-scenario flash memory data offset method, a specific example is used below to illustrate.

Example one:

Referring to FIG. 7, FIG. 7 is a schematic diagram of a flash memory data offset method provided by a specific example of the present invention;

Step 1: Erase and write an SLC block, and record the original data written;

Step 2: Determine the read voltage set corresponding to the data page, and adjust and correct a certain read voltage in the read voltage set;

Step 3: Adjust the read voltage to offset from left to right to obtain offset data;

Step 4: Compare the offset data with the original data, record the number of bit flips and the number of voltage offsets;

Step 5: Determine whether the number of voltage offsets reaches 255 times;

Step 6: If yes, determine the minimum number of flipped bits in the number of bit flips, and record the offset corresponding to the minimum flipped number of bits as the best read voltage offset for the current read voltage;

Step 7: If not, continue to adjust the read voltage to offset from left to right to obtain offset data;

Step 8: Determine whether to traverse all the read voltages in the read voltage set;

Step 9: If not, continue to adjust and correct other read voltages in the set of read voltages;

Step ten: If yes, determine the optimal read voltage offset of the data page according to all the optimal read voltage offsets.

In some embodiments, this embodiment can quickly, accurately and automatically obtain the optimal read voltage offset of each flash memory page in any scenario, without being limited by the reread table provided by the original factory.

Please refer to FIG. 8. FIG. 8 illustrates a multi-scenario flash data offset device of another embodiment. The multi-scenario flash data offset device includes:

The processor 801 can be implemented by a general-purpose CPU (Central Processing Unit, central processing unit), a microprocessor, an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), or one or more integrated circuits, and is used to execute related program to realize the technical solutions provided by the embodiments of the present application;

The memory 802 may be implemented in the form of a read-only memory (Read Only Memory, ROM), a static storage device, a dynamic storage device, or a random access memory (Random Access Memory, RAM). The memory 802 can store operating systems and other application programs. When implementing the technical solutions provided by the embodiments of this specification through software or firmware, the relevant program codes are stored in the memory 802 and called by the processor 801 to execute the implementation of this application. Example multi-scenario flash data offset method;

The input/output interface 803 is used to realize information input and output;

The communication interface 804 is used to realize the communication interaction between the device and other devices, and the communication can be realized through a wired method (such as USB, network cable, etc.), or can be realized through a wireless method (such as a mobile network, WIFI, Bluetooth, etc.);

A bus 805, which transmits information between various components of the device (such as a processor 801, a memory 802, an input/output interface 803, and a communication interface 804);

The processor 801 , the memory 802 , the input/output interface 803 and the communication interface 804 are connected to each other within the device through the bus 805 .

The embodiment of the present application also provides a computer-readable storage medium, where a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the above multi-scenario flash memory data offset method is implemented.

As a non-transitory computer-readable storage medium, memory can be used to store non-transitory software programs and non-transitory computer-executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid-state storage devices. In some embodiments, the memory optionally includes memory located remotely from the processor, and these remote memories may be connected to the processor via a network. Examples of the aforementioned networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

Embodiments of the present invention also provide a computer-readable storage medium, the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are executed by one or more control processors, for example, by the Executed by one processor 801, the one or more control processors may execute the multi-scenario flash memory data offset method in the above method embodiment.

The device embodiments described above are only illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

Those skilled in the art can understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware and an appropriate combination thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit . Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). As known to those of ordinary skill in the art, the term computer storage media includes both volatile and nonvolatile media implemented in any method or technology for storage of information, such as computer readable instructions, data structures, program modules, or other data. permanent, removable and non-removable media. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridges, tape, magnetic disk storage or other magnetic storage devices, or can Any other medium used to store desired information and which can be accessed by a computer. In addition, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media .

The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above-mentioned implementation, and those skilled in the art can also make various equivalent deformations or replacements without violating the spirit of the present invention. Equivalent modifications or replacements all fall within the scope of the present invention.

Claims (10)

1. A multi-scenario flash data migration method is characterized by comprising the following steps:

recording original data of a data block of the flash memory in a first scene;

in a second scene, performing offset setting on a data page of the data block to obtain offset data corresponding to the data page, wherein the second scene is obtained by performing scene adjustment on the first scene;

comparing the original data with the offset data to obtain bit flipping information;

and screening the bit overturning information to obtain the optimal reading voltage offset of the data page.

2. The multi-scenario flash data migration method according to claim 1, wherein the performing migration setting on the data page of the data block to obtain migration data corresponding to the data page comprises:

acquiring the data page type of the data page;

determining a set of read voltages for the data page according to the data page type, wherein the set of read voltages includes at least one read voltage;

and performing voltage offset on the reading voltage in the reading voltage set according to a preset offset direction to obtain the offset data.

3. The multi-scenario flash data migration method of claim 2, wherein before comparing the original data with the migration data to obtain bit flipping information, the method further comprises:

determining that the set of read voltages includes one read voltage.

4. The multi-scenario flash data migration method according to claim 1, wherein the comparing the original data with the migration data to obtain bit flipping information comprises:

comparing the original data with the offset data to obtain a bit flipping number corresponding to the offset data;

and counting the bit flipping number to obtain the bit flipping information.

5. The multi-scenario flash data migration method according to claim 1, further comprising, before the screening the bit flipping information to obtain the optimal read voltage migration of the data page:

recording the offset times of the read voltage to obtain the voltage offset times;

comparing the voltage offset times with a preset offset condition to obtain a comparison result;

and determining the comparison result that the voltage offset times meet the offset condition.

6. The multi-scenario flash data migration method according to claim 4, wherein the screening the bit flipping information to obtain the optimal read voltage migration of the data page comprises:

comparing the bit flipping numbers in the bit flipping information to determine a target bit flipping number;

and determining offset data corresponding to the target bit flip number, and recording the offset data as the optimal read voltage offset of the data page.

7. The multi-scenario flash data migration method according to claim 2, further comprising:

under the condition that the reading voltage set comprises at least two reading voltages, selecting a first reading voltage from the reading voltage set, and fixing the offset of the rest reading voltages to obtain a reading voltage subset;

adjusting the first reading voltage to move according to a preset offset direction to obtain first offset data;

comparing the first offset data with the original data to obtain first bit flipping information;

comparing the first bit flipping information with a preset offset condition;

when the first bit flipping information meets the offset condition, determining first reading voltage offset according to the first bit flipping information;

fixing the offset of the first reading voltage as the first reading voltage offset, and storing the fixed first reading voltage into the reading voltage subset;

reading a second reading voltage in the reading voltage subset, and performing offset setting on the second reading voltage to obtain second offset data until all reading voltages in the reading voltage set are traversed;

and reading the read voltage offset of each read voltage in the read voltage set, and obtaining the optimal read voltage offset of the data page according to the read voltage offset.

8. A multi-scenario flash data migration apparatus, comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the multi-scenario flash data migration method as claimed in any one of claims 1 to 7 when executing the computer program.

9. A solid state disk provided with the multi-scenario flash data migration apparatus of claim 8.

10. A computer-readable storage medium storing computer-executable instructions for performing the multi-scenario flash data migration method of any one of claims 1 to 7.

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