CN115878550A - A data processing method, chip, device and system - Google Patents

Abstract

The embodiment of the present application discloses a data processing method, which is used to reduce data processing delay. The method in the embodiment of the present application includes: the embodiment of the present application is applied to a data processing system, the data processing system includes a first device and a second device, the first device sends a data processing request to the second device, and the information carried in the data processing request can indicate The second device determines whether to execute the data processing request on the first processor core or the second processor core, and when the information indicates that the data processing request is executed on the first processor core, the second device may schedule the first processor core to execute the data processing request Processing the request, when the information indicates that the data processing request is executed by the second processor core, the second device may schedule the second processor core to execute the data processing request.

Description

A data processing method, chip, device and system

technical field

The embodiments of the present application relate to the communication field, and in particular, to a data processing method, chip, device, and system.

Background technique

Remote direct memory access (RDMA) is a technology created to solve the internal data processing delay of the device during network transmission. RDMA transfers the data in the user application directly to the storage area of the device, and quickly transfers the data from one device to the storage of another device through the network, eliminating multiple data copy operations during the transmission process, without the intervention of the operating systems of both parties. The load of the central processing unit (central processing unit, CPU) in the device is reduced.

However, for some data processing, for example: access to key-value pair (Key-Value) data in a relational database, the use of RDMA technology may result in multiple RDMA accesses, and the data access delay is relatively high. In another technique, a device may call the CPU of the server to process data (for example, access to Key-Value data) through a bilateral remote procedure call (RPC) technique. In this technique, one device sends a request to another device, and the other device generally obtains the request by setting up multiple polling (poll) threads of the CPU, and then invokes an execution thread in the CPU to execute the request. Although the above solution avoids multiple network accesses that directly call RDMA, the poll thread overhead of the CPU is high, which affects the use of execution threads in the CPU, that is, also affects the data processing speed.

Contents of the invention

Embodiments of the present application provide a data processing method, chip, device, and system for reducing processing delay.

The first aspect of the embodiment of the present application provides a data processing method, the method is applied to a data processing system, the data processing system includes a first device and a second device, the method includes: the second device receives the first device sent The data processing request, wherein, the second device includes a processor, the processor includes a first processor core and a second processor core, and the processing capability of the first processor core is greater than that of the second processor core; the second device processes according to the data The information carried in the request determines to schedule the data processing request to the first processor core for processing, or determines to schedule the data processing request to the second processor core for processing.

In the first aspect above, the information carried in the data processing request can enable the second device to determine whether the data processing request sent by the first device is executed on the first processor core or the second processor core of the second device, This makes it possible to select a suitable processor core for data processing according to the type of the data processing request, thereby increasing the speed of data processing.

In a possible implementation manner, the second processor core includes a polling thread and a scheduling thread, and the above steps where the second device receives the data processing request sent by the first device specifically include: the polling thread polls the The data processing request sent by the first device is obtained from the receiving queue; the polling thread sends the data processing request to the scheduling thread.

In the above possible implementation manner, the polling thread and the scheduling thread are executed by the second processor core. Since the computing power of the second processor core is small, the required overhead is correspondingly small, that is, the overhead of the polling thread is small. In the case of executing more polling threads, the processing of the first processor to check the data processing request is not affected, thereby reducing the processing delay.

In a possible implementation, the first processor core and the second processor core include execution threads; in the above steps, the second device determines to dispatch the data processing request to the first processor core for processing according to the information carried by the data processing request. , or, determining to schedule the data processing request to the second processor core for processing specifically includes: the scheduling thread in the second processor core determines to schedule the data processing request to the first processor core according to the information carried by the data processing request or, determine to dispatch the data processing request to the execution thread in the second processor core for processing.

In a possible implementation, the data processing request is a database access request for accessing the database in the second device, and the database access request includes any of the following: data write request, data read request, data update request, data Delete requests, file lock requests, data retrieval requests.

In the above possible implementation manners, the data processing request may be a data write request, a data read request, a data update request, a data deletion request, a file locking request, a data retrieval request, or a remote resource usage request, etc. The embodiments of the present application can be applied to various scenarios to improve user experience.

In a possible implementation, the information carried by the data processing request includes a function identifier; in the above steps, the second device determines to schedule the data processing request to the first processor core for processing according to the information carried by the data processing request, or determines to dispatch the data processing request to the first processor core for processing. Scheduling the processing request to the second processor core for processing specifically includes: the second device determines to dispatch the data processing request to the first processor core for processing according to the function identifier and preset information in the second device, or determines to dispatch the data processing request The request is dispatched to the second processor core for processing.

In the above possible implementation manner, the second device stores preset information, and it is determined whether to execute the data read request on the first processor core or on the second processor core based on the preset information combined with the function identifier. The set information may be the registration information for registering the identification of the function with low required computing power in the embodiment of the present application, which is used for the second device to distinguish the data reading requests with different required computing power, and correspondingly send the data to the first processor core. Or the second processor core processing, no need to improve the first device, reducing costs.

In a possible implementation manner, before the second device receives the data processing request sent by the first device in the above step, the method further includes: the second device registers a function identifier to generate preset information.

In the above possible implementation manner, the second device registers part of the function identifiers, and the preset information is the registered function identifiers, which improves the feasibility of the solution.

In a possible implementation manner, the polling thread in the above step obtains the data processing request sent by the first device from the receiving queue of the second device by polling, comprising: the polling thread polls at least one doorbell register in the processor, and Get data processing requests from the receive queue bound to the first doorbell register.

In the above possible implementation manners, the polling thread only needs to poll at least one doorbell register, and does not need to poll a large number of receiving queues of the second device, thereby reducing polling overhead.

In a possible implementation manner, after the scheduling thread in the second processor core in the above step determines to schedule the data processing request to the execution thread in the second processor core according to the information carried by the data processing request, the method further includes: When the preset condition is satisfied, the scheduling thread of the second processor core invokes the execution thread of the first processor core to process the data processing request, and the preset condition indicates that the execution thread of the second processor core cannot execute the data processing request.

In the above possible implementation manner, when the data processing request cannot continue to be executed in the execution thread of the second processor core, the scheduling thread of the second processor core may also schedule the execution thread of the first processor core to execute the data processing request, Compared with scheduling the first processor core and the second processor core by the operating system, the scheduling delay can be reduced.

The second aspect of the embodiments of the present application provides a processor chip that can implement the method in the foregoing first aspect or any possible implementation manner of the first aspect. The processor chip includes corresponding first processor cores and second processor cores for executing the above method.

The third aspect of the embodiment of the present application provides a computing device, including: a processor, the processor is coupled with a memory, and the memory is used to store instructions, and when the instructions are executed by the processor, the computing device implements the above first aspect Or the method in any possible implementation manner in the first aspect. The computing device may be, for example, a network device, or may be a chip or a chip system that supports the network device to implement the above method.

The fourth aspect of the embodiment of the present application provides a computer-readable storage medium, the computer-readable storage medium stores instructions, and when the instructions are executed, the computer executes the first aspect or any possibility of the first aspect The method provided by the embodiment.

The fifth aspect of the embodiment of the present application provides a computer program product. The computer program product includes computer program code. When the computer program code is executed, the computer executes the first aspect or any possible implementation of the first aspect. method provided.

The sixth aspect of the embodiment of the present application provides a system, the system includes a first device and a second device, wherein the first device and the second device are connected in communication, and the first device is used to send a data processing request to the second device , the second device may execute the method provided in the foregoing first aspect or any possible implementation manner of the first aspect.

Description of drawings

FIG. 1 is a schematic diagram of a system architecture provided by an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a data processing system provided by an embodiment of the present application;

FIG. 3 is a schematic diagram of a data processing method provided in an embodiment of the present application;

Fig. 4 is an internal flowchart provided by the embodiment of the present application;

FIG. 5 is another internal flowchart provided by the embodiment of the present application;

FIG. 6 is a schematic structural diagram of a processor chip provided by an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a computing device provided by an embodiment of the present application.

Detailed ways

Embodiments of the present application provide a data processing method, chip, device, and system for reducing processing delay.

Embodiments of the present application are described below in conjunction with the accompanying drawings. Apparently, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Those of ordinary skill in the art know that, with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

The terms "first", "second" and the like in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific sequence or sequence. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having", as well as any variations thereof, are intended to cover a non-exclusive inclusion, for example, a process, method, system, product or device comprising a sequence of steps or elements is not necessarily limited to the expressly listed instead, may include other steps or elements not explicitly listed or inherent to the process, method, product or apparatus.

The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration." Any embodiment described herein as "exemplary" is not necessarily to be construed as superior or better than other embodiments.

First, some concepts involved in a data processing method provided in the embodiment of the present application are explained.

Remote direct memory access (RDMA) is a technology developed to solve server-side data processing delays in network transmission. RDMA transfers the data in the user application directly to the storage area of the device (for example: server), quickly transfers the data from one device to the storage of another remote device through the network, and eliminates the multiple times inside a device during the transmission process. The data copy operation does not require the intervention of the operating systems of the two devices, thereby reducing the load on the central processing unit (CPU). At present, RDMA supports multiple data reading and writing methods: send/receive (Send/Receive), RDMA read (RDMA read), RDMA write (RDMA write), etc.

RDMA provides point-to-point communication based on message queues, and each device can directly obtain messages from other devices without the intervention of the operating system and protocol stack. The message service is built on the channel connection created between the two parties. When communication between the two parties is required, a channel connection will be created, and the first and last endpoints of each channel are two pairs of queue pairs (queue pairs, QP). Each pair of QPs consists of a sending queue (send queue, SQ) and a receiving queue (receive queue, RQ). In addition to the two basic queues described by QP, RDMA also provides a complete queue (CQ), which is used to record the sending results of information in SQ and the receiving results of information in RQ.

Figure 1 is a schematic diagram of a system architecture applicable to the embodiment of the present application. As shown in Figure 1, a remote data processing system composed of multiple devices, the multiple devices include device 0, device 1, device 2, device 3, ... 1. Device N, each device is provided with a network interface controller (network interface controller, NIC), and the NICs on each device implement communication through a network (network). Wherein, each device can serve as a client (client) to initiate a remote access request, and can also serve as a server (server) to receive an access request, and a device can also only serve as a client or a server.

For data stored and retrieved through structures such as linked lists/trees (key-value pairs (key-value)), accessing data requires multiple pointer tracking, that is, multiple main memory accesses. Since business requests require multiple main memory accesses, bilateral remote procedure calls (remote procedure call, RPC) are usually used to implement remote data access, thereby implementing pointer tracking and data access.

Taking bilateral RPC as an example, the client calls the CPU of the server through bilateral RPC to access data, such as Key-Value access. That is, the client sends the request to the server, and the server obtains the request through multiple polling (poll) threads, then invokes the execution thread to execute the request, and feeds back the data obtained by multiple Key-Values to the client. Although the above solution avoids multiple network accesses by unilateral RDMA, the large number of poll threads required by the CPU is expensive, which affects the use of execution threads, that is, affects the processing delay.

In order to solve the above problems, an embodiment of the present application provides a data processing method. The data processing system that executes the data processing method can be shown in FIG. 2. The system includes a first device and a second device for communication, wherein , the first device may include multiple, for example, the first device 0, the first device 1, . . . , the first device N. The second device includes a communication component, a memory, and a processor, wherein the processor includes a first processor core with high computing capability, and a second processor core capable of executing multithreading. It should be understood that the first processor core may include multiple A processor core with relatively high computing power, therefore, the first processor core in the processor may also be referred to as the first processor core cluster, and similarly, the second processor core may also include multiple processor cores, Therefore, the second processor core may also be referred to as a second processor core cluster. The computing capability of the first processor core is higher than that of the second processor core, and the first processor core includes poll threads and execution threads. A poll thread, a scheduling thread, and an execution thread may be included in the second processor core, wherein the second processor core also includes one or more doorbell registers bound to the poll thread, and an on-chip buffer for caching requests for the execution thread (buffer), the on-chip buffer may not be used, and there is no limitation here. The memory includes a first processor core queue that receives requests for execution threads of the first processor core, a second processor core queue that receives requests for execution threads of the second processor core, and receives requests (request, REQ)/sends results A queue of (result, RSLT), such as REQ/RSLT 0, REQ/RSLT 1, ..., REQ/RSLT N, the communication component supports the transmission of REQ/RSLT between the first device and the REQ/RSLT.

Exemplarily, the processor in the above-mentioned second device may adopt a large and small core processor, which is an advanced high-precision core component of an embedded system under a reduced instruction set (reduced instruction set computing, RISC) architecture. The large and small core structure (big.LITTLE) of the instruction set processor (advanced RISC machines, ARM) is a heterogeneous computing multi-core processor architecture. In this architecture, the "big cluster" (the first processor core) composed of processor cores with relatively power consumption but strong computing power and the "LITTLE cluster" (the first processor core) composed of processor cores with low power consumption and weak computing power The second processor cores) are combined, and these processor cores share memory segments, and can schedule and switch loads online and in real time between different CPU clusters.

The communication component in the above-mentioned second device can be a network card, a high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIE) physical link, a high-capacity communication system (highcapacity communication system, HCCS) physical link, or other communication components.

It should be understood that the first device and the second device shown in FIG. 2 may be independent servers, or may be relatively independent computing modules within a server or between different servers. When both the first device and the second device are servers, the above-mentioned data processing system may be a computer room, a rack, or be formed by two remote data centers.

As shown in Figure 3, it is a schematic diagram of a data processing method provided by the embodiment of the present application, the method includes:

301. The first device initiates a data processing request to the second device, and correspondingly, the second device receives the data processing request from the first device.

In the embodiment of the present application, the first device may generate a data processing request according to the function of the second device that needs to be called, and send the data processing request to the second device, and the second device may perform corresponding functions according to the data processing request. For example: the data processing request may be a database access request for accessing the database in the second device, and the database access request includes any of the following methods: data write request, data read request, data update request, data deletion request, file lock request, data retrieval request.

The embodiment of the present application takes a data read request as an example, and the data read request is an RDMA request. At this time, the REQ/RSLT of the first device and the second device in FIG. 2 may be RQ/SQ, and the first device and the second device The communication component of the device is the NIC. The first device sends a data read request to the second device through the SQ of the first device, and the data read request includes the key of the target data to be read by the first device in the second device, wherein the data read request It may also include a first identifier or a second identifier, wherein the first identifier indicates that the data read request is executed on the first processor core, and the second identifier indicates that the data read request is executed on the second processor core, or, when the data When there is no first identifier in the read request, the second device may determine according to the data read request that the data read request is being executed on the second processor core, or, when there is no second identifier in the data read request, the first The second device may determine to execute the data reading request on the first processor core according to the data reading request, which is not limited herein.

In this embodiment of the present application, the data read request includes a first identifier or a second identifier, wherein the first identifier indicates that the data read request is executed on the first processor core, and the second identifier indicates that the data read request is executed on the second processor core. Taking the request as an example, for example, the first identifier and the second identifier may also be identifiers after processing the function identifier (functionID) originally included in the RDMA request. An identifier of a function, wherein the function called by the function identifier corresponding to the first identifier requires more computing power than the function called by the function identifier corresponding to the second identifier. Preset information is stored in the second device, and it is determined whether to execute the data read request on the first processor core or on the second processor core by combining the preset information with the function identifier. The preset information can be used for this application The embodiment registers the registration information for the identifiers of functions with low required computing capabilities. Correspondingly, only the first identifier is included in the preset information, and the preset information is used for the second device to distinguish data with different required computing capabilities. A read request. When the function identifier in the data read request is included in the preset information, the second device executes the data read request on the second processor core. When the function identifier in the data read request is not included in the When the preset information is available, the second device executes the data read request on the first processor core. Wherein, the registration process may be performed by the second device, which notifies the first device of the registered function identifier, or may be registered by the first device, and then notified of the registered function identifier to the second device, or by The third-party device registers and notifies the first device and the second device, or the first device does not need to perceive the registration process and registration result, which is not limited in this embodiment of the present application.

As for the target data, the above linked list/tree structure data is taken as an example, that is, the location of the target data in the memory of the second device needs to be indicated by multiple pointers. For the target data with different data volumes, the computing power required in the large and small core processors is different. The target data with low computing power can be allocated to the second processor core of the big and small core processors for processing, and the target with high computing power Data may be allocated to the first processor core of the large and small core processors for processing.

The data read request may also include a read address or a write address of the target data, which is not limited here. The user process of the first device can initiate an acquisition request for acquiring target data, and the user process triggers the doorbell register of the NIC of the first device, so that the NIC of the first device obtains the acquisition request, and carries the above-mentioned functions in the acquisition request The identification constitutes a data read request, and then the data read request is sent to the second device through SQ. In the embodiment of the present application, the user process can also trigger the doorbell register through middleware, and the middleware can be a unified communications exchange (unified communications exchange, UCX), which is used to promote rapid development by providing an advanced application programming interface (application programming interface, API), Mask low-level details while maintaining high performance and scalability.

In the embodiment of the present application, the NIC of the second device receives the data read request through RQ, and after step 301, the NIC of the second device rings the doorbell to the first register of the large and small core processors according to the mapping relationship between the QP and the doorbell register. The doorbell register in the second processor core, the mapping relationship indicates that each pair of QPs in the second device is bound to a doorbell register. The second processor core also includes a plurality of poll threads, and the number of doorbell registers is related to the number of required poll threads, which can be the same as the number of poll threads, or each poll thread can correspond to a plurality of doorbell registers, and each poll thread only It is necessary to poll the doorbell register bound to it. When the doorbell register is triggered, the poll thread can obtain the above data read request from the QP bound to the doorbell register.

302. The second device determines to schedule the data processing request to the first processor core for processing according to the information carried in the data processing request, or determines to schedule the data processing request to the second processor core for processing.

The information carried in the data processing request may indicate that the second device is processed by the first processor core, or that the second device is processed by the second processor core. After the second device receives the above data processing request, when the information indicates that the second device When processing by the first processor core, the second device may determine to schedule the first processor core to process the data processing request, and when the information indicates that the second device is processing by the second processor core, the second device may determine to schedule the second The processor core handles the data processing request.

Taking the data reading request for accessing the database of the second device as an example, when the second device matches the function identifier contained in the data processing request in the registered function identifier, the second device can directly pass the second processing The core executes the data read request, and based on the key of the target data, tracks the position of the target data through multiple pointers to read the target data. When the registered function identifiers of the second device cannot match the function identifier included in the data processing request, the second device may execute the data read request through the first processor core.

The main functions of the second processor core can be divided into three parts: poll thread, scheduling thread and execution thread. The poll thread sends the data reading request to the scheduling thread, and the scheduling thread can match the data reading request after receiving the data reading request. When the function identifier in the function identifier and the registered function identifier match successfully, it can be confirmed that the on-chip buffer (buffer) of the second processor core is empty and full. When the on-chip buffer is full, the data read request is placed in the first In the second processor core queue, when the on-chip buffer is not full, the read command can be directly written into the on-chip buffer when the second processor core queue is empty. The execution thread can obtain a data read request from the on-chip buffer, and according to the key of the target data in the data read request, the execution thread can track the read position of the target data through multiple pointers.

The execution process when the above-mentioned function identification is successfully matched can refer to an internal flow chart shown in Figure 4. The first device includes user threads and NIC, and the second device includes NIC, second processor core and memory. The core includes a poll thread, a scheduling thread, and an execution thread, and the memory stores data in a tree structure, and the tree structure data includes a root node, an intermediate node, and a leaf node. The user thread of the first device triggers the doorbell register of the NIC of the first device, so that the NIC of the first device sends a data read request to the NIC of the second device, and the NIC of the second device fills the RQ with the data read request, and Trigger the doorbell register of the poll thread, so that the poll thread forwards the data reading request in RQ to the scheduling thread, and the scheduling thread schedules the execution thread according to the data reading request. The execution thread performs pointer tracking based on the key of the target data, and through multiple accesses memory to obtain the intermediate node pointed to by the root node and the leaf node pointed to by the intermediate node, and find the node containing the key of the target data according to the leaf node pointed to by the intermediate node, the execution thread can obtain the target data, and trigger the first The doorbell register of the NIC of the second device, so that the NIC of the second device transmits the target data to the NIC of the first device through the communication between the first device and the second device, and the NIC of the first device receives the target data through RQ, and sends The receiving result is stored in CQ. The user thread of the first device can poll the CQ of the first device. When the CQ indicates that the receiving is successful, the user thread can obtain the target data from the RQ.

In the embodiment of the present application, the second processor core may have various implementation forms, such as an area-optimized advanced ARM/fifth generation reduced instruction set computer (5th reduced instruction set computer, RISC-V), each thread has complete functions, Poll/scheduling/execution and other functions can be realized, and hardware-level inter-thread switching can be realized through the micro-architecture between each thread, such as sharing resources such as L/S interface/arithmetic and logic unit (ALU) through hardware arbitration Scheduling and use; the high-performance first processor core can have multiple implementation forms, such as high-performance x86/ARM/RISC-V, the implementation position of the multi-threaded second processor core is related to the demand, and can be combined with the high-performance large core On a CPU small square (die), or not on the same die.

When the function identifier in the data read request fails to match the registered function identifier, the scheduling thread of the second processor core can schedule the first processor core to process the data read request, avoiding the processing performance of the second processor core. Poorly affects the execution performance of large-grained RPC. Specifically, after the scheduling thread of the second processor core determines that the data read request is processed by the first processor core, the data read request can be forwarded to the queue of the first processor core, and the first processor core The use flag of the core queue, the scheduling thread can record the empty/non-empty flag, and the non-empty flag indicates the used flag of the first processor core queue, that is, the scheduling thread of the second processor core can maintain all the first processing The empty/non-empty flag of the processor core queue, the first processor core only needs to poll the empty/non-empty flag in the scheduling thread of the second processor core, and there is no need to poll all command queues, compared to the number of poll threads occupied Direct poll is greatly reduced. When the first processor core polls the non-empty flag, it can obtain the data read request from the command queue, and execute the data read request through the execution thread of the first processor core, based on the key of the target data, query Get target data.

In the embodiment of the present application, in the scenario where the function identifier matches successfully, when the second processor core finds that the data processing request meets a preset condition during the process of executing the data processing request, the preset condition may be the one that needs to be called. The service/function does not support or supports processing on the second processor core but the performance is poor, or the second processor core does not support the computing power required for the data processing request, such as the B+ tree split operation caused by the insertion operation. The two processor cores support the insertion function, but the tree splitting operation caused by the insertion function does not have enough computing power to support it. At this time, the second processor core may call the execution thread of the first processor core to perform corresponding operations.

Please refer to another internal flow chart shown in FIG. 5. Taking the data processing request as a data write request as an example, the first device includes a user thread and a NIC, and the second device includes a NIC, a second processor core, a first A processor core and a memory, wherein the second processor core includes a poll thread, a scheduling thread, and an execution thread, and the first processor core includes a poll thread and an execution thread. The user thread of the first device initiates a data write request, and by triggering the doorbell register of the NIC of the first device, the NIC of the first device sends the data write request to the second device through the communication between the first device and the second device. equipment. The NIC of the second device receives the data write request through the RQ and triggers the doorbell register bound to the RQ. Correspondingly, the poll thread bound to the doorbell register in the second processor core can obtain the data from the RQ write request. The data write request includes a function identifier indicating processing on the second processor core, and the scheduling thread of the second processor core schedules the execution thread of the second processor core to execute the data write request. The execution thread traces the insertion position of the target data in the memory through multiple pointers. When it is determined that the nodes in the memory can write all the target data, it can directly insert the target data in the memory, and then send a request completion response to the NIC of the second device. The NIC of the second device communicates with the NIC of the first device to forward the request completion response, and the user thread of the first device may poll the NIC of the first device to obtain the request completion response, so as to determine that data writing is completed. When it is determined that the nodes in the memory cannot write all the target data and need to split the target data to other nodes for writing, that is, when writing data will cause the split operation of the tree, the scheduling thread of the second processor core can schedule the first processor The core executes the data writing request. Exemplarily, the second processor core can write the data writing request and the current location reorganization command that needs to be inserted, and return to the scheduling thread, and the scheduling thread fills the request of reorganizing the package into In the queue of the large core cluster, wait for the large core to call the request and record the usage flag. After the poll thread of the second processor core polls the usage flag, it can obtain the data write request and The current position to be inserted reorganizes the command and forwards it to the execution thread of the first processor core for execution. The execution thread of the first processor core can perform tree splitting according to the data write request and the current position to be inserted. Then, the request completion response is fed back to the user thread of the first device through the NIC of the second device and the NIC of the first device.

In this embodiment of the application, the first device sends a data processing request to the second device, and the information carried in the data processing request may instruct the second device to determine whether to execute the data processing request on the first processor core or the second processor core, When the information indicates execution on the first processor core, the second device may schedule the first processor core to execute the data processing request, and when the information indicates execution on the second processor core, the second device may schedule the second processing request The processor core executes the data processing request. Wherein, when the second device processes requests with small computing power, due to the small overhead of the second processor core, it can support more concurrent data processing and reduce the processing delay, while requests with large computing power are due to the second processor core. The high processing capability of a processor core can guarantee the processing effect.

The data processing method has been described above, and the processor chip that executes the data processing method will be described below.

Please refer to FIG. 6, as shown in FIG. 6, it is a schematic structural diagram of a processor chip provided by the embodiment of the present application. The processor chip 60 includes: a first processor core 601 and a second processor core 602. The first processor core The processing capability of 601 is greater than that of the second processor core 602;

The second processor core 602 is configured to receive a data processing request from a first device, where the first device is a device communicatively connected to the second device where the processor chip is located;

The second processor core 602 is further configured to determine to schedule the data processing request to the first processor core 601 for processing according to information carried in the data processing request, or determine to schedule the data processing request to the second processor core 602 for processing.

Optionally, the second processor core 602 includes a polling thread and a scheduling thread, and the second processor core 602 is specifically used for:

polling by using the polling thread, and obtaining the data processing request sent by the first device from the receiving queue of the second device;

Utilize the polling thread to send the data processing request to the scheduling thread.

Optionally, the first processor core 601 and the second processor core 602 include execution threads, and the second processor core 602 is specifically configured to: determine to schedule the data processing request to The execution thread in the first processor core 601 processes, or determines to dispatch the data processing request to the execution thread in the second processor core 602 for processing.

Optionally, the data processing request is a database access request for accessing the database in the second device, and the database access request includes any of the following: data write request, data read request, data update request, data delete request, file Lock request, data retrieval request.

Optionally, the information carried in the data processing request includes a function identifier;

The second processor core 602 is specifically configured to determine to schedule the data processing request to the first processor core 601 for processing according to the function identifier and preset information in the second device, or determine to schedule the data processing request to the second processor Core 602 processes.

Optionally, the processor chip further includes at least one doorbell register 603: the second processor core 602 is used to poll at least one doorbell register by using a polling thread, and acquire data from the receiving queue bound to the first doorbell register for processing ask.

Optionally, the second processor core 602 is also used for:

After using the scheduling thread to determine to schedule the data processing request to the execution thread in the second processor core 602 according to the information carried by the data processing request, when the preset condition is met, use the scheduling thread to call the execution thread of the first processor core 601 The thread processes the data processing request, and the preset condition indicates that the execution thread of the second processor core 602 cannot execute the data processing request.

FIG. 7 is a schematic diagram of a possible logical structure of a computing device 70 provided by an embodiment of the present application. The computing device 70 includes: a processor 701 , a communication interface 702 , a storage system 703 and a bus 704 . The processor 701 , the communication interface 702 and the storage system 703 are connected to each other through a bus 704 . In the embodiment of the present application, the processor 701 is used to control and manage the actions of the computing device 70 , for example, the processor 701 is used to execute the steps performed by the second device in the method embodiment in FIG. 3 . Communication interface 702 is used to support computing device 70 in communicating. The storage system 703 is used for storing program codes and data of the computing device 70 .

Wherein, the processor 701 may be a central processing unit, a general purpose processor, a digital signal processor, an application specific integrated circuit, a field programmable gate array or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It can implement or execute the various illustrative logical blocks, modules and circuits described in connection with the present disclosure. The processor 701 may also be a combination for realizing certain functions, for example, a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, and the like. The bus 704 may be a peripheral component interconnect standard (peripheral component interconnect, PCI) bus or an extended industry standard architecture (extended industry standard architecture, EISA) bus or the like. The bus can be divided into address bus, data bus, control bus and so on. For ease of representation, only one thick line is used in FIG. 7 , but it does not mean that there is only one bus or one type of bus.

The first processor core 601 , the second processor core 602 and the doorbell register 603 in the processor chip 60 are equivalent to components in the processor 701 in the computing device 70 .

The computing device 70 in this embodiment may correspond to the second device in the method embodiment in FIG. 3 above, and the communication interface 702 in the computing device 70 may implement the functions and/or functions of the second device in the method embodiment in FIG. Or the various steps implemented, for the sake of brevity, will not be repeated here.

In another embodiment of the present application, a deterministic machine-readable storage medium is also provided, and a deterministic machine-executable instruction is stored in the deterministic machine-readable storage medium. When the processor of the device executes the deterministic machine-executable instruction, the device executes Steps in the data processing method performed by the second device in the above method embodiment in FIG. 3 .

In another embodiment of the present application, a computer program product is also provided, the computer program product includes computer-executable instructions, and the computer-executable instructions are stored in a computer-readable storage medium; when the processor of the device When the determining machine executes the instruction, the device executes the steps of the data processing method performed by the second device in the method embodiment in FIG. 3 above.

Those skilled in the art can clearly understand that for the convenience and brevity of the description, the specific working process of the above-described system, device and unit can refer to the corresponding process in the foregoing method embodiment, which will not be repeated here.

In the several embodiments provided in this application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, each unit may exist separately physically, or two or more units may be integrated into one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units.

If the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or part of the contribution to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , including several instructions for enabling a computing device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, read-only memory), random access memory (RAM, random access memory), magnetic disk or optical disk, and other media that can store program codes.

Claims (17)

1. A method of data processing, the method being applied to a data processing system comprising a first device and a second device, the method comprising:

the second device receives a data processing request sent by the first device, wherein the second device comprises a processor, the processor comprises a first processor core and a second processor core, and the processing capacity of the first processor core is greater than that of the second processor core;

and the second equipment determines to dispatch the data processing request to the first processor core for processing or determines to dispatch the data processing request to the second processor core for processing according to the information carried by the data processing request.

2. The method of claim 1, wherein the second processor core comprises a polling thread and a scheduling thread,

the receiving, by the second device, the data processing request sent by the first device specifically includes:

the polling thread acquires a data processing request sent by the first equipment from a receiving queue of the second equipment through polling;

and the polling thread sends the data processing request to the scheduling thread.

3. The method of claim 2, wherein the first processor core and the second processor core comprise threads of execution;

the second device determines to dispatch the data processing request to the first processor core for processing according to the information carried by the data processing request, or determines to dispatch the data processing request to the second processor core for processing, which specifically includes:

and the scheduling thread in the second processor core determines to schedule the data processing request to the execution thread in the first processor core for processing according to the information carried by the data processing request, or determines to schedule the data processing request to the execution thread in the second processor core for processing.

4. The method according to any one of claims 1 to 3, wherein the data processing request is a database access request for accessing a database in the second device, and the database access request includes any one of: data write requests, data read requests, data update requests, data delete requests, file lock requests, data retrieval requests.

5. The method according to claim 1 or 2, wherein the information carried by the data processing request comprises a function identifier;

the second device determines to dispatch the data processing request to the first processor core for processing according to the information carried by the data processing request, or determines to dispatch the data processing request to the second processor core for processing, which specifically includes:

and the second equipment determines to dispatch the data processing request to the first processor core for processing according to the function identifier and preset information in the second equipment, or determines to dispatch the data processing request to the second processor core for processing.

6. The method of claim 5, wherein before the second device receives the data processing request sent by the first device, the method further comprises:

and the second equipment registers the function identifier to generate the preset information.

7. The method of claim 2, wherein the polling thread obtaining the data processing request sent by the first device from the receive queue of the second device by polling comprises:

and the polling thread polls at least one doorbell register in the processor and acquires the data processing request from a receiving queue bound with the first doorbell register.

8. The method according to claim 3, wherein the scheduling thread in the second processor core determines, according to information carried by the data processing request, that the data processing request is scheduled to be processed by an execution thread in the second processor core, and the method further comprises:

and when a preset condition is met, the scheduling thread of the second processor core calls the execution thread of the first processor core to process the data processing request, and the preset condition indicates that the execution thread of the second processor core cannot execute the data processing request.

9. A processor chip, comprising: the system comprises a first processor core and a second processor core, wherein the processing capacity of the first processor core is larger than that of the second processor core;

the second processor core is used for receiving a data processing request from first equipment, wherein the first equipment is equipment in communication connection with second equipment where the processor chip is located;

and the second processor core is further configured to determine to dispatch the data processing request to the first processor core for processing according to information carried by the data processing request, or determine to dispatch the data processing request to the second processor core for processing.

10. The processor chip of claim 9, wherein the second processor core comprises a polling thread and a scheduling thread, the second processor core being configured to:

polling by using the polling thread, and acquiring a data processing request sent by the first equipment from a receiving queue of the second equipment;

and sending the data processing request to the scheduling thread by utilizing the polling thread.

11. The processor chip of claim 10, wherein the first processor core and the second processor core comprise threads of execution, and wherein the second processor core is specifically configured to: and determining to dispatch the data processing request to an execution thread in the first processor core for processing by using the dispatching thread according to the information carried by the data processing request, or determining to dispatch the data processing request to an execution thread in the second processor core for processing.

12. The processor chip according to any one of claims 9 to 11, wherein the data processing request is a database access request for accessing a database in the second device, and the database access request includes any one of: data write requests, data read requests, data update requests, data delete requests, file lock requests, data retrieval requests.

13. The processor chip according to any of claims 9-12, wherein the information carried by the data processing request comprises a function identification;

the second processor core is specifically configured to determine to dispatch the data processing request to the first processor core for processing according to the function identifier and information preset in the second device, or determine to dispatch the data processing request to the second processor core for processing.

14. The processor chip of claim 9, further comprising at least one doorbell register: and the second processor core is used for polling the at least one doorbell register by using the polling thread and acquiring the data processing request from a receiving queue bound with the first doorbell register.

15. The processor chip of claim 10, wherein the second processor core is further configured to:

after the scheduling thread is used for determining to schedule the data processing request to an execution thread in the second processor core according to the information carried by the data processing request, when a preset condition is met, the scheduling thread is used for calling the execution thread of the first processor core to process the data processing request, and the preset condition indicates that the execution thread of the second processor core cannot execute the data processing request.

16. A computing device, comprising: a processor coupled with the memory,

the processor is to execute instructions stored in the memory to cause the computing device to perform the method of any of claims 1 to 8.

17. A system, characterized in that the system comprises a first device and a second device, the first device and the second device being communicatively connected, the first device being configured to send a data processing request to the second device, the second device being configured to perform the method according to any one of claims 1 to 8.

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