CN115827535A - Control method, device and storage medium for single-wire synchronous two-way communication - Google Patents
Control method, device and storage medium for single-wire synchronous two-way communication Download PDFInfo
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Abstract
The application discloses a control method, a control device and a storage medium for single-wire synchronous two-way communication, wherein the method comprises the steps of sending a synchronous signal to a slave; sending the first bit data to the slave and receiving the returned second bit data; sending third-bit data to the slave and receiving returned fourth-bit data; and analyzing the first bit data and the second bit data to complete data real-time interaction. The method solves the problems that the prior common communication two-way communication needs more than two IO ports in two directions, and the single-wire communication is basically one-way communication or logic complex with high requirements on MCU resources, can realize the information interaction of the single-wire two-way communication, and can be widely applied to the field of single-wire synchronous two-way communication.
Description
Technical Field
The present application relates to the field of single-wire synchronous bidirectional communication, and in particular, to a control method, apparatus and storage medium for single-wire synchronous bidirectional communication.
Background
Two control panels are needed for bidirectional information interaction, MCU resources on the control panels are limited, and hardware is fixedly connected with a common IO port. The current commonly used two-way communication comprises serial port communication, IIC communication, SPI communication and the like, at least two IO ports in two directions are needed, single-wire communication is basically one-way communication, and the problems of complex logic and high requirement on MCU resources exist.
Therefore, the above technical problems of the related art need to be solved.
Disclosure of Invention
The present application is directed to solving one of the technical problems in the related art. Therefore, the embodiment of the application provides a control method, a control device and a storage medium for single-wire synchronous two-way communication, which can realize single-wire two-way communication information interaction.
According to an aspect of the embodiments of the present application, a method for controlling single-wire synchronous bidirectional communication is provided, the method including:
sending a synchronization signal to the slave;
sending the first bit data to the slave and receiving the returned second bit data;
sending third-bit data to the slave and receiving returned fourth-bit data;
and analyzing the first bit data and the second bit data to complete data real-time interaction.
In one embodiment, the method further comprises:
receiving the synchronous signal sent by the host;
after receiving first bit data sent by a host, sending second bit data to the host;
and after receiving the third bit of data sent by the host, sending the fourth bit of data to the host.
In one embodiment, receiving the synchronization signal sent by the host includes:
and setting the slave machine communication IO as a pull-up input, detecting the communication IO level once every 10MS, recording, judging whether the communication IO level is the same as the last time, if not, resetting the recording level, and judging the communication IO level as a synchronous signal.
In one embodiment, the sending the first bit of data to the slave and receiving the second bit of data back comprises:
detecting a communication IO level every preset time, judging whether the communication IO level is the same as the last time, and counting if the communication IO level is the same as the last time;
and when the count reaches a preset value, determining that the current data is jittered, and finishing the receiving of the first data.
In one embodiment, the sending the third bit of data to the slave and receiving the returned fourth bit of data includes:
detecting a communication IO level every preset time, judging whether the communication IO level is the same as the last time, and counting if the communication IO level is the same as the last time;
and when the count reaches a preset value, determining that the current data is jittered, and finishing the reception of the second bit data.
In one embodiment, if the communication IO level is different from the last time, the counts of the master and the slave are cleared.
In one embodiment, the interruption time of the master sending signal is consistent with the interruption time of the slave sending signal.
According to an aspect of the embodiments of the present application, there is provided a control device for single-wire synchronous bidirectional communication, the device including:
a first module for sending a synchronization signal to a slave;
the second module is used for sending the first bit data to the slave and receiving the returned second bit data;
the third module is used for sending third-bit data to the slave and receiving returned fourth-bit data;
and the fourth module is used for analyzing the first bit data and the second bit data to finish data real-time interaction.
According to an aspect of the embodiments of the present application, there is provided a control device for single-wire synchronous bidirectional communication, the device including:
at least one processor;
at least one memory for storing at least one program;
when at least one of the programs is executed by at least one of the processors, a control method of one-wire synchronous bidirectional communication according to the foregoing embodiments is implemented.
According to an aspect of the embodiments of the present application, there is provided a storage medium storing a program executable by a processor, wherein the program executable by the processor implements a control method of single-wire synchronous bidirectional communication according to the foregoing embodiments when executed by the processor.
The control method, the device and the storage medium for single-wire synchronous two-way communication provided by the embodiment of the application have the beneficial effects that: the method of the application comprises the steps of sending a synchronization signal to a slave; sending the first bit data to the slave and receiving the returned second bit data; sending third-bit data to the slave and receiving returned fourth-bit data; and analyzing the first bit data and the second bit data to complete data real-time interaction. The method solves the problems that the prior common communication two-way communication needs more than two IO ports in two directions, and the single-wire communication is basically one-way communication or logic complex with high requirements on MCU resources, can realize the information interaction of the single-wire two-way communication, and can be widely applied to the field of single-wire synchronous two-way communication.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a flowchart of a control method for single-line synchronous bidirectional communication according to an embodiment of the present disclosure;
fig. 2 is a host communication flowchart of a control method for single-line synchronous bidirectional communication according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a control device for single-wire synchronous two-way communication according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of another control device for single-wire synchronous bidirectional communication according to an embodiment of the present disclosure.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Two control panels are needed for bidirectional information interaction, MCU resources on the control panels are limited, and hardware is fixedly connected with a common IO port. The current commonly used two-way communication comprises serial port communication, IIC communication, SPI communication and the like, at least two IO ports in two directions are needed, single-wire communication is basically one-way communication, and the problems of complex logic and high requirement on MCU resources exist. For example, in a vehicle-mounted air cleaning scheme, the touch key display panel and the battery management panel are only connected by a single wire, and the problem of bidirectional information interaction is to be realized.
In order to solve the above problems, the present application proposes a control method, apparatus and storage medium for single-wire synchronous bidirectional communication. Fig. 1 is a flowchart of a control method for single-line synchronous bidirectional communication according to an embodiment of the present disclosure. As shown in fig. 1, a control method for single-line synchronous bidirectional communication is not proposed, which includes:
and S101, sending a synchronization signal to the slave.
And S102, sending the first bit data to the slave and receiving the returned second bit data.
And S103, transmitting the third-bit data to the slave and receiving the returned fourth-bit data.
And S104, analyzing the first bit data and the second bit data to complete data real-time interaction.
Optionally, the method of this embodiment further includes, at the slave end: receiving the synchronous signal sent by the host; after receiving the first bit data sent by the host, sending second bit data to the host; and after receiving the third bit of data sent by the host, sending the fourth bit of data to the host.
Wherein, the receiving the synchronization signal sent by the host computer includes: and setting the slave machine communication IO as a pull-up input, detecting the communication IO level once every 10MS, recording, judging whether the communication IO level is the same as the last time, if not, resetting the recording level, and judging the communication IO level as a synchronous signal.
In step S102, the sending the first bit data to the slave and receiving the returned second bit data includes: detecting a communication IO level every preset time, judging whether the communication IO level is the same as the last time, and counting if the communication IO level is the same as the last time; and when the count reaches a preset value, determining that the current data is jittered, and finishing the receiving of the first bit data.
In step S103, the sending the third bit data to the slave and receiving the returned fourth bit data includes: detecting a communication IO level every preset time, judging whether the communication IO level is the same as the last time, and counting if the communication IO level is the same as the last time; and when the count reaches a preset value, determining that the current data is jittered, and finishing the reception of the second bit data. In this embodiment, if the communication IO level is different from the previous time, the counts of the master and the slave are cleared.
In the present embodiment, the interrupt time of the master transmission signal and the interrupt time of the slave transmission signal are the same.
The control method for single-wire synchronous two-way communication provided by the application has the following advantages: single-wire two-way communication information interaction is realized; jitter elimination and stable performance; the communication rate can be adjusted freely with the data system, and the problem of communication rate of different systems can be solved; the method is applicable to various single-direction and two-direction communication systems; a synchronous signal is set, so that the problem of traffic collision in communication is solved; the problem that bidirectional communication resources are not enough due to the built-in MCU is solved; the problem of insufficient communication IO ports is solved; the synchronous signal and the master-slave relation are set to prevent the problem of traffic collision; the data length can be defined arbitrarily; the real-time performance is high.
Fig. 2 is a host communication flowchart of a control method for single-wire synchronous bidirectional communication according to an embodiment of the present application. As shown in fig. 2, the configuration signal pin of the host is an output module, and determines that the timing mark of 10ms is 1, if yes, the timing mark is added by 1, and if no, the process is directly ended; judging whether the count value is greater than 50, if so, judging whether the current count value is greater than 75, and if so, sending first bit data to the slave and then ending the flow; if not, the signal pin is configured to be in an input mode and receives the first bit data sent by the slave.
For clarity of the technical solution of the present application, a battery management board is used as a master, and a touch display board is used as a slave, so as to illustrate a control method for single-wire synchronous bidirectional communication provided by the present application, which specifically includes:
(1) Host computer terminal
MCU communication IO is set as an output port, and a 10MS timer interrupt timer is configured as a communication rate (different time can be set according to system requirements).
The host sends a synchronous signal: the host communication IO is set as an output port, and 500MS synchronous signals are sent to switch the communication IO level every 10 MS.
The host sends a first bit of data: the host communication IO is set as an output port, the data '0' is configured to the communication IO port to output 'Lo', and the data '1' is configured to the communication IO port to output 'Hi', and the data are continuously sent for 250ms.
The master machine receives the first bit data of the slave machine: the host communication IO is set as pull-up input, communication IO level is detected every 10MS, lo is data 0, hi is data 1, and recording is carried out, whether the communication IO level is the same as the last time or not is judged, 1 is added to the same time counting value, when the counting value reaches 10, the same data is received for 10 times, at the moment, the data is jitter eliminated, the first bit data of the host is recorded, the counting is continued for 15 times, and the first bit data receiving is completed.
The host sends the second bit data: the host communication IO is set as an output port, the data '0' is configured to the communication IO port to output 'Lo', and the data '1' is configured to the communication IO port to output 'Hi', and the data are continuously sent for 250ms.
The host receives the second bit data of the slave: the host communication IO is set as pull-up input, communication IO level is detected every 10MS, lo is data 0, hi is data 1, and the data is recorded, whether the communication IO level is the same as the previous time or not is judged, 1 is added to the same time counting value, when the counting value reaches 10, the same data is received for 10 times, at the moment, the data is removed, the second-bit data of the host is recorded, the counting is continued for 15 times, and the second-bit data receiving is completed.
(2) Slave terminal
The MCU communication IO is set as a pull-up input port, and a 10MS timer interrupt timer is configured as a communication rate (different time can be set according to system requirements), and the communication rate must be consistent with the main timer interrupt time.
The slave machine receives a master synchronization signal: and setting the communication IO of the slave computer as pull-up input, detecting the communication IO level every 10MS, recording, judging whether the communication IO level is the same as the last time, if not, resetting the recording level, and judging the communication IO level as a synchronous signal.
The slave machine receives the first bit data of the host machine: and setting the communication IO of the slave computer as pull-up input, detecting the communication IO level every 10MS, setting 'Lo' as data '0' and 'Hi' as data '1', recording, adding 1 to the same time value when judging whether the communication IO level is the same as the last time, receiving the same data 10 times when the counting value reaches 10, eliminating jitter of the data, recording the first bit data of the host computer, continuously counting for 15 times, and finishing the reception of the first bit data.
The slave machine sends a first bit of data: the communication IO of the slave is set as an output port, the data '0' is configured with the communication IO port to output 'Lo', and the data '1' is configured with the communication IO port to output 'Hi', and the data are continuously sent for 250ms.
The slave machine receives the second bit data of the host machine: and setting the communication IO of the slave computer as pull-up input, detecting the communication IO level every 10MS, setting 'Lo' as data '0' and 'Hi' as data '1', recording, adding 1 to the same time value when judging whether the communication IO level is the same as the last time, receiving the same data 10 times when the counting value reaches 10, eliminating the jitter of the data, recording the second-bit data of the host computer, continuously counting for 15 times, and finishing the second-bit data receiving.
The slave machine sends second bit data: the communication IO of the slave is set as an output port, the data '0' configures the communication IO port to output 'Lo', and the data '1' configures the communication IO port to output 'Hi' and continuously transmits for 250ms. And increasing the data length to circulate the steps. The synchronous time and the data sending time can be adjusted according to different systems.
To summarize, the communication flow of this embodiment is: the method comprises the steps of sending a synchronization signal by a host machine, = > receiving a synchronization signal by a slave machine, = > sending a first bit data by the host machine, = > receiving a first bit data by the slave machine, = > sending a first bit data by the slave machine, = > receiving a first bit data by the host machine, = > sending a second bit data by the host machine, = > receiving a second bit data by the slave machine, = > sending a second bit data by the slave machine, = > receiving a second bit data by the host machine, and then ending the steps are repeated to realize real-time data interaction.
In addition, the present application also provides a control device for single-wire synchronous two-way communication, as shown in fig. 3, the device includes:
a first module 301, configured to send a synchronization signal to a slave;
a second module 302, configured to send the first bit data to the slave and receive the returned second bit data;
a third module 303, configured to send data of a third bit to the slave and receive data of a fourth bit returned;
a fourth module 304, configured to parse the first bit of data and the second bit of data, and complete real-time data interaction.
In addition, the present application also provides a control device for single-wire synchronous two-way communication, as shown in fig. 4, the device includes:
at least one processor;
at least one memory for storing at least one program;
when at least one of the programs is executed by at least one of the processors, a control method of one-wire synchronous bidirectional communication according to the foregoing embodiments is implemented.
In addition, the present application also proposes a storage medium storing a program executable by a processor, wherein the program executable by the processor implements a control method of single-wire synchronous bidirectional communication as described in the foregoing embodiment when executed by the processor.
Similarly, the contents in the foregoing method embodiments are all applicable to this storage medium embodiment, the functions specifically implemented by this storage medium embodiment are the same as those in the foregoing method embodiments, and the beneficial effects achieved by this storage medium embodiment are also the same as those achieved by the foregoing method embodiments.
In alternative embodiments, the functions/acts noted in the block diagrams may occur out of the order noted in the operational illustrations. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality/acts involved. Furthermore, the embodiments presented and described in the flowcharts of the present application are provided by way of example in order to provide a more thorough understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is changed and in which sub-operations described as part of larger operations are performed independently.
Furthermore, although the present application is described in the context of functional modules, it should be understood that, unless otherwise stated to the contrary, one or more of the functions and/or features may be integrated in a single physical device and/or software module, or one or more functions and/or features may be implemented in separate physical devices or software modules. It will also be understood that a detailed discussion regarding the actual implementation of each module is not necessary for an understanding of the present application. Rather, the actual implementation of the various functional modules in the apparatus disclosed herein will be understood within the ordinary skill of an engineer, given the nature, function, and internal relationship of the modules. Accordingly, those skilled in the art can, using ordinary skill, practice the present application as set forth in the claims without undue experimentation. It is also to be understood that the specific concepts disclosed are merely illustrative of and not intended to limit the scope of the application, which is defined by the appended claims and their full scope of equivalents.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the foregoing description of the specification, reference to the description of "one embodiment/example," "another embodiment/example," or "certain embodiments/examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: numerous changes, modifications, substitutions and variations can be made to the embodiments without departing from the principles and spirit of the application, the scope of which is defined by the claims and their equivalents.
The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present application.
Claims (10)
1. A method for controlling single line synchronous bi-directional communication, the method comprising:
sending a synchronization signal to the slave;
sending the first bit data to the slave and receiving the returned second bit data;
sending third-bit data to the slave and receiving returned fourth-bit data;
and analyzing the first bit data and the second bit data to complete data real-time interaction.
2. The method as claimed in claim 1, further comprising:
receiving the synchronous signal sent by the host;
after receiving first bit data sent by a host, sending second bit data to the host;
and after receiving the third bit of data sent by the host, sending the fourth bit of data to the host.
3. The method as claimed in claim 2, wherein receiving the synchronization signal from the host comprises:
and setting the communication IO of the slave computer as pull-up input, detecting the communication IO level every 10MS, recording, judging whether the communication IO level is the same as the last time, if not, resetting the recording level, and judging the communication IO level as a synchronous signal.
4. The method as claimed in claim 1, wherein the step of sending the first bit of data to the slave and receiving the second bit of data back comprises:
detecting a communication IO level every preset time, judging whether the communication IO level is the same as the last time, and counting if the communication IO level is the same as the last time;
and when the count reaches a preset value, determining that the current data is jittered, and finishing the receiving of the first bit data.
5. The method as claimed in claim 1, wherein the step of sending the third data to the slave and receiving the returned fourth data comprises:
detecting a communication IO level every preset time, judging whether the communication IO level is the same as the last time, and counting if the communication IO level is the same as the last time;
and when the count reaches a preset value, determining that the current data is jittered, and finishing the reception of the second bit data.
6. A control method for single line synchronous bidirectional communication according to claim 5, wherein the communication IO level is different from the last time, the counts of the master and the slave are cleared.
7. The method as claimed in claim 1, wherein the master interrupt time of the master transmission signal is the same as the slave interrupt time of the slave transmission signal.
8. A control device for single line synchronous two-way communication, said device comprising:
a first module for sending a synchronization signal to a slave;
the second module is used for sending the first bit data to the slave and receiving the returned second bit data;
the third module is used for sending third-bit data to the slave and receiving returned fourth-bit data;
and the fourth module is used for analyzing the first bit data and the second bit data to finish data real-time interaction.
9. A control device for single line synchronous two-way communication, said device comprising:
at least one processor;
at least one memory for storing at least one program;
a control method for single line synchronous bidirectional communication according to any one of claims 1 to 7 when at least one of said programs is executed by at least one of said processors.
10. Storage medium, characterized in that it stores a program executable by a processor, which when executed by the processor implements a method of controlling a single-wire synchronous bidirectional communication according to any one of claims 1 to 7.
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| CN116107951A (en) * | 2023-04-10 | 2023-05-12 | 佛山市小熊厨房电器有限公司 | Single-wire bidirectional-based data communication method, device and storage medium |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1440161A (en) * | 2002-02-21 | 2003-09-03 | 黄庆文 | Open single-wire asynchronous serial communication bus |
| US20040233917A1 (en) * | 2003-05-21 | 2004-11-25 | Gabriel Rocas | Bi-directional single wire interface |
| US20120027104A1 (en) * | 2010-07-27 | 2012-02-02 | Stmicroelectronics (Rousset) Sas | Single-wire bus communication protocol |
| US20130127517A1 (en) * | 2011-11-22 | 2013-05-23 | Inventec Corporation | Debounce apparatus and method thereof |
| CN112052207A (en) * | 2020-09-29 | 2020-12-08 | 深圳市海和科技股份有限公司 | Single-wire two-way communication system between double MCUs |
| CN112118083A (en) * | 2020-09-02 | 2020-12-22 | 广东瑞德智能科技股份有限公司 | Single-wire half-duplex communication method, communication device and equipment |
| CN112579509A (en) * | 2020-12-14 | 2021-03-30 | 珠海格力电器股份有限公司 | Single-wire communication method, device, electronic equipment and readable storage medium |
| CN113535610A (en) * | 2021-07-13 | 2021-10-22 | 珠海格力电器股份有限公司 | Single-wire communication equipment and control method and storage medium thereof |
-
2022
- 2022-11-07 CN CN202211382459.3A patent/CN115827535A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1440161A (en) * | 2002-02-21 | 2003-09-03 | 黄庆文 | Open single-wire asynchronous serial communication bus |
| US20040233917A1 (en) * | 2003-05-21 | 2004-11-25 | Gabriel Rocas | Bi-directional single wire interface |
| US20120027104A1 (en) * | 2010-07-27 | 2012-02-02 | Stmicroelectronics (Rousset) Sas | Single-wire bus communication protocol |
| US20130127517A1 (en) * | 2011-11-22 | 2013-05-23 | Inventec Corporation | Debounce apparatus and method thereof |
| CN112118083A (en) * | 2020-09-02 | 2020-12-22 | 广东瑞德智能科技股份有限公司 | Single-wire half-duplex communication method, communication device and equipment |
| CN112052207A (en) * | 2020-09-29 | 2020-12-08 | 深圳市海和科技股份有限公司 | Single-wire two-way communication system between double MCUs |
| CN112579509A (en) * | 2020-12-14 | 2021-03-30 | 珠海格力电器股份有限公司 | Single-wire communication method, device, electronic equipment and readable storage medium |
| CN113535610A (en) * | 2021-07-13 | 2021-10-22 | 珠海格力电器股份有限公司 | Single-wire communication equipment and control method and storage medium thereof |
Non-Patent Citations (1)
| Title |
|---|
| LYTTT-: "通信协议之⼀线协议(1-Wire)解析", pages 1, Retrieved from the Internet <URL:https://blog.csdn.net/qq_57398262/article/details/124809747> * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116107951A (en) * | 2023-04-10 | 2023-05-12 | 佛山市小熊厨房电器有限公司 | Single-wire bidirectional-based data communication method, device and storage medium |
| CN116107951B (en) * | 2023-04-10 | 2023-09-08 | 佛山市小熊厨房电器有限公司 | Single-wire bidirectional-based data communication method, device and storage medium |
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