CN114157409B

CN114157409B - Information encryption and decryption processing method and device

Info

Publication number: CN114157409B
Application number: CN202010928578.9A
Authority: CN
Inventors: 李志勇; 张国强; 颜湘; 段亮
Original assignee: China Iwncomm Co Ltd
Current assignee: China Iwncomm Co Ltd
Priority date: 2020-09-07
Filing date: 2020-09-07
Publication date: 2025-04-08
Anticipated expiration: 2040-09-07
Also published as: CN114157409A

Abstract

The invention discloses an information encryption and decryption processing method and device, which relate to the technical field of information and are used for optimizing an encryption and decryption process of an existing SM4 block cipher algorithm, wherein the information encryption method comprises the steps of obtaining a plaintext input sequence X and an encryption key rk _i used in a K-round nonlinear iteration process, carrying out K-round nonlinear iteration operation based on the plaintext input sequence X and the encryption key rk _i, dividing the sequence X into a sequence X ₀, a sequence X ₁, a sequence X ₂ and a sequence X ₃, obtaining a synthetic substitution input sequence A according to X _i+1、X_i+2、X_i+3 and a corresponding rk _i in the ith round nonlinear iteration operation, inputting the sequence A into a lookup table S ₃ for carrying out lookup operation to obtain a synthetic substitution output sequence T _A, carrying out exclusive OR operation on the T _A and the X _i to obtain an output result X _i+4 of the ith round nonlinear iteration operation, and carrying out inverse operation on the output results of the K-4 round to the K-1 round nonlinear iteration operation to obtain a ciphertext output sequence which is encrypted.

Description

Information encryption and decryption processing method and device

Technical Field

The present application relates to the field of information technologies, and in particular, to an information encryption and decryption processing method and apparatus.

Background

The SM4 block cipher algorithm (original SMS4 block cipher algorithm) is a solution which is configured in the electronic equipment and can be applied to secret communication among the electronic equipment or secret information processing of the electronic equipment.

The national password administration in China published wireless local area network product password issue in 2006, and the SM4 block password algorithm is applied to the wireless local area network product, which marks that the SM4 block password algorithm enters a commercialization stage.

The SM4 block cipher algorithm is used as a simple, safe and efficient cipher algorithm, and is well applied in the fields of information encryption protection and integrity check functions. In the application process of the SM4 block cipher algorithm, the algorithm operation efficiency is always an important factor focused by algorithm users, however, the algorithm application in the resource-limited scene is also necessary to be focused correspondingly aiming at the fields of the Internet of things and the like.

The SM4 block cipher algorithm has a block length of 128 bits, a key length of 128 bits, and the encryption and decryption algorithm and the key expansion algorithm both adopt a 32-round nonlinear iterative structure. The algorithm encryption and decryption operation principle is described as follows, plaintext is input, 32 rounds of nonlinear iterative transformation are carried out by using a round key, and then reverse operation is carried out to obtain ciphertext output, wherein the 32 rounds of nonlinear iterative transformation comprise synthesis substitution T, linear transformation L, nonlinear transformation tau and Sbox (S box) table lookup.

In the SM4 block cipher algorithm, the decryption algorithm is the same as the encryption algorithm in structure except that the use sequence of round keys is opposite, and the encryption and decryption operation process analysis of the SM4 block cipher algorithm proves that the operation step core of the SM4 block cipher algorithm is a 32-round nonlinear iteration structure (round function F), and the synthesis substitution T is the core of the nonlinear iteration structure, namely the processing efficiency of the synthesis substitution T directly determines the encryption and decryption processing performance of the algorithm. Therefore, the processing process of the synthetic permutation T needs to be optimized, the single-round processing performance of encryption and decryption operation of the SM4 block cipher algorithm is improved, and the overall performance of the encryption and decryption operation of the algorithm is improved in 32 round of circular call.

In summary, the application provides a method and a device for optimizing encryption and decryption processes of the conventional SM4 block cipher algorithm, so as to improve the performance of encryption and decryption operations of the SM4 block cipher algorithm, and simultaneously consider practical application in resource-limited scenes in scheme selection.

Disclosure of Invention

The application provides an information encryption and decryption processing method and device, which are used for optimizing the encryption and decryption process of the conventional SM4 block cipher algorithm so as to improve the encryption and decryption operation performance of the SM4 block cipher algorithm.

In a first aspect, the present application provides an information encryption processing method, including:

Acquiring an input plaintext input sequence X with the length of N bits by using an input module;

An input module is utilized to acquire an input N/4 bit length encryption key rk _i used in a K round of nonlinear iteration process, wherein one encryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

K-round nonlinear iterative operation is performed based on the plaintext input sequence X and the encryption key rk _i by utilizing an encryption processing module, wherein the plaintext sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X with the length of N/4 bits, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And carrying out reverse operation on output results of the K-4 th round to the K-1 th round by using a reverse order module to obtain a ciphertext output sequence for encrypting the plaintext input sequence X.

In the method, the synthetic replacement operation in the encryption process of the SM4 block cipher algorithm is optimized, the operation step of the synthetic replacement in the encryption algorithm of the SM4 block cipher algorithm is reduced by adopting the operation of looking up the S ₃ table, the complexity of the encryption algorithm of the SM4 block cipher algorithm is further reduced, and the performance is improved.

In a second aspect, the present application provides an information decryption processing method, the method comprising:

acquiring an input ciphertext input sequence X' with the length of N bits by using an input module;

An input module is utilized to acquire an N/4 bit length decryption key rk _i used in an input K round of nonlinear iteration process, wherein one decryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

K rounds of nonlinear iterative operation are carried out based on the ciphertext input sequence X 'and the decryption key rk _i by utilizing a decryption processing module, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X N/4 bits long, sequence X ₂, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthesis substitution is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding decryption key rk _K-1-i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthesis substitution output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ conversion for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And (3) carrying out reverse operation on output results from the K-4 round to the K-1 round by using a reverse order module to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.

In the method, the synthetic replacement operation in the decryption process of the SM4 block cipher algorithm is optimized, the operation step of synthetic replacement in the decryption algorithm of the SM4 block cipher algorithm is reduced by adopting the operation of looking up the S ₃ table, and therefore the complexity of the decryption algorithm of the SM4 block cipher algorithm is reduced, and the performance is improved.

In a third aspect, the present application provides an encryption apparatus for information encryption processing, comprising:

The input module is used for acquiring an input plaintext input sequence X with N bit length and an input encryption key rk _i with N/4 bit length used in the nonlinear iteration process of K rounds, wherein one encryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

The encryption processing module is used for carrying out K-round nonlinear iterative operation based on the plaintext input sequence X and the encryption key rk _i, wherein the plaintext sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X with the length of N/4 bits, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And the reverse order module is used for carrying out reverse order operation on the output results from the K-4 round to the K-1 round to obtain a ciphertext output sequence for encrypting the plaintext input sequence X.

In a fourth aspect, the present application provides a decryption apparatus for information decryption processing, comprising:

The input module is used for acquiring an input ciphertext input sequence X' with N bit length and an input decryption key rk _i with N/4 bit length used in the nonlinear iteration process of K rounds, wherein one decryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

The decryption processing module is used for performing K-round nonlinear iterative operation based on the ciphertext input sequence X 'and the decryption key rk _i, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X N/4 bits long, sequence X ₂, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthesis substitution is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding decryption key rk _K-1-i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthesis substitution output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ conversion for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And the reverse order module is used for carrying out reverse order operation on the output results from the K-4 round to the K-1 round to obtain a plaintext output sequence for decryption of the ciphertext input sequence X'.

In a fifth aspect, the present application provides an encryption apparatus for information encryption processing, the apparatus including a processor and a memory for storing an executable program, the processor implementing the following procedures when the executable program is executed:

acquiring an input plaintext input sequence X with the length of N bits;

acquiring an N/4 bit length encryption key rk _i used in an input K-round nonlinear iteration process, wherein one encryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

k-round nonlinear iterative operation is performed based on the plaintext input sequence X and the encryption key rk _i, wherein the plaintext sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X with a length of N/4 bits, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And carrying out reverse operation on output results of the K-4 round to the K-1 round to obtain a ciphertext output sequence for encrypting the plaintext input sequence X.

In a sixth aspect, the present application provides a decryption apparatus for information decryption processing, the apparatus comprising a processor and a memory for storing an executable program, the processor implementing the following procedure when the executable program is executed:

Acquiring an input ciphertext input sequence X' with the length of N bits;

Obtaining an N/4 bit length decryption key rk _i used in an input K round of nonlinear iteration process, wherein one decryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

K rounds of nonlinear iterative operations are performed based on the ciphertext input sequence X 'and the decryption key rk _i, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthesis substitution is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding decryption key rk _K-1-i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthesis substitution output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ conversion for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And carrying out reverse operation on output results from the K-4 round to the K-1 round to obtain a plaintext output sequence for decryption of the ciphertext input sequence X'.

In addition, the technical effects caused by any implementation manner of the third aspect to the sixth aspect may be referred to the technical effects caused by the first aspect and the second aspect, which are not described herein.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings that are required to be used in the description of the embodiments will be briefly described below. It is evident that the figures in the following description are only some embodiments of the invention, from which other figures can be obtained without inventive effort for a person skilled in the art.

Fig. 1 is a flowchart of an information encryption processing method provided in embodiment 1 of the present application;

Fig. 2 is a flowchart of an information decryption processing method provided in embodiment 1 of the present application;

FIG. 3 is a schematic block diagram of one implementation of the synthetic permutation T provided in example 2 of the present application;

Fig. 4 is a schematic diagram showing the structure of an encryption device for information encryption processing provided in embodiment 3 of the present application;

fig. 5 is a schematic diagram of the structure of an encryption device for information encryption processing provided in embodiment 3 of the present application;

fig. 6 is a schematic diagram showing the structure of a decryption apparatus for information decryption processing provided in embodiment 4 of the present application;

fig. 7 is a schematic diagram of a configuration of a decryption apparatus for information decryption processing provided in embodiment 4 of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be described in further detail below with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

Some words appearing hereinafter are explained:

In the embodiment of the application, the term "and/or" describes the association relation of the association objects, which means that three relations can exist, for example, A and/or B, and can mean that A exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.

The application scenario described in the embodiment of the present application is for more clearly describing the technical solution of the embodiment of the present application, and does not constitute a limitation on the technical solution provided by the embodiment of the present application, and as a person of ordinary skill in the art can know that the technical solution provided by the embodiment of the present application is applicable to similar technical problems as the new application scenario appears. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.

The SM4 block cipher algorithm has a block length of 128 bits, a key length of 128 bits, and an encryption and decryption algorithm and a key expansion algorithm both adopt a 32-round nonlinear iterative structure, and the algorithm encryption and decryption operation principle is described as follows:

(1) Inputting a plaintext:

Assuming that the plaintext input is x= (X ₀、X₁、X₂、X₃), the ciphertext output is y= (Y ₀、Y₁、Y₂、Y₃), the round key is rk _i (i=0, 1,2,.,. 31), wherein ,X₀、X₁、X₂、X₃,Y₀、Y₁、Y₂、Y₃,rk_i is 32-bit data, i is identification information of a round of nonlinear iterative transformation in an encryption process or a decryption process, and i is a non-negative integer less than 32;

(2) 32 rounds of nonlinear iterative transformation:

X_i+4＝F(X_i,X_i+1,X_i+2,X_i+3,rk_i)＝X_i⊕T(X_i+1⊕X_i+2⊕X_i+3⊕rk_i),i＝0、

1. 2.., 31, wherein:

The synthetic permutation T: T (a) =l (τ (a)), a= (a ₀、a₁、a₂、a₃), where a ₀～a₃ is 8-bit data, and F is a round function;

l (B) =b < < 2), (B < < < 10), (B < < < 18), (B < < < 24), where the x is exclusive or, where < < is a cyclic left shift, B < = (B ₀、b₁、b₂、b₃) =τ (a), where B ₀～b₃ are all 8 bits of data;

nonlinear transformation τ, τ (a) = (Sbox (a ₀),Sbox(a₁),Sbox(a₂),Sbox(a₃)); sbox () is a look-up table operation, where the S table is see table 1:

TABLE 1

	0	1	2	3	4	5	6	7	8	9	a	b	c	d	e	f
																	0	d6	90	e9	fe	cc	e1	3d	b7	16	b6	14	c2	28	fb	2c	05
1	2b	67	9a	76	2a	be	04	c3	aa	44	13	26	49	86	06	99
																	2	9c	42	50	f4	91	ef	98	7a	33	54	0b	43	ed	cf	ac	62
3	e4	b3	1c	a9	c9	08	e8	95	80	df	94	fa	75	8f	3f	a6
																	4	47	07	a7	fc	f3	73	17	ba	83	59	3c	19	e6	85	4f	a8
5	68	6b	81	b2	71	64	da	8b	f8	eb	0f	4b	70	56	9d	35
																	6	1e	24	0e	5e	63	58	d1	a2	25	22	7c	3b	01	21	78	87
7	d4	00	46	57	9f	d3	27	52	4c	36	02	e7	a0	c4	c8	9e
																	8	ea	bf	8a	d2	40	c7	38	b5	a3	f7	f2	ce	f9	61	15	a1
9	e0	ae	5d	a4	9b	34	1a	55	ad	93	32	30	f5	8c	b1	e3
																	a	1d	f6	e2	2e	82	66	ca	60	c0	29	23	ab	0d	53	4e	6f
b	d5	db	37	45	de	fd	8e	2f	03	ff	6a	72	6d	6c	5b	51
																	c	8d	1b	af	92	bb	dd	bc	7f	11	d9	5c	41	1f	10	5a	d8
d	0a	c1	31	88	a5	cd	7b	bd	2d	74	d0	12	b8	e5	b4	b0
																	e	89	69	97	4a	0c	96	77	7e	65	b9	f1	09	c5	6e	c6	84
f	18	f0	7d	ec	3a	dc	4d	20	79	ee	5f	3e	d7	cb	39	48

The data in the above table 1 are all expressed by 16 scale, when the input sequence of the S-look-up table operation is "ef", the values after passing through the S-box are the values of the e-th row and the f-th column in the above table 1, that is, when the input sequence is "ef", the output result of the S-look-up table operation is "84" of 16 scale.

(3) Carrying out reverse operation on the nonlinear iterative conversion results X ₃₂、X₃₃、X₃₄、X₃₅ from the 28 th round to the 31 st round to obtain an output sequence Y;

i.e., Y＝(Y₀、Y₁、Y₂、Y₃)＝R(X₃₂,X₃₃,X₃₄,X₃₅)＝(X₃₅,X₃₄,X₃₃,X₃₂), where R is an inverse operation.

In the SM4 block cipher algorithm, the decryption algorithm has the same structure as the encryption algorithm, except that the order of use of round keys is reverse, and the order of use of the decryption keys in the 32 rounds of nonlinear iterative transformation process is the reverse of the order of use of the encryption keys, as follows:

The key usage sequence in encryption is (rk ₀、rk₁,…,rk₃₁);

The key usage sequence at decryption is (rk ₃₁、rk₃₀,…,rk₀).

Embodiments of the application are described in further detail below with reference to the drawings.

In the application, a lookup table S ₃ used in K rounds of nonlinear iterative operation in the encryption processing and decryption processing is obtained in advance according to the encryption operation principle and the decryption operation principle, and encryption processing is carried out on a plaintext input sequence X based on the obtained lookup table S ₃, so that a ciphertext output sequence of the plaintext input sequence X is obtained, or decryption processing is carried out on a ciphertext input sequence X 'based on the obtained lookup table S ₃, so that a plaintext output sequence of the ciphertext input sequence X' is obtained.

Example 1

The embodiment of the application provides an information encryption processing method, which can apply a pre-acquired lookup table S ₃ in the method of the embodiment, and the method can be applied to the scene of encryption processing by adopting an SM4 block cipher algorithm. As shown in fig. 1, the method specifically comprises the following steps:

step S101, an input module is utilized to acquire an input plaintext input sequence X with the length of N bits.

Step S102, an input module is utilized to acquire an N/4 bit length encryption key rk _i used in an input K-round nonlinear iteration process, wherein one encryption key rk _i is used in each round, K is a natural number, and i is 0~K-1.

Step S103, performing K-round nonlinear iterative operation based on the plaintext input sequence X and the encryption key rk _i by using an encryption processing module, wherein the plaintext input sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X N/4 bits long, sequence X ₂, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is obtained by performing preset S ₀ transformation for each element in a preset S table, s ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and the table S ₀, the tables S ₁ and S ₂ are combined according to a preset mode.

As an example, in step S103, when the input sequence a of the synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and the corresponding encryption key rk _i, X _i+1、X_i+2、X_i+3 and the corresponding rk _i may be xored to obtain the input sequence a of the synthetic permutation.

And step S104, carrying out reverse operation on the output results of the K-4 th round to the K-1 st round by utilizing a reverse order module to obtain a ciphertext output sequence for encrypting the plaintext input sequence X.

As an embodiment, in step S104, the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 th round to the K-1 st round may be converted into the sequence order of X _K+3、X_K+2、X_K+1、X_K by using the reverse order module, so as to form the ciphertext output sequence for encrypting the plaintext input sequence X.

As an embodiment, in the steps S101 to S104, N may be 128, k may be 32, and S may be a table composed of 256 bytes, and the lookup table S ₃ may include at least one sub-lookup table, and the sub-lookup table may be a table composed of 1024 bytes.

The lookup table S ₃ in the embodiment of the application comprises a first sub-lookup table S ₃₀, a second sub-lookup table S ₃₁, a third sub-lookup table S ₃₂, Any one, any two or any three of the fourth sub-lookup tables S ₃₃ may be used when implementing the SM4 block cipher algorithm encryption process using the pre-obtained lookup table S ₃, the above-mentioned first sub-lookup table S ₃₀, second sub-lookup table S ₃₁, any one of the third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃, any two or any three sub-lookup tables are realized, namely, the synthetic replacement processing in the encryption process is completed by inquiring M₀S₃₀+M₁S₃₁+M₂S₃₂+M₃S₃₃(M₀≥0,M₁≥0,M₂≥0,M₃≥0,0＜M₀+M₁+M₂+M₃＜4) in the encryption process, and M ₀ to M ₃ respectively represent the first sub-lookup table S ₃₀ of inquiry, A second sub-lookup table S ₃₁, a third sub-lookup table S ₃₂, The number of the fourth sub-lookup table S ₃₃, M _qS_3q (q is 0 or 1 or 2 or 3), characterizes the lookup operation using M _q sub-lookup tables S _3q, wherein the relationship between the sub-lookup tables S ₃₀、S₃₁、S₃₂、S₃₃ will be described later.

As an embodiment, in step S103, the sequence a may be input into the lookup table S ₃ to perform a lookup operation, so as to obtain the synthetic permutation output sequence T _A:

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a lookup table S ₃ for table lookup operation, and the sequence B ₀ with the length of N/4 bits is correspondingly obtained, Sequence B ₁, sequence B ₂, the sequence B ₃ is processed based on a shift principle, the processed table lookup operation result is subjected to exclusive OR operation to obtain a synthesized replacement output sequence T _A, wherein the shift principle comprises that if the sequence B ₀ is obtained by table lookup operation of a sequence a ₀ through a first sub-table S ₃₀, the sequence B ₀ is not subjected to shift processing, if the sequence B ₁ is obtained by table lookup operation of a sequence a ₁ through a second sub-table S ₃₁, the sequence B ₁ is not subjected to shift processing, if the sequence B ₂ is obtained by table lookup operation of a sequence a ₂ through a third sub-table S ₃₂, the sequence B ₂ is not subjected to shift processing, and if the sequence B ₃ is obtained by table lookup operation of a sequence a ₃ through a fourth sub-table S ₃₃, the sequence B ₃ is not subjected to shift processing.

As an embodiment, the sequences a ₀, a ₁, a ₂ and a ₃ are respectively input into the lookup table S ₃ for performing a lookup operation, the sequences B ₀, B ₁, B ₂ and B ₃ with a length of N/4 bits are correspondingly obtained, the results of the lookup operation are processed based on a shift principle, and the result of the lookup operation after the processing is subjected to an exclusive-or operation to obtain the synthetic permutation output sequence T _A, where the synthetic permutation output sequence T _A may be obtained by querying the above M₀S₃₀+M₁S₃₁+M₂S₃₂+M₃S₃₃(M₀≥0,M₁≥0,M₂≥0,M₃≥0,0＜M₀+M₁+M₂+M₃＜4),.

Several illustrative examples are given below for 0< M ₀+M₁+M₂+M₃ <4, where examples A1 to A4 are examples for M ₀+M₁+M₂+M₃ =1, examples B1 to B2 are examples for M ₀+M₁+M₂+M₃ =2, and example C is example for M ₀+M₁+M₂+M₃ =3.

Example A1 only the first sub-lookup Table S is queried ₃₀

Inputting the sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ into a first sub-lookup table S ₃₀ respectively, correspondingly obtaining a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ with the length of N/4 bits, and performing shift and exclusive OR operation on the sequence B ₁、B₂、B₃ to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein the sequence B ₁ circularly shifts left by N/16 bits, the sequence B ₂ circularly shifts left by N/8 bits and the sequence B ₃ circularly shifts left by 3N/16 bits;

Example A2 querying only the second sub-lookup Table S ₃₁

Inputting the sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ into a second sub-lookup table S ₃₁ respectively, correspondingly obtaining a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ with the length of N/4 bits, and performing shift and exclusive OR operation on the sequence B ₀、B₂、B₃ to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein the sequence B ₀ circularly shifts left by 3N/16 bits, the sequence B ₂ circularly shifts left by N/16 bits and the sequence B ₃ circularly shifts left by N/8 bits;

Example A3 querying only the third sub-lookup Table S ₃₂

Inputting the sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ into a third sub-lookup table S ₃₂ respectively, correspondingly obtaining a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ with the length of N/4 bits, and performing shift and exclusive OR operation on the sequence B ₀、B₁、B₃ to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein the sequence B ₀ circularly shifts left by N/8 bits, the sequence B ₁ circularly shifts left by 3N/16 bits and the sequence B ₃ circularly shifts left by N/16 bits;

example A4 only query the fourth sub-lookup Table S ₃₃

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a fourth sub-lookup table S ₃₃, a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ which are corresponding to the N/4 bit length are obtained, and the B ₀、B₁、B₂ is subjected to shift and exclusive OR operation to obtain a synthetic permutation output sequence T _A with the N/4 bit length, wherein the B ₀ is circularly shifted left by N/16 bits, the B ₁ is circularly shifted left by N/8 bits, and the B ₂ is circularly shifted left by 3N/16 bits.

Example B1 only two identical sub-lookup tables are queried

Optionally, when two first sub-lookup tables S ₃₀ are queried simultaneously (M ₀＝2,M₁＝0,M₂＝0,M₃ =0), the sequence a ₀ and the sequence a ₁ are respectively input to the two first sub-lookup tables S ₃₀, the sequence B ₀ and the sequence B ₁ with the length of N/4 bits are correspondingly obtained, the sequence a ₂ and the sequence a ₃ are respectively input to the two first sub-lookup tables S ₃₀, the sequence B ₂ and the sequence B ₃ with the length of N/4 bits are correspondingly obtained, and the B ₁、B₂、B₃ is subjected to shift and exclusive-or operation to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein the B ₁ is circularly shifted left by N/16 bits, the B ₂ is circularly shifted left by N/8 bits, and the B ₃ is circularly shifted left by 3N/16 bits.

It can be appreciated that when two second sub-lookup tables S ₃₁, third sub-lookup table S ₃₂ and fourth sub-lookup table S ₃₃ are queried simultaneously, the principle is the same as that of the above-mentioned two first sub-lookup tables S ₃₀, and the corresponding shifting operation may refer to examples A2-A4, which are not repeated here.

Example B2 only two different sub-lookup tables are queried

Alternatively, when the first sub-lookup table S ₃₀ and the third sub-lookup table S ₃₂ are simultaneously queried (M ₀＝1,M₁＝0,M₂＝1,M₃ =0), the sequence a ₀ is input to the first sub-lookup table S ₃₀, and the sequence a ₂ is input to the third sub-lookup table S ₃₂, corresponding to the sequence B ₀ of N/4 bits length, Sequence B ₂, then inputting sequence a ₁ into the first sub-lookup table S ₃₀, simultaneously inputting sequence a ₃ into the third sub-lookup table S ₃₂, correspondingly obtaining sequence B ₁ with N/4 bit length, And performing shift and exclusive OR operation on the sequence B ₃ and the sequence B ₁、B₃ to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein the sequence B ₁ circularly shifts N/16 bits left, and the sequence B ₃ circularly shifts N/16 bits left.

Alternatively, when the first sub-lookup table S ₃₀ and the second sub-lookup table S ₃₁ are simultaneously queried (i.e., M ₀＝1,M₁＝1,M₂＝0,M₃ =0), the principle is the same as that of the above-mentioned simultaneous query of the first sub-lookup table S ₃₀ and the third sub-lookup table S ₃₂, the sequence a ₀ is input to the first sub-lookup table S ₃₀, the sequence a ₁ is input to the first sub-lookup table S ₃₁, and the sequence B ₀ with a length of N/4 bits is correspondingly obtained, Sequence B ₁, then inputting sequence a ₂ into the first sub-lookup table S ₃₀, simultaneously inputting sequence a ₃ into the second sub-lookup table S ₃₁, correspondingly obtaining sequence B ₂ with N/4 bit length, And performing shift and exclusive OR operation on the sequence B ₃ and the sequence B ₂、B₃ to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein the sequence B ₂ circularly shifts N/8 bits left, and the sequence B ₃ circularly shifts N/8 bits left.

It will be appreciated that the above only illustrates two cases in which two different combinations of sub-look-up tables are queried simultaneously, and that other combinations are similar in principle, and that corresponding shifts may be referred to examples A1-A4, which are not described here again.

Example C three sub-lookup tables are queried

The three sub-lookup tables queried in this example may be the same type of sub-lookup table, or may be different types of sub-lookup tables, for example, the three sub-lookup tables are a first sub-lookup table S ₃₀ and two second sub-lookup tables S ₃₁, or the three sub-lookup tables are three fourth sub-lookup tables S ₃₃, or the three sub-lookup tables are a second sub-lookup table S ₃₁, a third sub-lookup table S ₃₂, a fourth sub-lookup table S ₃₃, and so on.

During specific query, two input sequences in the synthetic permutation input sequences a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ can be divided into a group, each of the other two input sequences is independently used as a group, and three groups of input sequences are respectively input into three sub-lookup tables for query.

It should be noted that, when 4 sub-lookup tables are used simultaneously in the encryption process, the resource occupation will be greatly increased, so that the implementation of using 4 sub-lookup tables simultaneously for the encryption process is not recommended in the present application, and only several exemplary examples when M ₀+M₁+M₂+M₃ =4 are given below:

Example D1 only four identical sub-lookup tables are queried

Optionally, when four first sub-lookup tables S ₃₀ are queried simultaneously (i.e., M ₀＝4,M₁＝0,M₂＝0,M₃ =0), sequence a ₀, sequence a ₁, sequence a ₂, sequence a ₃ are input to four first sub-lookup tables S ₃₀ simultaneously, corresponding to sequence B ₀, sequence B ₁, sequence B ₂, sequence B ₃ with length of N/4 bits are obtained, and shift and exclusive-or operation is performed on B ₁、B₂、B₃ to obtain a synthetic permutation output sequence T _A with length of N/4 bits, wherein B ₁ is shifted left by N/16 bits in a cycle, B ₂ is shifted left by N/8 bits in a cycle, and B ₃ is shifted left by 3N/16 bits in a cycle;

It can be appreciated that when four second sub-lookup tables S ₃₁, third sub-lookup table S ₃₂ and fourth sub-lookup table S ₃₃ are queried simultaneously, the principle is the same as that of the above-mentioned four first sub-lookup tables S ₃₀, and the corresponding shifting operation may refer to examples A2-A4, which are not repeated here.

Example D2 query two groups of four sub-lookup tables, where the two sub-lookup tables within a group are identical and the sub-lookup tables between groups are different

Optionally, when the first set of two first sub-lookup tables S ₃₀ and the second set of two third sub-lookup tables S ₃₂ are queried simultaneously (M ₀＝2,M₁＝0,M₂＝2,M₃ =0), the sequence a ₀ and the sequence a ₁ are respectively input into the first set of two first sub-lookup tables S ₃₀, the sequence B ₀ and the sequence B ₁ corresponding to the lengths of N/4 bits are obtained, the sequence a ₂ and the sequence a ₃ are simultaneously input into the second set of two third sub-lookup tables S ₃₂, the sequence B ₂ and the sequence B ₃ corresponding to the lengths of N/4 bits are obtained, the B ₁、B₃ is subjected to shift and exclusive-or operation to obtain a synthetic permutation output sequence T _A of the lengths of N/4 bits, wherein the B ₁ is circularly shifted left by N/16 bits, and the B ₃ is circularly shifted left by N/16 bits.

Example D3 four different sub-lookup tables are queried

When the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁ are simultaneously queried, The third sub-table S ₃₂ and the fourth sub-table S ₃₃ (i.e., M ₀＝1,M₁＝1,M₂＝1,M₃ =1), sequence a ₀, The sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a first sub-lookup table S ₃₀, a second sub-lookup table S ₃₁, The third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃ correspond to a sequence B ₀, a sequence B ₁, a sequence of N/4 bits in length, sequence B ₂, And performing exclusive OR operation on the sequence B ₃ and the sequence B ₀、B₁、B₂、B₃ to obtain a synthetic permutation output sequence T _A with the length of N/4 bits, wherein, neither B ₀、B₁、B₂、B₃ is shifted.

Specifically, the above encryption processing method has the following differences and advantages compared with the conventional SM4 block cipher algorithm encryption processing procedure:

A. From the protocol level, the software implementation of the encryption processing of the traditional SM4 block cipher algorithm needs to define 1S box with 256 bytes (for inputting 8-bit sequences and outputting 8-bit sequences), and the software implementation only needs to define 1S box with 1024 bytes (for inputting 8-bit sequences and outputting 32-bit sequences) during the encryption processing, and the occupied hardware resources are increased, but the protocol implementation can be reduced by 1 cyclic shift and 1 exclusive-or processing operation, and the performance is improved.

B. From the implementation point of view, when performing S-box table lookup, encryption of the traditional SM4 block cipher algorithm is implemented in an 8-bit input and 8-bit output mode, for a 32-bit encryption platform, before performing S-box table lookup, the 32-bit sequence needs to be converted into 4 8-bit sequences, then table lookup is performed on the 4 8-bit sequences, the 4 8-bit sequences output by table lookup are output, and then the 4 8-bit sequences output by table lookup are combined into the 32-bit sequences through cyclic operation, and operation and or operation, so as to perform subsequent operation.

The embodiment of the present application provides an information decryption processing method, which can apply a pre-acquired lookup table S ₃ in the method of the present embodiment, where the method can be applied to the above scenario of performing decryption processing by using an SM4 block cipher algorithm, as shown in fig. 2, and specifically includes the following steps:

In step S201, the input module is used to obtain the input ciphertext input sequence X' with the length of N bits.

Step S202, an input module is utilized to acquire an N/4 bit length decryption key rk _i used in an input K-round nonlinear iteration process, wherein one decryption key rk _i is used in each round, K is a natural number, and i is 0~K-1.

Step S203, performing K-round nonlinear iterative operation based on the ciphertext input sequence X 'and the decryption key rk _i by using a decryption processing module, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X N/4 bits long, sequence X ₂, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthesis substitution is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding decryption key rk _K-1-i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthesis substitution output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is obtained by performing preset S ₀ conversion for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, the tables S ₁ and S ₂ are combined according to a preset mode.

As an example, in step S203, when the input sequence a of the synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and the corresponding decryption key rk _K-1-i, X _i+1、X_i+2、X_i+3 and the corresponding rk _K-1-i may be xored to obtain the input sequence a of the synthetic permutation.

And S204, performing reverse operation on the output results of the K-4 th round to the K-1 st round by using a reverse order module to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.

As an embodiment, in the steps S201 to S204, N may be 128, k may be 32, and S may be a table composed of 256 bytes, and the lookup table S ₃ may include at least one sub-lookup table, and the sub-lookup table may be a table composed of 1024 bytes.

In the embodiment of the present application, the lookup table S ₃ includes any one, any two or any three of the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃, and when the decryption process of the SM4 block cipher algorithm is implemented by using the pre-obtained lookup table S ₃, any one, any two or any three of the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃ may be implemented by using the above-mentioned first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃, that is, in the decryption process of the present application, the synthetic replacement process in the decryption process is completed by querying the above-mentioned M₀S₃₀+M₁S₃₁+M₂S₃₂+M₃S₃₃(M₀≥0,M₁≥0,M₂≥0,M₃≥0,0＜M₀+M₁+M₂+M₃＜4), where the relationship between the sub-lookup tables S ₃₀、S₃₁、S₃₂、S₃₃ is the same as the relationship between the sub-lookup tables S ₃₀、S₃₁、S₃₂、S₃₃ in the encryption process.

As an embodiment, in step S203, the sequence a may be input into the lookup table S ₃ to perform a lookup operation, so as to obtain the synthetic permutation output sequence T _A:

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a lookup table S ₃ for table lookup operation, and the sequence B ₀ with the length of N/4 bits is correspondingly obtained, Sequence B ₁, sequence B ₂, The sequence B _A is processed based on a shift principle, the processed table lookup operation result is subjected to exclusive OR operation to obtain a synthesized replacement output sequence T _A, wherein the shift principle comprises that if the sequence B ₀ is obtained by table lookup operation of a first sub-table S ₃₀, the sequence B ₀ is not subjected to shift processing, if the sequence B ₁ is obtained by table lookup operation of a second sub-table S ₃₁, the sequence B ₁ is not subjected to shift processing, if the sequence B ₂ is obtained by table lookup operation of a third sub-table S ₃₂, the sequence B ₂ is not subjected to shift processing, and if the sequence B ₃ is obtained by table lookup operation of a fourth sub-table S ₃₃, the sequence B ₃ is not subjected to shift processing.

As an example, in the decryption process, the sequence a ₀, the sequence a ₁, the sequence a ₂, and the sequence a ₃ are respectively input to the lookup table S ₃ to perform the lookup operation, the sequence B ₀, the sequence B ₁, the sequence B ₂, and the sequence B ₃ corresponding to the N/4 bit length are obtained, and the result of the lookup operation is processed based on the shift principle, and the processed result of the lookup operation is subjected to the exclusive-or operation to obtain the synthetic permutation output sequence T _A, which will not be described herein again for the specific implementation of the process of the synthetic permutation output sequence T _A, referring to the contents of examples A1 to A4, examples B1 to B2, and example C in the encryption process.

Specifically, the decryption processing method has the following differences and advantages compared with the conventional SM4 block cipher algorithm decryption processing process:

A. From the protocol level, the software implementation of the conventional SM4 block cipher algorithm decryption process needs to define 1S box of 256 bytes (for inputting 8-bit sequences and outputting 8-bit sequences), and the software implementation only needs to define 1S box of 1024 bytes (for inputting 8-bit sequences and outputting 32-bit sequences) during the decryption process, so that the occupied hardware resources are increased, but the protocol implementation can be reduced by 1 cyclic shift and 1 exclusive-or processing operation, and the performance is improved.

B. from the implementation point of view, when the conventional SM4 block cipher algorithm decrypts and performs S-box table lookup, the decryption is performed in an 8-bit input and 8-bit output mode, for a 32-bit decryption platform, before performing S-box table lookup, the 32-bit sequence needs to be converted into 4 8-bit sequences, then table lookup is performed on the 4 8-bit sequences, the 4 8-bit sequences output by table lookup are output, and then the 4 8-bit sequences output by table lookup are combined into the 32-bit sequences through cyclic operation, AND operation and OR operation so as to perform subsequent operation.

In the encryption processing in the above steps S101 to S104 and the decryption processing in the above steps S201 to S204, when the lookup table S ₃ is acquired, first, the S ₀ transform, S ₁ transform, S ₂ transform reflecting the bit transform relationship between the synthesized permutation input sequence and the output sequence are determined according to the synthesized permutation characteristics in the encryption algorithm and the decryption algorithm of the SM4 block cipher algorithm, and further, the lookup table S ₀, table S ₁, table S ₂ are synthesized according to the S ₀ transform, S ₁ transform, S ₂ transform, and further, the lookup table S ₃ is synthesized according to the tables S ₀, S ₁, and S ₂, which will be described in detail below:

based on the synthesized permutation characteristics in the encryption algorithm and the decryption algorithm of the SM4 block cipher algorithm, determining the transformation relation of bits between the synthesized permutation input sequence and the output sequence:

Step 1) dividing a lookup table output sequence B with 32 bit length into a sequence B ₀、b₁、b₂、b₃ with 8 bit length;

in the conventional encryption or decryption process of the SM4 block cipher algorithm, B ₀、b₁、b₂、b₃ is the S-box query result of the synthetic permutation input sequence a ₀、a₁、a₂、a₃, namely b₀＝Sbox(a₀),b₁＝Sbox(a₁),b₂＝Sbox(a₂),b₃＝Sbox(a₃);

The sequence a is a synthesis permutated input sequence of 32 bits long, and the input sequence a ₀、a₁、a₂、a₃ is a sequence in which the a is divided according to 8 bits long;

Wherein:

b₀={bit7,bit6,bit5,bit4,bit3,bit2,bit1,bit0};

b₁={bit15,bit14,bit13,bit12,bit11,bit10,bit9,bit8};

b₂={bit23,bit22,bit21,bit20,bit19,bit18,bit17,bit16};

b₃={bit31,bit30,bit29,bit28,bit27,bit26,bit25,bit24}。

in this embodiment, each bitj (j is an integer of 0 to 31) represents one bit;

in this embodiment, the above sequence B is represented in simplified bit form as table 2 below:

TABLE 2

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

In this embodiment, the result of the above-described sequence B cycle left shift by 2 bits (B < < < 2) expressed in the form of simplified bits is the following table 3:

TABLE 3 Table 3

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

31

30

In this example, the result of the above-described sequence B cycle left-shift by 10 bits (B < < < 10) expressed in simplified bit form is the following table 4:

TABLE 4 Table 4

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

31

30

29

28

27

26

25

24

23

22

In this embodiment, the above sequence B is represented in simplified bit form by 18 bits (B < < < 18) shifted left in cycles as table 5 below:

TABLE 5

13

12

11

10

9

8

7

6

5

4

3

2

1

0

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

In this embodiment, the above sequence B is represented in simplified bit form by 24 bits (B < < < 24) shifted left in cycles as table 6 below:

TABLE 6

7

6

5

4

3

2

1

0

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

Step 2) performing cyclic shift and exclusive or on the B to obtain L _B;

wherein L _B = B # (B < < < 2) # (B < < < 10) # (B < < < 18) # (B < < 24), in this embodiment the above sequence is represented in simplified bit form as table 7 below, wherein each column is xored with each bit.

TABLE 7

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
																																29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	31	30
21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0	31	30	29	28	27	26	25	24	23	22
																																13	12	11	10	9	8	7	6	5	4	3	2	1	0	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14
7	6	5	4	3	2	1	0	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8

Step 3) classifying and partitioning L _B for b ₀、b₁、b₂、b₃ bits to obtain a simplified L _B as shown in table 8 below:

Wherein, because L _B is only for B to carry on cyclic shift and exclusive OR, therefore each Bit in L _B that the simplified Bit form represents is the corresponding Bit in B, therefore can classify L _B for B ₀、b₁、b₂、b₃ Bit, obtain L _B representation of the simplified Bit form after transformation;

TABLE 8

Step 4) analyzing the L _B of the converted simplified bit form representation to obtain the conversion corresponding to each row of b ₀、b₁、b₂、b₃;

Wherein, for b ₀ = { bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0}, it contains the following three transformations for bits:

TABLE 9

Table 10

5

4

3

2

1

0

7

6

TABLE 11

For b ₁ = { bit15, bit14, bit13, bit12, bit11, bit10, bit9, bit8}, it contains the following three transformations for bits:

Table 12

13

12

11

10

9

8

15

14

TABLE 13

TABLE 14

For b ₂ = { bit23, bit22, bit21, bit20, bit19, bit18, bit17, bit16}, it contains the following three transformations for bits:

TABLE 15

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19

18

17

16

23

22

Table 16

TABLE 17

For b ₃ = { Bit31, bit30, bit29, bit28, bit27, bit26, bit25, bit24}, it contains the following three transformations for Bit bits:

TABLE 18

TABLE 19

Table 20

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24

31

30

Step 5) three transformation analyses corresponding to b ₀、b₁、b₂、b₃ are carried out to obtain transformation aiming at bits in each byte of b ₀、b₁、b₂、b₃;

From analysis, the three types of transformation performed on the bits in each byte of b ₀、b₁、b₂、b₃ are identical, including the following S ₀ transformation, S ₁ transformation and S ₂ transformation;

wherein, the above-mentioned S ₀ transform, S ₁ transform, S ₂ transform are as follows table 21, table 22, table 23 respectively;

Table 21

Table 22

5

4

3

2

1

0

7

6

Table 23

From the above-described S ₀ transform, S ₁ transform, and S ₂ transform, the transform layout corresponding to each byte of b ₀、b₁、b₂、b₃ of L _B can be found as follows in table 24:

table 24

b₃	S₂	S₀	S₁	S₁
					b₂	S₁	S₂	S₀	S₁
b₁	S₁	S₁	S₂	S₀
					b₀	S₀	S₁	S₁	S₂

(II) obtaining tables S ₀, S ₁, and S reflecting the bit conversion relationship between the synthetic permutation input sequence and the output sequence ₂

Obtaining a table S ₀, a table S ₁ and a table S ₂ for carrying out corresponding conversion on each byte in the S box according to the S ₀ conversion, the S ₁ conversion and the S ₂ conversion obtained in the step (one);

Because the above-mentioned S ₀ transform, S ₁ transform, S ₂ transform are all the transforms of the corresponding bit for each byte in b ₀、b₁、b₂、b₃, and b ₀、b₁、b₂、b₃ corresponds to the table look-up output of a ₀、a₁、a₂、a₃ for Sbox (S box), if each byte in Sbox table is subjected to the corresponding S ₀ transform, S ₁ transform, S ₂ transform, and a ₀、a₁、a₂、a₃ is searched, the result after b ₀、b₁、b₂、b₃ is obtained, and each byte in Sbox table is subjected to the corresponding S ₀ transform, S ₁ transform, S ₂ transform, whose outputs correspond to table S ₀, table S ₁, table S ₂, respectively;

That is, the preset S ₀ transform is performed for 8 bits of each element in the preset S box to generate 8 bits of a corresponding one element in the table S ₀;

Performing preset S ₁ conversion on 8 bits of each element in the preset S box to generate 8 bits of a corresponding element in a table S ₁;

Performing preset S ₂ conversion on 8 bits of each element in the preset S box to generate 8 bits of a corresponding element in a table S ₂;

The values of 8 bits of each element in the S box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, the values of 8 bits of the corresponding element in the table S ₀ are bit7, bit6, bit5, bit4, bit3, bit2, bit7, bit1, bit6, bit0, the values of 8 bits of the corresponding element in the table S ₁ are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, the values of 8 bits of the corresponding element in the table S ₂ are bit7, bit5, bit6, bit4, bit5, bit3, bit4, bit2, bit3, bit1, bit2, bit0;

Wherein each bitp (p is an integer of 0 to 7) represents one bit.

The specific contents of the above tables S ₀, S ₁, and S ₂ are shown in the following tables 25, 26, and 27, respectively:

Table 25

	0	1	2	3	4	5	6	7	8	9	a	b	c	d	e	f
																	0	d5	92	ea	fd	cf	e2	3d	b5	16	b4	14	c1	28	f8	2c	05
1	2b	66	98	77	2a	bc	04	c0	a8	45	13	26	48	84	06	9b
																	2	9e	43	51	f7	93	ec	9a	7b	33	55	0b	42	ee	cc	ae	63
3	e7	b1	1c	ab	ca	08	eb	97	82	dc	96	f9	74	8d	3f	a4
																	4	46	07	a5	ff	f0	72	17	b8	81	58	3c	19	e5	87	4e	aa
5	69	6a	83	b0	70	65	d9	89	fb	e8	0f	4a	71	57	9f	35
																	6	1e	24	0e	5f	62	59	d2	a0	25	22	7d	3b	01	21	79	85
7	d7	00	47	56	9d	d0	27	53	4d	36	02	e4	a2	c7	cb	9c
																	8	e9	bd	88	d1	41	c4	38	b7	a1	f4	f1	cd	fa	60	15	a3
9	e3	ac	5c	a6	99	34	1a	54	af	91	32	30	f6	8e	b3	e0
																	a	1d	f5	e1	2e	80	67	c9	61	c3	29	23	a9	0d	52	4f	6e
b	d6	d8	37	44	dd	fe	8c	2f	03	fc	6b	73	6c	6d	5a	50
																	c	8f	1b	ad	90	b9	de	be	7e	11	da	5d	40	1f	10	5b	db
d	0a	c2	31	8a	a7	ce	7a	bf	2d	75	d3	12	ba	e6	b6	b2
																	e	8b	68	95	4b	0c	94	76	7f	64	bb	f2	09	c6	6f	c5	86
f	18	f3	7c	ef	3a	df	4c	20	78	ed	5e	3e	d4	c8	39	49

Table 26

	0	1	2	3	4	5	6	7	8	9	a	b	c	d	e	f
																	0	5b	42	a7	fb	33	87	f4	de	58	da	50	0b	a0	ef	b0	14
1	ac	9d	6a	d9	a8	fa	10	0f	aa	11	4c	98	25	1a	18	66
																	2	72	09	41	d3	46	bf	62	e9	cc	51	2c	0d	b7	3f	b2	89
3	93	ce	70	a6	27	20	a3	56	02	7f	52	eb	d5	3e	fc	9a
																	4	1d	1c	9e	f3	cf	cd	5c	ea	0e	65	f0	64	9b	16	3d	a2
5	a1	ad	06	ca	c5	91	6b	2e	e3	af	3c	2d	c1	59	76	d4
																	6	78	90	38	79	8d	61	47	8a	94	88	f1	ec	04	84	e1	1e
7	53	00	19	5d	7e	4f	9c	49	31	d8	08	9f	82	13	23	7a
																	8	ab	fe	2a	4b	01	1f	e0	d6	8e	df	cb	3b	e7	85	54	86
9	83	ba	75	92	6e	d0	68	55	b6	4e	c8	c0	d7	32	c6	8f
																	a	74	db	8b	b8	0a	99	2b	81	03	a4	8c	ae	34	4d	39	bd
b	57	6f	dc	15	7b	f7	3a	bc	0c	ff	a9	c9	b5	b1	6d	45
																	c	36	6c	be	4a	ee	77	f2	fd	44	67	71	05	7c	40	69	63
d	28	07	c4	22	96	37	ed	f6	b4	d1	43	48	e2	97	d2	c2
																	e	26	a5	5e	29	30	5a	dd	f9	95	e6	c7	24	17	b9	1b	12
f	60	c3	f5	b3	e8	73	35	80	e5	bb	7d	f8	5f	2f	e4	21

Table 27

	0	1	2	3	4	5	6	7	8	9	a	b	c	d	e	f
																	0	8e	d0	4d	06	fc	65	c9	6b	4e	6e	44	ca	88	17	9c	11
1	87	fb	f2	ae	82	46	14	cf	02	54	5f	be	6d	9e	1e	fd
																	2	ec	4a	10	24	d5	53	f8	92	ff	04	27	4f	59	f3	1c	ea
3	74	7f	6c	0d	ed	28	48	c1	80	a3	c4	12	a1	b3	c3	3e
																	4	5b	1b	3b	0c	3f	bf	4b	52	8f	3d	cc	7d	e	91	73	08
5	c8	c7	85	7a	b5	f4	b2	a7	18	47	33	67	b0	0e	e9	e1
																	6	66	b4	36	26	ef	38	95	2a	b1	aa	8c	d7	05	a5	98	9b
7	84	00	5e	0b	e3	9f	bb	1a	c	ee	0a	7b	20	d4	e8	e6
																	8	42	43	a2	9a	40	db	d8	61	2f	2b	3a	f6	1d	e5	41	25
9	60	16	29	34	f7	e4	72	01	19	df	fa	f0	21	bc	75	6f
																	a	69	2e	6a	96	8a	fe	e2	e0	c0	8d	af	07	39	1f	76	d3
b	81	b7	eb	51	a6	09	b6	93	0f	03	c2	ba	d9	dc	37	15
																	c	b9	77	13	da	57	a9	4c	83	55	bd	2c	45	63	50	32	b8
d	22	c5	f5	a8	31	f9	97	49	99	a4	90	5a	58	71	64	70
																	e	ad	cd	cb	62	3c	ce	ab	86	f1	5d	35	2d	d1	d6	de	94
f	78	30	89	5c	d2	ac	79	a0	9d	56	23	c6	8b	e7	dd	68

The data in tables 25, 26 and 27 above are all in 16 scale.

(III) obtaining a lookup table S from tables S ₀, S ₁, S ₂ ₃

Optionally, the table S ₀, the table S ₁ and the table S ₂ are combined according to a preset manner to obtain a lookup table S ₃;

The above-mentioned combining the table S ₀, the table S ₁, and the table S ₂ in a preset manner to obtain the lookup table S ₃ includes:

Combining table S ₀, table S ₁, table S ₂ in the order of table S ₀, table S ₁, table S ₁, table S ₂ to obtain a first sub-lookup table S ₃₀, and/or

Combining table S ₀, table S ₁, table S ₂ in the order of table S ₁, table S ₁, table S ₂, table S ₀ to obtain a second sub-lookup table S ₃₁, and/or

Combining table S ₀, table S ₁, table S ₂ in the order of table S ₁, table S ₂, table S ₀, table S ₁ to obtain a third sub-lookup table S ₃₂, and/or

The fourth sub-lookup table S ₃₃ is obtained by combining the tables S ₀, S ₁, and S ₂ in the order of the tables S ₂, S ₀, S ₁, and S ₁.

The lookup table S ₃ may include any one, any two or any three of the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃, and when implementing the encryption process and the decryption process of the SM4 block cipher algorithm by using the pre-acquired lookup table S ₃, any one, any two or any three of the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂ and the fourth sub-lookup table S ₃₃ may be used to implement the encryption process and the decryption process, that is, the synthetic permutation process in the encryption process and the decryption process may be completed by querying the above M₀S₃₀+M₁S₃₁+M₂S₃₂+M₃S₃₃(M₀≥0,M₁≥0,M₂≥0,M₃≥0,0＜M₀+M₁+M₂+M₃＜4) in the encryption process and the decryption process.

The above-mentioned tables S ₀, S ₁, S ₂ are all 8-bit input and 8-bit output lookup tables, and the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂, and the fourth sub-lookup table S ₃₃ are all 8-bit input and 32-bit output lookup tables, and the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂, and the fourth sub-lookup table S ₃₃ are all 1024-byte element lookup tables.

The following table 28 shows details of the first sub-lookup table S ₃₀, and the other second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂, and the fourth sub-lookup table S ₃₃ are merely differences in the combination of S ₀, table S ₁, and table S ₂, and no specific tables are given here.

Table 28

0

1

2

......

e

f

0

d55b5b8e

924242d0

eaa7a74d

......

2cb0b09c

05141411

1

2bacac87

669d9dfb

986a6af2

......

0618181e

9b6666fd

2

9e7272ec

4309094a

51414110

......

aeb2b21c

638989ea

3

e7939374

b1cece7f

1c70706c

......

3ffcfcc3

a49a9a3e

4

461d1d5b

071c1c1b

a59e9e3b

......

4e3d3d73

aaa2a208

5

69a1 a1c8

6aadadc7

83060685

......

9f7676e9

35d4d4e1

6

1e787866

249090b4

0e383836

......

79e1e198

851e1e9b

7

d7535384

00000000

4719195e

......

cb2323e8

9c7a7ae6

8

e9abab42

bdfefe43

882a2aa2

......

15545441

a3868625

9

e3838360

acbaba16

5c757529

......

b3c6c675

e08f8f6f

a

1d747469

f5dbdb2e

e18b8b6a

......

4f393976

6ebdbdd3

b

d6575781

d86f6fb7

37dcdceb

......

5a6d6d37

50454515

c

8f3636b9

1b6c6c77

adbebe13

......

5b696932

db6363b8

d

0a282822

c20707c5

31c4c4f5

......

b6d2d264

b2c2c270

e

8b2626ad

68a5a5cd

955e5ecb

......

c51b1bde

86121294

f

18606078

f3c3c330

7cf5f589

......

39e4e4dd

49212168

The data in table 28 above are all represented in 16.

Example 2

Based on the above embodiment 1, the embodiment of the present application provides a procedure for performing the synthetic permutation T operation in the encryption process or the decryption process of the SM4 block cipher algorithm by referring to the lookup table S ₃, where the lookup table S ₃ is formed by the first lookup table S ₃₀ obtained in the above embodiment 1:

as shown in fig. 3, which is a schematic block diagram of an implementation of the synthetic permutation T, the block diagram includes 1 first sub-lookup table S ₃₀, a sequence a= (a ₀、a₁、a₂、a₃) as an input sequence of the synthetic permutation T, and T (a) as an output sequence of the synthetic permutation T, where a is 32-bit data, a ₀、a₁、a₂ and a ₃ are both 8-bit data, and the specific implementation steps of the synthetic permutation T are as follows:

Step S301, sequentially performing table lookup on the 8-bit data a ₀、a₁、a₂ and a ₃ with respect to the first sub-table S ₃₀, where the table lookup operation is divided into four rounds, wherein:

The first round S ₃₀ carries out table lookup, S ₃₀ table lookup is carried out aiming at a ₀, and the output is B ₀;

The second round S ₃₀ carries out table lookup, S ₃₀ table lookup is carried out aiming at a ₁, and the output is B ₁;

third round S ₃₀ look-up table, to a ₂ to S ₃₀ look-up table, output as B ₂;

Fourth wheel S ₃₀ look-up table, which is carried out S ₃₀ look-up table aiming at a ₃, and output is B ₃;

in step S302, the result of the table lookup is based on B ₀⊕(B₁<<<8)⊕(B₂<<<16)⊕(B₃ < <24 > to form T _A, i.e. the output of the synthetic permutation T.

Example 3

As shown in fig. 4, based on the same inventive concept, an embodiment of the present application provides an encryption apparatus for information encryption processing, the apparatus including:

The input module 401 is used for acquiring an input plaintext input sequence X with N bits and an input encryption key rk _i with N/4 bits used in the nonlinear iteration process of K rounds, wherein one encryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

an encryption processing module 402 for performing K-round nonlinear iterative operation based on the plaintext input sequence X and the encryption key rk _i, wherein the plaintext sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X of N/4 bit length, sequence X ₂, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is obtained by performing preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

and the reverse order module 403 is configured to perform reverse order operation on output results from the K-4 th round to the K-1 st round, so as to obtain the ciphertext output sequence that is encrypted by the plaintext input sequence X.

As an example, the N may be 128, k may be 32, and S may be a table composed of 256 bytes, and the lookup table S ₃ may include at least one sub-lookup table, which may be a table composed of 1024 bytes.

As an embodiment, the above-mentioned lookup table S ₃ includes any one, any two, or any three of the first sub-lookup table S ₃₀, the second sub-lookup table S ₃₁, the third sub-lookup table S ₃₂, and the fourth sub-lookup table S ₃₃, where:

the first sub-lookup table S ₃₀ is obtained by combining table S ₀, table S ₁, table S ₂ in the order of table S ₀, table S ₁, table S ₁, table S ₂;

the second sub-lookup table S ₃₁ is obtained by combining table S ₀, table S ₁, table S ₂ in the order of table S ₁, table S ₁, table S ₂, table S ₀;

The third sub-lookup table S ₃₂ is obtained by combining table S ₀, table S ₁, table S ₂ in the order of table S ₁, table S ₂, table S ₀, table S ₁;

The fourth sub-lookup table S ₃₃ is obtained by combining the table S ₀, the table S ₁, and the table S ₂ in the order of the table S ₂, the table S ₀, the table S ₁, and the table S ₁.

As an embodiment, the encryption processing module 402 is specifically configured to perform an exclusive-or operation on X _i+1、X_i+2、X_i+3 and the corresponding rk _i to obtain the input sequence a of the synthetic permutation.

As one embodiment, the encryption processing module 402 is specifically configured to divide the sequence a into a sequence a ₀, a sequence a ₁, a sequence a ₂, and a sequence a ₃ with a length of N/16 bits;

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a lookup table S ₃ for table lookup operation, and the sequence B ₀ with the length of N/4 bits is correspondingly obtained, Sequence B ₁, sequence B ₂, The sequence B ₃ is processed based on a shift principle, the processed table lookup operation result is subjected to exclusive OR operation to obtain a synthesized replacement output sequence T _A, wherein the shift principle comprises that if the sequence B ₀ is obtained by table lookup operation of a sequence a ₀ through a first sub-table S ₃₀, the sequence B ₀ is not subjected to shift processing, if the sequence B ₁ is obtained by table lookup operation of a sequence a ₁ through a second sub-table S ₃₁, the sequence B ₁ is not subjected to shift processing, if the sequence B ₂ is obtained by table lookup operation of a sequence a ₂ through a third sub-table S ₃₂, the sequence B ₂ is not subjected to shift processing, and if the sequence B ₃ is obtained by table lookup operation of a sequence a3 through a fourth sub-table S ₃₃, the sequence B ₃ is not subjected to shift processing.

As one embodiment, the encryption processing module 402 is specifically configured to input the sequences a ₀, a ₁, a ₂, and a ₃ into the first sub-lookup table S ₃₀ respectively, and correspondingly obtain the sequences B ₀, B ₁, B ₂, and B ₃ with N/4 bit length, shift and exclusive-or the sequences B ₁、B₂、B₃ to obtain the synthetic permutation output sequence T _A with N/4 bit length, where B ₁ is circularly shifted left by N/16 bits, B ₂ is circularly shifted left by N/8 bits, and B ₃ is circularly shifted left by 3N/16 bits, or

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a second sub-lookup table S ₃₁ to correspondingly obtain a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ with N/4 bit length, and the B ₀、B₂、B₃ is subjected to shift and exclusive OR operation to obtain a synthetic permutation output sequence T _A with N/4 bit length, wherein the B ₀ is circularly shifted left by 3N/16 bits, the B ₂ is circularly shifted left by N/16 bits, and the B ₃ is circularly shifted left by N/8 bits, or

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a third sub-lookup table S ₃₂ to correspondingly obtain a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ with N/4 bit length, and the B ₀、B₁、B₃ is subjected to shift and exclusive OR operation to obtain a synthetic permutation output sequence T _A with N/4 bit length, wherein the B ₀ circularly shifts left by N/8 bits, the B ₁ circularly shifts left by 3N/16 bits and the B ₃ circularly shifts left by N/16 bits, or

As an example, when constructing the lookup table S ₃, the table S ₀, the table S ₁, the table S ₂ are obtained by:

performing preset S ₀ conversion on 8 bits of each element in the preset S box to generate 8 bits of a corresponding element in a table S ₀;

The values of 8 bits of each element in the S box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, the values of 8 bits of the corresponding table S ₀ are bit7, bit6, bit5, bit4, bit3, bit2, bit7, bit1, bit6, bit0, the values of 8 bits of the corresponding table S ₁ are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, the values of 8 bits of the corresponding table S ₂ are bit7, bit5, bit6, bit4, bit5, bit3, bit4, bit2, bit3, bit1, bit0, bit 1.

As an embodiment, the reverse order module 403 is specifically configured to convert the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 th round to the K-1 st round into the sequence order of X _K+3、X_K+2、X_K+1、X_K, so as to form the ciphertext output sequence for encrypting the input sequence X.

As shown in fig. 5, based on the same inventive concept, an embodiment of the present application provides an information encryption apparatus including a processor 501 and a memory 502, the memory 502 storing an executable program, the processor 501 implementing the following processes when the executable program is executed:

acquiring an input plaintext input sequence X with the length of N bits;

k-round nonlinear iterative operation based on the plaintext input sequence X and the encryption key rk _i, wherein the plaintext input sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X with a length of N/4 bits, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthetic permutation is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is obtained by performing preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

And carrying out reverse operation on the output results from the K-4 round to the K-1 round to obtain the ciphertext output sequence for encrypting the plaintext input sequence X.

As an example, N may be 128, k may be 32, and S may be a table of 256 bytes, where the lookup table S ₃ includes at least one sub-lookup table, and the sub-lookup table is a table of 1024 bytes.

For one embodiment, the processor 501 is specifically configured to exclusive-or X _i+1、X_i+2、X_i+3 with the corresponding rk _i to obtain the input sequence a of the synthetic permutation.

As an embodiment, the processor 501 is specifically configured to divide the sequence a into a sequence a ₀, a sequence a ₁, a sequence a ₂, and a sequence a ₃ with a length of N/16 bits;

As one embodiment, the processor 501 is specifically configured to input the sequences a ₀, a ₁, a ₂, and a ₃ into the first sub-lookup table S ₃₀ respectively, and correspondingly obtain the sequences B ₀, B ₁, B ₂, and B ₃ with N/4 bit length, shift and exclusive-or the sequences B ₁、B₂、B₃ to obtain the synthetic permutation output sequence T _A with N/4 bit length, where B ₁ is circularly shifted left by N/16 bits, B ₂ is circularly shifted left by N/8 bits, and B ₃ is circularly shifted left by 3N/16 bits, or

As an embodiment, the processor 501 is specifically configured to convert the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 th round to the K-1 st round into the sequence order of X _K+3、X_K+2、X_K+1、X_K, to form the ciphertext output sequence for encrypting the input sequence X.

Example 4

As shown in fig. 6, based on the same inventive concept, an embodiment of the present application provides a decryption apparatus of an information decryption process, the apparatus including:

the input module 601 is used for acquiring an input ciphertext input sequence X' with N bits and an input decryption key rk _i with N/4 bits used in the nonlinear iteration process of K rounds, wherein one decryption key rk _i is used in each round, K is a natural number, and the value of i is 0~K-1;

The decryption processing module 602 is configured to perform K-round nonlinear iterative operation based on the ciphertext input sequence X 'and the decryption key rk _i, where the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, and a sequence X ₀ each having a length of N/4 bits, sequence X ₂, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthesis substitution is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding decryption key rk _K-1-i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthesis substitution output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is obtained by performing preset S ₀ conversion for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

and the reverse order module 603 is configured to perform reverse order operation on the output results from the K-4 th round to the K-1 st round, so as to obtain the plaintext output sequence for decrypting the ciphertext input sequence X'.

As an embodiment, the decryption processing module 602 is specifically configured to perform an exclusive-or operation on X _i+1、X_i+2、X_i+3 and the corresponding rk _K-1-i to obtain the input sequence a of the synthetic permutation.

As an embodiment, the decryption processing module 602 is specifically configured to:

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a lookup table S ₃ for table lookup operation, and the sequence B ₀ with the length of N/4 bits is correspondingly obtained, Sequence B ₁, sequence B ₂, The sequence B _A is processed based on a shift principle, the processed table lookup operation result is subjected to exclusive OR operation to obtain a synthesized and substituted output sequence T _A, wherein if the sequence B ₀ is obtained by table lookup of a first sub-table S ₃₀, the sequence B ₀ is not subjected to shift processing, if the sequence B ₁ is obtained by table lookup of a second sub-table S ₃₁, the sequence B ₁ is not subjected to shift processing, if the sequence B ₂ is obtained by table lookup of a third sub-table S ₃₂, the sequence B ₂ is not subjected to shift processing, and if the sequence B ₃ is obtained by table lookup of a fourth sub-table S ₃₃, the sequence B ₃ is not subjected to shift processing.

The sequence a ₀, the sequence a ₁, the sequence a ₂ and the sequence a ₃ are respectively input into a first sub-lookup table S ₃₀ to correspondingly obtain a sequence B ₀, a sequence B ₁, a sequence B ₂ and a sequence B ₃ with N/4 bit length, and the B ₁、B₂、B₃ is subjected to shift and exclusive OR operation to obtain a synthetic permutation output sequence T _A with N/4 bit length, wherein the B ₁ circularly shifts left N/16 bits, the B ₂ circularly shifts left N/8 bits and the B ₃ circularly shifts left 3N/16 bits, or

As an embodiment, the reverse order module 603 is specifically configured to convert the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 round to the K-1 round into the sequence order of X _K+3、X_K+2、X_K+1、X_K, so as to form the plaintext output sequence for decrypting the input sequence X'.

As shown in fig. 7, based on the same inventive concept, an embodiment of the present application provides an information decryption apparatus, the apparatus including a processor 701 and a memory 702, the memory 702 storing an executable program, the processor 701 implementing the following processes when the executable program is executed:

Acquiring an input ciphertext input sequence X' with the length of N bits;

K-round nonlinear iterative operation is performed based on the ciphertext input sequence X 'and the decryption key rk _i by dividing the ciphertext input sequence X' into a sequence X ₀, a sequence X ₁, a sequence X ₂, and a sequence of N/4 bits, A sequence X ₃, wherein in the ith round of nonlinear iterative operation, an input sequence A of synthesis substitution is obtained according to X _i+1、X_i+2、X_i+3 and a corresponding decryption key rk _K-1-i, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthesis substitution output sequence T _A, and T _A and X _i are subjected to exclusive OR operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is obtained by performing preset S ₀ conversion for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode;

and carrying out reverse operation on the output results from the K-4 round to the K-1 round to obtain a plaintext output sequence for decrypting the ciphertext input sequence X'.

As an embodiment, the processor 701 is specifically configured to perform an exclusive-or operation on X _i+1、X_i+2、X_i+3 and the corresponding rk _K-1-i to obtain the input sequence a of the synthetic permutation.

As an embodiment, the processor 701 is specifically configured to:

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

As an embodiment, the processor 701 is specifically configured to:

As an embodiment, the processor 701 is specifically configured to convert the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 th round to the K-1 st round into the sequence order of X _K+3、X_K+2、X_K+1、X_K, to form the plaintext output sequence for decrypting the input sequence X'.

The present application is described above with reference to block diagrams and/or flowchart illustrations of methods, apparatus (systems) and/or computer program products according to embodiments of the application. It will be understood that one block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, and/or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, create means for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.

Accordingly, the present application may be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.). Still further, the present application may take the form of a computer program product on a computer-usable or computer-readable storage medium having computer-usable or computer-readable program code embodied in the medium for use by or in connection with an instruction execution system. In the context of the present application, a computer-usable or computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.

It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims

1. An information encryption processing method, characterized in that the method comprises:

K rounds of nonlinear iterative operations are performed based on the plaintext input sequence X and the encryption key rk _i by utilizing an encryption processing module, wherein the plaintext input sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X with the length of N/4 bits, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i are subjected to exclusive-or operation to obtain a synthetic permutation input sequence A, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive-or operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode, and the table S is a table conforming to an SM4 block cipher algorithm;

performing reverse operation on output results from the K-4 th round to the K-1 st round by using a reverse order module to obtain a ciphertext output sequence for encrypting the plaintext input sequence X;

The lookup table S ₃ includes any one, any two, or any three of a first sub-lookup table S ₃₀, a second sub-lookup table S ₃₁, a third sub-lookup table S ₃₂, and a fourth sub-lookup table S ₃₃, wherein:

The fourth sub-lookup table S ₃₃ is obtained by combining table S ₀, table S ₁, table S ₂ in the order of table S ₂, table S ₀, table S ₁, table S ₁;

The sequence A is input into a lookup table S ₃ to perform lookup operation, and a synthetic permutation output sequence T _A is obtained, which comprises:

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

2. The method of claim 1, wherein N is 128, k is 32, and S table is a table of 256 byte elements, the look-up table S ₃ includes at least one sub-look-up table that is a table of 1024 byte elements.

3. The method of claim 1, wherein the steps of inputting the sequences a ₀, a ₁, a ₂ and a ₃ into the lookup table S ₃ respectively for performing a lookup operation, correspondingly obtaining the sequences B ₀, B ₁, B ₂ and B ₃ with the length of N/4 bits, and processing the results of the lookup operation based on a shift principle, and performing an exclusive-or operation on the processed results of the lookup operation to obtain the synthetic permutation output sequence T _A, wherein the method comprises:

4. The method according to claim 1 or 2, wherein in constructing the look-up table S ₃, tables S ₀, S ₁, S ₂ are obtained by:

The values of 8 bits of each element in the S box are bit7, bit6, bit5, bit4, bit3, bit2, bit1, bit0, the values of 8 bits of the corresponding table S ₀ are bit7, bit6, bit5, bit4, bit3, bit2, bit7, bit1, bit6, bit0, the values of 8 bits of the corresponding table S ₁ are bit5, bit4, bit3, bit2, bit1, bit0, bit7, bit6, the values of 8 bits of the corresponding table S ₂ are bit7, bit5, bit6, bit4, bit3, bit4, bit2, bit3, bit1, bit0.

5. The method of claim 1, wherein performing the reverse order operation on the output results from the K-4 th round to the K-1 th round by using a reverse order module to obtain the ciphertext output sequence that is encrypted by the input sequence X, comprises:

And converting the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 round to the K-1 round into the sequence of X _K+3、X_K+2、X_K+1、X_K by using an inverse sequence module to form a ciphertext output sequence for encrypting the input sequence X.

6. An information decryption processing method, characterized in that the method comprises:

K rounds of nonlinear iterative operation are carried out based on the ciphertext input sequence X 'and the decryption key rk _i by utilizing a decryption processing module, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X N/4 bits long, sequence X ₂, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, X _i+1、X_i+2、X_i+3 and corresponding rk _K-1-i are subjected to exclusive-or operation to obtain a synthetic permutation input sequence A, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive-or operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode, and the table S is a table conforming to an SM4 block cipher algorithm;

Performing reverse operation on output results from the K-4 round to the K-1 round by using a reverse order module to obtain a plaintext output sequence for decrypting the ciphertext input sequence X';

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

7. The method of claim 6, wherein N is 128, k is 32, and S table is a table of 256 byte elements, said look-up table S ₃ comprising at least one sub-look-up table, said sub-look-up table being a table of 1024 byte elements.

8. The method of claim 6, wherein the steps of inputting the sequences a ₀, a ₁, a ₂ and a ₃ into the lookup table S ₃ respectively for performing a lookup operation, correspondingly obtaining the sequences B ₀, B ₁, B ₂ and B ₃ with the length of N/4 bits, and processing the results of the lookup operation based on a shift principle, and performing an exclusive OR operation on the processed results of the lookup operation to obtain the synthesized permutation output sequence T _A, wherein the method comprises:

9. The method of claim 6 or 7, wherein in constructing the look-up table S ₃, tables S ₀, S ₁, S ₂ are obtained by:

10. The method of claim 6, wherein performing the reverse order operation on the output results from the K-4 th round to the K-1 st round by using a reverse order module to obtain the plaintext output sequence for decryption by the ciphertext input sequence X', comprising:

And converting the output results X _K、X_K+1、X_K+2、X_K+3 from the K-4 round to the K-1 round into the sequence of X _K+3、X_K+2、X_K+1、X_K by using an inverse sequence module to form a plaintext output sequence for decrypting the ciphertext input sequence X'.

11. An encryption device for encrypting information, comprising:

The encryption processing module is used for carrying out K-round nonlinear iterative operation based on the plaintext input sequence X and the encryption key rk _i, wherein the plaintext input sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i are subjected to exclusive-or operation to obtain a synthetic permutation input sequence A, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive-or operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode, and the table S is a table conforming to an SM4 block cipher algorithm;

the reverse order module is used for carrying out reverse order operation on the output results from the K-4 round to the K-1 round to obtain a ciphertext output sequence which is encrypted by the plaintext input sequence X;

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

12. A decryption apparatus for decrypting information, comprising:

The decryption processing module is used for performing K-round nonlinear iterative operation based on the ciphertext input sequence X 'and the decryption key rk _i, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X N/4 bits long, sequence X ₂, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, X _i+1、X_i+2、X_i+3 and corresponding rk _K-1-i are subjected to exclusive-or operation to obtain a synthetic permutation input sequence A, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive-or operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode, and the table S is a table conforming to an SM4 block cipher algorithm;

The reverse order module is used for carrying out reverse order operation on the output results from the K-4 round to the K-1 round to obtain a plaintext output sequence for decryption of the ciphertext input sequence X';

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

13. An encryption device for encryption processing of information, the device comprising a processor and a memory for storing an executable program, the processor implementing the following processes when the executable program is executed:

acquiring an input plaintext input sequence X with the length of N bits;

K-round nonlinear iterative operation is performed based on the plaintext input sequence X and the encryption key rk _i, wherein the plaintext input sequence X is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X with a length of N/4 bits, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, X _i+1、X_i+2、X_i+3 and a corresponding encryption key rk _i are subjected to exclusive-or operation to obtain a synthetic permutation input sequence A, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive-or operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode, and the table S is a table conforming to an SM4 block cipher algorithm;

performing reverse operation on output results from the K-4 round to the K-1 round to obtain a ciphertext output sequence for encrypting the plaintext input sequence X;

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;

14. A decryption device for information decryption processing, the device comprising a processor and a memory for storing an executable program, the processor implementing the following procedure when the executable program is executed:

Acquiring an input ciphertext input sequence X' with the length of N bits;

K rounds of nonlinear iterative operations are performed based on the ciphertext input sequence X 'and the decryption key rk _i, wherein the ciphertext input sequence X' is divided into a sequence X ₀, a sequence X ₁, a sequence X ₂, a sequence X, Sequence X ₃, wherein in the ith round of nonlinear iterative operation, X _i+1、X_i+2、X_i+3 and corresponding rk _K-1-i are subjected to exclusive-or operation to obtain a synthetic permutation input sequence A, the sequence A is input into a lookup table S ₃ to perform table lookup operation to obtain a synthetic permutation output sequence T _A, and T _A and X _i are subjected to exclusive-or operation to obtain an output result X _i+4 of the ith round of nonlinear iterative operation, wherein the lookup table S ₃ is subjected to preset S ₀ transformation for each element in a preset S table, S ₁ and S ₂ are converted to form a table S ₀, a table S ₁ and a table S ₂, and a table S ₀, The table S ₁ and the table S ₂ are combined according to a preset mode, and the table S is a table conforming to an SM4 block cipher algorithm;

performing reverse operation on output results from the K-4 round to the K-1 round to obtain a plaintext output sequence for decrypting the ciphertext input sequence X';

Dividing sequence a into a ₀, a ₁, a ₂ and a ₃ of N/16 bit length;