CN114079605B - Communication signal demodulation device and communication signal demodulation method - Google Patents

Abstract

The present application relates to a communication signal demodulation device and a communication signal demodulation method. The communication signal demodulation device is used for demodulating the communication signal to generate an output signal. The communication signal demodulation device includes: the sensing circuits are respectively used for sensing different electrical characteristics of the same communication signal and respectively generating corresponding sensing modulation signals; the processing filters are respectively used for filtering the corresponding sensing modulation signals and respectively generating corresponding filtering modulation signals; a plurality of demodulators for demodulating the plurality of filtered modulated signals respectively to generate corresponding demodulated signals, wherein each of the filtered modulated signals corresponds to at least one demodulator; the judging circuit receives a plurality of demodulation signals, determines whether each unit signal in each demodulation signal is correct or not according to a judging mechanism, and generates an output signal after combining at least one correct unit signal.

Description

Communication signal demodulation device and communication signal demodulation method

technical field

The invention relates to a communication signal demodulation device, in particular to a communication signal demodulation device capable of improving the communication signal demodulation speed. The invention also relates to a communication signal demodulation method.

Background technique

The traditional communication signal demodulation device will demodulate the communication signal when receiving it, so as to obtain the required data. Generally speaking, the known communication signal demodulation device will check the correctness of the demodulated data to ensure that the received data is correct. When the known communication signal demodulation device checks the correctness of the demodulated data, the result is incorrect, and the known communication signal demodulation device will perform demodulation on the received communication signal again. program until the demodulated data passes the correctness check.

The disadvantage of this prior art is that the time to demodulate the communication signal will be wasted time to demodulate the new signal because it fails the correctness check.

For example, in a wireless charging application, when the communication signal between the charging base and the device to be charged is being transmitted, if the correctness check of the demodulated communication signal fails, an initial procedure needs to be restarted so that the device to be charged The charged device re-transmits the communication signal. Therefore, time will be wasted.

In view of this, the present invention aims at the deficiencies of the above-mentioned prior art, and proposes a communication signal demodulation device and a communication signal demodulation method, which can improve the efficiency of communication signal demodulation.

Contents of the invention

From one viewpoint, the present invention provides a communication signal demodulation device, which is used to demodulate a communication signal to generate an output signal. The communication signal demodulation device includes: a plurality of sensing circuits, respectively used to sense Measuring different electrical characteristics of the same communication signal, and each generating a corresponding sensing modulation signal; a plurality of processing filters, respectively used to filter the corresponding sensing modulation signal, and each generating a corresponding filtering modulation signal; The demodulators are used to respectively demodulate a plurality of the filtered modulation signals and generate a corresponding demodulated signal, wherein each of the filtered modulation signals corresponds to at least one demodulator; and a judgment circuit receives a plurality of The demodulated signal is determined according to a judging mechanism whether each unit signal in each demodulated signal is correct or not, and at least one correct unit signal is combined to generate the output signal.

From another point of view, the present invention provides a communication signal demodulation method for demodulating a communication signal to generate an output signal. The communication signal demodulation method includes: using a plurality of sensing circuits to respectively sense Different electrical characteristics of the same communication signal, and respectively generate a corresponding sensing modulation signal; respectively filter a plurality of sensing modulation signals, and respectively generate a corresponding filtering modulation signal; use at least one demodulation procedure, correspondingly demodulate multiple Each of the filtered modulation signals generates a corresponding demodulation signal, wherein each of the filtered modulation signals corresponds to at least one of the demodulation procedures; and receiving a plurality of the demodulation signals, and determining each of the demodulation signals according to a judgment mechanism The output signal is generated after demodulating the correctness of each unit signal in the signal and combining at least one correct unit signal.

In a preferred implementation form, the unit signal includes a packet or a byte.

In a preferred implementation form, the communication signal is transmitted to the communication signal demodulation device via wireless communication transmission.

In a preferred implementation form, the plurality of demodulators use different demodulation procedures to correspondingly demodulate a plurality of the filtered modulated signals.

In a preferred implementation form, the demodulation procedure of the demodulator for demodulating the filtered modulation signal includes: calculating the pulse width between every two instantaneous switches in the filtered modulation signal in an edge-triggered manner; and according to A plurality of the pulse widths and a logic level in each pulse width between all two instantaneous switches in the filtered modulated signal to demodulate the filtered modulated signal.

In a preferred implementation form, the demodulation procedure of the demodulator for demodulating the filtered modulation signal includes: counting the pulse width between every two instantaneous switches in the filtered modulation signal with a frequency signal; and according to A plurality of the pulse widths and a logic level in each pulse width between all two instantaneous switches in the filtered modulated signal to demodulate the filtered modulated signal.

In a preferred implementation form, the judging mechanism includes a checksum step and/or a parity check step.

In the following detailed description through specific embodiments, it should be easier to understand the purpose, technical content, characteristics and effects of the present invention.

Description of drawings

1A and 1B show a schematic diagram of an embodiment of a communication signal demodulation device according to the present invention.

FIG. 2A shows a schematic diagram of different sensing modulation signal waveforms for sensing different electrical characteristics of the same communication signal according to the present invention.

FIG. 2B shows a schematic diagram of signal waveforms of different filtered modulation signals according to the present invention.

FIG. 3A and FIG. 3B are schematic diagrams showing related signal waveforms of a demodulation process according to the present invention.

FIG. 4A and FIG. 4B are schematic diagrams showing related signal waveforms of another demodulation procedure according to the present invention.

FIG. 5 shows a schematic diagram of demodulation conversion steps according to the present invention.

Explanation of symbols in the figure

1: Communication signal demodulation device

11, 12: Sensing circuit

21, 22: Processing filters

31, 32, 33, 34: demodulator

40: Judgment circuit

Pac11, Pac12, Pac13, Pac21, Pac22, Pac23, Pac31, Pac32, Pac33, Pac41, Pac42, Pac43: packet

Ref: reference signal

Sdm1, Sdm2, Sdm3, Sdm4: demodulated signal

Sft1, Sft2: filter modulation signal

Detailed ways

The drawings in the present invention are all schematic diagrams, mainly intended to show the coupling relationship between various circuits and the relationship between various signal waveforms. As for the circuits, signal waveforms and frequencies, they are not drawn to scale.

1A and 1B show a schematic diagram of an embodiment of a communication signal demodulation device according to the present invention. FIG. 1A shows an embodiment of a communication signal demodulation device (communication signal demodulation device 1) according to the present invention. The communication signal demodulation device 1 includes sensing circuits 11 and 12 , processing filters 21 and 22 , demodulators 31 , 32 , 33 and 34 , and a judging circuit 40 .

As shown in FIG. 1A , a communication signal demodulation device 1 is used to demodulate a communication signal to generate an output signal. In a preferred embodiment, the communication signal is transmitted to the communication signal demodulation device 1 via wireless communication transmission. For example, in the application of wireless charging for mobile phones, communication signals are transmitted between the charging stand and the mobile phone through wireless communication transmission.

Please continue to refer to FIG. 1A , the sensing circuits 11 and 12 are respectively used to sense different electrical characteristics of the same communication signal, and respectively generate corresponding sensing modulation signals Ssm1 and Ssm2 . For example, the sensing circuit 11 is, for example but not limited to, a voltage sensing circuit for sensing the voltage of a communication signal to generate a voltage sensing signal, that is, the sensing modulation signal Ssm1; the sensing circuit 12 is for example but not limited to It is limited to a current sensing circuit for sensing the current of the communication signal to generate the current sensing signal, that is, the sensing modulation signal Ssm2.

Please continue to refer to FIG. 1A , the processing filters 21 and 22 are respectively used to filter the corresponding sensing modulation signals Ssm1 and Ssm2 , and respectively generate corresponding filtering modulation signals Sft1 and Sft2 . It should be noted that, please refer to FIG. 2A and FIG. 2B at the same time. FIG. 2A shows a schematic diagram of different sensing modulation signal waveforms for sensing different electrical characteristics of the same communication signal according to the present invention; FIG. 2B shows different filtering modulations according to the present invention Schematic diagram of the signal waveform of the signal. As shown in FIG. 2A and FIG. 2B, after filtering by the processing filters 21 and 22, the sensing modulation signals Ssm1 and Ssm2 with higher noise are converted into filtered modulation signals Sft1 and Sft2 with lower noise, so as to facilitate subsequent demodulation program execution.

Please continue to refer to FIG. 1A, the demodulators 31, 32, 33 and 34 are used to demodulate and filter the modulation signals Sft1 and Sft2 respectively, and respectively generate corresponding demodulation signals Sdm1, Sdm2, Sdm3 and Sdm4, wherein each filter modulation The signals Sft1 and Sft2 correspond to at least one demodulator 31 , 32 , 33 and 34 . As shown in the figure, the filtered modulation signal Sft1 corresponds to the demodulators 31 and 32 ; the filtered modulation signal Sft2 corresponds to the demodulators 33 and 34 , for example. For example, the demodulators 31, 32, 33 and 34 respectively adopt the same or different demodulation procedures to demodulate and filter the modulated signals Sft1 and Sft2, and respectively generate corresponding demodulated signals Sdm1, Sdm2, Sdm3 and Sdm4 .

Please continue to refer to FIG. 1A, the judging circuit 40 receives a plurality of demodulated signals Sdm1, Sdm2, Sdm3 and Sdm4, and determines the correctness and No, and at least one correct unit signal is combined to generate an output signal. Please refer to FIG. 1B at the same time. For example, a unit signal refers to a packet (packet). The demodulated signal Sdm1 has packets Pac11, Pac12 and Pac13; the demodulated signal Sdm2 has packets Pac21, Pac22 and Pac23; the demodulated signal Sdm3 has The packets Pac31, Pac32 and Pac33; the demodulated signal Sdm4 has packets Pac41, Pac42 and Pac43. The judging circuit 40 uses a judging mechanism to judge whether each of the above packets is correct or not, as shown in FIG. 1B . And according to the judgment result, the correct packet is combined into an output signal. In this way, the disadvantages of the prior art can be avoided without re-receiving communication signals, saving time for signal transmission and demodulation of communication signals, and improving communication efficiency.

It should be noted that the unit signal is not limited to being a packet, for example, it can also be a byte (byte), and the judgment circuit 40 is not limited to judging the correctness of each packet, and can also use the same judging mechanism to judge the correctness of each byte. Whether or not, combining correct bytes into correct packets or directly combining them into output signals all belong to the scope of the present invention.

It should be noted that there are various implementations of the so-called judging mechanism. For example, the judging mechanism includes a checksum step and/or a parity check step. This is well known to those skilled in the art and will not be repeated here.

Please refer to FIG. 3A and FIG. 3B . FIG. 3A and FIG. 3B are schematic diagrams showing related signal waveforms of a demodulation process according to the present invention. FIG. 3A is a schematic diagram of a signal waveform of the filtered modulation signal Sft1. As shown in FIG. 3A , the demodulator 31 is edge-triggered, that is, when the filtered modulation signal Sft1 switches instantaneously, that is, when a rising edge (rising edge) and a falling edge (falling edge) occur, the trigger is shown in FIG. 3B . A plurality of pulses to generate a pulse signal Spw1. Next, the demodulator 31 calculates the pulse width between every two instantaneous switches in the filtered modulation signal Sft1 according to the pulse signal Spw1 . Next, the demodulator 31 demodulates the filtered modulation signal Sft1 according to a plurality of pulse widths between all two instantaneous switches in the filtered modulation signal Sft1 and a logic level in each pulse width. Please refer to FIG. 5 , which shows a schematic diagram of demodulation conversion steps according to the present invention. As shown in Figure 5, a bi-phase (bi-phase) demodulation conversion step, the logic level of each pulse width of the filtered modulation signal Sft1 is compared with the reference signal Ref, for example, a high potential in the reference signal Ref In a period formed by the combination of a pulse and a low potential pulse, the logical level of the two pulse widths of the corresponding filtered modulation signal Sft1 has a combination of high potential and low potential, which represents logic "1"; while the logical level of the filtered modulation signal Sft1 The combination of the logic levels of the two pulse widths being both high potential and low potential represents a logic “0”. Based on this logic, the filtered modulation signal Sft1 is demodulated.

Please refer to FIG. 4A and FIG. 4B . FIG. 4A and FIG. 4B are schematic diagrams showing related signal waveforms of another demodulation process according to the present invention. FIG. 4A is a schematic diagram of a signal waveform of the filtered modulation signal Sft1. As shown in FIG. 4A , the demodulator 32 counts, for example, the time that the filtered modulation signal Sft1 remains at a high level by using the frequency signal, and then calculates the pulse width between every two instant switches to generate the pulse signal Spw2 . Next, the demodulator 32 calculates the pulse width between every two instantaneous switches in the filtered modulation signal Sft1 according to the pulse signal Spw2 . Next, the demodulator 32 demodulates the filtered modulation signal Sft1 according to a plurality of pulse widths between all two instantaneous switches in the filtered modulation signal Sft1 and a logic level in each pulse width. Then, the filtered modulation signal Sft1 is demodulated by a demodulation conversion step according to the present invention as shown in FIG. 5 .

The judging circuit 40 uses a judging mechanism to judge whether each unit signal in each demodulated signal is correct or not, and after combining at least one unit signal that is correct, an output signal is generated. For example, the judging mechanism includes a checksum step and/or a parity check step, which are well known to those skilled in the art and will not be repeated here.

The present invention is superior to the prior art, one of which is to simultaneously demodulate the same communication signal with a plurality of sensing circuits and a plurality of demodulators, and judge the correctness of each unit signal in the communication signal in the judging circuit No, and after combining the correct one or more unit signals, the output signal is generated, which can not only confirm that the demodulation result is correct, but also save the retransmission of many communication signals, save the time of re-demodulating communication signals, and improve communication efficiency.

The present invention has been described above with reference to preferred embodiments, but the above description is only for those skilled in the art to easily understand the content of the present invention, and is not intended to limit the scope of rights of the present invention. The various embodiments described are not limited to single application, and can also be used in combination. For example, two or more embodiments can be used in combination, and some components in one embodiment can also be used to replace another embodiment. corresponding components. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. It is limited to the signal itself, and also includes performing voltage-to-current conversion, current-to-voltage conversion, and/or ratio conversion on the signal when necessary, and then processing or computing the converted signal to generate a certain output result. It can be seen that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations, and there are many combinations, which will not be listed here. Accordingly, the scope of the invention should encompass the above and all other equivalent variations.

Claims (14)

1. A communication signal demodulation apparatus for demodulating a communication signal to generate an output signal, the communication signal demodulation apparatus comprising:

the sensing circuits are respectively used for sensing different electrical characteristics of the same communication signal and respectively generating a corresponding sensing modulation signal;

the processing filters are respectively used for filtering the corresponding sensing modulation signals and respectively generating a corresponding filtering modulation signal;

a plurality of demodulators for demodulating a plurality of the filtered modulated signals respectively, and generating a corresponding demodulation signal respectively, wherein each of the filtered modulated signals corresponds to at least one of the demodulators; and

and a judging circuit for receiving a plurality of the demodulation signals, determining whether each unit signal in each demodulation signal is correct or not according to a judging mechanism, and generating the output signal after combining at least one correct unit signal.

2. The communication signal demodulation apparatus of claim 1, wherein the unit signal comprises a packet or a byte.

3. The communication signal demodulation apparatus according to claim 1, wherein the communication signal is transmitted to the communication signal demodulation apparatus via a wireless communication transmission scheme.

4. The communication signal demodulating apparatus according to claim 1, wherein the plurality of demodulators demodulate the plurality of filtered modulated signals with different demodulation procedures.

5. The communication signal demodulating apparatus according to claim 1, wherein the demodulator corresponds to a demodulating program for demodulating the filtered modulated signal, comprising:

calculating pulse width between every two instantaneous switches in the filtering modulation signal in an edge triggering mode; and

demodulating the filtered modulated signal according to a plurality of the pulse widths between all two instantaneous switches in the filtered modulated signal and a logic level in each pulse width.

6. The communication signal demodulating apparatus according to claim 1, wherein the demodulator corresponds to a demodulating program for demodulating the filtered modulated signal, comprising:

counting pulse width between every two instantaneous switches in the filtered modulation signal by a frequency signal; and

demodulating the filtered modulated signal according to a plurality of the pulse widths between all two instantaneous switches in the filtered modulated signal and a logic level in each pulse width.

7. The communication signal demodulating apparatus according to claim 1, wherein the judging means includes a checksum step and/or a homonymy checksum step.

8. A communication signal demodulation method for demodulating a communication signal to generate an output signal, the communication signal demodulation method comprising:

a plurality of sensing circuits are used for respectively sensing different electrical characteristics of the same communication signal and respectively generating a corresponding sensing modulation signal;

filtering a plurality of the sensing modulation signals respectively to generate a corresponding filtering modulation signal;

demodulating a plurality of the filtered modulated signals by at least one demodulation program, and generating a corresponding demodulation signal respectively, wherein each of the filtered modulated signals corresponds to at least one demodulation program; and

the method comprises the steps of receiving a plurality of demodulation signals, determining whether each unit signal in each demodulation signal is correct or not according to a judging mechanism, combining at least one correct unit signal, and generating the output signal.

9. The method of claim 8, wherein the unit signal comprises a packet or a byte.

10. The communication signal demodulation method of claim 8, wherein the communication signal is generated via a wireless communication transmission scheme.

11. The communication signal demodulation method of claim 8, wherein each of the filtered modulated signals corresponds to a plurality of the demodulation processes.

12. The communication signal demodulation method of claim 8, wherein the demodulation process of demodulating the filtered modulated signal comprises:

calculating pulse width between every two instantaneous switches in the filtering modulation signal in an edge triggering mode; and

demodulating the filtered modulated signal according to a plurality of the pulse widths between all two instantaneous switches in the filtered modulated signal and a logic level in each pulse width.

13. The communication signal demodulation method of claim 8, wherein the demodulation process of demodulating the filtered modulated signal comprises:

counting pulse width between every two instantaneous switches in the filtered modulation signal by a frequency signal; and

demodulating the filtered modulated signal according to a plurality of the pulse widths between all two instantaneous switches in the filtered modulated signal and a logic level in each pulse width.

14. The communication signal demodulation method of claim 8, wherein the determination mechanism comprises a checksum step and/or a parity check step.

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