CN103560109A - Method for forming multiple contact holes - Google Patents
Method for forming multiple contact holes Download PDFInfo
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- CN103560109A CN103560109A CN201310566696.XA CN201310566696A CN103560109A CN 103560109 A CN103560109 A CN 103560109A CN 201310566696 A CN201310566696 A CN 201310566696A CN 103560109 A CN103560109 A CN 103560109A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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Abstract
The invention discloses a method for forming multiple contact holes. The method is characterized in that a lower layer formed on a substrate is included, the lower layer can comprise a second hard die layer, a lower hard die layer and a device layer or can comprise the combination of the second hard die layer, the lower hard die layer and the device layer, the device layer can be made of any suitable material, the second hard die layer can be made of any suitable hard masking material, the second hard die layer is made of a material different from the material forming the first hard die layer, the second hard die layer can have any suitable thickness, and a plurality of separated characteristic layers which respectively have at least one first characteristic and at least one second characteristic are formed on the first hard die layer. The method for forming the multiple contact holes has the advantages that the method is easy to operate, the contact holes are easy to form, efficiency of production work is improved, and the steps are reduced.
Description
Technical field
The present invention relates to a kind of a kind of formation method of formation method, particularly many contact holes of hole.
Background technology
The present invention relates generally to the method for the manufacture of semiconductor device, for example, in nonvolatile memory array, form the method for contact hole.In tradition design, as doubles print, lower than the resolution of 38 nanometers, cannot realize.The alternative technology that approaches the resolution of 24 nanometer contact holes is very difficult, and relates to the staggered array of use 2 row.Carry out the more pattern of aperture, as lower than 22 nanometers, may need 3 rows staggered, it produces extra difficulty, as increased, depends on optical near-correction and sub-sub-resolution assist feature.
Summary of the invention
The object of the present invention is to provide a kind of formation method of many contact holes, in order to solve above-mentioned existing issue.
Technical scheme of the present invention is as follows: a kind of formation method of many contact holes, it is characterized in that: the method includes a lower floor being formed on substrate, lower floor can comprise the second die layer, die layer once, a mechanical floor, or their combination, mechanical floor can be made by any suitable material; The second die layer can be comprised of any suitable hard mask material, and the second die layer is comprised of the different material of the material from the first die layer, and the second die layer can have any suitable thickness; On the first die layer, be formed with a plurality of isolated characteristic layer that comprises at least one First Characteristic and at least one Second Characteristic.
On characteristic layer, be formed with the first separator, it is comprised of the different material of the material from characteristic layer.
The first separator can etched formation the first intermittent pattern.
The first intermittent pattern is aobvious is rendered as a plurality of distance piece shells, and it defines the first wall and the second wall on the other side.
In the method, can be formed with a lid mask, lid mask can comprise the first band-like portions and second band-like portions of at least one isolated lid mask material, also includes the 3rd band-like portions and the 4th band-like portions that are formed on the lid mask material on lower floor of the lid mask material being formed in lower floor.
The etched expose portion of the first die layer forms a plurality of contact holes.
Lid mask can include ribbon part, ribbon part two, ribbon part three.
The invention has the beneficial effects as follows: simple to operate, form easily, improved the efficiency of production work, reduced step.
Accompanying drawing explanation
Fig. 1 to 6 is stage sectional views that forming device according to an embodiment of the invention is shown;
Fig. 7 to 12 is respectively the top view of the structure shown in Fig. 1 to 6;
Figure 13 to 14 is side sectional views that the stage of forming device is according to another embodiment of the invention shown;
Figure 15 to 16 is respectively the top view of the structure shown in Figure 13 to 14;
In figure, indicate: 100, substrate, 200, lower floor, 210, mechanical floor, 220, lower die layer, 230, the second die layer, 300, the first die layer, 303, contact hole, 401, characteristic layer, 402, First Characteristic, 403, Second Characteristic, 500, the first separator, 502, the first intermittent pattern, 510, the first wall, 511, the second wall, 602, lid mask, 603, the first band-like portions, 604, the second band-like portions, 605, the 3rd strap, 606, the 4th strap, 607, ribbon part, 608, ribbon part two, 609, ribbon part three.
Embodiment
By reference to the accompanying drawings, the present invention is described in further detail.
The formation method of a kind of many contact holes of the present invention, it is characterized in that: the method includes a lower floor 200 being formed on substrate 100, lower floor 200 can comprise the second die layer 230, die layer 220 once, one mechanical floor 210, or their combination, mechanical floor 210 can be made by any suitable material; The second die layer 230 can be comprised of any suitable hard mask material, and the second die layer 230 is comprised of the different material of the material from the first die layer 300, and the second die layer 230 can have any suitable thickness; On the first die layer 300, be formed with a plurality of isolated characteristic layer 401 that comprises at least one First Characteristic 402 and at least one Second Characteristic 403.On characteristic layer 401, be formed with the first separator 500, it is comprised of the different material of the material from characteristic layer 401.The first separator 500 can etched formation the first intermittent pattern 502.The first intermittent pattern 502 is aobvious is rendered as a plurality of distance piece shells, and it defines the first wall 510 and the second wall 511 on the other side.In the method, can be formed with a lid mask 602, lid mask 602 can comprise the first band-like portions 603 and second band-like portions 604 of at least one isolated lid mask material, also includes the 3rd band-like portions 605 and the 4th band-like portions 606 that are formed on the lid mask material on lower floor of the lid mask material being formed in lower floor.The etched expose portion of the first die layer 300 forms a plurality of contact holes 303.Lid mask 602 can include ribbon part 607, ribbon part 2 608, ribbon part 3 609.In the method, can use the technology of distance piece shell, and lid mask forms contact hole pattern, hole 305 can cross structure forms, and each hole can be arranged in corresponding dual damascene type groove 307.
Concrete structure of the present invention as described above.One embodiment of the present of invention provide a kind of method that forms a plurality of contact holes, be included in the First Characteristic and the Second Characteristic that on basic material, form, in the first and second features, form sidewall spacer, remove the first and second functions, and without mobile sidewall spacer, form the lid mask of exposed sidewalls sept at least in part, the lid mask of the use material below etching is as mask, to form a plurality of contact holes.In certain embodiments, subsurface material comprises insulating material.
With reference to Tu1， lower floor 200, be formed on substrate 100.Substrate 100 can be any Semiconductor substrate as known in the art, as monocrystalline silicon, the compound of V-IV, for example silicon-germanium or carborundum, III-V compounds of group, II-VI compounds of group, on such substrate, there is epitaxial loayer, or any other semiconductor or non-semiconductor material, as glass, plastics, metal or ceramic substrate.Described substrate can comprise on it integrated circuit of manufacturing, as drive circuit and/or for the electrode of storage device.
The second die layer 230 can be comprised of any suitable hard mask material, comprises oxide, nitride, polysilicon, amorphous silicon, or metal.In a preferred embodiment, the second die layer 230 comprises the die layer of silica or silicon oxynitride.In another preferred embodiment, the second die layer 230 comprises polysilicon.Preferably, the second die layer 230 is comprised of the different material of the material from the first die layer 300, thereby makes the second die layer 230 can in the step of etching the first die layer 300, play the effect of etch stop.The second die layer 230 can have any suitable thickness, and preferred thickness is 30 to 60 nanometers.Lower floor's hard mask layer 220 can be made by any suitable hard mask material, and in a preferred embodiment, comprises organic hard mask, as amorphous carbon advanced person's pattern forms film (APF).The thickness of the die layer 220 of lower floor can be 120 250 nanometers.In another embodiment, the first die layer 300 can comprise amorphous silicon layer, and lower floor 200 is included in the DARC hard mask layer on mechanical floor 210.Also can use other layer combination.Mechanical floor 210 can be made by any suitable material, for example, and semi-conducting material, insulating material, or conductive material.For example, in a preferred embodiment, mechanical floor 210 is one or more insulating barriers, as silica, and silicon nitride, organic insulator etc.The first die layer 300 can be formed on lower floor 200.The first die layer 300 can be made by any suitable hard mask material.
As shown in Fig. 1 and 7, the first mask layer 300 can be partly exposed in the opening between a plurality of features, for example, and between First Characteristic 402 and Second Characteristic 403.In certain embodiments, characteristic layer 401 can be photosensitive material.In certain embodiments, characteristic layer 401 can be photoresist, combination BARC and photoresist feature, or can comprise amorphous carbon.Or characteristic layer 401 can comprise any other suitable material, as oxide, nitride or metal.Use conventional photoetching technique, the width of characteristic layer 401 may be 38 nm at first, the repair procedures of photoresist, and isotropic etching for example, the width that can be used to reduce feature 401 is 19 nanometers.Also can use other width.
Forward Fig. 2 and Fig. 8 to, the first separator 500 can be formed on characteristic layer 401.The first wall 500 is comprised of the different material of the material from characteristic layer.Separator 500 can comprise any one deck, and it can enough be deposited at low temperature at one, and to avoid damage characteristic layer 401, and it can bear and come unstuck, and is not removed.In Fig. 8, can't see the first wall 500 and characteristic layer.Yet the first wall 500 may be optical clear or translucent.
Then can use etch process to carry out etching to the first wall 500, to form the first intermittent pattern (also can be called as distance piece feature or sidewall) 502, with the top of exposed features layer 401, as described in Fig. 3 and 9.In certain embodiments, the width of First Characteristic and the width of Second Characteristic about equally, and and the sidewall on First Characteristic and the space width between the adjacent wall on Second Characteristic about equally.For example, the width in this space can approximately 19 nanometers.In certain embodiments, feature 401 comprises the top of photoresist and at least one in DARC and hard mask bottom, and sidewall 502 is covered with the sidewall of the upper and lower of feature.In these embodiments, use characteristic layer 401 comes etching bottom DARC and/or hard mask layer as mask.Sidewall spacer be formed on the photoresist that combines and the sidewall of DARC/hard mask pillar on.If the need arises, distance piece that can be on the side of DARC/ die pillar removes photoresist before forming.
Can find out shown in Figure 9ly, the first intermittent pattern 502 is shown as a plurality of distance piece shells, the top that its each characteristic layer 401 and characteristic layer 401 expose completely.Characteristic layer 401, for example at least First Characteristic 402 and Second Characteristic 403, then can be removed (for example peeling off), and not remove pattern 502, and the expose portion of the first die layer 300 therefore originally being covered by characteristic layer 401, as shown in Fig. 4 and 10.The second relative wall 511 that defines the first wall 510 and distance piece shell of pattern 502 is also shown in Figure 10.
As shown in Fig. 5 and 11, can form and cover mask 602, photoresist pattern for example, thereby the part of exposed sidewalls sept and the first die layer 300 at least in part.Therefore, lid mask and sidewall spacer can partly work to the mask of layer 300, as those are not exposed to the part in figure Figure 11, in lower floor's 200 unmasked portion processes subsequently.In other words, the first band-like portions 603 and second band-like portions 604 that at lid mask 602, can comprise at least one isolated lid mask material, substantially parallel to each other, making first, with portion, to cover the first wall 510(of each distance piece shell not shown in Figure 11), second with portion, to cover the second wall 511(of each relative distance piece shell invisible in Figure 11).In addition; lid mask can also comprise the 3rd strap 605 of the lid mask material being formed in lower floor; for example; the first die layer 300; thereby connect the first first end with portion and the second first end with portion; with the 4th band-like portions 606 that are formed on the lid mask material on lower floor, thereby connect first the second end with portion and the second the second end with portion, as shown in figure 11.The third and fourth band-like portions all can be approximately perpendicular to the first and second band-like portions, and the first intermittent pattern 502 is between the third and fourth band-like portions, as shown in figure 11.Therefore,, in etching work procedure subsequently, in the operation of etching the first die layer 300, can use and cover the part of mask 602 and the first intermittent pattern 502 as mask, thereby form the first hard mask features.
In addition, the expose portion of etching the first die layer 300 is shown in Fig. 5 and Figure 11, consequently forms a plurality of contact holes 303 as shown in Figure 6, for example, comprise at least the first, the second and the 3rd contact hole.In other words, in etching step, lower than previously by First Characteristic, in the subsurface material under occupied position, formed the first contact hole, the second contact hole is formed in the primer being exposed between adjacent wall, and the 3rd contact hole is formed on the below of original position taking by Second Characteristic.The the first, the second and the 3rd contact hole has approximately identical width and length.Therefore,, when the unmasked portion of etching the first die layer 300, the part of the second hard mask layer originally being covered by the first die layer 300 unmasked portion is exposed, as shown in 12 figure.In certain embodiments, a plurality of contact holes are arranged to be at least one row, as shown in figure 12.
In one embodiment, the first die Ceng300He lower floor 200 comprises DARC and is arranged at least one of hard mask on insulating barrier, and the step that forms a plurality of contact holes comprises at least one in etching DARC and hard mask, and with pattern DARC and firmly mask as at least one in mask, carry out insulating barrier described in etching.
In another embodiment, lid mask 602 covers lower floor, for example, outside the length of the first intermittent pattern 502, cover the first mask layer 300, covers the band-like portions of subsurface material within the length of sidewall spacer.For example, in certain embodiments, lid mask 602 comprises at least one band extending out from sidewall spacer, makes the contact hole of the noninterlace of formation at least two row.As shown in Figure 13 and 15, lid mask 602 can comprise some ribbon parts, and in the process of etching the first die layer 300 subsequently, the contact hole 303 of noninterlace forms an array, as shown in Figure 14 and 16.
In other words, exceeding the structure of covering mask is shown in Figure 11, as mentioned above, lid mask may further include the 5th strap of at least one extra lid mask material, its almost parallel, and between the first band-like portions 603 and the second band-like portions 604, and on sept shell.First end contact the 3rd band-like portions 605 of described at least one the 5th extra strap, contact the 4th ribbon part 606 with the second end of described at least one the 5th extra band-like portions, as shown in Figure 15 and Figure 16.
In certain embodiments, each in a plurality of contact holes 303 has rectangular cross-sectional shape.In certain embodiments, contact hole 303 has the shape of cross section of essentially rectangular.In certain embodiments, contact hole 303 has roughly foursquare cross sectional shape.In certain embodiments, a plurality of contact holes stagger.The contact hole that the below of the position originally being occupied by characteristic layer 401 in certain embodiments, forms and the contact hole being formed between adjacent spaces thing shell have essentially identical shape.
Be preferably formed the width that each characteristic layer 401 is roughly 19 nanometers.Yet due to variations different in process, characteristic layer 401 all can change between the 0-10% of this preferable width, as 1-5%.In addition, preferably, the first intermittent pattern 502 is formed between each characteristic layer 401, leaves the same space of width and 19 nanophases.Equally, due to the different variation in process, characteristic layer 401 can each change between this preferable width 0-10 %, as 1-5%.Certainly, also can use other width.
In step subsequently, can increase with extra etch process the degree of depth in formed hole, and/or change pattern on mechanical floor 210.For example, etching step subsequently can carry out etching the second die layer 230 with the first intermittent pattern 502, thereby in etching process, from the second die layer 230, forms extra feature, and it can be used as the mask layer of lower floor subsequently.For example, mechanical floor 210, for example mechanical floor 210 can use any one or more layer and/or patterned layer as mask etching to form a plurality of contact holes.
In step subsequently, metal silicide, metal electrode or polysilicon, the conductive materials such as connecting line can be formed in a plurality of contact holes, make electric conducting material contact be exposed to conductor wire or the connecting line of a plurality of contact holes.In other words, such line or connecting line can be formed on the substrate 100 of mechanical floor below 210 or be embedded in mechanical floor 210 belows.Also can in any suitable semiconductor device, form contact hole by the method for manufacturing above-mentioned contact hole, as logic and memory device.For example, contact hole can be formed in non-volatile memory device, for example the nand type memory of floating gate or charge-storage transistor.
The contact hole that forms noninterlace, may form 19 nanometers or less resolution, and it is compared with traditional method, has better contact uniformity.In addition, can form the contact hole of the noninterlace with larger surface area, thereby cause contact resistance to reduce, and be increased in the electric current for contacting forming in hole.
It should be noted that forming method cover mask 602 can present in certain embodiments, needing only and covering mask 602 is that such pattern creates above-mentioned and the contact hole pattern shown in body weight.For example, lid mask 602 can form in some independent deposition steps, forms various band-like portions, or in a single deposition step.
Therefore, in embodiments of the invention, use the technology of sidewall spacer or distance piece shell, and lid mask forms contact hole pattern.The needs that sectional hole patterns is cross structure have so just been avoided, thereby allow the hole array at the noninterlace of 19 nanometers or less resolution, or in the less gross area, thereby allow the higher density in contact site, or larger hole has larger contact area, increase electric current and reduce contact resistance.
Claims (7)
1. a formation method for contact hole more than, is characterized in that:
The method includes a lower floor (200) being formed on substrate (100), lower floor (200) can comprise the second die layer (230), die layer (220) once, one mechanical floor (210), or their combination, mechanical floor (210) can be made by any suitable material;
The second die layer (230) can be comprised of any suitable hard mask material, and the second die layer (230) is comprised of the different material of the material from the first die layer (300), and the second die layer (230) can have any suitable thickness;
On the first die layer (300), be formed with a plurality of isolated characteristic layer (401) that comprises at least one First Characteristic (402) and at least one Second Characteristic (403).
2. the formation method of a kind of many contact holes according to claim 1, is characterized in that: on characteristic layer (401), be formed with the first separator (500), it is comprised of the different material of the material from characteristic layer (401).
3. the formation method of a kind of many contact holes according to claim 2, is characterized in that: the first separator (500) can etched formation the first intermittent pattern (502).
4. the formation method of a kind of many contact holes according to claim 3, is characterized in that: the first intermittent pattern (502) is aobvious is rendered as a plurality of distance piece shells, and it defines the first wall (510) and the second wall on the other side (511).
5. the formation method of a kind of many contact holes according to claim 1, it is characterized in that: in the method, can be formed with a lid mask (602), lid mask (602) can comprise the first band-like portions (603) and second band-like portions (604) of at least one isolated lid mask material, also includes the 3rd band-like portions (605) of the lid mask material being formed in lower floor and is formed on the 4th band-like portions (606) of the lid mask material on lower floor.
6. the formation method of a kind of many contact holes according to claim 1, is characterized in that: the etched expose portion of the first die layer (300) forms a plurality of contact holes (303).
7. the formation method of a kind of many contact holes according to claim 5, is characterized in that: lid mask (602) can include ribbon part (607), ribbon part two (608), ribbon part three (609).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201310566696.XA CN103560109A (en) | 2013-11-13 | 2013-11-13 | Method for forming multiple contact holes |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310566696.XA CN103560109A (en) | 2013-11-13 | 2013-11-13 | Method for forming multiple contact holes |
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| CN103560109A true CN103560109A (en) | 2014-02-05 |
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| CN201310566696.XA Pending CN103560109A (en) | 2013-11-13 | 2013-11-13 | Method for forming multiple contact holes |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110233097A (en) * | 2018-03-06 | 2019-09-13 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor devices |
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| CN101246845A (en) * | 2007-02-15 | 2008-08-20 | 海力士半导体有限公司 | Method of forming contact hole of semiconductor device |
| CN101471282A (en) * | 2007-12-27 | 2009-07-01 | 海力士半导体有限公司 | Method of forming a metal line of a semiconductor device |
| CN101681812A (en) * | 2007-06-04 | 2010-03-24 | 美光科技公司 | Pitch multiplication using self-assembling materials |
| US20120074500A1 (en) * | 2008-07-03 | 2012-03-29 | Micron Technology, Inc. | Method for forming transistor with high breakdown voltage |
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| US6187671B1 (en) * | 1995-07-22 | 2001-02-13 | Ricoh Company, Ltd. | Method of forming semiconductor device having minute contact hole |
| CN101246845A (en) * | 2007-02-15 | 2008-08-20 | 海力士半导体有限公司 | Method of forming contact hole of semiconductor device |
| CN101681812A (en) * | 2007-06-04 | 2010-03-24 | 美光科技公司 | Pitch multiplication using self-assembling materials |
| CN101471282A (en) * | 2007-12-27 | 2009-07-01 | 海力士半导体有限公司 | Method of forming a metal line of a semiconductor device |
| US20120074500A1 (en) * | 2008-07-03 | 2012-03-29 | Micron Technology, Inc. | Method for forming transistor with high breakdown voltage |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110233097A (en) * | 2018-03-06 | 2019-09-13 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor devices |
| CN110233097B (en) * | 2018-03-06 | 2021-11-23 | 中芯国际集成电路制造(上海)有限公司 | Method for forming semiconductor device |
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Application publication date: 20140205 |