CN104219121A - Serial bus communication online reconstruction method based on FPGA (field programmable gate array) - Google Patents

Abstract

The invention provides an FPGA-based serial bus communication online reconfiguration method, comprising the following steps: (1) dividing the FPGA in the slave station device into a static region and a communication reconfiguration region, (2) the slave station device Identify the communication protocol type of the serial bus. When the communication protocol type is inconsistent, activate the reconstruction control module. (3) The reconstruction control module in the slave station device sends a reconstruction request to the reconstruction main control module, and the reconstruction main control module sends a reconfiguration request. The preparation completion signal is sent to the reconstruction control module, and the reconstruction control module performs online dynamic reconfiguration of the communication reconstruction area after receiving the preparation completion signal, so that the communication protocol type in the reconstruction area is consistent with the communication protocol type of the serial bus. The invention enables FPGA-based serial bus communication equipment to have the ability to automatically adapt to network protocol changes online, enhances the flexibility and interchangeability of network communication equipment, and is of great significance to the industrial control field where multiple network communication protocols coexist.

Description

Online Reconfiguration Method of Serial Bus Communication Based on FPGA

technical field

The invention relates to the field of industrial control, in particular to an FPGA-based serial bus communication online reconfiguration method of an industrial control system.

Background technique

With the continuous improvement of the network and informatization of industrial control, centralized monitoring and unified management of field devices are required. However, there are currently more than 200 types of network communication protocols in the world, and more than 20 of them meet the international standard IEC61158. According to different application requirements, system designers often require multiple instrument manufacturers to provide different sensors, transmitters, controllers, actuators, etc. However, each instrument manufacturer may use different standard network communication protocols, such as ModbusRTU, Modbus ASCII, Profibus-DP, CC-Link, etc. The coexistence of various network communications makes the developers and users of industrial equipment face a severe test. There is an urgent need for a device that has the ability to dynamically adapt to changes in network communications and consumes only the smallest hardware and software resources. In an actual industrial network control system, due to functional or temporary replacement requirements, communication devices that also use serial buses (such as RS-485 bus, CAN bus, etc.) as physical transmission may exist on the same network at the same time, and network communication devices are required The station can automatically identify the link communication protocol, and then switch the communication mode of the station to the current communication protocol to realize the communication self-adaptation of the network control system. There are currently two solutions to this problem: hardware global reconfiguration and software redundancy. Hardware global reconfiguration technology is a configuration technology developed based on FPGA in recent years. The overall reconstruction of the network control system is to detect the communication protocol type of the current network, change the part responsible for network communication, and then burn the entire configuration file to the FPGA. However, global reconfiguration of hardware requires reconfiguration of the entire FPGA resource. This reconfiguration method is to update and write the entire device, and also update and write the non-communication parts that do not need to be changed, which will cause the system to be re-initialized, or even Cause system crash, so this technology has not been widely used in industrial field control process.

The software redundancy method is to concentrate the function blocks that realize different communication protocols in the equipment station at the same time, by detecting the link communication protocol, and then make the current communication mode be the link communication mode through function calling or function switching, so as to ensure the normal operation of the network control system communication. However, since this method centralizes all communication protocols at the same time, the hardware resources and software resources consumed by the system will increase exponentially with the number of types of communication protocols served, resulting in a large waste of resources.

Contents of the invention

In order to solve the problems and defects existing in the prior art, the present invention provides an FPGA-based serial bus network communication online reconfiguration method, by adopting a partial hardware reconfiguration method for the network communication reconfiguration area, online dynamic configuration network communication reconfiguration method The structure area enables FPGA-based serial bus network communication equipment to have the ability to automatically adapt to network protocol changes online, and enhances the flexibility and interchangeability of network communication equipment.

Technical scheme of the present invention is:

1. the serial bus communication online reconfiguration method based on FPGA, it is characterized in that, described network communication process relates to master station equipment and slave station equipment, specifically comprises the steps:

Step 1, dividing the FPGA in the slave device into a static area and a communication reconstruction area, the static area includes a reconfiguration control module and a reconfiguration master control module;

Step 2, the slave station device identifies the communication protocol type of the serial bus, and activates the reconfiguration control module when the communication protocol type of the serial bus is inconsistent with the communication protocol type in the communication reconfiguration area;

Step 3, the reconfiguration control module in the slave station device sends a reconfiguration request to the reconfiguration main control module, and the reconfiguration main control module prepares for reconfiguration after receiving the reconfiguration request, and confirms the completion Sending a preparation completion signal to the reconfiguration control module after the reconfiguration preparation, the reconfiguration control module performs online dynamic reconfiguration of the communication reconfiguration area after receiving the preparation completion signal, so that in the reconfiguration area The communication protocol type is consistent with the communication protocol type of the serial bus.

2. The communication reconstruction area of the slave station equipment includes the physical layer, the data link layer and the application layer included in the serial link communication protocol, and the online dynamic reconfiguration of the network communication protocol refers to: ① if the slave station If the physical layer of the device does not have an external interface that can be matched with the FPGA chip, the network communication reconstruction area includes the data link layer and the application layer. Interface, the network communication reconstruction area includes the process of communication reconstruction of the physical layer, data link layer and application layer, and realizes the online reconstruction of network communication based on the FPGA serial bus, and the communication reconstruction of the application layer and the physical layer The process is the same as the communication reconstruction process method of the data link layer.

3. Before reconfiguring the network communication reconfiguration area, completely reconfigure the entire static area and the communication reconfiguration area once, and determine the default communication type of the communication reconfiguration area.

4. In the step 2, before activating the reconfiguration control module, test and establish the data connection between the reconfiguration control module and the external memory of the slave device through the memory control module in the slave device, for A configuration file is prepared for network communication reconstruction, and the location of the configuration file is determined by the type of the communication protocol of the current serial bus.

5. In the second step, after the reconfiguration control module is activated, the reconfiguration control module freezes all input signals in the communication reconfiguration area, including the output of the reconfiguration control module to the reconfiguration main control module A local reset signal for resetting the communication reconfiguration area.

6. In step 3, while the reconfiguration control module sends a reconfiguration request to the reconfiguration main control module, the reconfiguration control module sends a reconfiguration clock to the reconfiguration main control module, and the reconfiguration The request signal runs through the entire refactoring process until a refactoring succeeds or a refactoring error occurs.

7. After the reconstruction control module receives the preparation completion signal of the reconstruction main control module, it waits for four reconstruction clock cycles, and before the end of the fourth reconstruction clock cycle, the storage control module reads the first A 16bit data;

When the fourth reconfiguration clock cycle ends, that is, the falling edge of the fourth reconfiguration cycle, the storage control module transmits the first 16-bit data read to the data bus of the reconfiguration main control module. After waiting for four clock cycles, read the second 16bit data before the arrival of the next falling edge;

The above actions are repeated until the reading of the configuration file in the memory is completed and the reconstruction main control module outputs a reconstruction success signal to the reconstruction control module.

8. The reconfiguration control module releases the reconfiguration request signal within 8 reconfiguration clock cycles after receiving the reconfiguration success signal.

9. After the reconfiguration request signal is released, the reconfiguration request signal can be reset through the reset signal of the reconfiguration area after the freeze signal of the communication reconfiguration area is successfully released.

10. The static area also includes a link communication detection module, and the link communication detection module identifies the communication protocol type of the current network according to the message information of the serial bus, if the identified current communication protocol type is consistent with the communication protocol in the reconstruction area The types are inconsistent, and the link communication detection module activates the reconstruction control module.

Technical effect of the present invention:

1. The present invention provides an FPGA-based serial bus communication online reconfiguration method. After the slave station is fully configured, when it detects that the communication protocol of the network communication link is inconsistent with the protocol of the network communication reconfiguration area, the reconfiguration is activated control block. By adopting partial hardware reconstruction for the network communication reconstruction area, the network communication reconstruction area is dynamically configured online, so that the FPGA-based serial bus network communication equipment has the ability to automatically adapt to network protocol changes online, and enhance the flexibility of network communication equipment and interchangeability, and there is no need to gather unnecessary communication protocols together, avoiding the waste of resources.

2. During the entire communication reconstruction process, if the non-reconfiguration area (i.e. static area) remains unchanged, its historical data and status can be maintained, and the application function block can continue to complete data collection, control quantity calculation, signal Output and other functions greatly ensure the stable operation of the system.

3. The present invention realizes the interchangeability of Modbus ASCII communication equipment and Modbus RTU communication equipment, enhances the interchangeability of products, can realize the self-adaptation of communication of various networks, and is suitable for the industrial control field where various network communication protocols coexist has great significance.

Description of drawings

FIG. 1 is a schematic diagram of the logical architecture and division of reconfiguration areas of the present invention.

Fig. 2 is a schematic diagram of main implementation steps of the present invention.

Fig. 3 is a schematic flow chart of a specific embodiment of the present invention.

Fig. 4 is a schematic diagram of the process of discriminating the communication protocol type in the present invention.

Fig. 5 is a schematic diagram of comparing the similarities and differences of the communication models of the specific embodiment of the present invention.

Figure 6 is a topology diagram of the Modbus bus network.

Detailed ways

The present invention provides an FPGA-based serial bus communication online reconfiguration method. By adopting a partial hardware reconfiguration method for the network communication reconfiguration area, the FPGA-based serial bus network communication device has the ability to automatically adapt to network protocol changes online. Capability, enhance the flexibility and interchangeability of network communication equipment. Since there are many serial buses, such as RS-485 bus, RS-232 bus and RS-422 bus, etc., and there are also many network communication protocols, such as Modbus RTU, Modbus ASCII, Profibus-DP, CC-Link, etc., Therefore, the present invention further describes the present invention with RS-485 bus, and with Modbus RTU and Modbus ASCII two kinds of communication protocols as specific embodiment.

FIG. 1 is a schematic diagram of the logical architecture and division of reconfiguration areas of the present invention. As shown in Figure 1, the Modbus slave station provided by the present invention realizes the system function structure diagram of online automatic adaptation to Modbus ASCII and Modbus RTU through a partial reconstruction method, including:

Communication detection module 1. During the communication process between the Modbus master station and the Modbus slave station, all Modbus slave stations can introduce link signals through the RS-485 bus, and the communication detection module and the network communication reconstruction area simultaneously use this signal as input. As described in the schematic flow chart of the first embodiment, the communication detection module realizes the distinguishing link communication protocol according to the data link layer difference characteristics of Modbus ASCII and Modbus RTU. In the present invention, "master station" is also called "master station device", and "slave station" is also called "slave station device".

Reconfiguration control block 2, which is the center of the entire reconfiguration control, activates the reconfiguration control block when the communication detection module recognizes that the current network communication protocol is inconsistent with the communication protocol of the network communication reconfiguration area. The activated reconfiguration control block first shields the input signal of the network communication reconfiguration area, then sends a reconfiguration request signal to the reconfiguration master node, and then waits for the reconfiguration preparation completion signal from the reconfiguration master node. When the reconstruction ready signal is asserted, the reconstruction control block fetches the configuration data from the storage control block, and transmits the data to the reconstruction master node until the reconstruction is completed or the reconstruction error signal occurs. If the reconfiguration completion signal of the reconfiguration master node is declared, the reconfiguration control block cancels the reconfiguration request signal immediately, then resets the network communication reconfiguration area, and releases the shielding control signal of the network communication reconfiguration area. The reconstruction main control module in the embodiment of the present invention receives the reconstruction request of the reconstruction control block and then prepares for reconstruction. The reconstruction preparation means that after the reconstruction main control module receives the reconstruction request, it performs FPGA-based The routine self-inspection process of serial bus communication online reconstruction is to detect whether the slave device has the basic conditions for reconstruction, such as whether the user has customized the reconstruction area and whether the size of the reconstruction area is appropriate, etc. wait.

Specifically, if a reconfiguration error signal occurs during the reconfiguration process, cancel the reconfiguration request signal, and then wait for 20 reconfiguration clocks to re-execute the reconfiguration step. It is worth noting that when the reconstruction success signal appears, it is necessary to wait for the signal to be released before reconfiguring the reset network communication area and releasing the shielding control signal of the area.

Storage control block 3, this function block defines the application interface for reading data according to the external memory, when the reconfiguration control block starts network communication reconstruction, this module continuously fetches data from the external memory according to the memory address provided by the reconfiguration control block.

External memory module 4, this memory stores the configuration file of Modbus RTU and Modbus ASCII data link layer respectively by address.

Reconfiguration main control module 5, Altera Cyclone V or Arria V or Stratix V devices are integrated with this control block, and the reconfiguration control block can realize the reconfiguration of the network communication reconfiguration area through the reserved interactive interface.

Application function block, each device slave station in the Modbus network realizes its own application function through the application function block, this module includes two units: Modbus application layer unit 61, this unit mainly realizes the protocol data packet analysis and analysis of the Modbus communication protocol application layer Packaging, etc.; user application unit 62, the main functions of this unit are related to the specific functions of the equipment station, such as the output of control signals, the calculation of control quantities, the acquisition of sensor signals, and so on. In addition, the module is connected with other communication stations through the Modbus network to realize data interaction between stations.

Fig. 2 is a schematic diagram of main implementation steps of the present invention.

Step S1. The FPGA is divided into areas and divided into static areas and communication reconstruction areas, wherein the static area includes at least the reconfiguration control module 2 and the reconfiguration main control module 5. Of course, the static area also includes application function modules, The memory control module 3 and the link communication detection module 1, wherein the application function module is used for the output of the control signal, the calculation of the control amount, the acquisition of the sensor signal, etc.; The memory address provided by the reconstruction control continuously reads the configuration file data from the external memory; the reconstruction main control module is the internal integrated control module of FPGA devices such as AlteraCyclone V, Arria V and Stratix V series, and the reconstruction control module passes The reserved interactive interface can realize the reconfiguration of the network communication reconstruction area. The FPGA (Field-Programmable Gate Array) described in this embodiment, that is, field programmable gate array, appears as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the problem of custom circuits Insufficient, and overcome the shortcomings of the limited number of gate circuits of the original programmable device.

Step S2. Identify the communication protocol type of the serial bus. When the communication protocol type of the serial bus is inconsistent with the communication protocol type in the reconstruction area, activate the reconstruction control module; if they are consistent, do not act and wait for the next serial The message information of the bus is identified, and the next step is executed until the communication protocol is inconsistent. Among them, the identification of the communication protocol type and the reconstructed communication protocol type of the serial bus is realized through the link communication detection module. The communication detection module identifies the communication protocol type of the current network according to the message information of the serial bus, and describes the identification process in detail with the Modbus ASCII protocol and the Modbus RTU protocol:

According to the regulation of the Modbus transmission protocol standard: firstly, the master station initiates a request to the slave station for communication, and the Modbus master station can only initiate one communication transaction at a time, all slave stations in the network will receive the request message, and then analyze the request message The content of the address field of the message, judge whether the content is the address of the station, if so, make a corresponding response, otherwise discard the message. The effective range of the address field is 1-247, and the address 0 is a broadcast address, and all slave stations will not respond with a message when they receive the request of "address 0". From another aspect, the entire communication mode of the network is determined by the Modbus master station, and all network slave stations must be consistent with it to communicate normally.

Step S3. The reconfiguration control module sends a reconfiguration request to the reconfiguration main control module, and the reconfiguration control module reconfigures the protocol for the reconfiguration area after receiving the preparation completion signal of the reconfiguration main control module, that is, reconfigures the reconfiguration area .

Fig. 3 is a schematic flow chart of a specific embodiment of the present invention. As shown in Figure 3, it is a detailed flow chart of the Modbus slave station provided in this embodiment to automatically adapt to network communication protocol changes by reconfiguring the network data link layer. It contains many details of the specific implementation process, which is helpful for understanding The present invention, but for those skilled in the art, the technical solution defined by these many details is only a better technical solution of the present invention, and should not be understood as the only way of realizing the present invention or limiting the scope of protection. The specific process includes:

Step S301, judging whether the current network link communication type is consistent with the communication protocol type of the network reconstruction area, this step is equivalent to steps S301-S310 of the first embodiment, and then determining the current link communication protocol type according to the current communication counter value, Then compare this type with the communication protocol type in the network communication reconstruction area in Figure 1. If the communication types displayed by the two are consistent and do not need to be changed, enter the next conditional judgment; if the two display the communication type If not, go to step S302.

Step S302, if the judgment result of step S301 is false, indicating that the communication protocol of the slave station is inconsistent with the communication protocol of the network master station, activate the reconfiguration control block, shield the input signal of the network communication reconfiguration area, and avoid External signal transformation affects network reconstruction.

Step S303, according to the currently detected network communication protocol, determine the communication address of the external memory, and establish a data path.

Wherein, the external memory is used to store the partial reconstruction configuration file of the network communication reconstruction area. This embodiment is to realize the automatic reconstruction of the Modbus ASCII and Modbus RTU data links, that is, the ModbusASCII is stored in sections according to the addresses in the storage. Data Link Profile and Modbus RTU Data Link Layer Profile. When the storage control block sends a read command to the memory, at the same time, the read start address is sent to the value memory, and then the memory transmits the data to the memory control block according to the clock cycle beat.

Step S304, the reconfiguration control block prepares the reconfiguration clock to the reconfiguration master control node in the FPGA, and sends a reconfiguration request signal, which indicates an external request to reconfigure the network communication reconfiguration area, and the signal needs to be kept high level until the reconstruction success signal appears.

Wherein, the reconfiguration clock is provided by the reconfiguration control block, and the clock signal is the working reference clock of the reconfiguration master node, and the reconfiguration control block should provide the clock signal for the reconfiguration master control node during the whole reconfiguration process. Step S303, judging whether the reconfiguration master control node preparation completion signal is generated. After the reconfiguration control module sends the reconfiguration request signal, the FPGA needs a period of time to respond and prepare for data reception and other operations. During this period, the data sent by the reconfiguration master node is invalid.

Step S306, if the judgment of step S304 is true, wait for four reconstruction clock cycles, and take out the first 16-bit data through the memory baking block, and put it on the data bus of the reconstruction master node.

Among them, after the reconstruction ready signal appears, it needs to wait for four clock cycles. Here we call it the "handshake agreement" to ensure the clock synchronization of the reconstructed data domain.

Wherein, since the data bit width of the reconstructed master node is 16, two bytes of data need to be fetched from the memory each time, wherein the first byte is the lower 8 bits, and the second byte is the upper 8 bits.

Step S307 , taking out 16-bit data from the external memory each time according to the clock beat, and putting the configuration data on the data bus at the falling edge of the reconstruction clock.

After S306 waits for four reconfiguration clock cycles, the reconfiguration master node will send data on the rising edge of the clock or the data bus. The method provided in this example agrees to prepare the reconstructed data on the falling edge of each clock to ensure the order and validity of the data when it is collected on the rising edge.

Step S308, judging whether the reconstruction success signal of the reconstruction master node is set high. If the level remains low, it means that the configuration file transmission has not been completed, and then return to step S307; if the level is set high, it means that the reconstruction is completed, and then go to step S309.

Step S309, cancel the reconstruction request signal, and wait for the reconstruction success signal to be set to 0. In order to prevent the reconfiguration master node from starting the second reconfiguration, it is stipulated that the reconfiguration request signal must be cleared to 0 within 8 reconfiguration clocks. This embodiment stipulates that when the reconfiguration success signal appears, the reconfiguration request signal is immediately canceled .

Wherein, when the reconfiguration signal appears, the FPGA will keep the reconfiguration success signal for a period of time, and during this period, the shielding signal and reset signal that do not allow the network communication reconfiguration area still need to be kept high.

Step S310, unmask the input signal of the network communication reconfiguration area, and reset the network communication reconfiguration area. In step S309, when the reconstruction success signal changes from high to low, the entire reconstruction process has ended. The reconfiguration control block cancels the shielding control signal in step S302, and resets the network communication reconfiguration area, so as to ensure that all communication states remain at initial values.

It should be noted that the reconstruction process of this embodiment can only be carried out after the overall configuration of the entire FGPA is successful once. The overall configuration configures the static area and the network partial reconstruction area at the same time. This process can ensure that the communication identification communication detection module , application control block, memory control block, etc. work normally.

The initial communication mode of the network communication reconstruction area in the initial complete configuration process of this embodiment can be any one of Modbus ASCII and Modbus RTU, all of which meet the requirements of this embodiment. In addition, the number of reconfigurations of the entire FPGA is determined according to the actual situation and is not strictly limited.

Fig. 4 is a schematic diagram of the process of discriminating the communication protocol type in the present invention.

Both Modbus ASCII and Modbus RTU include physical layer, data link layer and application layer, but the data link layer is quite different, especially the data bit width and data encoding method. As shown in Figure 4:

Step S401.Modbus slave station (satisfying any communication protocol of Modbus RTU or Modbus ASCII) through the RS-485 bus data input signal, and monitor the start signal of the input signal;

Among them, the start signal is the start bit of each byte transmitted by the Modbus communication station, which is specified as a low level. When the received bit stream count value is zero and the link input signal is low, the signal is a start signal, indicating that a byte transmission starts;

Step S402. Judging whether the time for sampling the bit stream data is up, if the sampling time is not yet up, continue to wait;

Step S403. If step S402 determines that the sampling time is up, put the current link input data into the receiving buffer, and then add 1 to the bit stream receiving counter, wherein the relative address of the bit stream data storage is determined by the bit stream count value;

Step S404. Judging whether the bit stream count value is equal to 9, and judging whether the bit data received in step S403 is equal to 1;

Specifically, as stipulated by the Modbus ASCII transmission protocol standard, each byte of data transmitted at the data link layer includes 1 start bit + 7 data bits + 1 parity bit + 1 stop bit, and Modbus RTU transmission The protocol standard stipulates that each byte in the data link layer includes 1 start bit + 8 data bits + 1 parity bit, where the start bit is 0, the stop bit is 1, and the parity bit is determined by the data bit and parity check mode. When it is judged that the bit stream count value is 9 in step S404, it means that the start bit, data bit, and parity bit of this byte transmission have all been received. If the currently received bit stream data is 1, it indicates that it conforms to Modbus ASCII Stop bit request, then enter step S408, carry out parity check;

Step S405. Determine whether the bit stream count value is equal to 10. If step 404 and step S405 judging result are false simultaneously, then return to S402, prepare to receive next data; If step S405 judging result is true, explain that the data received does not meet the Modbus ASCII frame format requirement, and this moment has received 10-bit data is obtained, and the Modbus RTU byte bit stream verification requirement is satisfied, and then step S406 is entered;

Step S406. Judging whether the bit1-bit9 parity check is correct, if correct, enter step S407,

Step S407. Add 1 to the communication counter;

Step S408. Determine whether the parity check of bit1-bit8 is correct. According to the Modbus ASCII protocol, bit1-bit8 of the receiving buffer includes all data bits and parity check bits. If the verification result is wrong, that is, it does not conform to the frame format of ModbusASCII, then re-enter step S304, continue to receive the 10th bit data; if the verification result is correct, that is, it meets the frame format of Modbus ASCII, then enter step S409, and The communication counter is decremented by 1;

Step S210. clear the bit stream counter, after completing the correct verification of Modbus ASCII and Modbus RTU, then enter this step to clear the bit stream counter, indicating that a byte has been received, return to the start operation, and perform the next word Receiving and judging the number of sessions.

Through the above steps, the identification of Modbus ASCII and Modbus RTU is completed. The above identification method only uses the two modes of Modbus bus, Modbus ASCII and Modbus RTU, as examples for protocol identification description. In practical applications, other network communication protocols can also be used. The above method is used for identification, but the settings of the start bit and check bit of the byte of other protocols are different.

Fig. 5 is a schematic diagram of comparing the similarities and differences of the communication models of the specific embodiment of the present invention. As shown in Figure 5, the Modbus bus transmission mode is divided into two transmission modes: Modbus ASCII and Modbus RTU. According to the OSI seven-layer model, both Modbus ASCII and Modbus RTU include the physical layer, data link layer and application layer, but the data link layer is quite different, especially in data bit width and data encoding method. Based on this idea, the present invention provides a method for automatically adapting to the Modbus ASCII and Modbus RTU communication protocols online by changing the link layer of the network communication number. The communication protocol of the serial link includes the physical layer, the data link layer and the application layer. Usually, the network communication reconstruction area based on the FPGA platform includes the data link layer and the application layer. If the physical layer of the slave device If there is no external interface that can be matched and docked with the FPGA chip, the network communication reconstruction area includes the data link layer and the application layer. The online reconfiguration of serial bus communication based on FPGA can be realized through the method provided by the invention. Although in the embodiments of the present invention, only the data link layer is reconfigured in the communication reconstruction of Modbus ASCII and Modbus RTU, because the remaining application layer and the physical layer are the same, and no longer repeat the description.

Figure 6 is a topology diagram of the Modbus bus network. As shown in Figure 6, it is mainly composed of a Modbus master station and several Modbus slave stations, among which the stations are connected through the RS-485 bus, and 120Ω terminal resistors are connected to both ends of the 485 bus. The communication between the stations in the Modbus network is transmitted by this bus, and each correct communication message conforms to the Modbus transmission protocol standard.

According to the regulation of the Modbus transmission protocol standard: firstly, the master station initiates a request to the slave station for communication, and the Modbus master station can only initiate one communication transaction at a time, all slave stations in the network will receive the request message, and then analyze the request message The content of the address field of the message, judge whether the content is the address of the station, if so, make a corresponding response, otherwise discard the message. The effective range of the address field is 1-247, and the address 0 is a broadcast address, and all slave stations will not respond with a message when they receive the request of "address 0". From another aspect, the entire communication mode of the network is determined by the Modbus master station, and all network slave stations must be consistent with it to communicate normally. According to the definition of the Modbus bus transmission protocol standard: the Modbus bus transmission mode is divided into two transmission modes: Modbus ASCII and Modbus RTU.

It should be pointed out that the above specific embodiments can enable those skilled in the art to understand the invention more fully, but do not limit the invention in any way. Therefore, although the description and examples have described the invention in detail, those skilled in the art should understand that the invention can still be modified or equivalently replaced; and all technologies that do not depart from the spirit and scope of the invention The scheme and its improvement are all included in the protection scope of the invention patent.

Claims (10)

1. based on the serial bus communication on-line reorganization method of FPGA, it is characterized in that, described network service process relates to master device and slave station equipment, specifically comprises the steps:

Step one, carries out Region dividing to the FPGA in slave station equipment, and is divided into static region and the reconstruction region that communicates, and described static region comprises reconfigurable control module and reconstruct main control module;

Step 2, the communication protocol type of slave station equipment identification universal serial bus, when the communication protocol type in the communication protocol type and described communication reconstruction region of universal serial bus is inconsistent, activates described reconfigurable control module;

Step 3, the module of reconfigurable control described in slave station equipment sends RECONFIGURATION REQUEST to described reconstruct main control module, preparation is reconstructed after described reconstruct main control module receives described RECONFIGURATION REQUEST, and confirming to send after reconstruct prepares to be ready to complete signal to described reconfigurable control module, carry out dynamically reconfiguring online to described communication reconstruction region after being ready to complete signal described in described reconfigurable control module receives, make the communication protocol type in described reconstruction region consistent with the communication protocol type of described universal serial bus.

2. according to claim 1 based on the serial bus communication on-line reorganization method of FPGA, it is characterized in that, the described communication reconstruction region of slave station equipment comprises the physical layer included by serial link communication protocol, data link layer and application layer, online dynamically the reconfiguring of described network communication protocol refers to: if 1. the physical layer of slave station equipment does not arrange and can to match the external interface docked with fpga chip, then network service reconstruction region comprises data link layer and application layer, if 2. the physical layer of slave station equipment is provided with and can mates with fpga chip the external interface docked, then network service reconstruction region comprises physical layer, data link layer and application layer carry out the process reconstructed that communicates, realize the network service on-line reorganization based on the universal serial bus of FPGA, application layer is identical with the communication restructuring procedure method of data link layer with the restructuring procedure that communicates of physical layer.

3. the serial bus communication on-line reorganization method based on FPGA according to claim 1, it is characterized in that, before network service reconstruction region is reconstructed, whole static region is reconfigured once completely with the reconstruction region that communicates, determine the default communication type of described communication reconstruction region.

4. the serial bus communication on-line reorganization method based on FPGA according to claim 1, it is characterized in that, in described step 2, before activation reconfigurable control module, first tested by the memory control module in slave station equipment and set up the data cube computation between described reconfigurable control module and the external memory of slave station equipment, for network service reconstruct prepares configuration file, the position of described configuration file is by the type decided of the communication protocol of current serial bus.

5. the serial bus communication on-line reorganization method based on FPGA according to claim 1, it is characterized in that, in described step 2, after described reconfigurable control module is activated, reconfigurable control module freezes all input signals of described communication reconstruction region, comprises the local reset signal for being resetted by communication reconstruction region that described reconfigurable control module exports to described reconstruct main control module.

6. the serial bus communication on-line reorganization method based on FPGA according to claim 4, it is characterized in that, in described step 3, while described reconfigurable control module sends RECONFIGURATION REQUEST to reconstruct main control module, described reconfigurable control module sends reconstruct clock to described reconstruct main control module, described RECONFIGURATION REQUEST signal runs through whole restructuring procedure in whole restructuring procedure, until there is reconstruct success or reconfiguring false.

7. the serial bus communication on-line reorganization method based on FPGA according to claim 6, it is characterized in that, described reconfigurable control module receive reconstruct main control module be ready to complete signal after, wait for four reconstruct clock cycle, and storage control module reads the data of first 16bit from memory before the 4th reconstruct clock cycle terminates;

At the end of the 4th reconstruct clock cycle, the i.e. trailing edge in the 4th reconstruct cycle, the transfer of data of first 16bit read extremely reconstructs on the data/address bus of main control module by storage control module, first time read the data of second 16bit after waiting for four clock cycle before next trailing edge arrives;

Repeat above-mentioned action until the configuration file in memory has read and reconstructed main control module output reconstruct function signal to described reconfigurable control module.

8. the serial bus communication on-line reorganization method based on FPGA according to claim 7, is characterized in that, removes RECONFIGURATION REQUEST signal after described reconfigurable control module receives and reconstructs function signal within 8 reconstruct clock cycle.

9. the serial bus communication on-line reorganization method based on FPGA according to claim 5, it is characterized in that, after described RECONFIGURATION REQUEST signal relief, after the freeze signal of reconstruction region to be communicated such as needing successfully remove, described RECONFIGURATION REQUEST signal just resets by the reset signal of reconstruction region.

10. the serial bus communication on-line reorganization method based on FPGA according to claim 1, it is characterized in that, described static region also comprises link communication detection module, link communication detection module is according to the communication protocol type of the message information identification current network of universal serial bus, if the communication protocol type in the present communication protocols type and the reconstruction region that identify is inconsistent, link communication detection module activation reconfigurable control module.