CN104201111A - Method for manufacturing oxide semiconductor thin-film transistors - Google Patents

Abstract

The invention relates to a method for preparing an oxide semiconductor thin film transistor. An extremely thin hydroxide-containing semiconductor layer is deposited between a source-drain electrode layer and a source-drain region by a deposition method, and an annealing process is used to finally form a thin film transistor. The transistor The region where the source-drain electrode layer is in contact with the source-drain region has an introduced hydrogen concentration distribution. The hydrogen concentration introduced is the highest at the interface where the source-drain metal electrode layer and the source-drain region are in contact with the intermediate layer, and the hydrogen concentration gradually becomes smaller away from the interface. Further, the source-drain region part near the channel region does not cover the source-drain metal electrode layer, and there is no With the introduced hydrogen concentration distribution, the present invention can effectively reduce the series resistance of the oxide semiconductor thin film transistor without degrading the performance of the oxide semiconductor thin film transistor.

Description

A kind of preparation method of oxide semiconductor thin film transistor

field of invention

The invention relates to a preparation method of a thin film transistor, in particular to a preparation method of an oxide semiconductor thin film transistor.

Background technique

As a field-effect semiconductor device, thin-film transistors have important and irreplaceable applications in display fields such as active matrix display drivers. Semiconductor active materials have a crucial impact on device performance and manufacturing processes. Silicon is the active semiconductor Thin film transistors of materials often have the disadvantages of low mobility and strong photosensitivity. Transparent wide bandgap oxide semiconductor materials represented by zinc oxide can well solve the shortcomings of silicon semiconductor materials, as oxide semiconductor materials that can be used for thin film transistors include ZnO, MgZnO, Zn-Sn-O, In-Zn-O , SnO, Ga2O3, In-Ga-O, In302, In-Ga-Zn-O and other materials with excellent performance. However, with the rapid development of the display field, the requirements for the characteristics of the oxide semiconductor thin film transistor are getting higher and higher, such as smaller series resistance and higher mobility.

Contents of the invention

The invention solves the problem of reducing the series resistance of the oxide semiconductor thin film transistor without reducing the performance of the oxide thin film transistor;

In order to solve the above technical problems, the present invention provides a method for preparing a thin film transistor, which includes an insulating substrate; a gate electrode layer on the insulating substrate; a gate insulating layer covering the gate electrode layer on the insulating substrate. layer; the oxide semiconductor layer is formed on the gate insulating layer, and includes a channel region facing the gate electrode layer and a source-drain region located at both ends of the channel region; a source-drain electrode layer, located on the source-drain region ; It is characterized in that: there is an introduced hydrogen concentration distribution in the region where the source-drain electrode layer contacts the source-drain region. The hydrogen concentration introduced at the interface between the source metal electrode layer and the source region, and the interface between the drain metal electrode and the drain region is the highest, and the hydrogen introduced in the direction away from the interface The concentration gradually decreases. There is no introduced hydrogen concentration distribution at the end of the source-drain electrode layer away from the source-drain region. The portion of the source-drain region close to the channel region does not cover the source-drain metal electrode layer, and there is no introduced hydrogen concentration distribution in the channel region. The length of the portion of the source-drain region close to the channel region that does not cover the source-drain metal electrode layer is preferably between 1/4 and 1/2 of the length of the drain region. The source-drain electrode layer is selected from one of aluminum, titanium, molybdenum, neodymium, yttrium or tantalum. The oxide semiconductor layer is one of Zn-Sn-O, In-Zn-O, In-Ga-O, MgZnO and In2O3 layers.

Description of drawings

1-6 are cross-sectional views of oxide semiconductor thin film transistors of the present invention at various stages of preparation.

Detailed ways

The invention can reduce the resistance between the source electrode, the drain electrode and the oxide semiconductor without affecting the threshold voltage, cut-off current and mobility;

Referring to the cross-sectional view of the oxide semiconductor thin film transistor of the present invention shown in FIG. 6, the transistor 100 includes an insulating substrate 101, a bottom gate layer 103 is deposited on the insulating substrate 101, and an insulating cover layer 102 is used to completely cover the bottom gate. 103 covers the insulating substrate 101 to play the role of insulation and isolation, and at the same time serves as the gate dielectric layer of the thin film transistor, and the material of the gate dielectric layer 102 is selected as a silicon oxide layer. The oxide semiconductor layer 104 is located on the gate dielectric layer 102, the oxide semiconductor region facing the bottom gate 103 is formed as a channel region 1041, and one side of the regions on both sides of the channel region 1041 is formed as a source region 1042, The other side of the channel region is formed as the drain region 1042; the source metal electrode 105 and the drain metal electrode 105 are formed on the source region 1042 and the drain region 1042, and the source region 1042 and the drain region 1042 near the channel region 1041 Part of the drain region 1042 does not cover the source metal electrode layer 105 and the drain metal electrode layer 105 , and the length of this part (along the channel length direction) is preferably between 1/4 and 1/2 of the length of the drain region. The interface region between the source metal electrode layer 105 and the source region 1042 and the interface region between the drain metal electrode layer 105 and the drain region 1042 are doped with hydrogen ions. In this interface region, the hydrogen concentration introduced at the interface between the source metal electrode layer 105 and the source region 1042 and the interface between the drain metal electrode 105 and the drain region 1042 is the highest, and the concentration of hydrogen introduced in the direction away from the interface gradually increases. That is to say, the introduced hydrogen concentration gradually decreases from the interface between the source metal electrode layer 105 and the source region 1042 toward the inside of the source metal electrode layer 105, and gradually decreases toward the inside of the source region 1042. Small; the introduced hydrogen concentration gradually decreases from the interface between the drain metal electrode layer 105 and the drain region 1042 toward the inside of the drain metal electrode layer 105 , and gradually decreases toward the inside of the drain region 1042 . At the end of the source metal electrode layer 105 away from the source region 1042, that is, the region of the source metal electrode layer that is usually in contact with the wiring layer, there is no introduced hydrogen distribution, that is, the introduced hydrogen concentration distribution does not extend to the source metal electrode. The surface of the drain metal electrode layer 105 is used to prevent the degradation of the metal electrode surface and enhance the weather resistance and stability of the electrode; the same end of the drain metal electrode layer 105 away from the drain region 1042 has no hydrogen distribution introduced. The hydrogen distribution introduced by the source region 1042 does not extend to the channel region 1041, that is, there is no introduced hydrogen distribution in the channel region 1041. If the introduced hydrogen enters the channel region, it will cause degradation of device performance, for example, it will seriously affect the The off-current and threshold voltage, especially the mobility of the channel region, will have a serious impact. In the process, heat treatment is often used to drive away the hydrogen in the channel region to make the oxide semiconductor in the channel region more pure; the same drain The hydrogen distribution introduced in the pole region 1042 does not extend to the channel region 1041 either. At the same time, the source region 1042 and the drain region 1042 near the channel region do not cover the source metal electrode layer 105 and the drain metal electrode layer 105, which can ensure the introduction of the interface region where the source-drain electrode layer 105 contacts the source-drain region 1042. The distribution of hydrogen does not enter the channel region 1041;

On the one hand, the introduction of hydrogen will bring about superior resistance between the source-drain electrodes and the semiconductor semiconductor, significantly reducing the series resistance of the device and improving device efficiency; will have a negative impact on the device. Therefore, the concentration distribution of the introduced hydrogen in the source-drain metal electrode and the concentration distribution in the source-drain region play an important role in the balance of device performance, such as introducing hydrogen distribution in the entire source-drain metal electrode or in the entire source-drain region If the hydrogen distribution is introduced, the negative effect brought by the introduction of hydrogen will outweigh the positive effect; because the generation of series resistance is significantly greater at the interface between the source-drain metal electrode and the source-drain region than at the interface away from the interface. Therefore, the distribution of the introduced hydrogen concentration is the largest at the interface between the source-drain metal electrode and the source-drain region, and gradually decreases toward the direction away from the interface between the source-drain metal electrode and the source-drain region; this can maximize the balance Its positive and negative effects improve device performance as a whole;

In order to realize the oxide semiconductor transistor with the above structure, the following preparation process is provided:

1-6 is a cross-sectional view of a thin film transistor. A bottom gate layer 103 is formed on an insulating substrate 101. The gate layer 103 can be formed by, for example, CVD deposition; a gate insulating film 102 is formed on the bottom gate electrode 103. The gate insulating film 102 can be, for example, an oxide insulating film such as silicon oxide, aluminum oxide, hafnium oxide, or other suitable insulating films; an oxide semiconductor film is formed on the gate insulating film 102;

The oxide semiconductor film can be deposited by a magnetron sputtering process by selecting a suitable target material, Zn-Sn-O, In-Zn-O or In-Ga-O film, and the preparation temperature is 500-600 degrees. Afterwards, a patterned oxide semiconductor layer 104 is formed by etching. The thickness of the oxide semiconductor layer is preferably between 200 nm and 500 nm, and its thickness can be adjusted by controlling sputtering process parameters. The patterned oxide semiconductor layer 104 is doped with boron to form source and drain regions 1042, and the region of the oxide semiconductor film opposite to the gate electrode layer is the channel region 1041;

Afterwards, an insulating layer 106 is deposited on the oxide semiconductor layer 104 and patterned. The patterned insulating layer 106 completely covers the channel region 1041 of the oxide semiconductor layer and partially covers the source and drain regions near the channel region 1041 1042, the covered length is preferably between 1/4 and 1/2 of the length of the source and drain regions;

On the leakage region not covered by the insulating layer 106, a very thin hydroxide-rich semiconductor layer 1021 is deposited by using hydrogen-containing atmosphere magnetron sputtering technology, and the thickness of the extremely thin hydroxide-rich semiconductor layer 1021 is 8-15mm. Nano, the oxide semiconductor material contained in the hydroxide-rich semiconductor layer 1021 is the same as that of the oxide semiconductor layer 104, and the formation process of the hydroxide-rich semiconductor layer 1021 is as follows:

(1) Put the substrate into the magnetron sputtering equipment, select the target material of the same material as the oxide semiconductor layer 104, the background vacuum degree is 2×10 ^-4 Pa, and the substrate temperature is between 400-600 degrees Celsius;

(2) Introduce a hydrogen-carrying atmosphere, the hydrogen-carrying atmosphere is to carry 10 volumes of hydrogen for every 90 volumes of high-purity argon (99.999%);

(3) The sputtering power is 20-40w, start sputtering, and the deposition thickness is 8-20 nanometers;

(4) Vacuum rapid cooling to complete the deposition;

After the hydroxide-rich semiconductor layer 1021 is completed, a metal layer is deposited, and the material of the metal layer can be, for example, aluminum, titanium, molybdenum, or neodymium, yttrium, tantalum and other materials. And patterned to form a patterned source-drain electrode layer 105, the patterned source-drain electrode layer 105 is in contact with the hydroxide-rich semiconductor layer 1021 on the source-drain region;

Finally, heat treatment is performed on the thin film transistor to activate the hydrogen distributed in the hydroxide-rich semiconductor layer 1021 and diffuse to both sides to obtain the required oxide thin film transistor with the introduced hydrogen concentration gradient. The heat treatment temperature is preferably 350 -600 degrees Celsius, more preferably 450 degrees Celsius, and the time is 10-20 minutes. At this time, the boundary between the hydroxide-rich semiconductor layer 1021 and the source and drain regions becomes blurred, that is, the hydroxide-rich semiconductor layer 1021 becomes the source and drain region. A part, so far the fabrication of the oxide semiconductor thin film transistor of the present invention is completed;

It should be noted that the preparation process exemplified above is only one way of realization, and does not limit that the present invention can be realized through other similar ways.

Claims (7)

1. a preparation method for oxide semiconductor thin-film transistor, comprises step:

A, at the upper bottom grid layer (103) that forms of dielectric substrate (101), at the upper gate insulating film (102) that forms of bottom gate electrode (103), on gate insulating film, (102) form patterned oxide semiconductor layer;

B, described patterned oxide semiconductor layer comprise gate electrode layer over against channel region (1041) and the source and drain areas of channel region both sides;

C, on described patterned oxide semiconductor layer, form the insulating barrier (106) of patterning, the insulating barrier of this patterning covers channel region and part source and drain areas;

D, form rich hydroxide semiconductor layer as thin as a wafer with described being insulated on the source and drain areas that layer covers;

The source-drain electrode layer of e, deposition pattern, and contact with the rich hydroxide semiconductor layer on source and drain areas;

F, heat treatment, complete preparation.

2. preparation method as claimed in claim 1, described in be insulated the source and drain areas that layer covers length be preferably source and drain areas length 1/4 to 1/2 between.

3. preparation method as claimed in claim 1, the thickness of described rich hydroxide semiconductor layer (1021) is as thin as a wafer 8-15 nanometer.

4. preparation method as claimed in claim 1, described rich hydroxide semiconductor layer is as thin as a wafer obtained by hydrogeneous atmosphere magnetron sputtering technique deposition.

5. preparation method as claimed in claim 1, the highest in the hydrogen concentration of described source-drain electrode layer and the introducing of interface, described source region, and the hydrogen concentration of introducing in the direction away from interface diminishes gradually.

As claim 5 preparation method, described source-drain electrode layer does not have away from one end of described source and drain areas the hydrogen concentration distribution of introducing, and there is no the hydrogen concentration distribution of introducing in described channel region.

7. any one claim as described in claim 1-6, described hydrogeneous atmosphere magnetron sputtering technique comprises the following steps:

A, substrate is inserted to magnetron sputtering apparatus, select the target with oxide semiconductor layer (104) same material, base vacuum degree is 2 * 10-4pa, between underlayer temperature 400-600 degree Celsius;

B, pass into and take nitrogen atmosphere, this takes the hydrogen that the high-purity argon gas that nitrogen atmosphere is every 90 parts of volumes (99.999%) carries 10 parts of volumes;

C, sputtering power are 20-40w, start sputter, and deposit thickness is in 8-20 nanometer;

D, vacuum are cooling fast, complete deposition.