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BR112018003544A2 - juntas de túnel magnéticas complementares empregando células mtj de bit de linha de fonte compartilhada, e métodos relacionados - Google Patents

juntas de túnel magnéticas complementares empregando células mtj de bit de linha de fonte compartilhada, e métodos relacionados

Info

Publication number
BR112018003544A2
BR112018003544A2 BR112018003544A BR112018003544A BR112018003544A2 BR 112018003544 A2 BR112018003544 A2 BR 112018003544A2 BR 112018003544 A BR112018003544 A BR 112018003544A BR 112018003544 A BR112018003544 A BR 112018003544A BR 112018003544 A2 BR112018003544 A2 BR 112018003544A2
Authority
BR
Brazil
Prior art keywords
mtj
shared source
layer
coupled
access transistor
Prior art date
Application number
BR112018003544A
Other languages
English (en)
Inventor
Li Xia
Zhu Xiaochun
Lu Yu
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112018003544A2 publication Critical patent/BR112018003544A2/pt

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1673—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1659—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1675—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Hall/Mr Elements (AREA)
  • Semiconductor Memories (AREA)

Abstract

as células de bit mtj de complemento que empregam linhas de origem compartilhada são divulgadas. em um aspecto, é fornecida uma célula de bit de complemento 2t2mtj que emprega uma linha de origem compartilhada. a célula bit inclui o primeiro mtj e o segundo mtj. o valor do primeiro mtj é o complemento do valor do segundo mtj. a primeira linha de bit é acoplada à camada superior do primeiro mtj e o primeiro eletrodo do primeiro transistor de acesso é acoplado à camada inferior do primeiro mtj. a segunda linha de bits é acoplada à camada inferior do segundo mtj e o primeiro eletrodo do segundo transistor de acesso é acoplado à camada superior do segundo mtj. cada camada superior do primeiro e segundo mtjs compreende uma camada livre e cada camada inferior do primeiro e segundo mtjs compreende uma camada fixada ou cada camada superior do primeiro e segundo mtjs compreende uma camada fixada e cada camada inferior do primeiro e segundo mtjs compreende uma camada livre. a linha da palavra é acoplada ao segundo eletrodo do primeiro transistor de acesso e do segundo transistor de acesso. a linha de fonte compartilhada é acoplada ao terceiro eletrodo do transistor de primeiro acesso e do segundo transistor de acesso. a utilização da linha de origem compartilhada permite que a célula bit seja projetada com uma resistência parasitária reduzida.
BR112018003544A 2015-08-26 2016-08-10 juntas de túnel magnéticas complementares empregando células mtj de bit de linha de fonte compartilhada, e métodos relacionados BR112018003544A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/835,871 US9548096B1 (en) 2015-08-26 2015-08-26 Reverse complement magnetic tunnel junction (MTJ) bit cells employing shared source lines, and related methods
PCT/US2016/046227 WO2017034797A1 (en) 2015-08-26 2016-08-10 Complementary magnetic tunnel junctions mtj bit cell employing shared source line, and related methods

Publications (1)

Publication Number Publication Date
BR112018003544A2 true BR112018003544A2 (pt) 2018-09-25

Family

ID=56694267

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112018003544A BR112018003544A2 (pt) 2015-08-26 2016-08-10 juntas de túnel magnéticas complementares empregando células mtj de bit de linha de fonte compartilhada, e métodos relacionados

Country Status (7)

Country Link
US (1) US9548096B1 (pt)
EP (1) EP3341938A1 (pt)
JP (1) JP2018526761A (pt)
KR (1) KR20180044918A (pt)
CN (1) CN107924695B (pt)
BR (1) BR112018003544A2 (pt)
WO (1) WO2017034797A1 (pt)

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WO2017176217A1 (en) * 2016-04-07 2017-10-12 Agency For Science, Technology And Research Circuit arrangement, memory column, memory array, and method of forming the same
JP7279012B2 (ja) * 2018-02-26 2023-05-22 ソニーセミコンダクタソリューションズ株式会社 半導体記憶装置及び電子機器
US10446213B1 (en) * 2018-05-16 2019-10-15 Everspin Technologies, Inc. Bitline control in differential magnetic memory
CN111383691A (zh) * 2018-12-28 2020-07-07 上海磁宇信息科技有限公司 一种具有写状态检测单元的mram存储器件
US10924112B2 (en) * 2019-04-11 2021-02-16 Ememory Technology Inc. Bandgap reference circuit
CN112530488B (zh) 2019-09-18 2023-12-19 联华电子股份有限公司 嵌入磁阻式随机存取存储器的电路选择器
US11121174B2 (en) 2019-11-21 2021-09-14 International Business Machines Corporation MRAM integration into the MOL for fast 1T1M cells
CN111696601A (zh) * 2020-06-10 2020-09-22 苏州思立特尔半导体科技有限公司 一种基于磁性隧道结的位元结构
KR20220116757A (ko) 2021-02-15 2022-08-23 삼성전자주식회사 Mtj 소자를 기반으로 한 프로세싱 장치 및 그 장치를 포함하는 전자 시스템
WO2025121242A1 (ja) * 2023-12-06 2025-06-12 ソニーセミコンダクタソリューションズ株式会社 メモリ装置

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US6169689B1 (en) * 1999-12-08 2001-01-02 Motorola, Inc. MTJ stacked cell memory sensing method and apparatus
US6958502B2 (en) * 2003-10-22 2005-10-25 International Business Machines Corporation Magnetic random access memory cell
US7075818B2 (en) * 2004-08-23 2006-07-11 Maglabs, Inc. Magnetic random access memory with stacked memory layers having access lines for writing and reading
US7995378B2 (en) 2007-12-19 2011-08-09 Qualcomm Incorporated MRAM device with shared source line
US20100302838A1 (en) 2009-05-26 2010-12-02 Magic Technologies, Inc. Read disturb-free SMT reference cell scheme
US8208290B2 (en) 2009-08-26 2012-06-26 Qualcomm Incorporated System and method to manufacture magnetic random access memory
US8416600B2 (en) 2009-11-25 2013-04-09 Taiwan Semiconductor Manufacturing Company, Ltd. Reverse connection MTJ cell for STT MRAM
JP2011192345A (ja) 2010-03-15 2011-09-29 Fujitsu Ltd スピン注入型ｍｒａｍ、並びにその書き込み方法及び読み出し方法
US8437181B2 (en) * 2010-06-29 2013-05-07 Magic Technologies, Inc. Shared bit line SMT MRAM array with shunting transistors between the bit lines
JP5867704B2 (ja) 2011-12-21 2016-02-24 凸版印刷株式会社 不揮発性メモリセルアレイ
WO2013095540A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Memory with elements having two stacked magnetic tunneling junction (mtj) devices
US8964458B2 (en) 2012-04-13 2015-02-24 Taiwan Semiconductor Manufacturing Co., Ltd. Differential MRAM structure with relatively reversed magnetic tunnel junction elements enabling writing using same polarity current
JP5444414B2 (ja) 2012-06-04 2014-03-19 株式会社東芝 磁気ランダムアクセスメモリ
JP2014067476A (ja) * 2012-09-10 2014-04-17 Toshiba Corp 磁気抵抗メモリ装置
US8995180B2 (en) 2012-11-29 2015-03-31 Taiwan Semiconductor Manufacturing Company, Ltd. Magnetoresistive random access memory (MRAM) differential bit cell and method of use
KR102235043B1 (ko) 2014-06-09 2021-04-05 삼성전자주식회사 반도체 메모리 장치

Also Published As

Publication number Publication date
KR20180044918A (ko) 2018-05-03
EP3341938A1 (en) 2018-07-04
JP2018526761A (ja) 2018-09-13
US9548096B1 (en) 2017-01-17
WO2017034797A1 (en) 2017-03-02
CN107924695A (zh) 2018-04-17
CN107924695B (zh) 2022-05-24

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Legal Events

Date Code Title Description
B11A Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing
B11Y Definitive dismissal - extension of time limit for request of examination expired [chapter 11.1.1 patent gazette]
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