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Mohanty et al., 2017 - Google Patents

Efficient design for radix-8 booth multiplier and its application in lifting 2-D DWT

Mohanty et al., 2017

Document ID
15204385134248315900
Author
Mohanty B
Choubey A
Publication year
Publication venue
Circuits, Systems, and Signal Processing

External Links

Snippet

In this paper, we present a regular partial product array (PPA) for radix-8 Booth multiplication by removing the extra row with a small overhead complexity. A radix-8 multiplier design is proposed based on the regular PPA which offers a saving of 10.7% area-delay product …
Continue reading at link.springer.com (other versions)

Classifications

    • G—PHYSICS
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    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G—PHYSICS
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    • G06F7/52—Multiplying; Dividing
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